merge -r1464:1467 trunk: Removed unstable forcedeth and e100. stable-1.3
authorFlorian Pose <fp@igh-essen.com>
Thu, 02 Oct 2008 08:00:18 +0000
branchstable-1.3
changeset 1758 2f7f5fa7b870
parent 1757 c5757cebfaea
child 1759 c3b4d3a50ac6
merge -r1464:1467 trunk: Removed unstable forcedeth and e100.
NEWS
configure.ac
devices/Kbuild.in
devices/Makefile.am
devices/e100-2.6.18-ethercat.c
devices/e100-2.6.18-orig.c
devices/forcedeth-2.6.17-ethercat.c
devices/forcedeth-2.6.17-orig.c
devices/forcedeth-2.6.19-ethercat.c
devices/forcedeth-2.6.19-orig.c
script/sysconfig/ethercat
--- a/NEWS	Mon Jul 28 08:30:44 2008 +0000
+++ b/NEWS	Thu Oct 02 08:00:18 2008 +0000
@@ -14,6 +14,7 @@
   drivers from 2.6.20 to 2.6.24 (thanks to Olav Zarges).
 * Reduced watchdog function executions in e1000 drivers.
 * Fixed sync manager configuration problem for some slaves.
+* Removed unstable e100 and forcedeth drivers.
 
 -------------------------------------------------------------------------------
 
--- a/configure.ac	Mon Jul 28 08:30:44 2008 +0000
+++ b/configure.ac	Thu Oct 02 08:00:18 2008 +0000
@@ -187,61 +187,6 @@
 AC_SUBST(KERNEL_E100,[$kernele100])
 
 #------------------------------------------------------------------------------
-# forcedeth driver
-#------------------------------------------------------------------------------
-
-AC_ARG_ENABLE([forcedeth],
-    AS_HELP_STRING([--enable-forcedeth],
-                   [Enable forcedeth driver]),
-    [
-        case "${enableval}" in
-            yes) enableforcedeth=1
-                ;;
-            no) enableforcedeth=0
-                ;;
-            *) AC_MSG_ERROR([Invalid value for --enable-forcedeth])
-                ;;
-        esac
-    ],
-    [enableforcedeth=0] # disabled by default!
-)
-
-AM_CONDITIONAL(ENABLE_FORCEDETH, test "x$enableforcedeth" = "x1")
-AC_SUBST(ENABLE_FORCEDETH,[$enableforcedeth])
-
-AC_ARG_WITH([forcedeth-kernel],
-    AC_HELP_STRING(
-        [--with-forcedeth-kernel=<X.Y.Z>],
-        [forcedeth kernel (only if differing)]
-    ),
-    [
-        kernelforcedeth=[$withval]
-    ],
-    [
-        kernelforcedeth=$linuxversion
-    ]
-)
-
-if test "x${enableforcedeth}" = "x1"; then
-    AC_MSG_CHECKING([for kernel for forcedeth driver])
-
-    kernels=`ls -1 devices/ | grep -oE "^forcedeth-.*-" | cut -d "-" -f 2 | uniq`
-    found=0
-    for k in $kernels; do
-        if test "$kernelforcedeth" = "$k"; then
-            found=1
-        fi
-    done
-    if test $found -ne 1; then
-        AC_MSG_ERROR([kernel $kernelforcedeth not available for forcedeth driver!])
-    fi
-
-    AC_MSG_RESULT([$kernelforcedeth])
-fi
-
-AC_SUBST(KERNEL_FORCEDETH,[$kernelforcedeth])
-
-#------------------------------------------------------------------------------
 # e1000 driver
 #------------------------------------------------------------------------------
 
--- a/devices/Kbuild.in	Mon Jul 28 08:30:44 2008 +0000
+++ b/devices/Kbuild.in	Thu Oct 02 08:00:18 2008 +0000
@@ -51,13 +51,6 @@
 	CFLAGS_$(EC_E100_OBJ) = -DSVNREV=$(REV)
 endif
 
-ifeq (@ENABLE_FORCEDETH@,1)
-	EC_FORCEDETH_OBJ := forcedeth-@KERNEL_FORCEDETH@-ethercat.o
-	obj-m += ec_forcedeth.o
-	ec_forcedeth-objs := $(EC_FORCEDETH_OBJ)
-	CFLAGS_$(EC_FORCEDETH_OBJ) = -DSVNREV=$(REV)
-endif
-
 ifeq (@ENABLE_E1000@,1)
     obj-m += e1000/
 endif
--- a/devices/Makefile.am	Mon Jul 28 08:30:44 2008 +0000
+++ b/devices/Makefile.am	Thu Oct 02 08:00:18 2008 +0000
@@ -45,13 +45,7 @@
 	8139too-2.6.18-ethercat.c \
 	8139too-2.6.18-orig.c \
 	8139too-2.6.19-ethercat.c \
-	8139too-2.6.19-orig.c \
-	e100-2.6.18-ethercat.c \
-	e100-2.6.18-orig.c \
-	forcedeth-2.6.17-ethercat.c \
-	forcedeth-2.6.17-orig.c \
-	forcedeth-2.6.19-ethercat.c \
-	forcedeth-2.6.19-orig.c
+	8139too-2.6.19-orig.c
 
 modules:
 	$(MAKE) -C "@abs_top_srcdir@" modules
@@ -64,9 +58,6 @@
 if ENABLE_E100
 	cp $(srcdir)/ec_e100.ko $(DESTDIR)$(LINUX_MOD_PATH)
 endif
-if ENABLE_FORCEDETH
-	cp $(srcdir)/ec_forcedeth.ko $(DESTDIR)$(LINUX_MOD_PATH)
-endif
 if ENABLE_E1000
 	$(MAKE) -C e1000 modules_install
 endif
--- a/devices/e100-2.6.18-ethercat.c	Mon Jul 28 08:30:44 2008 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3074 +0,0 @@
-/******************************************************************************
- *
- *  $Id$
- *
- *  Copyright (C) 2007  Florian Pose, Ingenieurgemeinschaft IgH
- *
- *  This file is part of the IgH EtherCAT Master.
- *
- *  The IgH EtherCAT Master is free software; you can redistribute it
- *  and/or modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version 2 of the
- *  License, or (at your option) any later version.
- *
- *  The IgH EtherCAT Master is distributed in the hope that it will be
- *  useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
- *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *  GNU General Public License for more details.
- *
- *  You should have received a copy of the GNU General Public License
- *  along with the IgH EtherCAT Master; if not, write to the Free Software
- *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- *
- *  The right to use EtherCAT Technology is granted and comes free of
- *  charge under condition of compatibility of product made by
- *  Licensee. People intending to distribute/sell products based on the
- *  code, have to sign an agreement to guarantee that products using
- *  software based on IgH EtherCAT master stay compatible with the actual
- *  EtherCAT specification (which are released themselves as an open
- *  standard) as the (only) precondition to have the right to use EtherCAT
- *  Technology, IP and trade marks.
- *
- *****************************************************************************/
-
-/**
-   \file
-   EtherCAT driver for e100-compatible NICs.
-*/
-
-/* Former documentation: */
-
-/*******************************************************************************
-
-  Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
-
-  This program is free software; you can redistribute it and/or modify it
-  under the terms of the GNU General Public License as published by the Free
-  Software Foundation; either version 2 of the License, or (at your option)
-  any later version.
-
-  This program is distributed in the hope that it will be useful, but WITHOUT
-  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-  more details.
-
-  You should have received a copy of the GNU General Public License along with
-  this program; if not, write to the Free Software Foundation, Inc., 59
-  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
-
-  The full GNU General Public License is included in this distribution in the
-  file called LICENSE.
-
-  Contact Information:
-  Linux NICS <linux.nics@intel.com>
-  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
-
-*******************************************************************************/
-
-/*
- *	e100.c: Intel(R) PRO/100 ethernet driver
- *
- *	(Re)written 2003 by scott.feldman@intel.com.  Based loosely on
- *	original e100 driver, but better described as a munging of
- *	e100, e1000, eepro100, tg3, 8139cp, and other drivers.
- *
- *	References:
- *		Intel 8255x 10/100 Mbps Ethernet Controller Family,
- *		Open Source Software Developers Manual,
- *		http://sourceforge.net/projects/e1000
- *
- *
- *	                      Theory of Operation
- *
- *	I.   General
- *
- *	The driver supports Intel(R) 10/100 Mbps PCI Fast Ethernet
- *	controller family, which includes the 82557, 82558, 82559, 82550,
- *	82551, and 82562 devices.  82558 and greater controllers
- *	integrate the Intel 82555 PHY.  The controllers are used in
- *	server and client network interface cards, as well as in
- *	LAN-On-Motherboard (LOM), CardBus, MiniPCI, and ICHx
- *	configurations.  8255x supports a 32-bit linear addressing
- *	mode and operates at 33Mhz PCI clock rate.
- *
- *	II.  Driver Operation
- *
- *	Memory-mapped mode is used exclusively to access the device's
- *	shared-memory structure, the Control/Status Registers (CSR). All
- *	setup, configuration, and control of the device, including queuing
- *	of Tx, Rx, and configuration commands is through the CSR.
- *	cmd_lock serializes accesses to the CSR command register.  cb_lock
- *	protects the shared Command Block List (CBL).
- *
- *	8255x is highly MII-compliant and all access to the PHY go
- *	through the Management Data Interface (MDI).  Consequently, the
- *	driver leverages the mii.c library shared with other MII-compliant
- *	devices.
- *
- *	Big- and Little-Endian byte order as well as 32- and 64-bit
- *	archs are supported.  Weak-ordered memory and non-cache-coherent
- *	archs are supported.
- *
- *	III. Transmit
- *
- *	A Tx skb is mapped and hangs off of a TCB.  TCBs are linked
- *	together in a fixed-size ring (CBL) thus forming the flexible mode
- *	memory structure.  A TCB marked with the suspend-bit indicates
- *	the end of the ring.  The last TCB processed suspends the
- *	controller, and the controller can be restarted by issue a CU
- *	resume command to continue from the suspend point, or a CU start
- *	command to start at a given position in the ring.
- *
- *	Non-Tx commands (config, multicast setup, etc) are linked
- *	into the CBL ring along with Tx commands.  The common structure
- *	used for both Tx and non-Tx commands is the Command Block (CB).
- *
- *	cb_to_use is the next CB to use for queuing a command; cb_to_clean
- *	is the next CB to check for completion; cb_to_send is the first
- *	CB to start on in case of a previous failure to resume.  CB clean
- *	up happens in interrupt context in response to a CU interrupt.
- *	cbs_avail keeps track of number of free CB resources available.
- *
- * 	Hardware padding of short packets to minimum packet size is
- * 	enabled.  82557 pads with 7Eh, while the later controllers pad
- * 	with 00h.
- *
- *	IV.  Recieve
- *
- *	The Receive Frame Area (RFA) comprises a ring of Receive Frame
- *	Descriptors (RFD) + data buffer, thus forming the simplified mode
- *	memory structure.  Rx skbs are allocated to contain both the RFD
- *	and the data buffer, but the RFD is pulled off before the skb is
- *	indicated.  The data buffer is aligned such that encapsulated
- *	protocol headers are u32-aligned.  Since the RFD is part of the
- *	mapped shared memory, and completion status is contained within
- *	the RFD, the RFD must be dma_sync'ed to maintain a consistent
- *	view from software and hardware.
- *
- *	Under typical operation, the  receive unit (RU) is start once,
- *	and the controller happily fills RFDs as frames arrive.  If
- *	replacement RFDs cannot be allocated, or the RU goes non-active,
- *	the RU must be restarted.  Frame arrival generates an interrupt,
- *	and Rx indication and re-allocation happen in the same context,
- *	therefore no locking is required.  A software-generated interrupt
- *	is generated from the watchdog to recover from a failed allocation
- *	senario where all Rx resources have been indicated and none re-
- *	placed.
- *
- *	V.   Miscellaneous
- *
- * 	VLAN offloading of tagging, stripping and filtering is not
- * 	supported, but driver will accommodate the extra 4-byte VLAN tag
- * 	for processing by upper layers.  Tx/Rx Checksum offloading is not
- * 	supported.  Tx Scatter/Gather is not supported.  Jumbo Frames is
- * 	not supported (hardware limitation).
- *
- * 	MagicPacket(tm) WoL support is enabled/disabled via ethtool.
- *
- * 	Thanks to JC (jchapman@katalix.com) for helping with
- * 	testing/troubleshooting the development driver.
- *
- * 	TODO:
- * 	o several entry points race with dev->close
- * 	o check for tx-no-resources/stop Q races with tx clean/wake Q
- *
- *	FIXES:
- * 2005/12/02 - Michael O'Donnell <Michael.ODonnell at stratus dot com>
- *	- Stratus87247: protect MDI control register manipulations
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/dma-mapping.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/mii.h>
-#include <linux/if_vlan.h>
-#include <linux/skbuff.h>
-#include <linux/ethtool.h>
-#include <linux/string.h>
-#include <asm/unaligned.h>
-
-// EtherCAT includes
-#include "../globals.h"
-#include "ecdev.h"
-
-#define DRV_NAME		"ec_e100"
-#define DRV_EXT		"-NAPI"
-#define DRV_VERSION		"3.5.10-k2"DRV_EXT
-#define DRV_DESCRIPTION		"EtherCAT-capable Intel(R) PRO/100 Network Driver"
-#define PFX			DRV_NAME ": "
-
-#define E100_WATCHDOG_PERIOD	(2 * HZ)
-#define E100_NAPI_WEIGHT	16
-
-MODULE_DESCRIPTION(DRV_DESCRIPTION);
-MODULE_AUTHOR("Florian Pose <fp@igh-essen.com>");
-MODULE_LICENSE("GPL");
-MODULE_VERSION(DRV_VERSION ", master " EC_MASTER_VERSION);
-
-// EtherCAT variables
-static int ec_device_index = -1;
-static int ec_device_master_index = 0;
-struct net_device *e100_ec_netdev = NULL;
-unsigned int e100_device_index = 0;
-
-// EtherCAT module parameters
-module_param(ec_device_index, int, -1);
-module_param(ec_device_master_index, int, 0);
-MODULE_PARM_DESC(ec_device_index,
-                 "Index of the device reserved for EtherCAT.");
-MODULE_PARM_DESC(ec_device_master_index,
-                 "Index of the EtherCAT master to register the device.");
-
-void e100_ec_poll(struct net_device *);
-
-static int debug = 3;
-static int eeprom_bad_csum_allow = 0;
-module_param(debug, int, 0);
-module_param(eeprom_bad_csum_allow, int, 0);
-MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
-MODULE_PARM_DESC(eeprom_bad_csum_allow, "Allow bad eeprom checksums");
-#define DPRINTK(nlevel, klevel, fmt, args...) \
-	(void)((NETIF_MSG_##nlevel & nic->msg_enable) && \
-	printk(KERN_##klevel PFX "%s: %s: " fmt, nic->netdev->name, \
-		__FUNCTION__ , ## args))
-
-#define INTEL_8255X_ETHERNET_DEVICE(device_id, ich) {\
-	PCI_VENDOR_ID_INTEL, device_id, PCI_ANY_ID, PCI_ANY_ID, \
-	PCI_CLASS_NETWORK_ETHERNET << 8, 0xFFFF00, ich }
-static struct pci_device_id e100_id_table[] = {
-	INTEL_8255X_ETHERNET_DEVICE(0x1029, 0),
-	INTEL_8255X_ETHERNET_DEVICE(0x1030, 0),
-	INTEL_8255X_ETHERNET_DEVICE(0x1031, 3),
-	INTEL_8255X_ETHERNET_DEVICE(0x1032, 3),
-	INTEL_8255X_ETHERNET_DEVICE(0x1033, 3),
-	INTEL_8255X_ETHERNET_DEVICE(0x1034, 3),
-	INTEL_8255X_ETHERNET_DEVICE(0x1038, 3),
-	INTEL_8255X_ETHERNET_DEVICE(0x1039, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x103A, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x103B, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x103C, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x103D, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x103E, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x1050, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1051, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1052, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1053, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1054, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1055, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1056, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1057, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1059, 0),
-	INTEL_8255X_ETHERNET_DEVICE(0x1064, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1065, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1066, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1067, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1068, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1069, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x106A, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x106B, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1091, 7),
-	INTEL_8255X_ETHERNET_DEVICE(0x1092, 7),
-	INTEL_8255X_ETHERNET_DEVICE(0x1093, 7),
-	INTEL_8255X_ETHERNET_DEVICE(0x1094, 7),
-	INTEL_8255X_ETHERNET_DEVICE(0x1095, 7),
-	INTEL_8255X_ETHERNET_DEVICE(0x1209, 0),
-	INTEL_8255X_ETHERNET_DEVICE(0x1229, 0),
-	INTEL_8255X_ETHERNET_DEVICE(0x2449, 2),
-	INTEL_8255X_ETHERNET_DEVICE(0x2459, 2),
-	INTEL_8255X_ETHERNET_DEVICE(0x245D, 2),
-	INTEL_8255X_ETHERNET_DEVICE(0x27DC, 7),
-	{ 0, }
-};
-// prevent from being loaded automatically
-//MODULE_DEVICE_TABLE(pci, e100_id_table);
-
-enum mac {
-	mac_82557_D100_A  = 0,
-	mac_82557_D100_B  = 1,
-	mac_82557_D100_C  = 2,
-	mac_82558_D101_A4 = 4,
-	mac_82558_D101_B0 = 5,
-	mac_82559_D101M   = 8,
-	mac_82559_D101S   = 9,
-	mac_82550_D102    = 12,
-	mac_82550_D102_C  = 13,
-	mac_82551_E       = 14,
-	mac_82551_F       = 15,
-	mac_82551_10      = 16,
-	mac_unknown       = 0xFF,
-};
-
-enum phy {
-	phy_100a     = 0x000003E0,
-	phy_100c     = 0x035002A8,
-	phy_82555_tx = 0x015002A8,
-	phy_nsc_tx   = 0x5C002000,
-	phy_82562_et = 0x033002A8,
-	phy_82562_em = 0x032002A8,
-	phy_82562_ek = 0x031002A8,
-	phy_82562_eh = 0x017002A8,
-	phy_unknown  = 0xFFFFFFFF,
-};
-
-/* CSR (Control/Status Registers) */
-struct csr {
-	struct {
-		u8 status;
-		u8 stat_ack;
-		u8 cmd_lo;
-		u8 cmd_hi;
-		u32 gen_ptr;
-	} scb;
-	u32 port;
-	u16 flash_ctrl;
-	u8 eeprom_ctrl_lo;
-	u8 eeprom_ctrl_hi;
-	u32 mdi_ctrl;
-	u32 rx_dma_count;
-};
-
-enum scb_status {
-	rus_ready        = 0x10,
-	rus_mask         = 0x3C,
-};
-
-enum ru_state  {
-	RU_SUSPENDED = 0,
-	RU_RUNNING	 = 1,
-	RU_UNINITIALIZED = -1,
-};
-
-enum scb_stat_ack {
-	stat_ack_not_ours    = 0x00,
-	stat_ack_sw_gen      = 0x04,
-	stat_ack_rnr         = 0x10,
-	stat_ack_cu_idle     = 0x20,
-	stat_ack_frame_rx    = 0x40,
-	stat_ack_cu_cmd_done = 0x80,
-	stat_ack_not_present = 0xFF,
-	stat_ack_rx = (stat_ack_sw_gen | stat_ack_rnr | stat_ack_frame_rx),
-	stat_ack_tx = (stat_ack_cu_idle | stat_ack_cu_cmd_done),
-};
-
-enum scb_cmd_hi {
-	irq_mask_none = 0x00,
-	irq_mask_all  = 0x01,
-	irq_sw_gen    = 0x02,
-};
-
-enum scb_cmd_lo {
-	cuc_nop        = 0x00,
-	ruc_start      = 0x01,
-	ruc_load_base  = 0x06,
-	cuc_start      = 0x10,
-	cuc_resume     = 0x20,
-	cuc_dump_addr  = 0x40,
-	cuc_dump_stats = 0x50,
-	cuc_load_base  = 0x60,
-	cuc_dump_reset = 0x70,
-};
-
-enum cuc_dump {
-	cuc_dump_complete       = 0x0000A005,
-	cuc_dump_reset_complete = 0x0000A007,
-};
-
-enum port {
-	software_reset  = 0x0000,
-	selftest        = 0x0001,
-	selective_reset = 0x0002,
-};
-
-enum eeprom_ctrl_lo {
-	eesk = 0x01,
-	eecs = 0x02,
-	eedi = 0x04,
-	eedo = 0x08,
-};
-
-enum mdi_ctrl {
-	mdi_write = 0x04000000,
-	mdi_read  = 0x08000000,
-	mdi_ready = 0x10000000,
-};
-
-enum eeprom_op {
-	op_write = 0x05,
-	op_read  = 0x06,
-	op_ewds  = 0x10,
-	op_ewen  = 0x13,
-};
-
-enum eeprom_offsets {
-	eeprom_cnfg_mdix  = 0x03,
-	eeprom_id         = 0x0A,
-	eeprom_config_asf = 0x0D,
-	eeprom_smbus_addr = 0x90,
-};
-
-enum eeprom_cnfg_mdix {
-	eeprom_mdix_enabled = 0x0080,
-};
-
-enum eeprom_id {
-	eeprom_id_wol = 0x0020,
-};
-
-enum eeprom_config_asf {
-	eeprom_asf = 0x8000,
-	eeprom_gcl = 0x4000,
-};
-
-enum cb_status {
-	cb_complete = 0x8000,
-	cb_ok       = 0x2000,
-};
-
-enum cb_command {
-	cb_nop    = 0x0000,
-	cb_iaaddr = 0x0001,
-	cb_config = 0x0002,
-	cb_multi  = 0x0003,
-	cb_tx     = 0x0004,
-	cb_ucode  = 0x0005,
-	cb_dump   = 0x0006,
-	cb_tx_sf  = 0x0008,
-	cb_cid    = 0x1f00,
-	cb_i      = 0x2000,
-	cb_s      = 0x4000,
-	cb_el     = 0x8000,
-};
-
-struct rfd {
-	u16 status;
-	u16 command;
-	u32 link;
-	u32 rbd;
-	u16 actual_size;
-	u16 size;
-};
-
-struct rx {
-	struct rx *next, *prev;
-	struct sk_buff *skb;
-	dma_addr_t dma_addr;
-};
-
-#if defined(__BIG_ENDIAN_BITFIELD)
-#define X(a,b)	b,a
-#else
-#define X(a,b)	a,b
-#endif
-struct config {
-/*0*/	u8 X(byte_count:6, pad0:2);
-/*1*/	u8 X(X(rx_fifo_limit:4, tx_fifo_limit:3), pad1:1);
-/*2*/	u8 adaptive_ifs;
-/*3*/	u8 X(X(X(X(mwi_enable:1, type_enable:1), read_align_enable:1),
-	   term_write_cache_line:1), pad3:4);
-/*4*/	u8 X(rx_dma_max_count:7, pad4:1);
-/*5*/	u8 X(tx_dma_max_count:7, dma_max_count_enable:1);
-/*6*/	u8 X(X(X(X(X(X(X(late_scb_update:1, direct_rx_dma:1),
-	   tno_intr:1), cna_intr:1), standard_tcb:1), standard_stat_counter:1),
-	   rx_discard_overruns:1), rx_save_bad_frames:1);
-/*7*/	u8 X(X(X(X(X(rx_discard_short_frames:1, tx_underrun_retry:2),
-	   pad7:2), rx_extended_rfd:1), tx_two_frames_in_fifo:1),
-	   tx_dynamic_tbd:1);
-/*8*/	u8 X(X(mii_mode:1, pad8:6), csma_disabled:1);
-/*9*/	u8 X(X(X(X(X(rx_tcpudp_checksum:1, pad9:3), vlan_arp_tco:1),
-	   link_status_wake:1), arp_wake:1), mcmatch_wake:1);
-/*10*/	u8 X(X(X(pad10:3, no_source_addr_insertion:1), preamble_length:2),
-	   loopback:2);
-/*11*/	u8 X(linear_priority:3, pad11:5);
-/*12*/	u8 X(X(linear_priority_mode:1, pad12:3), ifs:4);
-/*13*/	u8 ip_addr_lo;
-/*14*/	u8 ip_addr_hi;
-/*15*/	u8 X(X(X(X(X(X(X(promiscuous_mode:1, broadcast_disabled:1),
-	   wait_after_win:1), pad15_1:1), ignore_ul_bit:1), crc_16_bit:1),
-	   pad15_2:1), crs_or_cdt:1);
-/*16*/	u8 fc_delay_lo;
-/*17*/	u8 fc_delay_hi;
-/*18*/	u8 X(X(X(X(X(rx_stripping:1, tx_padding:1), rx_crc_transfer:1),
-	   rx_long_ok:1), fc_priority_threshold:3), pad18:1);
-/*19*/	u8 X(X(X(X(X(X(X(addr_wake:1, magic_packet_disable:1),
-	   fc_disable:1), fc_restop:1), fc_restart:1), fc_reject:1),
-	   full_duplex_force:1), full_duplex_pin:1);
-/*20*/	u8 X(X(X(pad20_1:5, fc_priority_location:1), multi_ia:1), pad20_2:1);
-/*21*/	u8 X(X(pad21_1:3, multicast_all:1), pad21_2:4);
-/*22*/	u8 X(X(rx_d102_mode:1, rx_vlan_drop:1), pad22:6);
-	u8 pad_d102[9];
-};
-
-#define E100_MAX_MULTICAST_ADDRS	64
-struct multi {
-	u16 count;
-	u8 addr[E100_MAX_MULTICAST_ADDRS * ETH_ALEN + 2/*pad*/];
-};
-
-/* Important: keep total struct u32-aligned */
-#define UCODE_SIZE			134
-struct cb {
-	u16 status;
-	u16 command;
-	u32 link;
-	union {
-		u8 iaaddr[ETH_ALEN];
-		u32 ucode[UCODE_SIZE];
-		struct config config;
-		struct multi multi;
-		struct {
-			u32 tbd_array;
-			u16 tcb_byte_count;
-			u8 threshold;
-			u8 tbd_count;
-			struct {
-				u32 buf_addr;
-				u16 size;
-				u16 eol;
-			} tbd;
-		} tcb;
-		u32 dump_buffer_addr;
-	} u;
-	struct cb *next, *prev;
-	dma_addr_t dma_addr;
-	struct sk_buff *skb;
-};
-
-enum loopback {
-	lb_none = 0, lb_mac = 1, lb_phy = 3,
-};
-
-struct stats {
-	u32 tx_good_frames, tx_max_collisions, tx_late_collisions,
-		tx_underruns, tx_lost_crs, tx_deferred, tx_single_collisions,
-		tx_multiple_collisions, tx_total_collisions;
-	u32 rx_good_frames, rx_crc_errors, rx_alignment_errors,
-		rx_resource_errors, rx_overrun_errors, rx_cdt_errors,
-		rx_short_frame_errors;
-	u32 fc_xmt_pause, fc_rcv_pause, fc_rcv_unsupported;
-	u16 xmt_tco_frames, rcv_tco_frames;
-	u32 complete;
-};
-
-struct mem {
-	struct {
-		u32 signature;
-		u32 result;
-	} selftest;
-	struct stats stats;
-	u8 dump_buf[596];
-};
-
-struct param_range {
-	u32 min;
-	u32 max;
-	u32 count;
-};
-
-struct params {
-	struct param_range rfds;
-	struct param_range cbs;
-};
-
-struct nic {
-	/* Begin: frequently used values: keep adjacent for cache effect */
-	u32 msg_enable				____cacheline_aligned;
-	struct net_device *netdev;
-	struct pci_dev *pdev;
-
-	struct rx *rxs				____cacheline_aligned;
-	struct rx *rx_to_use;
-	struct rx *rx_to_clean;
-	struct rfd blank_rfd;
-	enum ru_state ru_running;
-
-	spinlock_t cb_lock			____cacheline_aligned;
-	spinlock_t cmd_lock;
-	struct csr __iomem *csr;
-	enum scb_cmd_lo cuc_cmd;
-	unsigned int cbs_avail;
-	struct cb *cbs;
-	struct cb *cb_to_use;
-	struct cb *cb_to_send;
-	struct cb *cb_to_clean;
-	u16 tx_command;
-	/* End: frequently used values: keep adjacent for cache effect */
-
-	enum {
-		ich                = (1 << 0),
-		promiscuous        = (1 << 1),
-		multicast_all      = (1 << 2),
-		wol_magic          = (1 << 3),
-		ich_10h_workaround = (1 << 4),
-	} flags					____cacheline_aligned;
-
-	enum mac mac;
-	enum phy phy;
-	struct params params;
-	struct net_device_stats net_stats;
-	struct timer_list watchdog;
-	struct timer_list blink_timer;
-	struct mii_if_info mii;
-	struct work_struct tx_timeout_task;
-	enum loopback loopback;
-
-	struct mem *mem;
-	dma_addr_t dma_addr;
-
-	dma_addr_t cbs_dma_addr;
-	u8 adaptive_ifs;
-	u8 tx_threshold;
-	u32 tx_frames;
-	u32 tx_collisions;
-	u32 tx_deferred;
-	u32 tx_single_collisions;
-	u32 tx_multiple_collisions;
-	u32 tx_fc_pause;
-	u32 tx_tco_frames;
-
-	u32 rx_fc_pause;
-	u32 rx_fc_unsupported;
-	u32 rx_tco_frames;
-	u32 rx_over_length_errors;
-
-	u8 rev_id;
-	u16 leds;
-	u16 eeprom_wc;
-	u16 eeprom[256];
-	spinlock_t mdio_lock;
-
-    u8 ethercat;
-    ec_device_t *ecdev;
-};
-
-static inline void e100_write_flush(struct nic *nic)
-{
-	/* Flush previous PCI writes through intermediate bridges
-	 * by doing a benign read */
-	(void)readb(&nic->csr->scb.status);
-}
-
-static void e100_enable_irq(struct nic *nic)
-{
-	unsigned long flags;
-
-	spin_lock_irqsave(&nic->cmd_lock, flags);
-	writeb(irq_mask_none, &nic->csr->scb.cmd_hi);
-	e100_write_flush(nic);
-	spin_unlock_irqrestore(&nic->cmd_lock, flags);
-}
-
-static void e100_disable_irq(struct nic *nic)
-{
-	unsigned long flags;
-
-	spin_lock_irqsave(&nic->cmd_lock, flags);
-	writeb(irq_mask_all, &nic->csr->scb.cmd_hi);
-	e100_write_flush(nic);
-	spin_unlock_irqrestore(&nic->cmd_lock, flags);
-}
-
-static void e100_hw_reset(struct nic *nic)
-{
-	/* Put CU and RU into idle with a selective reset to get
-	 * device off of PCI bus */
-	writel(selective_reset, &nic->csr->port);
-	e100_write_flush(nic); udelay(20);
-
-	/* Now fully reset device */
-	writel(software_reset, &nic->csr->port);
-	e100_write_flush(nic); udelay(20);
-
-	/* Mask off our interrupt line - it's unmasked after reset */
-	e100_disable_irq(nic);
-}
-
-static int e100_self_test(struct nic *nic)
-{
-	u32 dma_addr = nic->dma_addr + offsetof(struct mem, selftest);
-
-	/* Passing the self-test is a pretty good indication
-	 * that the device can DMA to/from host memory */
-
-	nic->mem->selftest.signature = 0;
-	nic->mem->selftest.result = 0xFFFFFFFF;
-
-	writel(selftest | dma_addr, &nic->csr->port);
-	e100_write_flush(nic);
-	/* Wait 10 msec for self-test to complete */
-	msleep(10);
-
-	/* Interrupts are enabled after self-test */
-	e100_disable_irq(nic);
-
-	/* Check results of self-test */
-	if(nic->mem->selftest.result != 0) {
-		DPRINTK(HW, ERR, "Self-test failed: result=0x%08X\n",
-			nic->mem->selftest.result);
-		return -ETIMEDOUT;
-	}
-	if(nic->mem->selftest.signature == 0) {
-		DPRINTK(HW, ERR, "Self-test failed: timed out\n");
-		return -ETIMEDOUT;
-	}
-
-	return 0;
-}
-
-static void e100_eeprom_write(struct nic *nic, u16 addr_len, u16 addr, u16 data)
-{
-	u32 cmd_addr_data[3];
-	u8 ctrl;
-	int i, j;
-
-	/* Three cmds: write/erase enable, write data, write/erase disable */
-	cmd_addr_data[0] = op_ewen << (addr_len - 2);
-	cmd_addr_data[1] = (((op_write << addr_len) | addr) << 16) |
-		cpu_to_le16(data);
-	cmd_addr_data[2] = op_ewds << (addr_len - 2);
-
-	/* Bit-bang cmds to write word to eeprom */
-	for(j = 0; j < 3; j++) {
-
-		/* Chip select */
-		writeb(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
-		e100_write_flush(nic); udelay(4);
-
-		for(i = 31; i >= 0; i--) {
-			ctrl = (cmd_addr_data[j] & (1 << i)) ?
-				eecs | eedi : eecs;
-			writeb(ctrl, &nic->csr->eeprom_ctrl_lo);
-			e100_write_flush(nic); udelay(4);
-
-			writeb(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
-			e100_write_flush(nic); udelay(4);
-		}
-		/* Wait 10 msec for cmd to complete */
-		msleep(10);
-
-		/* Chip deselect */
-		writeb(0, &nic->csr->eeprom_ctrl_lo);
-		e100_write_flush(nic); udelay(4);
-	}
-};
-
-/* General technique stolen from the eepro100 driver - very clever */
-static u16 e100_eeprom_read(struct nic *nic, u16 *addr_len, u16 addr)
-{
-	u32 cmd_addr_data;
-	u16 data = 0;
-	u8 ctrl;
-	int i;
-
-	cmd_addr_data = ((op_read << *addr_len) | addr) << 16;
-
-	/* Chip select */
-	writeb(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
-	e100_write_flush(nic); udelay(4);
-
-	/* Bit-bang to read word from eeprom */
-	for(i = 31; i >= 0; i--) {
-		ctrl = (cmd_addr_data & (1 << i)) ? eecs | eedi : eecs;
-		writeb(ctrl, &nic->csr->eeprom_ctrl_lo);
-		e100_write_flush(nic); udelay(4);
-
-		writeb(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
-		e100_write_flush(nic); udelay(4);
-
-		/* Eeprom drives a dummy zero to EEDO after receiving
-		 * complete address.  Use this to adjust addr_len. */
-		ctrl = readb(&nic->csr->eeprom_ctrl_lo);
-		if(!(ctrl & eedo) && i > 16) {
-			*addr_len -= (i - 16);
-			i = 17;
-		}
-
-		data = (data << 1) | (ctrl & eedo ? 1 : 0);
-	}
-
-	/* Chip deselect */
-	writeb(0, &nic->csr->eeprom_ctrl_lo);
-	e100_write_flush(nic); udelay(4);
-
-	return le16_to_cpu(data);
-};
-
-/* Load entire EEPROM image into driver cache and validate checksum */
-static int e100_eeprom_load(struct nic *nic)
-{
-	u16 addr, addr_len = 8, checksum = 0;
-
-	/* Try reading with an 8-bit addr len to discover actual addr len */
-	e100_eeprom_read(nic, &addr_len, 0);
-	nic->eeprom_wc = 1 << addr_len;
-
-	for(addr = 0; addr < nic->eeprom_wc; addr++) {
-		nic->eeprom[addr] = e100_eeprom_read(nic, &addr_len, addr);
-		if(addr < nic->eeprom_wc - 1)
-			checksum += cpu_to_le16(nic->eeprom[addr]);
-	}
-
-	/* The checksum, stored in the last word, is calculated such that
-	 * the sum of words should be 0xBABA */
-	checksum = le16_to_cpu(0xBABA - checksum);
-	if(checksum != nic->eeprom[nic->eeprom_wc - 1]) {
-		DPRINTK(PROBE, ERR, "EEPROM corrupted\n");
-		if (!eeprom_bad_csum_allow)
-			return -EAGAIN;
-	}
-
-	return 0;
-}
-
-/* Save (portion of) driver EEPROM cache to device and update checksum */
-static int e100_eeprom_save(struct nic *nic, u16 start, u16 count)
-{
-	u16 addr, addr_len = 8, checksum = 0;
-
-	/* Try reading with an 8-bit addr len to discover actual addr len */
-	e100_eeprom_read(nic, &addr_len, 0);
-	nic->eeprom_wc = 1 << addr_len;
-
-	if(start + count >= nic->eeprom_wc)
-		return -EINVAL;
-
-	for(addr = start; addr < start + count; addr++)
-		e100_eeprom_write(nic, addr_len, addr, nic->eeprom[addr]);
-
-	/* The checksum, stored in the last word, is calculated such that
-	 * the sum of words should be 0xBABA */
-	for(addr = 0; addr < nic->eeprom_wc - 1; addr++)
-		checksum += cpu_to_le16(nic->eeprom[addr]);
-	nic->eeprom[nic->eeprom_wc - 1] = le16_to_cpu(0xBABA - checksum);
-	e100_eeprom_write(nic, addr_len, nic->eeprom_wc - 1,
-		nic->eeprom[nic->eeprom_wc - 1]);
-
-	return 0;
-}
-
-#define E100_WAIT_SCB_TIMEOUT 20000 /* we might have to wait 100ms!!! */
-#define E100_WAIT_SCB_FAST 20       /* delay like the old code */
-static int e100_exec_cmd(struct nic *nic, u8 cmd, dma_addr_t dma_addr)
-{
-	unsigned long flags = 0;
-	unsigned int i;
-	int err = 0;
-
-    if (!nic->ethercat)
-        spin_lock_irqsave(&nic->cmd_lock, flags);
-
-	/* Previous command is accepted when SCB clears */
-	for(i = 0; i < E100_WAIT_SCB_TIMEOUT; i++) {
-		if(likely(!readb(&nic->csr->scb.cmd_lo)))
-			break;
-		cpu_relax();
-		if(unlikely(i > E100_WAIT_SCB_FAST))
-			udelay(5);
-	}
-	if(unlikely(i == E100_WAIT_SCB_TIMEOUT)) {
-		err = -EAGAIN;
-		goto err_unlock;
-	}
-
-	if(unlikely(cmd != cuc_resume))
-		writel(dma_addr, &nic->csr->scb.gen_ptr);
-	writeb(cmd, &nic->csr->scb.cmd_lo);
-
-err_unlock:
-    if (!nic->ethercat)
-        spin_unlock_irqrestore(&nic->cmd_lock, flags);
-
-	return err;
-}
-
-static int e100_exec_cb(struct nic *nic, struct sk_buff *skb,
-	void (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
-{
-	struct cb *cb;
-	unsigned long flags = 0;
-	int err = 0;
-
-    if (!nic->ethercat)
-        spin_lock_irqsave(&nic->cb_lock, flags);
-
-	if(unlikely(!nic->cbs_avail)) {
-		err = -ENOMEM;
-		goto err_unlock;
-	}
-
-	cb = nic->cb_to_use;
-	nic->cb_to_use = cb->next;
-	nic->cbs_avail--;
-	cb->skb = skb;
-
-	if(unlikely(!nic->cbs_avail))
-		err = -ENOSPC;
-
-	cb_prepare(nic, cb, skb);
-
-	/* Order is important otherwise we'll be in a race with h/w:
-	 * set S-bit in current first, then clear S-bit in previous. */
-	cb->command |= cpu_to_le16(cb_s);
-	wmb();
-	cb->prev->command &= cpu_to_le16(~cb_s);
-
-	while(nic->cb_to_send != nic->cb_to_use) {
-		if(unlikely(e100_exec_cmd(nic, nic->cuc_cmd,
-			nic->cb_to_send->dma_addr))) {
-			/* Ok, here's where things get sticky.  It's
-			 * possible that we can't schedule the command
-			 * because the controller is too busy, so
-			 * let's just queue the command and try again
-			 * when another command is scheduled. */
-			if(err == -ENOSPC) {
-				//request a reset
-                if (!nic->ethercat)
-                    schedule_work(&nic->tx_timeout_task);
-			}
-			break;
-		} else {
-			nic->cuc_cmd = cuc_resume;
-			nic->cb_to_send = nic->cb_to_send->next;
-		}
-	}
-
-err_unlock:
-    if (!nic->ethercat)
-        spin_unlock_irqrestore(&nic->cb_lock, flags);
-
-	return err;
-}
-
-static u16 mdio_ctrl(struct nic *nic, u32 addr, u32 dir, u32 reg, u16 data)
-{
-	u32 data_out = 0;
-	unsigned int i;
-	unsigned long flags;
-
-
-	/*
-	 * Stratus87247: we shouldn't be writing the MDI control
-	 * register until the Ready bit shows True.  Also, since
-	 * manipulation of the MDI control registers is a multi-step
-	 * procedure it should be done under lock.
-	 */
-	spin_lock_irqsave(&nic->mdio_lock, flags);
-	for (i = 100; i; --i) {
-		if (readl(&nic->csr->mdi_ctrl) & mdi_ready)
-			break;
-		udelay(20);
-	}
-	if (unlikely(!i)) {
-		printk("e100.mdio_ctrl(%s) won't go Ready\n",
-			nic->netdev->name );
-		spin_unlock_irqrestore(&nic->mdio_lock, flags);
-		return 0;		/* No way to indicate timeout error */
-	}
-	writel((reg << 16) | (addr << 21) | dir | data, &nic->csr->mdi_ctrl);
-
-	for (i = 0; i < 100; i++) {
-		udelay(20);
-		if ((data_out = readl(&nic->csr->mdi_ctrl)) & mdi_ready)
-			break;
-	}
-	spin_unlock_irqrestore(&nic->mdio_lock, flags);
-	DPRINTK(HW, DEBUG,
-		"%s:addr=%d, reg=%d, data_in=0x%04X, data_out=0x%04X\n",
-		dir == mdi_read ? "READ" : "WRITE", addr, reg, data, data_out);
-	return (u16)data_out;
-}
-
-static int mdio_read(struct net_device *netdev, int addr, int reg)
-{
-	return mdio_ctrl(netdev_priv(netdev), addr, mdi_read, reg, 0);
-}
-
-static void mdio_write(struct net_device *netdev, int addr, int reg, int data)
-{
-	mdio_ctrl(netdev_priv(netdev), addr, mdi_write, reg, data);
-}
-
-static void e100_get_defaults(struct nic *nic)
-{
-	struct param_range rfds = { .min = 16, .max = 256, .count = 256 };
-	struct param_range cbs  = { .min = 64, .max = 256, .count = 128 };
-
-	pci_read_config_byte(nic->pdev, PCI_REVISION_ID, &nic->rev_id);
-	/* MAC type is encoded as rev ID; exception: ICH is treated as 82559 */
-	nic->mac = (nic->flags & ich) ? mac_82559_D101M : nic->rev_id;
-	if(nic->mac == mac_unknown)
-		nic->mac = mac_82557_D100_A;
-
-	nic->params.rfds = rfds;
-	nic->params.cbs = cbs;
-
-	/* Quadwords to DMA into FIFO before starting frame transmit */
-	nic->tx_threshold = 0xE0;
-
-	/* no interrupt for every tx completion, delay = 256us if not 557*/
-	nic->tx_command = cpu_to_le16(cb_tx | cb_tx_sf |
-		((nic->mac >= mac_82558_D101_A4) ? cb_cid : cb_i));
-
-	/* Template for a freshly allocated RFD */
-	nic->blank_rfd.command = cpu_to_le16(cb_el);
-	nic->blank_rfd.rbd = 0xFFFFFFFF;
-	nic->blank_rfd.size = cpu_to_le16(VLAN_ETH_FRAME_LEN);
-
-	/* MII setup */
-	nic->mii.phy_id_mask = 0x1F;
-	nic->mii.reg_num_mask = 0x1F;
-	nic->mii.dev = nic->netdev;
-	nic->mii.mdio_read = mdio_read;
-	nic->mii.mdio_write = mdio_write;
-}
-
-static void e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb)
-{
-	struct config *config = &cb->u.config;
-	u8 *c = (u8 *)config;
-
-	cb->command = cpu_to_le16(cb_config);
-
-	memset(config, 0, sizeof(struct config));
-
-	config->byte_count = 0x16;		/* bytes in this struct */
-	config->rx_fifo_limit = 0x8;		/* bytes in FIFO before DMA */
-	config->direct_rx_dma = 0x1;		/* reserved */
-	config->standard_tcb = 0x1;		/* 1=standard, 0=extended */
-	config->standard_stat_counter = 0x1;	/* 1=standard, 0=extended */
-	config->rx_discard_short_frames = 0x1;	/* 1=discard, 0=pass */
-	config->tx_underrun_retry = 0x3;	/* # of underrun retries */
-	config->mii_mode = 0x1;			/* 1=MII mode, 0=503 mode */
-	config->pad10 = 0x6;
-	config->no_source_addr_insertion = 0x1;	/* 1=no, 0=yes */
-	config->preamble_length = 0x2;		/* 0=1, 1=3, 2=7, 3=15 bytes */
-	config->ifs = 0x6;			/* x16 = inter frame spacing */
-	config->ip_addr_hi = 0xF2;		/* ARP IP filter - not used */
-	config->pad15_1 = 0x1;
-	config->pad15_2 = 0x1;
-	config->crs_or_cdt = 0x0;		/* 0=CRS only, 1=CRS or CDT */
-	config->fc_delay_hi = 0x40;		/* time delay for fc frame */
-	config->tx_padding = 0x1;		/* 1=pad short frames */
-	config->fc_priority_threshold = 0x7;	/* 7=priority fc disabled */
-	config->pad18 = 0x1;
-	config->full_duplex_pin = 0x1;		/* 1=examine FDX# pin */
-	config->pad20_1 = 0x1F;
-	config->fc_priority_location = 0x1;	/* 1=byte#31, 0=byte#19 */
-	config->pad21_1 = 0x5;
-
-	config->adaptive_ifs = nic->adaptive_ifs;
-	config->loopback = nic->loopback;
-
-	if(nic->mii.force_media && nic->mii.full_duplex)
-		config->full_duplex_force = 0x1;	/* 1=force, 0=auto */
-
-	if(nic->flags & promiscuous || nic->loopback) {
-		config->rx_save_bad_frames = 0x1;	/* 1=save, 0=discard */
-		config->rx_discard_short_frames = 0x0;	/* 1=discard, 0=save */
-		config->promiscuous_mode = 0x1;		/* 1=on, 0=off */
-	}
-
-	if(nic->flags & multicast_all)
-		config->multicast_all = 0x1;		/* 1=accept, 0=no */
-
-	/* disable WoL when up */
-	if (nic->ethercat ||
-            (netif_running(nic->netdev) || !(nic->flags & wol_magic)))
-		config->magic_packet_disable = 0x1;	/* 1=off, 0=on */
-
-	if(nic->mac >= mac_82558_D101_A4) {
-		config->fc_disable = 0x1;	/* 1=Tx fc off, 0=Tx fc on */
-		config->mwi_enable = 0x1;	/* 1=enable, 0=disable */
-		config->standard_tcb = 0x0;	/* 1=standard, 0=extended */
-		config->rx_long_ok = 0x1;	/* 1=VLANs ok, 0=standard */
-		if(nic->mac >= mac_82559_D101M)
-			config->tno_intr = 0x1;		/* TCO stats enable */
-		else
-			config->standard_stat_counter = 0x0;
-	}
-
-	DPRINTK(HW, DEBUG, "[00-07]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
-		c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7]);
-	DPRINTK(HW, DEBUG, "[08-15]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
-		c[8], c[9], c[10], c[11], c[12], c[13], c[14], c[15]);
-	DPRINTK(HW, DEBUG, "[16-23]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
-		c[16], c[17], c[18], c[19], c[20], c[21], c[22], c[23]);
-}
-
-/********************************************************/
-/*  Micro code for 8086:1229 Rev 8                      */
-/********************************************************/
-
-/*  Parameter values for the D101M B-step  */
-#define D101M_CPUSAVER_TIMER_DWORD		78
-#define D101M_CPUSAVER_BUNDLE_DWORD		65
-#define D101M_CPUSAVER_MIN_SIZE_DWORD		126
-
-#define D101M_B_RCVBUNDLE_UCODE \
-{\
-0x00550215, 0xFFFF0437, 0xFFFFFFFF, 0x06A70789, 0xFFFFFFFF, 0x0558FFFF, \
-0x000C0001, 0x00101312, 0x000C0008, 0x00380216, \
-0x0010009C, 0x00204056, 0x002380CC, 0x00380056, \
-0x0010009C, 0x00244C0B, 0x00000800, 0x00124818, \
-0x00380438, 0x00000000, 0x00140000, 0x00380555, \
-0x00308000, 0x00100662, 0x00100561, 0x000E0408, \
-0x00134861, 0x000C0002, 0x00103093, 0x00308000, \
-0x00100624, 0x00100561, 0x000E0408, 0x00100861, \
-0x000C007E, 0x00222C21, 0x000C0002, 0x00103093, \
-0x00380C7A, 0x00080000, 0x00103090, 0x00380C7A, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x0010009C, 0x00244C2D, 0x00010004, 0x00041000, \
-0x003A0437, 0x00044010, 0x0038078A, 0x00000000, \
-0x00100099, 0x00206C7A, 0x0010009C, 0x00244C48, \
-0x00130824, 0x000C0001, 0x00101213, 0x00260C75, \
-0x00041000, 0x00010004, 0x00130826, 0x000C0006, \
-0x002206A8, 0x0013C926, 0x00101313, 0x003806A8, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00080600, 0x00101B10, 0x00050004, 0x00100826, \
-0x00101210, 0x00380C34, 0x00000000, 0x00000000, \
-0x0021155B, 0x00100099, 0x00206559, 0x0010009C, \
-0x00244559, 0x00130836, 0x000C0000, 0x00220C62, \
-0x000C0001, 0x00101B13, 0x00229C0E, 0x00210C0E, \
-0x00226C0E, 0x00216C0E, 0x0022FC0E, 0x00215C0E, \
-0x00214C0E, 0x00380555, 0x00010004, 0x00041000, \
-0x00278C67, 0x00040800, 0x00018100, 0x003A0437, \
-0x00130826, 0x000C0001, 0x00220559, 0x00101313, \
-0x00380559, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00130831, 0x0010090B, 0x00124813, \
-0x000CFF80, 0x002606AB, 0x00041000, 0x00010004, \
-0x003806A8, 0x00000000, 0x00000000, 0x00000000, \
-}
-
-/********************************************************/
-/*  Micro code for 8086:1229 Rev 9                      */
-/********************************************************/
-
-/*  Parameter values for the D101S  */
-#define D101S_CPUSAVER_TIMER_DWORD		78
-#define D101S_CPUSAVER_BUNDLE_DWORD		67
-#define D101S_CPUSAVER_MIN_SIZE_DWORD		128
-
-#define D101S_RCVBUNDLE_UCODE \
-{\
-0x00550242, 0xFFFF047E, 0xFFFFFFFF, 0x06FF0818, 0xFFFFFFFF, 0x05A6FFFF, \
-0x000C0001, 0x00101312, 0x000C0008, 0x00380243, \
-0x0010009C, 0x00204056, 0x002380D0, 0x00380056, \
-0x0010009C, 0x00244F8B, 0x00000800, 0x00124818, \
-0x0038047F, 0x00000000, 0x00140000, 0x003805A3, \
-0x00308000, 0x00100610, 0x00100561, 0x000E0408, \
-0x00134861, 0x000C0002, 0x00103093, 0x00308000, \
-0x00100624, 0x00100561, 0x000E0408, 0x00100861, \
-0x000C007E, 0x00222FA1, 0x000C0002, 0x00103093, \
-0x00380F90, 0x00080000, 0x00103090, 0x00380F90, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x0010009C, 0x00244FAD, 0x00010004, 0x00041000, \
-0x003A047E, 0x00044010, 0x00380819, 0x00000000, \
-0x00100099, 0x00206FFD, 0x0010009A, 0x0020AFFD, \
-0x0010009C, 0x00244FC8, 0x00130824, 0x000C0001, \
-0x00101213, 0x00260FF7, 0x00041000, 0x00010004, \
-0x00130826, 0x000C0006, 0x00220700, 0x0013C926, \
-0x00101313, 0x00380700, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00080600, 0x00101B10, 0x00050004, 0x00100826, \
-0x00101210, 0x00380FB6, 0x00000000, 0x00000000, \
-0x002115A9, 0x00100099, 0x002065A7, 0x0010009A, \
-0x0020A5A7, 0x0010009C, 0x002445A7, 0x00130836, \
-0x000C0000, 0x00220FE4, 0x000C0001, 0x00101B13, \
-0x00229F8E, 0x00210F8E, 0x00226F8E, 0x00216F8E, \
-0x0022FF8E, 0x00215F8E, 0x00214F8E, 0x003805A3, \
-0x00010004, 0x00041000, 0x00278FE9, 0x00040800, \
-0x00018100, 0x003A047E, 0x00130826, 0x000C0001, \
-0x002205A7, 0x00101313, 0x003805A7, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00130831, \
-0x0010090B, 0x00124813, 0x000CFF80, 0x00260703, \
-0x00041000, 0x00010004, 0x00380700  \
-}
-
-/********************************************************/
-/*  Micro code for the 8086:1229 Rev F/10               */
-/********************************************************/
-
-/*  Parameter values for the D102 E-step  */
-#define D102_E_CPUSAVER_TIMER_DWORD		42
-#define D102_E_CPUSAVER_BUNDLE_DWORD		54
-#define D102_E_CPUSAVER_MIN_SIZE_DWORD		46
-
-#define     D102_E_RCVBUNDLE_UCODE \
-{\
-0x007D028F, 0x0E4204F9, 0x14ED0C85, 0x14FA14E9, 0x0EF70E36, 0x1FFF1FFF, \
-0x00E014B9, 0x00000000, 0x00000000, 0x00000000, \
-0x00E014BD, 0x00000000, 0x00000000, 0x00000000, \
-0x00E014D5, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00E014C1, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00E014C8, 0x00000000, 0x00000000, 0x00000000, \
-0x00200600, 0x00E014EE, 0x00000000, 0x00000000, \
-0x0030FF80, 0x00940E46, 0x00038200, 0x00102000, \
-0x00E00E43, 0x00000000, 0x00000000, 0x00000000, \
-0x00300006, 0x00E014FB, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00906E41, 0x00800E3C, 0x00E00E39, 0x00000000, \
-0x00906EFD, 0x00900EFD, 0x00E00EF8, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-}
-
-static void e100_setup_ucode(struct nic *nic, struct cb *cb, struct sk_buff *skb)
-{
-/* *INDENT-OFF* */
-	static struct {
-		u32 ucode[UCODE_SIZE + 1];
-		u8 mac;
-		u8 timer_dword;
-		u8 bundle_dword;
-		u8 min_size_dword;
-	} ucode_opts[] = {
-		{ D101M_B_RCVBUNDLE_UCODE,
-		  mac_82559_D101M,
-		  D101M_CPUSAVER_TIMER_DWORD,
-		  D101M_CPUSAVER_BUNDLE_DWORD,
-		  D101M_CPUSAVER_MIN_SIZE_DWORD },
-		{ D101S_RCVBUNDLE_UCODE,
-		  mac_82559_D101S,
-		  D101S_CPUSAVER_TIMER_DWORD,
-		  D101S_CPUSAVER_BUNDLE_DWORD,
-		  D101S_CPUSAVER_MIN_SIZE_DWORD },
-		{ D102_E_RCVBUNDLE_UCODE,
-		  mac_82551_F,
-		  D102_E_CPUSAVER_TIMER_DWORD,
-		  D102_E_CPUSAVER_BUNDLE_DWORD,
-		  D102_E_CPUSAVER_MIN_SIZE_DWORD },
-		{ D102_E_RCVBUNDLE_UCODE,
-		  mac_82551_10,
-		  D102_E_CPUSAVER_TIMER_DWORD,
-		  D102_E_CPUSAVER_BUNDLE_DWORD,
-		  D102_E_CPUSAVER_MIN_SIZE_DWORD },
-		{ {0}, 0, 0, 0, 0}
-	}, *opts;
-/* *INDENT-ON* */
-
-/*************************************************************************
-*  CPUSaver parameters
-*
-*  All CPUSaver parameters are 16-bit literals that are part of a
-*  "move immediate value" instruction.  By changing the value of
-*  the literal in the instruction before the code is loaded, the
-*  driver can change the algorithm.
-*
-*  INTDELAY - This loads the dead-man timer with its inital value.
-*    When this timer expires the interrupt is asserted, and the
-*    timer is reset each time a new packet is received.  (see
-*    BUNDLEMAX below to set the limit on number of chained packets)
-*    The current default is 0x600 or 1536.  Experiments show that
-*    the value should probably stay within the 0x200 - 0x1000.
-*
-*  BUNDLEMAX -
-*    This sets the maximum number of frames that will be bundled.  In
-*    some situations, such as the TCP windowing algorithm, it may be
-*    better to limit the growth of the bundle size than let it go as
-*    high as it can, because that could cause too much added latency.
-*    The default is six, because this is the number of packets in the
-*    default TCP window size.  A value of 1 would make CPUSaver indicate
-*    an interrupt for every frame received.  If you do not want to put
-*    a limit on the bundle size, set this value to xFFFF.
-*
-*  BUNDLESMALL -
-*    This contains a bit-mask describing the minimum size frame that
-*    will be bundled.  The default masks the lower 7 bits, which means
-*    that any frame less than 128 bytes in length will not be bundled,
-*    but will instead immediately generate an interrupt.  This does
-*    not affect the current bundle in any way.  Any frame that is 128
-*    bytes or large will be bundled normally.  This feature is meant
-*    to provide immediate indication of ACK frames in a TCP environment.
-*    Customers were seeing poor performance when a machine with CPUSaver
-*    enabled was sending but not receiving.  The delay introduced when
-*    the ACKs were received was enough to reduce total throughput, because
-*    the sender would sit idle until the ACK was finally seen.
-*
-*    The current default is 0xFF80, which masks out the lower 7 bits.
-*    This means that any frame which is x7F (127) bytes or smaller
-*    will cause an immediate interrupt.  Because this value must be a
-*    bit mask, there are only a few valid values that can be used.  To
-*    turn this feature off, the driver can write the value xFFFF to the
-*    lower word of this instruction (in the same way that the other
-*    parameters are used).  Likewise, a value of 0xF800 (2047) would
-*    cause an interrupt to be generated for every frame, because all
-*    standard Ethernet frames are <= 2047 bytes in length.
-*************************************************************************/
-
-/* if you wish to disable the ucode functionality, while maintaining the
- * workarounds it provides, set the following defines to:
- * BUNDLESMALL 0
- * BUNDLEMAX 1
- * INTDELAY 1
- */
-#define BUNDLESMALL 1
-#define BUNDLEMAX (u16)6
-#define INTDELAY (u16)1536 /* 0x600 */
-
-	/* do not load u-code for ICH devices */
-	if (nic->flags & ich)
-		goto noloaducode;
-
-	/* Search for ucode match against h/w rev_id */
-	for (opts = ucode_opts; opts->mac; opts++) {
-		int i;
-		u32 *ucode = opts->ucode;
-		if (nic->mac != opts->mac)
-			continue;
-
-		/* Insert user-tunable settings */
-		ucode[opts->timer_dword] &= 0xFFFF0000;
-		ucode[opts->timer_dword] |= INTDELAY;
-		ucode[opts->bundle_dword] &= 0xFFFF0000;
-		ucode[opts->bundle_dword] |= BUNDLEMAX;
-		ucode[opts->min_size_dword] &= 0xFFFF0000;
-		ucode[opts->min_size_dword] |= (BUNDLESMALL) ? 0xFFFF : 0xFF80;
-
-		for (i = 0; i < UCODE_SIZE; i++)
-			cb->u.ucode[i] = cpu_to_le32(ucode[i]);
-		cb->command = cpu_to_le16(cb_ucode | cb_el);
-		return;
-	}
-
-noloaducode:
-	cb->command = cpu_to_le16(cb_nop | cb_el);
-}
-
-static inline int e100_exec_cb_wait(struct nic *nic, struct sk_buff *skb,
-	void (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
-{
-	int err = 0, counter = 50;
-	struct cb *cb = nic->cb_to_clean;
-
-	if ((err = e100_exec_cb(nic, NULL, e100_setup_ucode)))
-		DPRINTK(PROBE,ERR, "ucode cmd failed with error %d\n", err);
-
-	/* must restart cuc */
-	nic->cuc_cmd = cuc_start;
-
-	/* wait for completion */
-	e100_write_flush(nic);
-	udelay(10);
-
-	/* wait for possibly (ouch) 500ms */
-	while (!(cb->status & cpu_to_le16(cb_complete))) {
-		msleep(10);
-		if (!--counter) break;
-	}
-
-	/* ack any interupts, something could have been set */
-	writeb(~0, &nic->csr->scb.stat_ack);
-
-	/* if the command failed, or is not OK, notify and return */
-	if (!counter || !(cb->status & cpu_to_le16(cb_ok))) {
-		DPRINTK(PROBE,ERR, "ucode load failed\n");
-		err = -EPERM;
-	}
-
-	return err;
-}
-
-static void e100_setup_iaaddr(struct nic *nic, struct cb *cb,
-	struct sk_buff *skb)
-{
-	cb->command = cpu_to_le16(cb_iaaddr);
-	memcpy(cb->u.iaaddr, nic->netdev->dev_addr, ETH_ALEN);
-}
-
-static void e100_dump(struct nic *nic, struct cb *cb, struct sk_buff *skb)
-{
-	cb->command = cpu_to_le16(cb_dump);
-	cb->u.dump_buffer_addr = cpu_to_le32(nic->dma_addr +
-		offsetof(struct mem, dump_buf));
-}
-
-#define NCONFIG_AUTO_SWITCH	0x0080
-#define MII_NSC_CONG		MII_RESV1
-#define NSC_CONG_ENABLE		0x0100
-#define NSC_CONG_TXREADY	0x0400
-#define ADVERTISE_FC_SUPPORTED	0x0400
-static int e100_phy_init(struct nic *nic)
-{
-	struct net_device *netdev = nic->netdev;
-	u32 addr;
-	u16 bmcr, stat, id_lo, id_hi, cong;
-
-	/* Discover phy addr by searching addrs in order {1,0,2,..., 31} */
-	for(addr = 0; addr < 32; addr++) {
-		nic->mii.phy_id = (addr == 0) ? 1 : (addr == 1) ? 0 : addr;
-		bmcr = mdio_read(netdev, nic->mii.phy_id, MII_BMCR);
-		stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
-		stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
-		if(!((bmcr == 0xFFFF) || ((stat == 0) && (bmcr == 0))))
-			break;
-	}
-	DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id);
-	if(addr == 32)
-		return -EAGAIN;
-
-	/* Selected the phy and isolate the rest */
-	for(addr = 0; addr < 32; addr++) {
-		if(addr != nic->mii.phy_id) {
-			mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE);
-		} else {
-			bmcr = mdio_read(netdev, addr, MII_BMCR);
-			mdio_write(netdev, addr, MII_BMCR,
-				bmcr & ~BMCR_ISOLATE);
-		}
-	}
-
-	/* Get phy ID */
-	id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1);
-	id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2);
-	nic->phy = (u32)id_hi << 16 | (u32)id_lo;
-	DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy);
-
-	/* Handle National tx phys */
-#define NCS_PHY_MODEL_MASK	0xFFF0FFFF
-	if((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) {
-		/* Disable congestion control */
-		cong = mdio_read(netdev, nic->mii.phy_id, MII_NSC_CONG);
-		cong |= NSC_CONG_TXREADY;
-		cong &= ~NSC_CONG_ENABLE;
-		mdio_write(netdev, nic->mii.phy_id, MII_NSC_CONG, cong);
-	}
-
-	if((nic->mac >= mac_82550_D102) || ((nic->flags & ich) &&
-	   (mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000))) {
-		/* enable/disable MDI/MDI-X auto-switching.
-		   MDI/MDI-X auto-switching is disabled for 82551ER/QM chips */
-		if((nic->mac == mac_82551_E) || (nic->mac == mac_82551_F) ||
-		   (nic->mac == mac_82551_10) || (nic->mii.force_media) ||
-		   !(nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled))
-			mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, 0);
-		else
-			mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, NCONFIG_AUTO_SWITCH);
-	}
-
-	return 0;
-}
-
-static int e100_hw_init(struct nic *nic)
-{
-	int err;
-
-	e100_hw_reset(nic);
-
-	DPRINTK(HW, ERR, "e100_hw_init\n");
-	if(!in_interrupt() && (err = e100_self_test(nic)))
-		return err;
-
-	if((err = e100_phy_init(nic)))
-		return err;
-	if((err = e100_exec_cmd(nic, cuc_load_base, 0)))
-		return err;
-	if((err = e100_exec_cmd(nic, ruc_load_base, 0)))
-		return err;
-	if ((err = e100_exec_cb_wait(nic, NULL, e100_setup_ucode)))
-		return err;
-	if((err = e100_exec_cb(nic, NULL, e100_configure)))
-		return err;
-	if((err = e100_exec_cb(nic, NULL, e100_setup_iaaddr)))
-		return err;
-	if((err = e100_exec_cmd(nic, cuc_dump_addr,
-		nic->dma_addr + offsetof(struct mem, stats))))
-		return err;
-	if((err = e100_exec_cmd(nic, cuc_dump_reset, 0)))
-		return err;
-
-	e100_disable_irq(nic);
-
-	return 0;
-}
-
-static void e100_multi(struct nic *nic, struct cb *cb, struct sk_buff *skb)
-{
-	struct net_device *netdev = nic->netdev;
-	struct dev_mc_list *list = netdev->mc_list;
-	u16 i, count = min(netdev->mc_count, E100_MAX_MULTICAST_ADDRS);
-
-	cb->command = cpu_to_le16(cb_multi);
-	cb->u.multi.count = cpu_to_le16(count * ETH_ALEN);
-	for(i = 0; list && i < count; i++, list = list->next)
-		memcpy(&cb->u.multi.addr[i*ETH_ALEN], &list->dmi_addr,
-			ETH_ALEN);
-}
-
-static void e100_set_multicast_list(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	DPRINTK(HW, DEBUG, "mc_count=%d, flags=0x%04X\n",
-		netdev->mc_count, netdev->flags);
-
-	if(netdev->flags & IFF_PROMISC)
-		nic->flags |= promiscuous;
-	else
-		nic->flags &= ~promiscuous;
-
-	if(netdev->flags & IFF_ALLMULTI ||
-		netdev->mc_count > E100_MAX_MULTICAST_ADDRS)
-		nic->flags |= multicast_all;
-	else
-		nic->flags &= ~multicast_all;
-
-	e100_exec_cb(nic, NULL, e100_configure);
-	e100_exec_cb(nic, NULL, e100_multi);
-}
-
-static void e100_update_stats(struct nic *nic)
-{
-	struct net_device_stats *ns = &nic->net_stats;
-	struct stats *s = &nic->mem->stats;
-	u32 *complete = (nic->mac < mac_82558_D101_A4) ? &s->fc_xmt_pause :
-		(nic->mac < mac_82559_D101M) ? (u32 *)&s->xmt_tco_frames :
-		&s->complete;
-
-	/* Device's stats reporting may take several microseconds to
-	 * complete, so where always waiting for results of the
-	 * previous command. */
-
-	if(*complete == le32_to_cpu(cuc_dump_reset_complete)) {
-		*complete = 0;
-		nic->tx_frames = le32_to_cpu(s->tx_good_frames);
-		nic->tx_collisions = le32_to_cpu(s->tx_total_collisions);
-		ns->tx_aborted_errors += le32_to_cpu(s->tx_max_collisions);
-		ns->tx_window_errors += le32_to_cpu(s->tx_late_collisions);
-		ns->tx_carrier_errors += le32_to_cpu(s->tx_lost_crs);
-		ns->tx_fifo_errors += le32_to_cpu(s->tx_underruns);
-		ns->collisions += nic->tx_collisions;
-		ns->tx_errors += le32_to_cpu(s->tx_max_collisions) +
-			le32_to_cpu(s->tx_lost_crs);
-		ns->rx_length_errors += le32_to_cpu(s->rx_short_frame_errors) +
-			nic->rx_over_length_errors;
-		ns->rx_crc_errors += le32_to_cpu(s->rx_crc_errors);
-		ns->rx_frame_errors += le32_to_cpu(s->rx_alignment_errors);
-		ns->rx_over_errors += le32_to_cpu(s->rx_overrun_errors);
-		ns->rx_fifo_errors += le32_to_cpu(s->rx_overrun_errors);
-		ns->rx_missed_errors += le32_to_cpu(s->rx_resource_errors);
-		ns->rx_errors += le32_to_cpu(s->rx_crc_errors) +
-			le32_to_cpu(s->rx_alignment_errors) +
-			le32_to_cpu(s->rx_short_frame_errors) +
-			le32_to_cpu(s->rx_cdt_errors);
-		nic->tx_deferred += le32_to_cpu(s->tx_deferred);
-		nic->tx_single_collisions +=
-			le32_to_cpu(s->tx_single_collisions);
-		nic->tx_multiple_collisions +=
-			le32_to_cpu(s->tx_multiple_collisions);
-		if(nic->mac >= mac_82558_D101_A4) {
-			nic->tx_fc_pause += le32_to_cpu(s->fc_xmt_pause);
-			nic->rx_fc_pause += le32_to_cpu(s->fc_rcv_pause);
-			nic->rx_fc_unsupported +=
-				le32_to_cpu(s->fc_rcv_unsupported);
-			if(nic->mac >= mac_82559_D101M) {
-				nic->tx_tco_frames +=
-					le16_to_cpu(s->xmt_tco_frames);
-				nic->rx_tco_frames +=
-					le16_to_cpu(s->rcv_tco_frames);
-			}
-		}
-	}
-
-
-	if(e100_exec_cmd(nic, cuc_dump_reset, 0))
-		DPRINTK(TX_ERR, DEBUG, "exec cuc_dump_reset failed\n");
-}
-
-static void e100_adjust_adaptive_ifs(struct nic *nic, int speed, int duplex)
-{
-	/* Adjust inter-frame-spacing (IFS) between two transmits if
-	 * we're getting collisions on a half-duplex connection. */
-
-	if(duplex == DUPLEX_HALF) {
-		u32 prev = nic->adaptive_ifs;
-		u32 min_frames = (speed == SPEED_100) ? 1000 : 100;
-
-		if((nic->tx_frames / 32 < nic->tx_collisions) &&
-		   (nic->tx_frames > min_frames)) {
-			if(nic->adaptive_ifs < 60)
-				nic->adaptive_ifs += 5;
-		} else if (nic->tx_frames < min_frames) {
-			if(nic->adaptive_ifs >= 5)
-				nic->adaptive_ifs -= 5;
-		}
-		if(nic->adaptive_ifs != prev)
-			e100_exec_cb(nic, NULL, e100_configure);
-	}
-}
-
-static void e100_watchdog(unsigned long data)
-{
-	struct nic *nic = (struct nic *)data;
-	struct ethtool_cmd cmd;
-
-	DPRINTK(TIMER, DEBUG, "right now = %ld\n", jiffies);
-
-	/* mii library handles link maintenance tasks */
-
-    if (nic->ethercat) {
-		ecdev_set_link(nic->ecdev, mii_link_ok(&nic->mii) ? 1 : 0);
-        goto finish;
-    }
-
-    mii_ethtool_gset(&nic->mii, &cmd);
-
-    if(mii_link_ok(&nic->mii) && !netif_carrier_ok(nic->netdev)) {
-        DPRINTK(LINK, INFO, "link up, %sMbps, %s-duplex\n",
-                cmd.speed == SPEED_100 ? "100" : "10",
-                cmd.duplex == DUPLEX_FULL ? "full" : "half");
-    } else if(!mii_link_ok(&nic->mii) && netif_carrier_ok(nic->netdev)) {
-        DPRINTK(LINK, INFO, "link down\n");
-    }
-
-	mii_check_link(&nic->mii);
-
-	/* Software generated interrupt to recover from (rare) Rx
-	 * allocation failure.
-	 * Unfortunately have to use a spinlock to not re-enable interrupts
-	 * accidentally, due to hardware that shares a register between the
-	 * interrupt mask bit and the SW Interrupt generation bit */
-	spin_lock_irq(&nic->cmd_lock);
-	writeb(readb(&nic->csr->scb.cmd_hi) | irq_sw_gen,&nic->csr->scb.cmd_hi);
-	e100_write_flush(nic);
-	spin_unlock_irq(&nic->cmd_lock);
-
-	e100_update_stats(nic);
-	e100_adjust_adaptive_ifs(nic, cmd.speed, cmd.duplex);
-
-	if(nic->mac <= mac_82557_D100_C)
-		/* Issue a multicast command to workaround a 557 lock up */
-		e100_set_multicast_list(nic->netdev);
-
-	if(nic->flags & ich && cmd.speed==SPEED_10 && cmd.duplex==DUPLEX_HALF)
-		/* Need SW workaround for ICH[x] 10Mbps/half duplex Tx hang. */
-		nic->flags |= ich_10h_workaround;
-	else
-		nic->flags &= ~ich_10h_workaround;
-
-finish:
-	mod_timer(&nic->watchdog, jiffies + E100_WATCHDOG_PERIOD);
-}
-
-static void e100_xmit_prepare(struct nic *nic, struct cb *cb,
-	struct sk_buff *skb)
-{
-	cb->command = nic->tx_command;
-	/* interrupt every 16 packets regardless of delay */
-	if((nic->cbs_avail & ~15) == nic->cbs_avail)
-		cb->command |= cpu_to_le16(cb_i);
-	cb->u.tcb.tbd_array = cb->dma_addr + offsetof(struct cb, u.tcb.tbd);
-	cb->u.tcb.tcb_byte_count = 0;
-	cb->u.tcb.threshold = nic->tx_threshold;
-	cb->u.tcb.tbd_count = 1;
-	cb->u.tcb.tbd.buf_addr = cpu_to_le32(pci_map_single(nic->pdev,
-		skb->data, skb->len, PCI_DMA_TODEVICE));
-	/* check for mapping failure? */
-	cb->u.tcb.tbd.size = cpu_to_le16(skb->len);
-}
-
-static int e100_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	int err;
-
-	if(nic->flags & ich_10h_workaround) {
-		/* SW workaround for ICH[x] 10Mbps/half duplex Tx hang.
-		   Issue a NOP command followed by a 1us delay before
-		   issuing the Tx command. */
-		if(e100_exec_cmd(nic, cuc_nop, 0))
-			DPRINTK(TX_ERR, DEBUG, "exec cuc_nop failed\n");
-		udelay(1);
-	}
-
-	err = e100_exec_cb(nic, skb, e100_xmit_prepare);
-
-	switch(err) {
-	case -ENOSPC:
-		/* We queued the skb, but now we're out of space. */
-		DPRINTK(TX_ERR, DEBUG, "No space for CB\n");
-        if (!nic->ethercat)
-            netif_stop_queue(netdev);
-		break;
-	case -ENOMEM:
-		/* This is a hard error - log it. */
-		DPRINTK(TX_ERR, DEBUG, "Out of Tx resources, returning skb\n");
-        if (!nic->ethercat)
-            netif_stop_queue(netdev);
-		return 1;
-	}
-
-	netdev->trans_start = jiffies;
-	return 0;
-}
-
-static int e100_tx_clean(struct nic *nic)
-{
-	struct cb *cb;
-	int tx_cleaned = 0;
-
-    printk(KERN_DEBUG DRV_NAME " tx_clean(%X)\n", (unsigned) nic); // FIXME
-
-    if (!nic->cb_to_clean) { // FIXME
-        printk(KERN_WARNING DRV_NAME "cb_to_clean is NULL!\n");
-        return 0;
-    }
-
-    if (!nic->ethercat)
-        spin_lock(&nic->cb_lock);
-
-	DPRINTK(TX_DONE, DEBUG, "cb->status = 0x%04X\n",
-		nic->cb_to_clean->status);
-
-	/* Clean CBs marked complete */
-	for(cb = nic->cb_to_clean;
-	    cb->status & cpu_to_le16(cb_complete);
-	    cb = nic->cb_to_clean = cb->next) {
-		if(likely(cb->skb != NULL)) {
-			nic->net_stats.tx_packets++;
-			nic->net_stats.tx_bytes += cb->skb->len;
-
-			pci_unmap_single(nic->pdev,
-				le32_to_cpu(cb->u.tcb.tbd.buf_addr),
-				le16_to_cpu(cb->u.tcb.tbd.size),
-				PCI_DMA_TODEVICE);
-            if (!nic->ethercat)
-                dev_kfree_skb_any(cb->skb);
-			cb->skb = NULL;
-			tx_cleaned = 1;
-		}
-		cb->status = 0;
-		nic->cbs_avail++;
-	}
-
-    if (!nic->ethercat) {
-        spin_unlock(&nic->cb_lock);
-
-        /* Recover from running out of Tx resources in xmit_frame */
-        if(unlikely(tx_cleaned && netif_queue_stopped(nic->netdev)))
-            netif_wake_queue(nic->netdev);
-    }
-
-	return tx_cleaned;
-}
-
-static void e100_clean_cbs(struct nic *nic)
-{
-	if(nic->cbs) {
-		while(nic->cbs_avail != nic->params.cbs.count) {
-			struct cb *cb = nic->cb_to_clean;
-			if(cb->skb) {
-				pci_unmap_single(nic->pdev,
-					le32_to_cpu(cb->u.tcb.tbd.buf_addr),
-					le16_to_cpu(cb->u.tcb.tbd.size),
-					PCI_DMA_TODEVICE);
-				dev_kfree_skb(cb->skb);
-			}
-			nic->cb_to_clean = nic->cb_to_clean->next;
-			nic->cbs_avail++;
-		}
-		pci_free_consistent(nic->pdev,
-			sizeof(struct cb) * nic->params.cbs.count,
-			nic->cbs, nic->cbs_dma_addr);
-		nic->cbs = NULL;
-		nic->cbs_avail = 0;
-	}
-	nic->cuc_cmd = cuc_start;
-	nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean =
-		nic->cbs;
-}
-
-static int e100_alloc_cbs(struct nic *nic)
-{
-	struct cb *cb;
-	unsigned int i, count = nic->params.cbs.count;
-
-	nic->cuc_cmd = cuc_start;
-	nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = NULL;
-	nic->cbs_avail = 0;
-
-	nic->cbs = pci_alloc_consistent(nic->pdev,
-		sizeof(struct cb) * count, &nic->cbs_dma_addr);
-	if(!nic->cbs)
-		return -ENOMEM;
-
-	for(cb = nic->cbs, i = 0; i < count; cb++, i++) {
-		cb->next = (i + 1 < count) ? cb + 1 : nic->cbs;
-		cb->prev = (i == 0) ? nic->cbs + count - 1 : cb - 1;
-
-		cb->dma_addr = nic->cbs_dma_addr + i * sizeof(struct cb);
-		cb->link = cpu_to_le32(nic->cbs_dma_addr +
-			((i+1) % count) * sizeof(struct cb));
-		cb->skb = NULL;
-	}
-
-	nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = nic->cbs;
-	nic->cbs_avail = count;
-
-	return 0;
-}
-
-static inline void e100_start_receiver(struct nic *nic, struct rx *rx)
-{
-	if(!nic->rxs) return;
-	if(RU_SUSPENDED != nic->ru_running) return;
-
-	/* handle init time starts */
-	if(!rx) rx = nic->rxs;
-
-	/* (Re)start RU if suspended or idle and RFA is non-NULL */
-	if(rx->skb) {
-		e100_exec_cmd(nic, ruc_start, rx->dma_addr);
-		nic->ru_running = RU_RUNNING;
-	}
-}
-
-#define RFD_BUF_LEN (sizeof(struct rfd) + VLAN_ETH_FRAME_LEN)
-static int e100_rx_alloc_skb(struct nic *nic, struct rx *rx)
-{
-	if(!(rx->skb = dev_alloc_skb(RFD_BUF_LEN + NET_IP_ALIGN)))
-		return -ENOMEM;
-
-	/* Align, init, and map the RFD. */
-	rx->skb->dev = nic->netdev;
-	skb_reserve(rx->skb, NET_IP_ALIGN);
-	memcpy(rx->skb->data, &nic->blank_rfd, sizeof(struct rfd));
-	rx->dma_addr = pci_map_single(nic->pdev, rx->skb->data,
-		RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
-
-	if(pci_dma_mapping_error(rx->dma_addr)) {
-		dev_kfree_skb_any(rx->skb);
-		rx->skb = NULL;
-		rx->dma_addr = 0;
-		return -ENOMEM;
-	}
-
-	/* Link the RFD to end of RFA by linking previous RFD to
-	 * this one, and clearing EL bit of previous.  */
-	if(rx->prev->skb) {
-		struct rfd *prev_rfd = (struct rfd *)rx->prev->skb->data;
-		put_unaligned(cpu_to_le32(rx->dma_addr),
-			(u32 *)&prev_rfd->link);
-		wmb();
-		prev_rfd->command &= ~cpu_to_le16(cb_el);
-		pci_dma_sync_single_for_device(nic->pdev, rx->prev->dma_addr,
-			sizeof(struct rfd), PCI_DMA_TODEVICE);
-	}
-
-	return 0;
-}
-
-static int e100_rx_indicate(struct nic *nic, struct rx *rx,
-	unsigned int *work_done, unsigned int work_to_do)
-{
-	struct sk_buff *skb = rx->skb;
-	struct rfd *rfd = (struct rfd *)skb->data;
-	u16 rfd_status, actual_size;
-
-	if(unlikely(work_done && *work_done >= work_to_do))
-		return -EAGAIN;
-
-	/* Need to sync before taking a peek at cb_complete bit */
-	pci_dma_sync_single_for_cpu(nic->pdev, rx->dma_addr,
-		sizeof(struct rfd), PCI_DMA_FROMDEVICE);
-	rfd_status = le16_to_cpu(rfd->status);
-
-	DPRINTK(RX_STATUS, DEBUG, "status=0x%04X\n", rfd_status);
-
-	/* If data isn't ready, nothing to indicate */
-	if(unlikely(!(rfd_status & cb_complete)))
-		return -ENODATA;
-
-	/* Get actual data size */
-	actual_size = le16_to_cpu(rfd->actual_size) & 0x3FFF;
-	if(unlikely(actual_size > RFD_BUF_LEN - sizeof(struct rfd)))
-		actual_size = RFD_BUF_LEN - sizeof(struct rfd);
-
-	/* Get data */
-	pci_unmap_single(nic->pdev, rx->dma_addr,
-		RFD_BUF_LEN, PCI_DMA_FROMDEVICE);
-
-	/* this allows for a fast restart without re-enabling interrupts */
-	if(le16_to_cpu(rfd->command) & cb_el)
-		nic->ru_running = RU_SUSPENDED;
-
-	/* Pull off the RFD and put the actual data (minus eth hdr) */
-	skb_reserve(skb, sizeof(struct rfd));
-	skb_put(skb, actual_size);
-	skb->protocol = eth_type_trans(skb, nic->netdev);
-
-	if(unlikely(!(rfd_status & cb_ok))) {
-		/* Don't indicate if hardware indicates errors */
-        if (!nic->ethercat)
-            dev_kfree_skb_any(skb);
-	} else if(actual_size > ETH_DATA_LEN + VLAN_ETH_HLEN) {
-		/* Don't indicate oversized frames */
-		nic->rx_over_length_errors++;
-        if (!nic->ethercat)
-            dev_kfree_skb_any(skb);
-	} else {
-		nic->net_stats.rx_packets++;
-		nic->net_stats.rx_bytes += actual_size;
-		nic->netdev->last_rx = jiffies;
-        if (!nic->ethercat)
-            netif_receive_skb(skb);
-        else {
-            //ecdev_receive(e100_ec_dev, &rx_ring[ring_offset + 4], pkt_size);
-        }
-		if(work_done)
-			(*work_done)++;
-	}
-
-	rx->skb = NULL;
-
-	return 0;
-}
-
-static void e100_rx_clean(struct nic *nic, unsigned int *work_done,
-	unsigned int work_to_do)
-{
-	struct rx *rx;
-	int restart_required = 0;
-	struct rx *rx_to_start = NULL;
-
-	/* are we already rnr? then pay attention!!! this ensures that
-	 * the state machine progression never allows a start with a
-	 * partially cleaned list, avoiding a race between hardware
-	 * and rx_to_clean when in NAPI mode */
-	if(RU_SUSPENDED == nic->ru_running)
-		restart_required = 1;
-
-	/* Indicate newly arrived packets */
-	for(rx = nic->rx_to_clean; rx->skb; rx = nic->rx_to_clean = rx->next) {
-		int err = e100_rx_indicate(nic, rx, work_done, work_to_do);
-		if(-EAGAIN == err) {
-			/* hit quota so have more work to do, restart once
-			 * cleanup is complete */
-			restart_required = 0;
-			break;
-		} else if(-ENODATA == err)
-			break; /* No more to clean */
-	}
-
-	/* save our starting point as the place we'll restart the receiver */
-	if(restart_required)
-		rx_to_start = nic->rx_to_clean;
-
-	/* Alloc new skbs to refill list */
-	for(rx = nic->rx_to_use; !rx->skb; rx = nic->rx_to_use = rx->next) {
-		if(unlikely(e100_rx_alloc_skb(nic, rx)))
-			break; /* Better luck next time (see watchdog) */
-	}
-
-	if(restart_required) {
-		// ack the rnr?
-		writeb(stat_ack_rnr, &nic->csr->scb.stat_ack);
-		e100_start_receiver(nic, rx_to_start);
-		if(work_done)
-			(*work_done)++;
-	}
-}
-
-static void e100_rx_clean_list(struct nic *nic)
-{
-	struct rx *rx;
-	unsigned int i, count = nic->params.rfds.count;
-
-	nic->ru_running = RU_UNINITIALIZED;
-
-	if(nic->rxs) {
-		for(rx = nic->rxs, i = 0; i < count; rx++, i++) {
-			if(rx->skb) {
-				pci_unmap_single(nic->pdev, rx->dma_addr,
-					RFD_BUF_LEN, PCI_DMA_FROMDEVICE);
-				dev_kfree_skb(rx->skb); // FIXME
-			}
-		}
-		kfree(nic->rxs);
-		nic->rxs = NULL;
-	}
-
-	nic->rx_to_use = nic->rx_to_clean = NULL;
-}
-
-static int e100_rx_alloc_list(struct nic *nic)
-{
-	struct rx *rx;
-	unsigned int i, count = nic->params.rfds.count;
-
-	nic->rx_to_use = nic->rx_to_clean = NULL;
-	nic->ru_running = RU_UNINITIALIZED;
-
-	if(!(nic->rxs = kmalloc(sizeof(struct rx) * count, GFP_ATOMIC)))
-		return -ENOMEM;
-	memset(nic->rxs, 0, sizeof(struct rx) * count);
-
-	for(rx = nic->rxs, i = 0; i < count; rx++, i++) {
-		rx->next = (i + 1 < count) ? rx + 1 : nic->rxs;
-		rx->prev = (i == 0) ? nic->rxs + count - 1 : rx - 1;
-		if(e100_rx_alloc_skb(nic, rx)) {
-			e100_rx_clean_list(nic);
-			return -ENOMEM;
-		}
-	}
-
-	nic->rx_to_use = nic->rx_to_clean = nic->rxs;
-	nic->ru_running = RU_SUSPENDED;
-
-	return 0;
-}
-
-static irqreturn_t e100_intr(int irq, void *dev_id, struct pt_regs *regs)
-{
-	struct net_device *netdev = dev_id;
-	struct nic *nic = netdev_priv(netdev);
-	u8 stat_ack = readb(&nic->csr->scb.stat_ack);
-
-	DPRINTK(INTR, DEBUG, "stat_ack = 0x%02X\n", stat_ack);
-
-	if(stat_ack == stat_ack_not_ours ||	/* Not our interrupt */
-	   stat_ack == stat_ack_not_present)	/* Hardware is ejected */
-		return IRQ_NONE;
-
-	/* Ack interrupt(s) */
-	writeb(stat_ack, &nic->csr->scb.stat_ack);
-
-	/* We hit Receive No Resource (RNR); restart RU after cleaning */
-	if(stat_ack & stat_ack_rnr)
-		nic->ru_running = RU_SUSPENDED;
-
-	if(!nic->ethercat && likely(netif_rx_schedule_prep(netdev))) {
-		e100_disable_irq(nic);
-		__netif_rx_schedule(netdev);
-	}
-
-	return IRQ_HANDLED;
-}
-
-void e100_ec_poll(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-    static unsigned int cleaned = 0;
-
-	cleaned += e100_tx_clean(nic);
-
-    if (cleaned >= 1000) {
-        printk(KERN_INFO DRV_NAME " %u frames sent.\n", cleaned);
-        cleaned = 0;
-    }
-}
-
-static int e100_poll(struct net_device *netdev, int *budget)
-{
-	struct nic *nic = netdev_priv(netdev);
-	unsigned int work_to_do = min(netdev->quota, *budget);
-	unsigned int work_done = 0;
-	int tx_cleaned;
-
-	e100_rx_clean(nic, &work_done, work_to_do);
-	tx_cleaned = e100_tx_clean(nic);
-
-	/* If no Rx and Tx cleanup work was done, exit polling mode. */
-	if(!nic->ethercat &&
-            ((!tx_cleaned && (work_done == 0)) || !netif_running(netdev))) {
-		netif_rx_complete(netdev);
-		e100_enable_irq(nic);
-		return 0;
-	}
-
-	*budget -= work_done;
-	netdev->quota -= work_done;
-
-	return 1;
-}
-
-#ifdef CONFIG_NET_POLL_CONTROLLER
-static void e100_netpoll(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-    if (nic->ethercat)
-        return;
-
-	e100_disable_irq(nic);
-	e100_intr(nic->pdev->irq, netdev, NULL);
-	e100_tx_clean(nic);
-	e100_enable_irq(nic);
-}
-#endif
-
-static struct net_device_stats *e100_get_stats(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return &nic->net_stats;
-}
-
-static int e100_set_mac_address(struct net_device *netdev, void *p)
-{
-	struct nic *nic = netdev_priv(netdev);
-	struct sockaddr *addr = p;
-
-	if (!is_valid_ether_addr(addr->sa_data))
-		return -EADDRNOTAVAIL;
-
-	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
-	e100_exec_cb(nic, NULL, e100_setup_iaaddr);
-
-	return 0;
-}
-
-static int e100_change_mtu(struct net_device *netdev, int new_mtu)
-{
-	if(new_mtu < ETH_ZLEN || new_mtu > ETH_DATA_LEN)
-		return -EINVAL;
-	netdev->mtu = new_mtu;
-	return 0;
-}
-
-#ifdef CONFIG_PM
-static int e100_asf(struct nic *nic)
-{
-	/* ASF can be enabled from eeprom */
-	return((nic->pdev->device >= 0x1050) && (nic->pdev->device <= 0x1057) &&
-	   (nic->eeprom[eeprom_config_asf] & eeprom_asf) &&
-	   !(nic->eeprom[eeprom_config_asf] & eeprom_gcl) &&
-	   ((nic->eeprom[eeprom_smbus_addr] & 0xFF) != 0xFE));
-}
-#endif
-
-static int e100_up(struct nic *nic)
-{
-	int err;
-
-	if((err = e100_rx_alloc_list(nic)))
-		return err;
-	if((err = e100_alloc_cbs(nic)))
-		goto err_rx_clean_list;
-	if((err = e100_hw_init(nic)))
-		goto err_clean_cbs;
-	if (!nic->ethercat) {
-        e100_set_multicast_list(nic->netdev);
-        e100_start_receiver(nic, NULL); // FIXME
-    }
-	mod_timer(&nic->watchdog, jiffies);
-    if (!nic->ethercat) {
-        if((err = request_irq(nic->pdev->irq, e100_intr, IRQF_SHARED,
-                        nic->netdev->name, nic->netdev)))
-            goto err_no_irq;
-        netif_wake_queue(nic->netdev);
-        netif_poll_enable(nic->netdev);
-        /* enable ints _after_ enabling poll, preventing a race between
-         * disable ints+schedule */
-        e100_enable_irq(nic);
-    }
-	return 0;
-
-err_no_irq:
-	del_timer_sync(&nic->watchdog);
-err_clean_cbs:
-	e100_clean_cbs(nic);
-err_rx_clean_list:
-	e100_rx_clean_list(nic);
-	return err;
-}
-
-static void e100_down(struct nic *nic)
-{
-    if (!nic->ethercat) {
-        /* wait here for poll to complete */
-        netif_poll_disable(nic->netdev);
-        netif_stop_queue(nic->netdev);
-    }
-	e100_hw_reset(nic);
-    if (!nic->ethercat)
-        free_irq(nic->pdev->irq, nic->netdev);
-	del_timer_sync(&nic->watchdog);
-    if (!nic->ethercat)
-        netif_carrier_off(nic->netdev);
-	e100_clean_cbs(nic);
-	e100_rx_clean_list(nic);
-}
-
-static void e100_tx_timeout(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	/* Reset outside of interrupt context, to avoid request_irq
-	 * in interrupt context */
-	schedule_work(&nic->tx_timeout_task); // FIXME
-}
-
-static void e100_tx_timeout_task(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	DPRINTK(TX_ERR, DEBUG, "scb.status=0x%02X\n",
-		readb(&nic->csr->scb.status));
-	e100_down(netdev_priv(netdev));
-	e100_up(netdev_priv(netdev));
-}
-
-static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode)
-{
-	int err;
-	struct sk_buff *skb;
-
-	/* Use driver resources to perform internal MAC or PHY
-	 * loopback test.  A single packet is prepared and transmitted
-	 * in loopback mode, and the test passes if the received
-	 * packet compares byte-for-byte to the transmitted packet. */
-
-	if((err = e100_rx_alloc_list(nic)))
-		return err;
-	if((err = e100_alloc_cbs(nic)))
-		goto err_clean_rx;
-
-	/* ICH PHY loopback is broken so do MAC loopback instead */
-	if(nic->flags & ich && loopback_mode == lb_phy)
-		loopback_mode = lb_mac;
-
-	nic->loopback = loopback_mode;
-	if((err = e100_hw_init(nic)))
-		goto err_loopback_none;
-
-	if(loopback_mode == lb_phy)
-		mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR,
-			BMCR_LOOPBACK);
-
-	e100_start_receiver(nic, NULL);
-
-	if(!(skb = dev_alloc_skb(ETH_DATA_LEN))) {
-		err = -ENOMEM;
-		goto err_loopback_none;
-	}
-	skb_put(skb, ETH_DATA_LEN);
-	memset(skb->data, 0xFF, ETH_DATA_LEN);
-	e100_xmit_frame(skb, nic->netdev);
-
-	msleep(10);
-
-	pci_dma_sync_single_for_cpu(nic->pdev, nic->rx_to_clean->dma_addr,
-			RFD_BUF_LEN, PCI_DMA_FROMDEVICE);
-
-	if(memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd),
-	   skb->data, ETH_DATA_LEN))
-		err = -EAGAIN;
-
-err_loopback_none:
-	mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR, 0);
-	nic->loopback = lb_none;
-	e100_clean_cbs(nic);
-	e100_hw_reset(nic);
-err_clean_rx:
-	e100_rx_clean_list(nic);
-	return err;
-}
-
-#define MII_LED_CONTROL	0x1B
-static void e100_blink_led(unsigned long data)
-{
-	struct nic *nic = (struct nic *)data;
-	enum led_state {
-		led_on     = 0x01,
-		led_off    = 0x04,
-		led_on_559 = 0x05,
-		led_on_557 = 0x07,
-	};
-
-	nic->leds = (nic->leds & led_on) ? led_off :
-		(nic->mac < mac_82559_D101M) ? led_on_557 : led_on_559;
-	mdio_write(nic->netdev, nic->mii.phy_id, MII_LED_CONTROL, nic->leds);
-	mod_timer(&nic->blink_timer, jiffies + HZ / 4);
-}
-
-static int e100_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return mii_ethtool_gset(&nic->mii, cmd);
-}
-
-static int e100_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
-{
-	struct nic *nic = netdev_priv(netdev);
-	int err;
-
-	mdio_write(netdev, nic->mii.phy_id, MII_BMCR, BMCR_RESET);
-	err = mii_ethtool_sset(&nic->mii, cmd);
-	e100_exec_cb(nic, NULL, e100_configure);
-
-	return err;
-}
-
-static void e100_get_drvinfo(struct net_device *netdev,
-	struct ethtool_drvinfo *info)
-{
-	struct nic *nic = netdev_priv(netdev);
-	strcpy(info->driver, DRV_NAME);
-	strcpy(info->version, DRV_VERSION);
-	strcpy(info->fw_version, "N/A");
-	strcpy(info->bus_info, pci_name(nic->pdev));
-}
-
-static int e100_get_regs_len(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-#define E100_PHY_REGS		0x1C
-#define E100_REGS_LEN		1 + E100_PHY_REGS + \
-	sizeof(nic->mem->dump_buf) / sizeof(u32)
-	return E100_REGS_LEN * sizeof(u32);
-}
-
-static void e100_get_regs(struct net_device *netdev,
-	struct ethtool_regs *regs, void *p)
-{
-	struct nic *nic = netdev_priv(netdev);
-	u32 *buff = p;
-	int i;
-
-	regs->version = (1 << 24) | nic->rev_id;
-	buff[0] = readb(&nic->csr->scb.cmd_hi) << 24 |
-		readb(&nic->csr->scb.cmd_lo) << 16 |
-		readw(&nic->csr->scb.status);
-	for(i = E100_PHY_REGS; i >= 0; i--)
-		buff[1 + E100_PHY_REGS - i] =
-			mdio_read(netdev, nic->mii.phy_id, i);
-	memset(nic->mem->dump_buf, 0, sizeof(nic->mem->dump_buf));
-	e100_exec_cb(nic, NULL, e100_dump);
-	msleep(10);
-	memcpy(&buff[2 + E100_PHY_REGS], nic->mem->dump_buf,
-		sizeof(nic->mem->dump_buf));
-}
-
-static void e100_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
-{
-	struct nic *nic = netdev_priv(netdev);
-	wol->supported = (nic->mac >= mac_82558_D101_A4) ?  WAKE_MAGIC : 0;
-	wol->wolopts = (nic->flags & wol_magic) ? WAKE_MAGIC : 0;
-}
-
-static int e100_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	if(wol->wolopts != WAKE_MAGIC && wol->wolopts != 0)
-		return -EOPNOTSUPP;
-
-	if(wol->wolopts)
-		nic->flags |= wol_magic;
-	else
-		nic->flags &= ~wol_magic;
-
-	e100_exec_cb(nic, NULL, e100_configure);
-
-	return 0;
-}
-
-static u32 e100_get_msglevel(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return nic->msg_enable;
-}
-
-static void e100_set_msglevel(struct net_device *netdev, u32 value)
-{
-	struct nic *nic = netdev_priv(netdev);
-	nic->msg_enable = value;
-}
-
-static int e100_nway_reset(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return mii_nway_restart(&nic->mii);
-}
-
-static u32 e100_get_link(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return mii_link_ok(&nic->mii);
-}
-
-static int e100_get_eeprom_len(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return nic->eeprom_wc << 1;
-}
-
-#define E100_EEPROM_MAGIC	0x1234
-static int e100_get_eeprom(struct net_device *netdev,
-	struct ethtool_eeprom *eeprom, u8 *bytes)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	eeprom->magic = E100_EEPROM_MAGIC;
-	memcpy(bytes, &((u8 *)nic->eeprom)[eeprom->offset], eeprom->len);
-
-	return 0;
-}
-
-static int e100_set_eeprom(struct net_device *netdev,
-	struct ethtool_eeprom *eeprom, u8 *bytes)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	if(eeprom->magic != E100_EEPROM_MAGIC)
-		return -EINVAL;
-
-	memcpy(&((u8 *)nic->eeprom)[eeprom->offset], bytes, eeprom->len);
-
-	return e100_eeprom_save(nic, eeprom->offset >> 1,
-		(eeprom->len >> 1) + 1);
-}
-
-static void e100_get_ringparam(struct net_device *netdev,
-	struct ethtool_ringparam *ring)
-{
-	struct nic *nic = netdev_priv(netdev);
-	struct param_range *rfds = &nic->params.rfds;
-	struct param_range *cbs = &nic->params.cbs;
-
-	ring->rx_max_pending = rfds->max;
-	ring->tx_max_pending = cbs->max;
-	ring->rx_mini_max_pending = 0;
-	ring->rx_jumbo_max_pending = 0;
-	ring->rx_pending = rfds->count;
-	ring->tx_pending = cbs->count;
-	ring->rx_mini_pending = 0;
-	ring->rx_jumbo_pending = 0;
-}
-
-static int e100_set_ringparam(struct net_device *netdev,
-	struct ethtool_ringparam *ring)
-{
-	struct nic *nic = netdev_priv(netdev);
-	struct param_range *rfds = &nic->params.rfds;
-	struct param_range *cbs = &nic->params.cbs;
-
-	if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
-		return -EINVAL;
-
-	if(netif_running(netdev))
-		e100_down(nic);
-	rfds->count = max(ring->rx_pending, rfds->min);
-	rfds->count = min(rfds->count, rfds->max);
-	cbs->count = max(ring->tx_pending, cbs->min);
-	cbs->count = min(cbs->count, cbs->max);
-	DPRINTK(DRV, INFO, "Ring Param settings: rx: %d, tx %d\n",
-	        rfds->count, cbs->count);
-	if(netif_running(netdev))
-		e100_up(nic);
-
-	return 0;
-}
-
-static const char e100_gstrings_test[][ETH_GSTRING_LEN] = {
-	"Link test     (on/offline)",
-	"Eeprom test   (on/offline)",
-	"Self test        (offline)",
-	"Mac loopback     (offline)",
-	"Phy loopback     (offline)",
-};
-#define E100_TEST_LEN	sizeof(e100_gstrings_test) / ETH_GSTRING_LEN
-
-static int e100_diag_test_count(struct net_device *netdev)
-{
-	return E100_TEST_LEN;
-}
-
-static void e100_diag_test(struct net_device *netdev,
-	struct ethtool_test *test, u64 *data)
-{
-	struct ethtool_cmd cmd;
-	struct nic *nic = netdev_priv(netdev);
-	int i, err;
-
-	memset(data, 0, E100_TEST_LEN * sizeof(u64));
-	data[0] = !mii_link_ok(&nic->mii);
-	data[1] = e100_eeprom_load(nic);
-	if(test->flags & ETH_TEST_FL_OFFLINE) {
-
-		/* save speed, duplex & autoneg settings */
-		err = mii_ethtool_gset(&nic->mii, &cmd);
-
-		if(netif_running(netdev))
-			e100_down(nic);
-		data[2] = e100_self_test(nic);
-		data[3] = e100_loopback_test(nic, lb_mac);
-		data[4] = e100_loopback_test(nic, lb_phy);
-
-		/* restore speed, duplex & autoneg settings */
-		err = mii_ethtool_sset(&nic->mii, &cmd);
-
-		if(netif_running(netdev))
-			e100_up(nic);
-	}
-	for(i = 0; i < E100_TEST_LEN; i++)
-		test->flags |= data[i] ? ETH_TEST_FL_FAILED : 0;
-
-	msleep_interruptible(4 * 1000);
-}
-
-static int e100_phys_id(struct net_device *netdev, u32 data)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	if(!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))
-		data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
-	mod_timer(&nic->blink_timer, jiffies);
-	msleep_interruptible(data * 1000);
-	del_timer_sync(&nic->blink_timer);
-	mdio_write(netdev, nic->mii.phy_id, MII_LED_CONTROL, 0);
-
-	return 0;
-}
-
-static const char e100_gstrings_stats[][ETH_GSTRING_LEN] = {
-	"rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
-	"tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
-	"rx_length_errors", "rx_over_errors", "rx_crc_errors",
-	"rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
-	"tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
-	"tx_heartbeat_errors", "tx_window_errors",
-	/* device-specific stats */
-	"tx_deferred", "tx_single_collisions", "tx_multi_collisions",
-	"tx_flow_control_pause", "rx_flow_control_pause",
-	"rx_flow_control_unsupported", "tx_tco_packets", "rx_tco_packets",
-};
-#define E100_NET_STATS_LEN	21
-#define E100_STATS_LEN	sizeof(e100_gstrings_stats) / ETH_GSTRING_LEN
-
-static int e100_get_stats_count(struct net_device *netdev)
-{
-	return E100_STATS_LEN;
-}
-
-static void e100_get_ethtool_stats(struct net_device *netdev,
-	struct ethtool_stats *stats, u64 *data)
-{
-	struct nic *nic = netdev_priv(netdev);
-	int i;
-
-	for(i = 0; i < E100_NET_STATS_LEN; i++)
-		data[i] = ((unsigned long *)&nic->net_stats)[i];
-
-	data[i++] = nic->tx_deferred;
-	data[i++] = nic->tx_single_collisions;
-	data[i++] = nic->tx_multiple_collisions;
-	data[i++] = nic->tx_fc_pause;
-	data[i++] = nic->rx_fc_pause;
-	data[i++] = nic->rx_fc_unsupported;
-	data[i++] = nic->tx_tco_frames;
-	data[i++] = nic->rx_tco_frames;
-}
-
-static void e100_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
-{
-	switch(stringset) {
-	case ETH_SS_TEST:
-		memcpy(data, *e100_gstrings_test, sizeof(e100_gstrings_test));
-		break;
-	case ETH_SS_STATS:
-		memcpy(data, *e100_gstrings_stats, sizeof(e100_gstrings_stats));
-		break;
-	}
-}
-
-static struct ethtool_ops e100_ethtool_ops = {
-	.get_settings		= e100_get_settings,
-	.set_settings		= e100_set_settings,
-	.get_drvinfo		= e100_get_drvinfo,
-	.get_regs_len		= e100_get_regs_len,
-	.get_regs		= e100_get_regs,
-	.get_wol		= e100_get_wol,
-	.set_wol		= e100_set_wol,
-	.get_msglevel		= e100_get_msglevel,
-	.set_msglevel		= e100_set_msglevel,
-	.nway_reset		= e100_nway_reset,
-	.get_link		= e100_get_link,
-	.get_eeprom_len		= e100_get_eeprom_len,
-	.get_eeprom		= e100_get_eeprom,
-	.set_eeprom		= e100_set_eeprom,
-	.get_ringparam		= e100_get_ringparam,
-	.set_ringparam		= e100_set_ringparam,
-	.self_test_count	= e100_diag_test_count,
-	.self_test		= e100_diag_test,
-	.get_strings		= e100_get_strings,
-	.phys_id		= e100_phys_id,
-	.get_stats_count	= e100_get_stats_count,
-	.get_ethtool_stats	= e100_get_ethtool_stats,
-	.get_perm_addr		= ethtool_op_get_perm_addr,
-};
-
-static int e100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	return generic_mii_ioctl(&nic->mii, if_mii(ifr), cmd, NULL);
-}
-
-static int e100_alloc(struct nic *nic)
-{
-	nic->mem = pci_alloc_consistent(nic->pdev, sizeof(struct mem),
-		&nic->dma_addr);
-	return nic->mem ? 0 : -ENOMEM;
-}
-
-static void e100_free(struct nic *nic)
-{
-	if(nic->mem) {
-		pci_free_consistent(nic->pdev, sizeof(struct mem),
-			nic->mem, nic->dma_addr);
-		nic->mem = NULL;
-	}
-}
-
-static int e100_open(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	int err = 0;
-
-    if (!nic->ethercat)
-        netif_carrier_off(netdev);
-	if((err = e100_up(nic)))
-		DPRINTK(IFUP, ERR, "Cannot open interface, aborting.\n");
-	return err;
-}
-
-static int e100_close(struct net_device *netdev)
-{
-	e100_down(netdev_priv(netdev));
-	return 0;
-}
-
-static int __devinit e100_probe(struct pci_dev *pdev,
-	const struct pci_device_id *ent)
-{
-	struct net_device *netdev;
-	struct nic *nic;
-	int err;
-
-	if(!(netdev = alloc_etherdev(sizeof(struct nic)))) {
-		if(((1 << debug) - 1) & NETIF_MSG_PROBE)
-			printk(KERN_ERR PFX "Etherdev alloc failed, abort.\n");
-		return -ENOMEM;
-	}
-
-	netdev->open = e100_open;
-	netdev->stop = e100_close;
-	netdev->hard_start_xmit = e100_xmit_frame;
-	netdev->get_stats = e100_get_stats;
-	netdev->set_multicast_list = e100_set_multicast_list;
-	netdev->set_mac_address = e100_set_mac_address;
-	netdev->change_mtu = e100_change_mtu;
-	netdev->do_ioctl = e100_do_ioctl;
-	SET_ETHTOOL_OPS(netdev, &e100_ethtool_ops);
-	netdev->tx_timeout = e100_tx_timeout;
-	netdev->watchdog_timeo = E100_WATCHDOG_PERIOD;
-	netdev->poll = e100_poll;
-	netdev->weight = E100_NAPI_WEIGHT;
-#ifdef CONFIG_NET_POLL_CONTROLLER
-	netdev->poll_controller = e100_netpoll;
-#endif
-	strcpy(netdev->name, pci_name(pdev));
-
-	nic = netdev_priv(netdev);
-	nic->netdev = netdev;
-	nic->pdev = pdev;
-	nic->msg_enable = (1 << debug) - 1;
-	pci_set_drvdata(pdev, netdev);
-
-    if (e100_device_index++ == ec_device_index) {
-        nic->ethercat = 1;
-        e100_ec_netdev = netdev;
-    }
-    else {
-        nic->ethercat = 0;
-    }
-    nic->ecdev = NULL;
-
-	if((err = pci_enable_device(pdev))) {
-		DPRINTK(PROBE, ERR, "Cannot enable PCI device, aborting.\n");
-		goto err_out_free_dev;
-	}
-
-	if(!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
-		DPRINTK(PROBE, ERR, "Cannot find proper PCI device "
-			"base address, aborting.\n");
-		err = -ENODEV;
-		goto err_out_disable_pdev;
-	}
-
-	if((err = pci_request_regions(pdev, DRV_NAME))) {
-		DPRINTK(PROBE, ERR, "Cannot obtain PCI resources, aborting.\n");
-		goto err_out_disable_pdev;
-	}
-
-	if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
-		DPRINTK(PROBE, ERR, "No usable DMA configuration, aborting.\n");
-		goto err_out_free_res;
-	}
-
-	SET_MODULE_OWNER(netdev);
-	SET_NETDEV_DEV(netdev, &pdev->dev);
-
-	nic->csr = ioremap(pci_resource_start(pdev, 0), sizeof(struct csr));
-	if(!nic->csr) {
-		DPRINTK(PROBE, ERR, "Cannot map device registers, aborting.\n");
-		err = -ENOMEM;
-		goto err_out_free_res;
-	}
-
-	if(ent->driver_data)
-		nic->flags |= ich;
-	else
-		nic->flags &= ~ich;
-
-	e100_get_defaults(nic);
-
-	/* locks must be initialized before calling hw_reset */
-	spin_lock_init(&nic->cb_lock);
-	spin_lock_init(&nic->cmd_lock);
-	spin_lock_init(&nic->mdio_lock);
-
-	/* Reset the device before pci_set_master() in case device is in some
-	 * funky state and has an interrupt pending - hint: we don't have the
-	 * interrupt handler registered yet. */
-	e100_hw_reset(nic);
-
-	pci_set_master(pdev);
-
-	init_timer(&nic->watchdog);
-	nic->watchdog.function = e100_watchdog;
-	nic->watchdog.data = (unsigned long)nic;
-	init_timer(&nic->blink_timer);
-	nic->blink_timer.function = e100_blink_led;
-	nic->blink_timer.data = (unsigned long)nic;
-
-	INIT_WORK(&nic->tx_timeout_task,
-		(void (*)(void *))e100_tx_timeout_task, netdev);
-
-	if((err = e100_alloc(nic))) {
-		DPRINTK(PROBE, ERR, "Cannot alloc driver memory, aborting.\n");
-		goto err_out_iounmap;
-	}
-
-	if((err = e100_eeprom_load(nic)))
-		goto err_out_free;
-
-	e100_phy_init(nic);
-
-	memcpy(netdev->dev_addr, nic->eeprom, ETH_ALEN);
-	memcpy(netdev->perm_addr, nic->eeprom, ETH_ALEN);
-	if(!is_valid_ether_addr(netdev->perm_addr)) {
-		DPRINTK(PROBE, ERR, "Invalid MAC address from "
-			"EEPROM, aborting.\n");
-		err = -EAGAIN;
-		goto err_out_free;
-	}
-
-	/* Wol magic packet can be enabled from eeprom */
-	if((nic->mac >= mac_82558_D101_A4) &&
-	   (nic->eeprom[eeprom_id] & eeprom_id_wol))
-		nic->flags |= wol_magic;
-
-	/* ack any pending wake events, disable PME */
-	err = pci_enable_wake(pdev, 0, 0);
-	if (err)
-		DPRINTK(PROBE, ERR, "Error clearing wake event\n");
-
-    if (!nic->ethercat) {
-        strcpy(netdev->name, "eth%d");
-        if((err = register_netdev(netdev))) {
-            DPRINTK(PROBE, ERR, "Cannot register net device, aborting.\n");
-            goto err_out_free;
-        }
-    }
-    else {
-        strcpy(netdev->name, "ec0");
-    }
-
-	DPRINTK(PROBE, INFO, "addr 0x%llx, irq %d, "
-		"MAC addr %02X:%02X:%02X:%02X:%02X:%02X\n",
-		(unsigned long long)pci_resource_start(pdev, 0), pdev->irq,
-		netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
-		netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
-
-	return 0;
-
-err_out_free:
-	e100_free(nic);
-err_out_iounmap:
-	iounmap(nic->csr);
-err_out_free_res:
-	pci_release_regions(pdev);
-err_out_disable_pdev:
-	pci_disable_device(pdev);
-err_out_free_dev:
-	pci_set_drvdata(pdev, NULL);
-	free_netdev(netdev);
-	return err;
-}
-
-static void __devexit e100_remove(struct pci_dev *pdev)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-
-	if(netdev) {
-		struct nic *nic = netdev_priv(netdev);
-        if (!nic->ethercat)
-            unregister_netdev(netdev);
-		e100_free(nic);
-		iounmap(nic->csr);
-		free_netdev(netdev);
-		pci_release_regions(pdev);
-		pci_disable_device(pdev);
-		pci_set_drvdata(pdev, NULL);
-	}
-}
-
-#ifdef CONFIG_PM
-static int e100_suspend(struct pci_dev *pdev, pm_message_t state)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-	int retval;
-
-	if (nic->ethercat || netif_running(netdev))
-		e100_down(nic);
-	e100_hw_reset(nic);
-    if (!nic->ethercat)
-        netif_device_detach(netdev);
-
-	pci_save_state(pdev);
-	retval = pci_enable_wake(pdev, pci_choose_state(pdev, state),
-	                         nic->flags & (wol_magic | e100_asf(nic)));
-	if (retval)
-		DPRINTK(PROBE,ERR, "Error enabling wake\n");
-	pci_disable_device(pdev);
-	retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
-	if (retval)
-		DPRINTK(PROBE,ERR, "Error %d setting power state\n", retval);
-
-	return 0;
-}
-
-static int e100_resume(struct pci_dev *pdev)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-	int retval;
-
-	retval = pci_set_power_state(pdev, PCI_D0);
-	if (retval)
-		DPRINTK(PROBE,ERR, "Error waking adapter\n");
-	pci_restore_state(pdev);
-	/* ack any pending wake events, disable PME */
-	retval = pci_enable_wake(pdev, 0, 0);
-	if (retval)
-		DPRINTK(PROBE,ERR, "Error clearing wake events\n");
-
-    if (!nic->ethercat)
-        netif_device_attach(netdev);
-	if (nic->ethercat || netif_running(netdev))
-		e100_up(nic);
-
-	return 0;
-}
-#endif
-
-
-static void e100_shutdown(struct pci_dev *pdev)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-	int retval;
-
-#ifdef CONFIG_PM
-	retval = pci_enable_wake(pdev, 0, nic->flags & (wol_magic | e100_asf(nic)));
-#else
-	retval = pci_enable_wake(pdev, 0, nic->flags & (wol_magic));
-#endif
-	if (retval)
-		DPRINTK(PROBE,ERR, "Error enabling wake\n");
-}
-
-/* ------------------ PCI Error Recovery infrastructure  -------------- */
-/**
- * e100_io_error_detected - called when PCI error is detected.
- * @pdev: Pointer to PCI device
- * @state: The current pci conneection state
- */
-static pci_ers_result_t e100_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-
-	/* Similar to calling e100_down(), but avoids adpater I/O. */
-	netdev->stop(netdev);
-
-    if (!nic->ethercat) {
-        /* Detach; put netif into state similar to hotplug unplug. */
-        netif_poll_enable(netdev);
-        netif_device_detach(netdev);
-    }
-
-	/* Request a slot reset. */
-	return PCI_ERS_RESULT_NEED_RESET;
-}
-
-/**
- * e100_io_slot_reset - called after the pci bus has been reset.
- * @pdev: Pointer to PCI device
- *
- * Restart the card from scratch.
- */
-static pci_ers_result_t e100_io_slot_reset(struct pci_dev *pdev)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-
-	if (pci_enable_device(pdev)) {
-		printk(KERN_ERR "e100: Cannot re-enable PCI device after reset.\n");
-		return PCI_ERS_RESULT_DISCONNECT;
-	}
-	pci_set_master(pdev);
-
-	/* Only one device per card can do a reset */
-	if (0 != PCI_FUNC(pdev->devfn))
-		return PCI_ERS_RESULT_RECOVERED;
-	e100_hw_reset(nic);
-	e100_phy_init(nic);
-
-	return PCI_ERS_RESULT_RECOVERED;
-}
-
-/**
- * e100_io_resume - resume normal operations
- * @pdev: Pointer to PCI device
- *
- * Resume normal operations after an error recovery
- * sequence has been completed.
- */
-static void e100_io_resume(struct pci_dev *pdev)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-
-	/* ack any pending wake events, disable PME */
-	pci_enable_wake(pdev, 0, 0);
-
-    if (!nic->ethercat)
-        netif_device_attach(netdev);
-	if (nic->ethercat || netif_running(netdev)) {
-		e100_open(netdev);
-		mod_timer(&nic->watchdog, jiffies);
-	}
-}
-
-static struct pci_error_handlers e100_err_handler = {
-	.error_detected = e100_io_error_detected,
-	.slot_reset = e100_io_slot_reset,
-	.resume = e100_io_resume,
-};
-
-static struct pci_driver e100_driver = {
-	.name =         DRV_NAME,
-	.id_table =     e100_id_table,
-	.probe =        e100_probe,
-	.remove =       __devexit_p(e100_remove),
-#ifdef CONFIG_PM
-	.suspend =      e100_suspend,
-	.resume =       e100_resume,
-#endif
-	.shutdown =     e100_shutdown,
-	.err_handler = &e100_err_handler,
-};
-
-static int __init e100_init_module(void)
-{
-    struct nic *nic;
-
-    printk(KERN_INFO DRV_NAME " " DRV_DESCRIPTION " " DRV_VERSION
-            ", master " EC_MASTER_VERSION "\n");
-	printk(KERN_INFO DRV_NAME " ec_device_index is %i\n", ec_device_index);
-
-	if (pci_module_init(&e100_driver) < 0) {
-		printk(KERN_ERR DRV_NAME " Failed to init PCI module.\n");
-		goto out_return;
-	}
-
-	if (e100_ec_netdev) {
-        nic = netdev_priv(e100_ec_netdev);
-		printk(KERN_INFO DRV_NAME " Registering EtherCAT device...\n");
-		if (!(nic->ecdev = ecdev_register(ec_device_master_index,
-                        e100_ec_netdev, e100_ec_poll, THIS_MODULE))) {
-			printk(KERN_ERR DRV_NAME " Failed to register EtherCAT device!\n");
-			goto out_pci;
-		}
-		printk(KERN_INFO DRV_NAME " Opening EtherCAT device...\n");
-		if (ecdev_open(nic->ecdev)) {
-			printk(KERN_ERR DRV_NAME " Failed to open EtherCAT device!\n");
-			goto out_unregister;
-		}
-
-		printk(KERN_INFO DRV_NAME " EtherCAT device ready.\n");
-	} else {
-		printk(KERN_WARNING DRV_NAME " No EtherCAT device registered!\n");
-	}
-
-	return 0;
-
-out_unregister:
-	printk(KERN_INFO DRV_NAME " Unregistering EtherCAT device...\n");
-	ecdev_unregister(ec_device_master_index, nic->ecdev);
-out_pci:
-	pci_unregister_driver(&e100_driver);
-out_return:
-	return -1;
-}
-
-static void __exit e100_cleanup_module(void)
-{
-	printk(KERN_INFO DRV_NAME " Cleaning up module...\n");
-
-	if (e100_ec_netdev) {
-        struct nic *nic = netdev_priv(e100_ec_netdev);
-		printk(KERN_INFO DRV_NAME " Closing EtherCAT device...\n");
-		ecdev_close(nic->ecdev);
-		printk(KERN_INFO DRV_NAME " Unregistering EtherCAT device...\n");
-		ecdev_unregister(ec_device_master_index, nic->ecdev);
-	}
-
-	pci_unregister_driver(&e100_driver);
-
-	printk(KERN_INFO DRV_NAME " module cleaned up.\n");
-}
-
-module_init(e100_init_module);
-module_exit(e100_cleanup_module);
--- a/devices/e100-2.6.18-orig.c	Mon Jul 28 08:30:44 2008 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,2889 +0,0 @@
-/*******************************************************************************
-
-
-  Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
-
-  This program is free software; you can redistribute it and/or modify it
-  under the terms of the GNU General Public License as published by the Free
-  Software Foundation; either version 2 of the License, or (at your option)
-  any later version.
-
-  This program is distributed in the hope that it will be useful, but WITHOUT
-  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-  more details.
-
-  You should have received a copy of the GNU General Public License along with
-  this program; if not, write to the Free Software Foundation, Inc., 59
-  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
-
-  The full GNU General Public License is included in this distribution in the
-  file called LICENSE.
-
-  Contact Information:
-  Linux NICS <linux.nics@intel.com>
-  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
-
-*******************************************************************************/
-
-/*
- *	e100.c: Intel(R) PRO/100 ethernet driver
- *
- *	(Re)written 2003 by scott.feldman@intel.com.  Based loosely on
- *	original e100 driver, but better described as a munging of
- *	e100, e1000, eepro100, tg3, 8139cp, and other drivers.
- *
- *	References:
- *		Intel 8255x 10/100 Mbps Ethernet Controller Family,
- *		Open Source Software Developers Manual,
- *		http://sourceforge.net/projects/e1000
- *
- *
- *	                      Theory of Operation
- *
- *	I.   General
- *
- *	The driver supports Intel(R) 10/100 Mbps PCI Fast Ethernet
- *	controller family, which includes the 82557, 82558, 82559, 82550,
- *	82551, and 82562 devices.  82558 and greater controllers
- *	integrate the Intel 82555 PHY.  The controllers are used in
- *	server and client network interface cards, as well as in
- *	LAN-On-Motherboard (LOM), CardBus, MiniPCI, and ICHx
- *	configurations.  8255x supports a 32-bit linear addressing
- *	mode and operates at 33Mhz PCI clock rate.
- *
- *	II.  Driver Operation
- *
- *	Memory-mapped mode is used exclusively to access the device's
- *	shared-memory structure, the Control/Status Registers (CSR). All
- *	setup, configuration, and control of the device, including queuing
- *	of Tx, Rx, and configuration commands is through the CSR.
- *	cmd_lock serializes accesses to the CSR command register.  cb_lock
- *	protects the shared Command Block List (CBL).
- *
- *	8255x is highly MII-compliant and all access to the PHY go
- *	through the Management Data Interface (MDI).  Consequently, the
- *	driver leverages the mii.c library shared with other MII-compliant
- *	devices.
- *
- *	Big- and Little-Endian byte order as well as 32- and 64-bit
- *	archs are supported.  Weak-ordered memory and non-cache-coherent
- *	archs are supported.
- *
- *	III. Transmit
- *
- *	A Tx skb is mapped and hangs off of a TCB.  TCBs are linked
- *	together in a fixed-size ring (CBL) thus forming the flexible mode
- *	memory structure.  A TCB marked with the suspend-bit indicates
- *	the end of the ring.  The last TCB processed suspends the
- *	controller, and the controller can be restarted by issue a CU
- *	resume command to continue from the suspend point, or a CU start
- *	command to start at a given position in the ring.
- *
- *	Non-Tx commands (config, multicast setup, etc) are linked
- *	into the CBL ring along with Tx commands.  The common structure
- *	used for both Tx and non-Tx commands is the Command Block (CB).
- *
- *	cb_to_use is the next CB to use for queuing a command; cb_to_clean
- *	is the next CB to check for completion; cb_to_send is the first
- *	CB to start on in case of a previous failure to resume.  CB clean
- *	up happens in interrupt context in response to a CU interrupt.
- *	cbs_avail keeps track of number of free CB resources available.
- *
- * 	Hardware padding of short packets to minimum packet size is
- * 	enabled.  82557 pads with 7Eh, while the later controllers pad
- * 	with 00h.
- *
- *	IV.  Recieve
- *
- *	The Receive Frame Area (RFA) comprises a ring of Receive Frame
- *	Descriptors (RFD) + data buffer, thus forming the simplified mode
- *	memory structure.  Rx skbs are allocated to contain both the RFD
- *	and the data buffer, but the RFD is pulled off before the skb is
- *	indicated.  The data buffer is aligned such that encapsulated
- *	protocol headers are u32-aligned.  Since the RFD is part of the
- *	mapped shared memory, and completion status is contained within
- *	the RFD, the RFD must be dma_sync'ed to maintain a consistent
- *	view from software and hardware.
- *
- *	Under typical operation, the  receive unit (RU) is start once,
- *	and the controller happily fills RFDs as frames arrive.  If
- *	replacement RFDs cannot be allocated, or the RU goes non-active,
- *	the RU must be restarted.  Frame arrival generates an interrupt,
- *	and Rx indication and re-allocation happen in the same context,
- *	therefore no locking is required.  A software-generated interrupt
- *	is generated from the watchdog to recover from a failed allocation
- *	senario where all Rx resources have been indicated and none re-
- *	placed.
- *
- *	V.   Miscellaneous
- *
- * 	VLAN offloading of tagging, stripping and filtering is not
- * 	supported, but driver will accommodate the extra 4-byte VLAN tag
- * 	for processing by upper layers.  Tx/Rx Checksum offloading is not
- * 	supported.  Tx Scatter/Gather is not supported.  Jumbo Frames is
- * 	not supported (hardware limitation).
- *
- * 	MagicPacket(tm) WoL support is enabled/disabled via ethtool.
- *
- * 	Thanks to JC (jchapman@katalix.com) for helping with
- * 	testing/troubleshooting the development driver.
- *
- * 	TODO:
- * 	o several entry points race with dev->close
- * 	o check for tx-no-resources/stop Q races with tx clean/wake Q
- *
- *	FIXES:
- * 2005/12/02 - Michael O'Donnell <Michael.ODonnell at stratus dot com>
- *	- Stratus87247: protect MDI control register manipulations
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/dma-mapping.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/mii.h>
-#include <linux/if_vlan.h>
-#include <linux/skbuff.h>
-#include <linux/ethtool.h>
-#include <linux/string.h>
-#include <asm/unaligned.h>
-
-
-#define DRV_NAME		"e100"
-#define DRV_EXT		"-NAPI"
-#define DRV_VERSION		"3.5.10-k2"DRV_EXT
-#define DRV_DESCRIPTION		"Intel(R) PRO/100 Network Driver"
-#define DRV_COPYRIGHT		"Copyright(c) 1999-2005 Intel Corporation"
-#define PFX			DRV_NAME ": "
-
-#define E100_WATCHDOG_PERIOD	(2 * HZ)
-#define E100_NAPI_WEIGHT	16
-
-MODULE_DESCRIPTION(DRV_DESCRIPTION);
-MODULE_AUTHOR(DRV_COPYRIGHT);
-MODULE_LICENSE("GPL");
-MODULE_VERSION(DRV_VERSION);
-
-static int debug = 3;
-static int eeprom_bad_csum_allow = 0;
-module_param(debug, int, 0);
-module_param(eeprom_bad_csum_allow, int, 0);
-MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
-MODULE_PARM_DESC(eeprom_bad_csum_allow, "Allow bad eeprom checksums");
-#define DPRINTK(nlevel, klevel, fmt, args...) \
-	(void)((NETIF_MSG_##nlevel & nic->msg_enable) && \
-	printk(KERN_##klevel PFX "%s: %s: " fmt, nic->netdev->name, \
-		__FUNCTION__ , ## args))
-
-#define INTEL_8255X_ETHERNET_DEVICE(device_id, ich) {\
-	PCI_VENDOR_ID_INTEL, device_id, PCI_ANY_ID, PCI_ANY_ID, \
-	PCI_CLASS_NETWORK_ETHERNET << 8, 0xFFFF00, ich }
-static struct pci_device_id e100_id_table[] = {
-	INTEL_8255X_ETHERNET_DEVICE(0x1029, 0),
-	INTEL_8255X_ETHERNET_DEVICE(0x1030, 0),
-	INTEL_8255X_ETHERNET_DEVICE(0x1031, 3),
-	INTEL_8255X_ETHERNET_DEVICE(0x1032, 3),
-	INTEL_8255X_ETHERNET_DEVICE(0x1033, 3),
-	INTEL_8255X_ETHERNET_DEVICE(0x1034, 3),
-	INTEL_8255X_ETHERNET_DEVICE(0x1038, 3),
-	INTEL_8255X_ETHERNET_DEVICE(0x1039, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x103A, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x103B, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x103C, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x103D, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x103E, 4),
-	INTEL_8255X_ETHERNET_DEVICE(0x1050, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1051, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1052, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1053, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1054, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1055, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1056, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1057, 5),
-	INTEL_8255X_ETHERNET_DEVICE(0x1059, 0),
-	INTEL_8255X_ETHERNET_DEVICE(0x1064, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1065, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1066, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1067, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1068, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1069, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x106A, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x106B, 6),
-	INTEL_8255X_ETHERNET_DEVICE(0x1091, 7),
-	INTEL_8255X_ETHERNET_DEVICE(0x1092, 7),
-	INTEL_8255X_ETHERNET_DEVICE(0x1093, 7),
-	INTEL_8255X_ETHERNET_DEVICE(0x1094, 7),
-	INTEL_8255X_ETHERNET_DEVICE(0x1095, 7),
-	INTEL_8255X_ETHERNET_DEVICE(0x1209, 0),
-	INTEL_8255X_ETHERNET_DEVICE(0x1229, 0),
-	INTEL_8255X_ETHERNET_DEVICE(0x2449, 2),
-	INTEL_8255X_ETHERNET_DEVICE(0x2459, 2),
-	INTEL_8255X_ETHERNET_DEVICE(0x245D, 2),
-	INTEL_8255X_ETHERNET_DEVICE(0x27DC, 7),
-	{ 0, }
-};
-MODULE_DEVICE_TABLE(pci, e100_id_table);
-
-enum mac {
-	mac_82557_D100_A  = 0,
-	mac_82557_D100_B  = 1,
-	mac_82557_D100_C  = 2,
-	mac_82558_D101_A4 = 4,
-	mac_82558_D101_B0 = 5,
-	mac_82559_D101M   = 8,
-	mac_82559_D101S   = 9,
-	mac_82550_D102    = 12,
-	mac_82550_D102_C  = 13,
-	mac_82551_E       = 14,
-	mac_82551_F       = 15,
-	mac_82551_10      = 16,
-	mac_unknown       = 0xFF,
-};
-
-enum phy {
-	phy_100a     = 0x000003E0,
-	phy_100c     = 0x035002A8,
-	phy_82555_tx = 0x015002A8,
-	phy_nsc_tx   = 0x5C002000,
-	phy_82562_et = 0x033002A8,
-	phy_82562_em = 0x032002A8,
-	phy_82562_ek = 0x031002A8,
-	phy_82562_eh = 0x017002A8,
-	phy_unknown  = 0xFFFFFFFF,
-};
-
-/* CSR (Control/Status Registers) */
-struct csr {
-	struct {
-		u8 status;
-		u8 stat_ack;
-		u8 cmd_lo;
-		u8 cmd_hi;
-		u32 gen_ptr;
-	} scb;
-	u32 port;
-	u16 flash_ctrl;
-	u8 eeprom_ctrl_lo;
-	u8 eeprom_ctrl_hi;
-	u32 mdi_ctrl;
-	u32 rx_dma_count;
-};
-
-enum scb_status {
-	rus_ready        = 0x10,
-	rus_mask         = 0x3C,
-};
-
-enum ru_state  {
-	RU_SUSPENDED = 0,
-	RU_RUNNING	 = 1,
-	RU_UNINITIALIZED = -1,
-};
-
-enum scb_stat_ack {
-	stat_ack_not_ours    = 0x00,
-	stat_ack_sw_gen      = 0x04,
-	stat_ack_rnr         = 0x10,
-	stat_ack_cu_idle     = 0x20,
-	stat_ack_frame_rx    = 0x40,
-	stat_ack_cu_cmd_done = 0x80,
-	stat_ack_not_present = 0xFF,
-	stat_ack_rx = (stat_ack_sw_gen | stat_ack_rnr | stat_ack_frame_rx),
-	stat_ack_tx = (stat_ack_cu_idle | stat_ack_cu_cmd_done),
-};
-
-enum scb_cmd_hi {
-	irq_mask_none = 0x00,
-	irq_mask_all  = 0x01,
-	irq_sw_gen    = 0x02,
-};
-
-enum scb_cmd_lo {
-	cuc_nop        = 0x00,
-	ruc_start      = 0x01,
-	ruc_load_base  = 0x06,
-	cuc_start      = 0x10,
-	cuc_resume     = 0x20,
-	cuc_dump_addr  = 0x40,
-	cuc_dump_stats = 0x50,
-	cuc_load_base  = 0x60,
-	cuc_dump_reset = 0x70,
-};
-
-enum cuc_dump {
-	cuc_dump_complete       = 0x0000A005,
-	cuc_dump_reset_complete = 0x0000A007,
-};
-
-enum port {
-	software_reset  = 0x0000,
-	selftest        = 0x0001,
-	selective_reset = 0x0002,
-};
-
-enum eeprom_ctrl_lo {
-	eesk = 0x01,
-	eecs = 0x02,
-	eedi = 0x04,
-	eedo = 0x08,
-};
-
-enum mdi_ctrl {
-	mdi_write = 0x04000000,
-	mdi_read  = 0x08000000,
-	mdi_ready = 0x10000000,
-};
-
-enum eeprom_op {
-	op_write = 0x05,
-	op_read  = 0x06,
-	op_ewds  = 0x10,
-	op_ewen  = 0x13,
-};
-
-enum eeprom_offsets {
-	eeprom_cnfg_mdix  = 0x03,
-	eeprom_id         = 0x0A,
-	eeprom_config_asf = 0x0D,
-	eeprom_smbus_addr = 0x90,
-};
-
-enum eeprom_cnfg_mdix {
-	eeprom_mdix_enabled = 0x0080,
-};
-
-enum eeprom_id {
-	eeprom_id_wol = 0x0020,
-};
-
-enum eeprom_config_asf {
-	eeprom_asf = 0x8000,
-	eeprom_gcl = 0x4000,
-};
-
-enum cb_status {
-	cb_complete = 0x8000,
-	cb_ok       = 0x2000,
-};
-
-enum cb_command {
-	cb_nop    = 0x0000,
-	cb_iaaddr = 0x0001,
-	cb_config = 0x0002,
-	cb_multi  = 0x0003,
-	cb_tx     = 0x0004,
-	cb_ucode  = 0x0005,
-	cb_dump   = 0x0006,
-	cb_tx_sf  = 0x0008,
-	cb_cid    = 0x1f00,
-	cb_i      = 0x2000,
-	cb_s      = 0x4000,
-	cb_el     = 0x8000,
-};
-
-struct rfd {
-	u16 status;
-	u16 command;
-	u32 link;
-	u32 rbd;
-	u16 actual_size;
-	u16 size;
-};
-
-struct rx {
-	struct rx *next, *prev;
-	struct sk_buff *skb;
-	dma_addr_t dma_addr;
-};
-
-#if defined(__BIG_ENDIAN_BITFIELD)
-#define X(a,b)	b,a
-#else
-#define X(a,b)	a,b
-#endif
-struct config {
-/*0*/	u8 X(byte_count:6, pad0:2);
-/*1*/	u8 X(X(rx_fifo_limit:4, tx_fifo_limit:3), pad1:1);
-/*2*/	u8 adaptive_ifs;
-/*3*/	u8 X(X(X(X(mwi_enable:1, type_enable:1), read_align_enable:1),
-	   term_write_cache_line:1), pad3:4);
-/*4*/	u8 X(rx_dma_max_count:7, pad4:1);
-/*5*/	u8 X(tx_dma_max_count:7, dma_max_count_enable:1);
-/*6*/	u8 X(X(X(X(X(X(X(late_scb_update:1, direct_rx_dma:1),
-	   tno_intr:1), cna_intr:1), standard_tcb:1), standard_stat_counter:1),
-	   rx_discard_overruns:1), rx_save_bad_frames:1);
-/*7*/	u8 X(X(X(X(X(rx_discard_short_frames:1, tx_underrun_retry:2),
-	   pad7:2), rx_extended_rfd:1), tx_two_frames_in_fifo:1),
-	   tx_dynamic_tbd:1);
-/*8*/	u8 X(X(mii_mode:1, pad8:6), csma_disabled:1);
-/*9*/	u8 X(X(X(X(X(rx_tcpudp_checksum:1, pad9:3), vlan_arp_tco:1),
-	   link_status_wake:1), arp_wake:1), mcmatch_wake:1);
-/*10*/	u8 X(X(X(pad10:3, no_source_addr_insertion:1), preamble_length:2),
-	   loopback:2);
-/*11*/	u8 X(linear_priority:3, pad11:5);
-/*12*/	u8 X(X(linear_priority_mode:1, pad12:3), ifs:4);
-/*13*/	u8 ip_addr_lo;
-/*14*/	u8 ip_addr_hi;
-/*15*/	u8 X(X(X(X(X(X(X(promiscuous_mode:1, broadcast_disabled:1),
-	   wait_after_win:1), pad15_1:1), ignore_ul_bit:1), crc_16_bit:1),
-	   pad15_2:1), crs_or_cdt:1);
-/*16*/	u8 fc_delay_lo;
-/*17*/	u8 fc_delay_hi;
-/*18*/	u8 X(X(X(X(X(rx_stripping:1, tx_padding:1), rx_crc_transfer:1),
-	   rx_long_ok:1), fc_priority_threshold:3), pad18:1);
-/*19*/	u8 X(X(X(X(X(X(X(addr_wake:1, magic_packet_disable:1),
-	   fc_disable:1), fc_restop:1), fc_restart:1), fc_reject:1),
-	   full_duplex_force:1), full_duplex_pin:1);
-/*20*/	u8 X(X(X(pad20_1:5, fc_priority_location:1), multi_ia:1), pad20_2:1);
-/*21*/	u8 X(X(pad21_1:3, multicast_all:1), pad21_2:4);
-/*22*/	u8 X(X(rx_d102_mode:1, rx_vlan_drop:1), pad22:6);
-	u8 pad_d102[9];
-};
-
-#define E100_MAX_MULTICAST_ADDRS	64
-struct multi {
-	u16 count;
-	u8 addr[E100_MAX_MULTICAST_ADDRS * ETH_ALEN + 2/*pad*/];
-};
-
-/* Important: keep total struct u32-aligned */
-#define UCODE_SIZE			134
-struct cb {
-	u16 status;
-	u16 command;
-	u32 link;
-	union {
-		u8 iaaddr[ETH_ALEN];
-		u32 ucode[UCODE_SIZE];
-		struct config config;
-		struct multi multi;
-		struct {
-			u32 tbd_array;
-			u16 tcb_byte_count;
-			u8 threshold;
-			u8 tbd_count;
-			struct {
-				u32 buf_addr;
-				u16 size;
-				u16 eol;
-			} tbd;
-		} tcb;
-		u32 dump_buffer_addr;
-	} u;
-	struct cb *next, *prev;
-	dma_addr_t dma_addr;
-	struct sk_buff *skb;
-};
-
-enum loopback {
-	lb_none = 0, lb_mac = 1, lb_phy = 3,
-};
-
-struct stats {
-	u32 tx_good_frames, tx_max_collisions, tx_late_collisions,
-		tx_underruns, tx_lost_crs, tx_deferred, tx_single_collisions,
-		tx_multiple_collisions, tx_total_collisions;
-	u32 rx_good_frames, rx_crc_errors, rx_alignment_errors,
-		rx_resource_errors, rx_overrun_errors, rx_cdt_errors,
-		rx_short_frame_errors;
-	u32 fc_xmt_pause, fc_rcv_pause, fc_rcv_unsupported;
-	u16 xmt_tco_frames, rcv_tco_frames;
-	u32 complete;
-};
-
-struct mem {
-	struct {
-		u32 signature;
-		u32 result;
-	} selftest;
-	struct stats stats;
-	u8 dump_buf[596];
-};
-
-struct param_range {
-	u32 min;
-	u32 max;
-	u32 count;
-};
-
-struct params {
-	struct param_range rfds;
-	struct param_range cbs;
-};
-
-struct nic {
-	/* Begin: frequently used values: keep adjacent for cache effect */
-	u32 msg_enable				____cacheline_aligned;
-	struct net_device *netdev;
-	struct pci_dev *pdev;
-
-	struct rx *rxs				____cacheline_aligned;
-	struct rx *rx_to_use;
-	struct rx *rx_to_clean;
-	struct rfd blank_rfd;
-	enum ru_state ru_running;
-
-	spinlock_t cb_lock			____cacheline_aligned;
-	spinlock_t cmd_lock;
-	struct csr __iomem *csr;
-	enum scb_cmd_lo cuc_cmd;
-	unsigned int cbs_avail;
-	struct cb *cbs;
-	struct cb *cb_to_use;
-	struct cb *cb_to_send;
-	struct cb *cb_to_clean;
-	u16 tx_command;
-	/* End: frequently used values: keep adjacent for cache effect */
-
-	enum {
-		ich                = (1 << 0),
-		promiscuous        = (1 << 1),
-		multicast_all      = (1 << 2),
-		wol_magic          = (1 << 3),
-		ich_10h_workaround = (1 << 4),
-	} flags					____cacheline_aligned;
-
-	enum mac mac;
-	enum phy phy;
-	struct params params;
-	struct net_device_stats net_stats;
-	struct timer_list watchdog;
-	struct timer_list blink_timer;
-	struct mii_if_info mii;
-	struct work_struct tx_timeout_task;
-	enum loopback loopback;
-
-	struct mem *mem;
-	dma_addr_t dma_addr;
-
-	dma_addr_t cbs_dma_addr;
-	u8 adaptive_ifs;
-	u8 tx_threshold;
-	u32 tx_frames;
-	u32 tx_collisions;
-	u32 tx_deferred;
-	u32 tx_single_collisions;
-	u32 tx_multiple_collisions;
-	u32 tx_fc_pause;
-	u32 tx_tco_frames;
-
-	u32 rx_fc_pause;
-	u32 rx_fc_unsupported;
-	u32 rx_tco_frames;
-	u32 rx_over_length_errors;
-
-	u8 rev_id;
-	u16 leds;
-	u16 eeprom_wc;
-	u16 eeprom[256];
-	spinlock_t mdio_lock;
-};
-
-static inline void e100_write_flush(struct nic *nic)
-{
-	/* Flush previous PCI writes through intermediate bridges
-	 * by doing a benign read */
-	(void)readb(&nic->csr->scb.status);
-}
-
-static void e100_enable_irq(struct nic *nic)
-{
-	unsigned long flags;
-
-	spin_lock_irqsave(&nic->cmd_lock, flags);
-	writeb(irq_mask_none, &nic->csr->scb.cmd_hi);
-	e100_write_flush(nic);
-	spin_unlock_irqrestore(&nic->cmd_lock, flags);
-}
-
-static void e100_disable_irq(struct nic *nic)
-{
-	unsigned long flags;
-
-	spin_lock_irqsave(&nic->cmd_lock, flags);
-	writeb(irq_mask_all, &nic->csr->scb.cmd_hi);
-	e100_write_flush(nic);
-	spin_unlock_irqrestore(&nic->cmd_lock, flags);
-}
-
-static void e100_hw_reset(struct nic *nic)
-{
-	/* Put CU and RU into idle with a selective reset to get
-	 * device off of PCI bus */
-	writel(selective_reset, &nic->csr->port);
-	e100_write_flush(nic); udelay(20);
-
-	/* Now fully reset device */
-	writel(software_reset, &nic->csr->port);
-	e100_write_flush(nic); udelay(20);
-
-	/* Mask off our interrupt line - it's unmasked after reset */
-	e100_disable_irq(nic);
-}
-
-static int e100_self_test(struct nic *nic)
-{
-	u32 dma_addr = nic->dma_addr + offsetof(struct mem, selftest);
-
-	/* Passing the self-test is a pretty good indication
-	 * that the device can DMA to/from host memory */
-
-	nic->mem->selftest.signature = 0;
-	nic->mem->selftest.result = 0xFFFFFFFF;
-
-	writel(selftest | dma_addr, &nic->csr->port);
-	e100_write_flush(nic);
-	/* Wait 10 msec for self-test to complete */
-	msleep(10);
-
-	/* Interrupts are enabled after self-test */
-	e100_disable_irq(nic);
-
-	/* Check results of self-test */
-	if(nic->mem->selftest.result != 0) {
-		DPRINTK(HW, ERR, "Self-test failed: result=0x%08X\n",
-			nic->mem->selftest.result);
-		return -ETIMEDOUT;
-	}
-	if(nic->mem->selftest.signature == 0) {
-		DPRINTK(HW, ERR, "Self-test failed: timed out\n");
-		return -ETIMEDOUT;
-	}
-
-	return 0;
-}
-
-static void e100_eeprom_write(struct nic *nic, u16 addr_len, u16 addr, u16 data)
-{
-	u32 cmd_addr_data[3];
-	u8 ctrl;
-	int i, j;
-
-	/* Three cmds: write/erase enable, write data, write/erase disable */
-	cmd_addr_data[0] = op_ewen << (addr_len - 2);
-	cmd_addr_data[1] = (((op_write << addr_len) | addr) << 16) |
-		cpu_to_le16(data);
-	cmd_addr_data[2] = op_ewds << (addr_len - 2);
-
-	/* Bit-bang cmds to write word to eeprom */
-	for(j = 0; j < 3; j++) {
-
-		/* Chip select */
-		writeb(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
-		e100_write_flush(nic); udelay(4);
-
-		for(i = 31; i >= 0; i--) {
-			ctrl = (cmd_addr_data[j] & (1 << i)) ?
-				eecs | eedi : eecs;
-			writeb(ctrl, &nic->csr->eeprom_ctrl_lo);
-			e100_write_flush(nic); udelay(4);
-
-			writeb(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
-			e100_write_flush(nic); udelay(4);
-		}
-		/* Wait 10 msec for cmd to complete */
-		msleep(10);
-
-		/* Chip deselect */
-		writeb(0, &nic->csr->eeprom_ctrl_lo);
-		e100_write_flush(nic); udelay(4);
-	}
-};
-
-/* General technique stolen from the eepro100 driver - very clever */
-static u16 e100_eeprom_read(struct nic *nic, u16 *addr_len, u16 addr)
-{
-	u32 cmd_addr_data;
-	u16 data = 0;
-	u8 ctrl;
-	int i;
-
-	cmd_addr_data = ((op_read << *addr_len) | addr) << 16;
-
-	/* Chip select */
-	writeb(eecs | eesk, &nic->csr->eeprom_ctrl_lo);
-	e100_write_flush(nic); udelay(4);
-
-	/* Bit-bang to read word from eeprom */
-	for(i = 31; i >= 0; i--) {
-		ctrl = (cmd_addr_data & (1 << i)) ? eecs | eedi : eecs;
-		writeb(ctrl, &nic->csr->eeprom_ctrl_lo);
-		e100_write_flush(nic); udelay(4);
-
-		writeb(ctrl | eesk, &nic->csr->eeprom_ctrl_lo);
-		e100_write_flush(nic); udelay(4);
-
-		/* Eeprom drives a dummy zero to EEDO after receiving
-		 * complete address.  Use this to adjust addr_len. */
-		ctrl = readb(&nic->csr->eeprom_ctrl_lo);
-		if(!(ctrl & eedo) && i > 16) {
-			*addr_len -= (i - 16);
-			i = 17;
-		}
-
-		data = (data << 1) | (ctrl & eedo ? 1 : 0);
-	}
-
-	/* Chip deselect */
-	writeb(0, &nic->csr->eeprom_ctrl_lo);
-	e100_write_flush(nic); udelay(4);
-
-	return le16_to_cpu(data);
-};
-
-/* Load entire EEPROM image into driver cache and validate checksum */
-static int e100_eeprom_load(struct nic *nic)
-{
-	u16 addr, addr_len = 8, checksum = 0;
-
-	/* Try reading with an 8-bit addr len to discover actual addr len */
-	e100_eeprom_read(nic, &addr_len, 0);
-	nic->eeprom_wc = 1 << addr_len;
-
-	for(addr = 0; addr < nic->eeprom_wc; addr++) {
-		nic->eeprom[addr] = e100_eeprom_read(nic, &addr_len, addr);
-		if(addr < nic->eeprom_wc - 1)
-			checksum += cpu_to_le16(nic->eeprom[addr]);
-	}
-
-	/* The checksum, stored in the last word, is calculated such that
-	 * the sum of words should be 0xBABA */
-	checksum = le16_to_cpu(0xBABA - checksum);
-	if(checksum != nic->eeprom[nic->eeprom_wc - 1]) {
-		DPRINTK(PROBE, ERR, "EEPROM corrupted\n");
-		if (!eeprom_bad_csum_allow)
-			return -EAGAIN;
-	}
-
-	return 0;
-}
-
-/* Save (portion of) driver EEPROM cache to device and update checksum */
-static int e100_eeprom_save(struct nic *nic, u16 start, u16 count)
-{
-	u16 addr, addr_len = 8, checksum = 0;
-
-	/* Try reading with an 8-bit addr len to discover actual addr len */
-	e100_eeprom_read(nic, &addr_len, 0);
-	nic->eeprom_wc = 1 << addr_len;
-
-	if(start + count >= nic->eeprom_wc)
-		return -EINVAL;
-
-	for(addr = start; addr < start + count; addr++)
-		e100_eeprom_write(nic, addr_len, addr, nic->eeprom[addr]);
-
-	/* The checksum, stored in the last word, is calculated such that
-	 * the sum of words should be 0xBABA */
-	for(addr = 0; addr < nic->eeprom_wc - 1; addr++)
-		checksum += cpu_to_le16(nic->eeprom[addr]);
-	nic->eeprom[nic->eeprom_wc - 1] = le16_to_cpu(0xBABA - checksum);
-	e100_eeprom_write(nic, addr_len, nic->eeprom_wc - 1,
-		nic->eeprom[nic->eeprom_wc - 1]);
-
-	return 0;
-}
-
-#define E100_WAIT_SCB_TIMEOUT 20000 /* we might have to wait 100ms!!! */
-#define E100_WAIT_SCB_FAST 20       /* delay like the old code */
-static int e100_exec_cmd(struct nic *nic, u8 cmd, dma_addr_t dma_addr)
-{
-	unsigned long flags;
-	unsigned int i;
-	int err = 0;
-
-	spin_lock_irqsave(&nic->cmd_lock, flags);
-
-	/* Previous command is accepted when SCB clears */
-	for(i = 0; i < E100_WAIT_SCB_TIMEOUT; i++) {
-		if(likely(!readb(&nic->csr->scb.cmd_lo)))
-			break;
-		cpu_relax();
-		if(unlikely(i > E100_WAIT_SCB_FAST))
-			udelay(5);
-	}
-	if(unlikely(i == E100_WAIT_SCB_TIMEOUT)) {
-		err = -EAGAIN;
-		goto err_unlock;
-	}
-
-	if(unlikely(cmd != cuc_resume))
-		writel(dma_addr, &nic->csr->scb.gen_ptr);
-	writeb(cmd, &nic->csr->scb.cmd_lo);
-
-err_unlock:
-	spin_unlock_irqrestore(&nic->cmd_lock, flags);
-
-	return err;
-}
-
-static int e100_exec_cb(struct nic *nic, struct sk_buff *skb,
-	void (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
-{
-	struct cb *cb;
-	unsigned long flags;
-	int err = 0;
-
-	spin_lock_irqsave(&nic->cb_lock, flags);
-
-	if(unlikely(!nic->cbs_avail)) {
-		err = -ENOMEM;
-		goto err_unlock;
-	}
-
-	cb = nic->cb_to_use;
-	nic->cb_to_use = cb->next;
-	nic->cbs_avail--;
-	cb->skb = skb;
-
-	if(unlikely(!nic->cbs_avail))
-		err = -ENOSPC;
-
-	cb_prepare(nic, cb, skb);
-
-	/* Order is important otherwise we'll be in a race with h/w:
-	 * set S-bit in current first, then clear S-bit in previous. */
-	cb->command |= cpu_to_le16(cb_s);
-	wmb();
-	cb->prev->command &= cpu_to_le16(~cb_s);
-
-	while(nic->cb_to_send != nic->cb_to_use) {
-		if(unlikely(e100_exec_cmd(nic, nic->cuc_cmd,
-			nic->cb_to_send->dma_addr))) {
-			/* Ok, here's where things get sticky.  It's
-			 * possible that we can't schedule the command
-			 * because the controller is too busy, so
-			 * let's just queue the command and try again
-			 * when another command is scheduled. */
-			if(err == -ENOSPC) {
-				//request a reset
-				schedule_work(&nic->tx_timeout_task);
-			}
-			break;
-		} else {
-			nic->cuc_cmd = cuc_resume;
-			nic->cb_to_send = nic->cb_to_send->next;
-		}
-	}
-
-err_unlock:
-	spin_unlock_irqrestore(&nic->cb_lock, flags);
-
-	return err;
-}
-
-static u16 mdio_ctrl(struct nic *nic, u32 addr, u32 dir, u32 reg, u16 data)
-{
-	u32 data_out = 0;
-	unsigned int i;
-	unsigned long flags;
-
-
-	/*
-	 * Stratus87247: we shouldn't be writing the MDI control
-	 * register until the Ready bit shows True.  Also, since
-	 * manipulation of the MDI control registers is a multi-step
-	 * procedure it should be done under lock.
-	 */
-	spin_lock_irqsave(&nic->mdio_lock, flags);
-	for (i = 100; i; --i) {
-		if (readl(&nic->csr->mdi_ctrl) & mdi_ready)
-			break;
-		udelay(20);
-	}
-	if (unlikely(!i)) {
-		printk("e100.mdio_ctrl(%s) won't go Ready\n",
-			nic->netdev->name );
-		spin_unlock_irqrestore(&nic->mdio_lock, flags);
-		return 0;		/* No way to indicate timeout error */
-	}
-	writel((reg << 16) | (addr << 21) | dir | data, &nic->csr->mdi_ctrl);
-
-	for (i = 0; i < 100; i++) {
-		udelay(20);
-		if ((data_out = readl(&nic->csr->mdi_ctrl)) & mdi_ready)
-			break;
-	}
-	spin_unlock_irqrestore(&nic->mdio_lock, flags);
-	DPRINTK(HW, DEBUG,
-		"%s:addr=%d, reg=%d, data_in=0x%04X, data_out=0x%04X\n",
-		dir == mdi_read ? "READ" : "WRITE", addr, reg, data, data_out);
-	return (u16)data_out;
-}
-
-static int mdio_read(struct net_device *netdev, int addr, int reg)
-{
-	return mdio_ctrl(netdev_priv(netdev), addr, mdi_read, reg, 0);
-}
-
-static void mdio_write(struct net_device *netdev, int addr, int reg, int data)
-{
-	mdio_ctrl(netdev_priv(netdev), addr, mdi_write, reg, data);
-}
-
-static void e100_get_defaults(struct nic *nic)
-{
-	struct param_range rfds = { .min = 16, .max = 256, .count = 256 };
-	struct param_range cbs  = { .min = 64, .max = 256, .count = 128 };
-
-	pci_read_config_byte(nic->pdev, PCI_REVISION_ID, &nic->rev_id);
-	/* MAC type is encoded as rev ID; exception: ICH is treated as 82559 */
-	nic->mac = (nic->flags & ich) ? mac_82559_D101M : nic->rev_id;
-	if(nic->mac == mac_unknown)
-		nic->mac = mac_82557_D100_A;
-
-	nic->params.rfds = rfds;
-	nic->params.cbs = cbs;
-
-	/* Quadwords to DMA into FIFO before starting frame transmit */
-	nic->tx_threshold = 0xE0;
-
-	/* no interrupt for every tx completion, delay = 256us if not 557*/
-	nic->tx_command = cpu_to_le16(cb_tx | cb_tx_sf |
-		((nic->mac >= mac_82558_D101_A4) ? cb_cid : cb_i));
-
-	/* Template for a freshly allocated RFD */
-	nic->blank_rfd.command = cpu_to_le16(cb_el);
-	nic->blank_rfd.rbd = 0xFFFFFFFF;
-	nic->blank_rfd.size = cpu_to_le16(VLAN_ETH_FRAME_LEN);
-
-	/* MII setup */
-	nic->mii.phy_id_mask = 0x1F;
-	nic->mii.reg_num_mask = 0x1F;
-	nic->mii.dev = nic->netdev;
-	nic->mii.mdio_read = mdio_read;
-	nic->mii.mdio_write = mdio_write;
-}
-
-static void e100_configure(struct nic *nic, struct cb *cb, struct sk_buff *skb)
-{
-	struct config *config = &cb->u.config;
-	u8 *c = (u8 *)config;
-
-	cb->command = cpu_to_le16(cb_config);
-
-	memset(config, 0, sizeof(struct config));
-
-	config->byte_count = 0x16;		/* bytes in this struct */
-	config->rx_fifo_limit = 0x8;		/* bytes in FIFO before DMA */
-	config->direct_rx_dma = 0x1;		/* reserved */
-	config->standard_tcb = 0x1;		/* 1=standard, 0=extended */
-	config->standard_stat_counter = 0x1;	/* 1=standard, 0=extended */
-	config->rx_discard_short_frames = 0x1;	/* 1=discard, 0=pass */
-	config->tx_underrun_retry = 0x3;	/* # of underrun retries */
-	config->mii_mode = 0x1;			/* 1=MII mode, 0=503 mode */
-	config->pad10 = 0x6;
-	config->no_source_addr_insertion = 0x1;	/* 1=no, 0=yes */
-	config->preamble_length = 0x2;		/* 0=1, 1=3, 2=7, 3=15 bytes */
-	config->ifs = 0x6;			/* x16 = inter frame spacing */
-	config->ip_addr_hi = 0xF2;		/* ARP IP filter - not used */
-	config->pad15_1 = 0x1;
-	config->pad15_2 = 0x1;
-	config->crs_or_cdt = 0x0;		/* 0=CRS only, 1=CRS or CDT */
-	config->fc_delay_hi = 0x40;		/* time delay for fc frame */
-	config->tx_padding = 0x1;		/* 1=pad short frames */
-	config->fc_priority_threshold = 0x7;	/* 7=priority fc disabled */
-	config->pad18 = 0x1;
-	config->full_duplex_pin = 0x1;		/* 1=examine FDX# pin */
-	config->pad20_1 = 0x1F;
-	config->fc_priority_location = 0x1;	/* 1=byte#31, 0=byte#19 */
-	config->pad21_1 = 0x5;
-
-	config->adaptive_ifs = nic->adaptive_ifs;
-	config->loopback = nic->loopback;
-
-	if(nic->mii.force_media && nic->mii.full_duplex)
-		config->full_duplex_force = 0x1;	/* 1=force, 0=auto */
-
-	if(nic->flags & promiscuous || nic->loopback) {
-		config->rx_save_bad_frames = 0x1;	/* 1=save, 0=discard */
-		config->rx_discard_short_frames = 0x0;	/* 1=discard, 0=save */
-		config->promiscuous_mode = 0x1;		/* 1=on, 0=off */
-	}
-
-	if(nic->flags & multicast_all)
-		config->multicast_all = 0x1;		/* 1=accept, 0=no */
-
-	/* disable WoL when up */
-	if(netif_running(nic->netdev) || !(nic->flags & wol_magic))
-		config->magic_packet_disable = 0x1;	/* 1=off, 0=on */
-
-	if(nic->mac >= mac_82558_D101_A4) {
-		config->fc_disable = 0x1;	/* 1=Tx fc off, 0=Tx fc on */
-		config->mwi_enable = 0x1;	/* 1=enable, 0=disable */
-		config->standard_tcb = 0x0;	/* 1=standard, 0=extended */
-		config->rx_long_ok = 0x1;	/* 1=VLANs ok, 0=standard */
-		if(nic->mac >= mac_82559_D101M)
-			config->tno_intr = 0x1;		/* TCO stats enable */
-		else
-			config->standard_stat_counter = 0x0;
-	}
-
-	DPRINTK(HW, DEBUG, "[00-07]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
-		c[0], c[1], c[2], c[3], c[4], c[5], c[6], c[7]);
-	DPRINTK(HW, DEBUG, "[08-15]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
-		c[8], c[9], c[10], c[11], c[12], c[13], c[14], c[15]);
-	DPRINTK(HW, DEBUG, "[16-23]=%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
-		c[16], c[17], c[18], c[19], c[20], c[21], c[22], c[23]);
-}
-
-/********************************************************/
-/*  Micro code for 8086:1229 Rev 8                      */
-/********************************************************/
-
-/*  Parameter values for the D101M B-step  */
-#define D101M_CPUSAVER_TIMER_DWORD		78
-#define D101M_CPUSAVER_BUNDLE_DWORD		65
-#define D101M_CPUSAVER_MIN_SIZE_DWORD		126
-
-#define D101M_B_RCVBUNDLE_UCODE \
-{\
-0x00550215, 0xFFFF0437, 0xFFFFFFFF, 0x06A70789, 0xFFFFFFFF, 0x0558FFFF, \
-0x000C0001, 0x00101312, 0x000C0008, 0x00380216, \
-0x0010009C, 0x00204056, 0x002380CC, 0x00380056, \
-0x0010009C, 0x00244C0B, 0x00000800, 0x00124818, \
-0x00380438, 0x00000000, 0x00140000, 0x00380555, \
-0x00308000, 0x00100662, 0x00100561, 0x000E0408, \
-0x00134861, 0x000C0002, 0x00103093, 0x00308000, \
-0x00100624, 0x00100561, 0x000E0408, 0x00100861, \
-0x000C007E, 0x00222C21, 0x000C0002, 0x00103093, \
-0x00380C7A, 0x00080000, 0x00103090, 0x00380C7A, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x0010009C, 0x00244C2D, 0x00010004, 0x00041000, \
-0x003A0437, 0x00044010, 0x0038078A, 0x00000000, \
-0x00100099, 0x00206C7A, 0x0010009C, 0x00244C48, \
-0x00130824, 0x000C0001, 0x00101213, 0x00260C75, \
-0x00041000, 0x00010004, 0x00130826, 0x000C0006, \
-0x002206A8, 0x0013C926, 0x00101313, 0x003806A8, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00080600, 0x00101B10, 0x00050004, 0x00100826, \
-0x00101210, 0x00380C34, 0x00000000, 0x00000000, \
-0x0021155B, 0x00100099, 0x00206559, 0x0010009C, \
-0x00244559, 0x00130836, 0x000C0000, 0x00220C62, \
-0x000C0001, 0x00101B13, 0x00229C0E, 0x00210C0E, \
-0x00226C0E, 0x00216C0E, 0x0022FC0E, 0x00215C0E, \
-0x00214C0E, 0x00380555, 0x00010004, 0x00041000, \
-0x00278C67, 0x00040800, 0x00018100, 0x003A0437, \
-0x00130826, 0x000C0001, 0x00220559, 0x00101313, \
-0x00380559, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00130831, 0x0010090B, 0x00124813, \
-0x000CFF80, 0x002606AB, 0x00041000, 0x00010004, \
-0x003806A8, 0x00000000, 0x00000000, 0x00000000, \
-}
-
-/********************************************************/
-/*  Micro code for 8086:1229 Rev 9                      */
-/********************************************************/
-
-/*  Parameter values for the D101S  */
-#define D101S_CPUSAVER_TIMER_DWORD		78
-#define D101S_CPUSAVER_BUNDLE_DWORD		67
-#define D101S_CPUSAVER_MIN_SIZE_DWORD		128
-
-#define D101S_RCVBUNDLE_UCODE \
-{\
-0x00550242, 0xFFFF047E, 0xFFFFFFFF, 0x06FF0818, 0xFFFFFFFF, 0x05A6FFFF, \
-0x000C0001, 0x00101312, 0x000C0008, 0x00380243, \
-0x0010009C, 0x00204056, 0x002380D0, 0x00380056, \
-0x0010009C, 0x00244F8B, 0x00000800, 0x00124818, \
-0x0038047F, 0x00000000, 0x00140000, 0x003805A3, \
-0x00308000, 0x00100610, 0x00100561, 0x000E0408, \
-0x00134861, 0x000C0002, 0x00103093, 0x00308000, \
-0x00100624, 0x00100561, 0x000E0408, 0x00100861, \
-0x000C007E, 0x00222FA1, 0x000C0002, 0x00103093, \
-0x00380F90, 0x00080000, 0x00103090, 0x00380F90, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x0010009C, 0x00244FAD, 0x00010004, 0x00041000, \
-0x003A047E, 0x00044010, 0x00380819, 0x00000000, \
-0x00100099, 0x00206FFD, 0x0010009A, 0x0020AFFD, \
-0x0010009C, 0x00244FC8, 0x00130824, 0x000C0001, \
-0x00101213, 0x00260FF7, 0x00041000, 0x00010004, \
-0x00130826, 0x000C0006, 0x00220700, 0x0013C926, \
-0x00101313, 0x00380700, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00080600, 0x00101B10, 0x00050004, 0x00100826, \
-0x00101210, 0x00380FB6, 0x00000000, 0x00000000, \
-0x002115A9, 0x00100099, 0x002065A7, 0x0010009A, \
-0x0020A5A7, 0x0010009C, 0x002445A7, 0x00130836, \
-0x000C0000, 0x00220FE4, 0x000C0001, 0x00101B13, \
-0x00229F8E, 0x00210F8E, 0x00226F8E, 0x00216F8E, \
-0x0022FF8E, 0x00215F8E, 0x00214F8E, 0x003805A3, \
-0x00010004, 0x00041000, 0x00278FE9, 0x00040800, \
-0x00018100, 0x003A047E, 0x00130826, 0x000C0001, \
-0x002205A7, 0x00101313, 0x003805A7, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00130831, \
-0x0010090B, 0x00124813, 0x000CFF80, 0x00260703, \
-0x00041000, 0x00010004, 0x00380700  \
-}
-
-/********************************************************/
-/*  Micro code for the 8086:1229 Rev F/10               */
-/********************************************************/
-
-/*  Parameter values for the D102 E-step  */
-#define D102_E_CPUSAVER_TIMER_DWORD		42
-#define D102_E_CPUSAVER_BUNDLE_DWORD		54
-#define D102_E_CPUSAVER_MIN_SIZE_DWORD		46
-
-#define     D102_E_RCVBUNDLE_UCODE \
-{\
-0x007D028F, 0x0E4204F9, 0x14ED0C85, 0x14FA14E9, 0x0EF70E36, 0x1FFF1FFF, \
-0x00E014B9, 0x00000000, 0x00000000, 0x00000000, \
-0x00E014BD, 0x00000000, 0x00000000, 0x00000000, \
-0x00E014D5, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00E014C1, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00E014C8, 0x00000000, 0x00000000, 0x00000000, \
-0x00200600, 0x00E014EE, 0x00000000, 0x00000000, \
-0x0030FF80, 0x00940E46, 0x00038200, 0x00102000, \
-0x00E00E43, 0x00000000, 0x00000000, 0x00000000, \
-0x00300006, 0x00E014FB, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00906E41, 0x00800E3C, 0x00E00E39, 0x00000000, \
-0x00906EFD, 0x00900EFD, 0x00E00EF8, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-0x00000000, 0x00000000, 0x00000000, 0x00000000, \
-}
-
-static void e100_setup_ucode(struct nic *nic, struct cb *cb, struct sk_buff *skb)
-{
-/* *INDENT-OFF* */
-	static struct {
-		u32 ucode[UCODE_SIZE + 1];
-		u8 mac;
-		u8 timer_dword;
-		u8 bundle_dword;
-		u8 min_size_dword;
-	} ucode_opts[] = {
-		{ D101M_B_RCVBUNDLE_UCODE,
-		  mac_82559_D101M,
-		  D101M_CPUSAVER_TIMER_DWORD,
-		  D101M_CPUSAVER_BUNDLE_DWORD,
-		  D101M_CPUSAVER_MIN_SIZE_DWORD },
-		{ D101S_RCVBUNDLE_UCODE,
-		  mac_82559_D101S,
-		  D101S_CPUSAVER_TIMER_DWORD,
-		  D101S_CPUSAVER_BUNDLE_DWORD,
-		  D101S_CPUSAVER_MIN_SIZE_DWORD },
-		{ D102_E_RCVBUNDLE_UCODE,
-		  mac_82551_F,
-		  D102_E_CPUSAVER_TIMER_DWORD,
-		  D102_E_CPUSAVER_BUNDLE_DWORD,
-		  D102_E_CPUSAVER_MIN_SIZE_DWORD },
-		{ D102_E_RCVBUNDLE_UCODE,
-		  mac_82551_10,
-		  D102_E_CPUSAVER_TIMER_DWORD,
-		  D102_E_CPUSAVER_BUNDLE_DWORD,
-		  D102_E_CPUSAVER_MIN_SIZE_DWORD },
-		{ {0}, 0, 0, 0, 0}
-	}, *opts;
-/* *INDENT-ON* */
-
-/*************************************************************************
-*  CPUSaver parameters
-*
-*  All CPUSaver parameters are 16-bit literals that are part of a
-*  "move immediate value" instruction.  By changing the value of
-*  the literal in the instruction before the code is loaded, the
-*  driver can change the algorithm.
-*
-*  INTDELAY - This loads the dead-man timer with its inital value.
-*    When this timer expires the interrupt is asserted, and the
-*    timer is reset each time a new packet is received.  (see
-*    BUNDLEMAX below to set the limit on number of chained packets)
-*    The current default is 0x600 or 1536.  Experiments show that
-*    the value should probably stay within the 0x200 - 0x1000.
-*
-*  BUNDLEMAX -
-*    This sets the maximum number of frames that will be bundled.  In
-*    some situations, such as the TCP windowing algorithm, it may be
-*    better to limit the growth of the bundle size than let it go as
-*    high as it can, because that could cause too much added latency.
-*    The default is six, because this is the number of packets in the
-*    default TCP window size.  A value of 1 would make CPUSaver indicate
-*    an interrupt for every frame received.  If you do not want to put
-*    a limit on the bundle size, set this value to xFFFF.
-*
-*  BUNDLESMALL -
-*    This contains a bit-mask describing the minimum size frame that
-*    will be bundled.  The default masks the lower 7 bits, which means
-*    that any frame less than 128 bytes in length will not be bundled,
-*    but will instead immediately generate an interrupt.  This does
-*    not affect the current bundle in any way.  Any frame that is 128
-*    bytes or large will be bundled normally.  This feature is meant
-*    to provide immediate indication of ACK frames in a TCP environment.
-*    Customers were seeing poor performance when a machine with CPUSaver
-*    enabled was sending but not receiving.  The delay introduced when
-*    the ACKs were received was enough to reduce total throughput, because
-*    the sender would sit idle until the ACK was finally seen.
-*
-*    The current default is 0xFF80, which masks out the lower 7 bits.
-*    This means that any frame which is x7F (127) bytes or smaller
-*    will cause an immediate interrupt.  Because this value must be a
-*    bit mask, there are only a few valid values that can be used.  To
-*    turn this feature off, the driver can write the value xFFFF to the
-*    lower word of this instruction (in the same way that the other
-*    parameters are used).  Likewise, a value of 0xF800 (2047) would
-*    cause an interrupt to be generated for every frame, because all
-*    standard Ethernet frames are <= 2047 bytes in length.
-*************************************************************************/
-
-/* if you wish to disable the ucode functionality, while maintaining the
- * workarounds it provides, set the following defines to:
- * BUNDLESMALL 0
- * BUNDLEMAX 1
- * INTDELAY 1
- */
-#define BUNDLESMALL 1
-#define BUNDLEMAX (u16)6
-#define INTDELAY (u16)1536 /* 0x600 */
-
-	/* do not load u-code for ICH devices */
-	if (nic->flags & ich)
-		goto noloaducode;
-
-	/* Search for ucode match against h/w rev_id */
-	for (opts = ucode_opts; opts->mac; opts++) {
-		int i;
-		u32 *ucode = opts->ucode;
-		if (nic->mac != opts->mac)
-			continue;
-
-		/* Insert user-tunable settings */
-		ucode[opts->timer_dword] &= 0xFFFF0000;
-		ucode[opts->timer_dword] |= INTDELAY;
-		ucode[opts->bundle_dword] &= 0xFFFF0000;
-		ucode[opts->bundle_dword] |= BUNDLEMAX;
-		ucode[opts->min_size_dword] &= 0xFFFF0000;
-		ucode[opts->min_size_dword] |= (BUNDLESMALL) ? 0xFFFF : 0xFF80;
-
-		for (i = 0; i < UCODE_SIZE; i++)
-			cb->u.ucode[i] = cpu_to_le32(ucode[i]);
-		cb->command = cpu_to_le16(cb_ucode | cb_el);
-		return;
-	}
-
-noloaducode:
-	cb->command = cpu_to_le16(cb_nop | cb_el);
-}
-
-static inline int e100_exec_cb_wait(struct nic *nic, struct sk_buff *skb,
-	void (*cb_prepare)(struct nic *, struct cb *, struct sk_buff *))
-{
-	int err = 0, counter = 50;
-	struct cb *cb = nic->cb_to_clean;
-
-	if ((err = e100_exec_cb(nic, NULL, e100_setup_ucode)))
-		DPRINTK(PROBE,ERR, "ucode cmd failed with error %d\n", err);
-
-	/* must restart cuc */
-	nic->cuc_cmd = cuc_start;
-
-	/* wait for completion */
-	e100_write_flush(nic);
-	udelay(10);
-
-	/* wait for possibly (ouch) 500ms */
-	while (!(cb->status & cpu_to_le16(cb_complete))) {
-		msleep(10);
-		if (!--counter) break;
-	}
-
-	/* ack any interupts, something could have been set */
-	writeb(~0, &nic->csr->scb.stat_ack);
-
-	/* if the command failed, or is not OK, notify and return */
-	if (!counter || !(cb->status & cpu_to_le16(cb_ok))) {
-		DPRINTK(PROBE,ERR, "ucode load failed\n");
-		err = -EPERM;
-	}
-
-	return err;
-}
-
-static void e100_setup_iaaddr(struct nic *nic, struct cb *cb,
-	struct sk_buff *skb)
-{
-	cb->command = cpu_to_le16(cb_iaaddr);
-	memcpy(cb->u.iaaddr, nic->netdev->dev_addr, ETH_ALEN);
-}
-
-static void e100_dump(struct nic *nic, struct cb *cb, struct sk_buff *skb)
-{
-	cb->command = cpu_to_le16(cb_dump);
-	cb->u.dump_buffer_addr = cpu_to_le32(nic->dma_addr +
-		offsetof(struct mem, dump_buf));
-}
-
-#define NCONFIG_AUTO_SWITCH	0x0080
-#define MII_NSC_CONG		MII_RESV1
-#define NSC_CONG_ENABLE		0x0100
-#define NSC_CONG_TXREADY	0x0400
-#define ADVERTISE_FC_SUPPORTED	0x0400
-static int e100_phy_init(struct nic *nic)
-{
-	struct net_device *netdev = nic->netdev;
-	u32 addr;
-	u16 bmcr, stat, id_lo, id_hi, cong;
-
-	/* Discover phy addr by searching addrs in order {1,0,2,..., 31} */
-	for(addr = 0; addr < 32; addr++) {
-		nic->mii.phy_id = (addr == 0) ? 1 : (addr == 1) ? 0 : addr;
-		bmcr = mdio_read(netdev, nic->mii.phy_id, MII_BMCR);
-		stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
-		stat = mdio_read(netdev, nic->mii.phy_id, MII_BMSR);
-		if(!((bmcr == 0xFFFF) || ((stat == 0) && (bmcr == 0))))
-			break;
-	}
-	DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id);
-	if(addr == 32)
-		return -EAGAIN;
-
-	/* Selected the phy and isolate the rest */
-	for(addr = 0; addr < 32; addr++) {
-		if(addr != nic->mii.phy_id) {
-			mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE);
-		} else {
-			bmcr = mdio_read(netdev, addr, MII_BMCR);
-			mdio_write(netdev, addr, MII_BMCR,
-				bmcr & ~BMCR_ISOLATE);
-		}
-	}
-
-	/* Get phy ID */
-	id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1);
-	id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2);
-	nic->phy = (u32)id_hi << 16 | (u32)id_lo;
-	DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy);
-
-	/* Handle National tx phys */
-#define NCS_PHY_MODEL_MASK	0xFFF0FFFF
-	if((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) {
-		/* Disable congestion control */
-		cong = mdio_read(netdev, nic->mii.phy_id, MII_NSC_CONG);
-		cong |= NSC_CONG_TXREADY;
-		cong &= ~NSC_CONG_ENABLE;
-		mdio_write(netdev, nic->mii.phy_id, MII_NSC_CONG, cong);
-	}
-
-	if((nic->mac >= mac_82550_D102) || ((nic->flags & ich) &&
-	   (mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000))) {
-		/* enable/disable MDI/MDI-X auto-switching.
-		   MDI/MDI-X auto-switching is disabled for 82551ER/QM chips */
-		if((nic->mac == mac_82551_E) || (nic->mac == mac_82551_F) ||
-		   (nic->mac == mac_82551_10) || (nic->mii.force_media) ||
-		   !(nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled))
-			mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, 0);
-		else
-			mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, NCONFIG_AUTO_SWITCH);
-	}
-
-	return 0;
-}
-
-static int e100_hw_init(struct nic *nic)
-{
-	int err;
-
-	e100_hw_reset(nic);
-
-	DPRINTK(HW, ERR, "e100_hw_init\n");
-	if(!in_interrupt() && (err = e100_self_test(nic)))
-		return err;
-
-	if((err = e100_phy_init(nic)))
-		return err;
-	if((err = e100_exec_cmd(nic, cuc_load_base, 0)))
-		return err;
-	if((err = e100_exec_cmd(nic, ruc_load_base, 0)))
-		return err;
-	if ((err = e100_exec_cb_wait(nic, NULL, e100_setup_ucode)))
-		return err;
-	if((err = e100_exec_cb(nic, NULL, e100_configure)))
-		return err;
-	if((err = e100_exec_cb(nic, NULL, e100_setup_iaaddr)))
-		return err;
-	if((err = e100_exec_cmd(nic, cuc_dump_addr,
-		nic->dma_addr + offsetof(struct mem, stats))))
-		return err;
-	if((err = e100_exec_cmd(nic, cuc_dump_reset, 0)))
-		return err;
-
-	e100_disable_irq(nic);
-
-	return 0;
-}
-
-static void e100_multi(struct nic *nic, struct cb *cb, struct sk_buff *skb)
-{
-	struct net_device *netdev = nic->netdev;
-	struct dev_mc_list *list = netdev->mc_list;
-	u16 i, count = min(netdev->mc_count, E100_MAX_MULTICAST_ADDRS);
-
-	cb->command = cpu_to_le16(cb_multi);
-	cb->u.multi.count = cpu_to_le16(count * ETH_ALEN);
-	for(i = 0; list && i < count; i++, list = list->next)
-		memcpy(&cb->u.multi.addr[i*ETH_ALEN], &list->dmi_addr,
-			ETH_ALEN);
-}
-
-static void e100_set_multicast_list(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	DPRINTK(HW, DEBUG, "mc_count=%d, flags=0x%04X\n",
-		netdev->mc_count, netdev->flags);
-
-	if(netdev->flags & IFF_PROMISC)
-		nic->flags |= promiscuous;
-	else
-		nic->flags &= ~promiscuous;
-
-	if(netdev->flags & IFF_ALLMULTI ||
-		netdev->mc_count > E100_MAX_MULTICAST_ADDRS)
-		nic->flags |= multicast_all;
-	else
-		nic->flags &= ~multicast_all;
-
-	e100_exec_cb(nic, NULL, e100_configure);
-	e100_exec_cb(nic, NULL, e100_multi);
-}
-
-static void e100_update_stats(struct nic *nic)
-{
-	struct net_device_stats *ns = &nic->net_stats;
-	struct stats *s = &nic->mem->stats;
-	u32 *complete = (nic->mac < mac_82558_D101_A4) ? &s->fc_xmt_pause :
-		(nic->mac < mac_82559_D101M) ? (u32 *)&s->xmt_tco_frames :
-		&s->complete;
-
-	/* Device's stats reporting may take several microseconds to
-	 * complete, so where always waiting for results of the
-	 * previous command. */
-
-	if(*complete == le32_to_cpu(cuc_dump_reset_complete)) {
-		*complete = 0;
-		nic->tx_frames = le32_to_cpu(s->tx_good_frames);
-		nic->tx_collisions = le32_to_cpu(s->tx_total_collisions);
-		ns->tx_aborted_errors += le32_to_cpu(s->tx_max_collisions);
-		ns->tx_window_errors += le32_to_cpu(s->tx_late_collisions);
-		ns->tx_carrier_errors += le32_to_cpu(s->tx_lost_crs);
-		ns->tx_fifo_errors += le32_to_cpu(s->tx_underruns);
-		ns->collisions += nic->tx_collisions;
-		ns->tx_errors += le32_to_cpu(s->tx_max_collisions) +
-			le32_to_cpu(s->tx_lost_crs);
-		ns->rx_length_errors += le32_to_cpu(s->rx_short_frame_errors) +
-			nic->rx_over_length_errors;
-		ns->rx_crc_errors += le32_to_cpu(s->rx_crc_errors);
-		ns->rx_frame_errors += le32_to_cpu(s->rx_alignment_errors);
-		ns->rx_over_errors += le32_to_cpu(s->rx_overrun_errors);
-		ns->rx_fifo_errors += le32_to_cpu(s->rx_overrun_errors);
-		ns->rx_missed_errors += le32_to_cpu(s->rx_resource_errors);
-		ns->rx_errors += le32_to_cpu(s->rx_crc_errors) +
-			le32_to_cpu(s->rx_alignment_errors) +
-			le32_to_cpu(s->rx_short_frame_errors) +
-			le32_to_cpu(s->rx_cdt_errors);
-		nic->tx_deferred += le32_to_cpu(s->tx_deferred);
-		nic->tx_single_collisions +=
-			le32_to_cpu(s->tx_single_collisions);
-		nic->tx_multiple_collisions +=
-			le32_to_cpu(s->tx_multiple_collisions);
-		if(nic->mac >= mac_82558_D101_A4) {
-			nic->tx_fc_pause += le32_to_cpu(s->fc_xmt_pause);
-			nic->rx_fc_pause += le32_to_cpu(s->fc_rcv_pause);
-			nic->rx_fc_unsupported +=
-				le32_to_cpu(s->fc_rcv_unsupported);
-			if(nic->mac >= mac_82559_D101M) {
-				nic->tx_tco_frames +=
-					le16_to_cpu(s->xmt_tco_frames);
-				nic->rx_tco_frames +=
-					le16_to_cpu(s->rcv_tco_frames);
-			}
-		}
-	}
-
-
-	if(e100_exec_cmd(nic, cuc_dump_reset, 0))
-		DPRINTK(TX_ERR, DEBUG, "exec cuc_dump_reset failed\n");
-}
-
-static void e100_adjust_adaptive_ifs(struct nic *nic, int speed, int duplex)
-{
-	/* Adjust inter-frame-spacing (IFS) between two transmits if
-	 * we're getting collisions on a half-duplex connection. */
-
-	if(duplex == DUPLEX_HALF) {
-		u32 prev = nic->adaptive_ifs;
-		u32 min_frames = (speed == SPEED_100) ? 1000 : 100;
-
-		if((nic->tx_frames / 32 < nic->tx_collisions) &&
-		   (nic->tx_frames > min_frames)) {
-			if(nic->adaptive_ifs < 60)
-				nic->adaptive_ifs += 5;
-		} else if (nic->tx_frames < min_frames) {
-			if(nic->adaptive_ifs >= 5)
-				nic->adaptive_ifs -= 5;
-		}
-		if(nic->adaptive_ifs != prev)
-			e100_exec_cb(nic, NULL, e100_configure);
-	}
-}
-
-static void e100_watchdog(unsigned long data)
-{
-	struct nic *nic = (struct nic *)data;
-	struct ethtool_cmd cmd;
-
-	DPRINTK(TIMER, DEBUG, "right now = %ld\n", jiffies);
-
-	/* mii library handles link maintenance tasks */
-
-	mii_ethtool_gset(&nic->mii, &cmd);
-
-	if(mii_link_ok(&nic->mii) && !netif_carrier_ok(nic->netdev)) {
-		DPRINTK(LINK, INFO, "link up, %sMbps, %s-duplex\n",
-			cmd.speed == SPEED_100 ? "100" : "10",
-			cmd.duplex == DUPLEX_FULL ? "full" : "half");
-	} else if(!mii_link_ok(&nic->mii) && netif_carrier_ok(nic->netdev)) {
-		DPRINTK(LINK, INFO, "link down\n");
-	}
-
-	mii_check_link(&nic->mii);
-
-	/* Software generated interrupt to recover from (rare) Rx
-	 * allocation failure.
-	 * Unfortunately have to use a spinlock to not re-enable interrupts
-	 * accidentally, due to hardware that shares a register between the
-	 * interrupt mask bit and the SW Interrupt generation bit */
-	spin_lock_irq(&nic->cmd_lock);
-	writeb(readb(&nic->csr->scb.cmd_hi) | irq_sw_gen,&nic->csr->scb.cmd_hi);
-	e100_write_flush(nic);
-	spin_unlock_irq(&nic->cmd_lock);
-
-	e100_update_stats(nic);
-	e100_adjust_adaptive_ifs(nic, cmd.speed, cmd.duplex);
-
-	if(nic->mac <= mac_82557_D100_C)
-		/* Issue a multicast command to workaround a 557 lock up */
-		e100_set_multicast_list(nic->netdev);
-
-	if(nic->flags & ich && cmd.speed==SPEED_10 && cmd.duplex==DUPLEX_HALF)
-		/* Need SW workaround for ICH[x] 10Mbps/half duplex Tx hang. */
-		nic->flags |= ich_10h_workaround;
-	else
-		nic->flags &= ~ich_10h_workaround;
-
-	mod_timer(&nic->watchdog, jiffies + E100_WATCHDOG_PERIOD);
-}
-
-static void e100_xmit_prepare(struct nic *nic, struct cb *cb,
-	struct sk_buff *skb)
-{
-	cb->command = nic->tx_command;
-	/* interrupt every 16 packets regardless of delay */
-	if((nic->cbs_avail & ~15) == nic->cbs_avail)
-		cb->command |= cpu_to_le16(cb_i);
-	cb->u.tcb.tbd_array = cb->dma_addr + offsetof(struct cb, u.tcb.tbd);
-	cb->u.tcb.tcb_byte_count = 0;
-	cb->u.tcb.threshold = nic->tx_threshold;
-	cb->u.tcb.tbd_count = 1;
-	cb->u.tcb.tbd.buf_addr = cpu_to_le32(pci_map_single(nic->pdev,
-		skb->data, skb->len, PCI_DMA_TODEVICE));
-	/* check for mapping failure? */
-	cb->u.tcb.tbd.size = cpu_to_le16(skb->len);
-}
-
-static int e100_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	int err;
-
-	if(nic->flags & ich_10h_workaround) {
-		/* SW workaround for ICH[x] 10Mbps/half duplex Tx hang.
-		   Issue a NOP command followed by a 1us delay before
-		   issuing the Tx command. */
-		if(e100_exec_cmd(nic, cuc_nop, 0))
-			DPRINTK(TX_ERR, DEBUG, "exec cuc_nop failed\n");
-		udelay(1);
-	}
-
-	err = e100_exec_cb(nic, skb, e100_xmit_prepare);
-
-	switch(err) {
-	case -ENOSPC:
-		/* We queued the skb, but now we're out of space. */
-		DPRINTK(TX_ERR, DEBUG, "No space for CB\n");
-		netif_stop_queue(netdev);
-		break;
-	case -ENOMEM:
-		/* This is a hard error - log it. */
-		DPRINTK(TX_ERR, DEBUG, "Out of Tx resources, returning skb\n");
-		netif_stop_queue(netdev);
-		return 1;
-	}
-
-	netdev->trans_start = jiffies;
-	return 0;
-}
-
-static int e100_tx_clean(struct nic *nic)
-{
-	struct cb *cb;
-	int tx_cleaned = 0;
-
-	spin_lock(&nic->cb_lock);
-
-	DPRINTK(TX_DONE, DEBUG, "cb->status = 0x%04X\n",
-		nic->cb_to_clean->status);
-
-	/* Clean CBs marked complete */
-	for(cb = nic->cb_to_clean;
-	    cb->status & cpu_to_le16(cb_complete);
-	    cb = nic->cb_to_clean = cb->next) {
-		if(likely(cb->skb != NULL)) {
-			nic->net_stats.tx_packets++;
-			nic->net_stats.tx_bytes += cb->skb->len;
-
-			pci_unmap_single(nic->pdev,
-				le32_to_cpu(cb->u.tcb.tbd.buf_addr),
-				le16_to_cpu(cb->u.tcb.tbd.size),
-				PCI_DMA_TODEVICE);
-			dev_kfree_skb_any(cb->skb);
-			cb->skb = NULL;
-			tx_cleaned = 1;
-		}
-		cb->status = 0;
-		nic->cbs_avail++;
-	}
-
-	spin_unlock(&nic->cb_lock);
-
-	/* Recover from running out of Tx resources in xmit_frame */
-	if(unlikely(tx_cleaned && netif_queue_stopped(nic->netdev)))
-		netif_wake_queue(nic->netdev);
-
-	return tx_cleaned;
-}
-
-static void e100_clean_cbs(struct nic *nic)
-{
-	if(nic->cbs) {
-		while(nic->cbs_avail != nic->params.cbs.count) {
-			struct cb *cb = nic->cb_to_clean;
-			if(cb->skb) {
-				pci_unmap_single(nic->pdev,
-					le32_to_cpu(cb->u.tcb.tbd.buf_addr),
-					le16_to_cpu(cb->u.tcb.tbd.size),
-					PCI_DMA_TODEVICE);
-				dev_kfree_skb(cb->skb);
-			}
-			nic->cb_to_clean = nic->cb_to_clean->next;
-			nic->cbs_avail++;
-		}
-		pci_free_consistent(nic->pdev,
-			sizeof(struct cb) * nic->params.cbs.count,
-			nic->cbs, nic->cbs_dma_addr);
-		nic->cbs = NULL;
-		nic->cbs_avail = 0;
-	}
-	nic->cuc_cmd = cuc_start;
-	nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean =
-		nic->cbs;
-}
-
-static int e100_alloc_cbs(struct nic *nic)
-{
-	struct cb *cb;
-	unsigned int i, count = nic->params.cbs.count;
-
-	nic->cuc_cmd = cuc_start;
-	nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = NULL;
-	nic->cbs_avail = 0;
-
-	nic->cbs = pci_alloc_consistent(nic->pdev,
-		sizeof(struct cb) * count, &nic->cbs_dma_addr);
-	if(!nic->cbs)
-		return -ENOMEM;
-
-	for(cb = nic->cbs, i = 0; i < count; cb++, i++) {
-		cb->next = (i + 1 < count) ? cb + 1 : nic->cbs;
-		cb->prev = (i == 0) ? nic->cbs + count - 1 : cb - 1;
-
-		cb->dma_addr = nic->cbs_dma_addr + i * sizeof(struct cb);
-		cb->link = cpu_to_le32(nic->cbs_dma_addr +
-			((i+1) % count) * sizeof(struct cb));
-		cb->skb = NULL;
-	}
-
-	nic->cb_to_use = nic->cb_to_send = nic->cb_to_clean = nic->cbs;
-	nic->cbs_avail = count;
-
-	return 0;
-}
-
-static inline void e100_start_receiver(struct nic *nic, struct rx *rx)
-{
-	if(!nic->rxs) return;
-	if(RU_SUSPENDED != nic->ru_running) return;
-
-	/* handle init time starts */
-	if(!rx) rx = nic->rxs;
-
-	/* (Re)start RU if suspended or idle and RFA is non-NULL */
-	if(rx->skb) {
-		e100_exec_cmd(nic, ruc_start, rx->dma_addr);
-		nic->ru_running = RU_RUNNING;
-	}
-}
-
-#define RFD_BUF_LEN (sizeof(struct rfd) + VLAN_ETH_FRAME_LEN)
-static int e100_rx_alloc_skb(struct nic *nic, struct rx *rx)
-{
-	if(!(rx->skb = dev_alloc_skb(RFD_BUF_LEN + NET_IP_ALIGN)))
-		return -ENOMEM;
-
-	/* Align, init, and map the RFD. */
-	rx->skb->dev = nic->netdev;
-	skb_reserve(rx->skb, NET_IP_ALIGN);
-	memcpy(rx->skb->data, &nic->blank_rfd, sizeof(struct rfd));
-	rx->dma_addr = pci_map_single(nic->pdev, rx->skb->data,
-		RFD_BUF_LEN, PCI_DMA_BIDIRECTIONAL);
-
-	if(pci_dma_mapping_error(rx->dma_addr)) {
-		dev_kfree_skb_any(rx->skb);
-		rx->skb = NULL;
-		rx->dma_addr = 0;
-		return -ENOMEM;
-	}
-
-	/* Link the RFD to end of RFA by linking previous RFD to
-	 * this one, and clearing EL bit of previous.  */
-	if(rx->prev->skb) {
-		struct rfd *prev_rfd = (struct rfd *)rx->prev->skb->data;
-		put_unaligned(cpu_to_le32(rx->dma_addr),
-			(u32 *)&prev_rfd->link);
-		wmb();
-		prev_rfd->command &= ~cpu_to_le16(cb_el);
-		pci_dma_sync_single_for_device(nic->pdev, rx->prev->dma_addr,
-			sizeof(struct rfd), PCI_DMA_TODEVICE);
-	}
-
-	return 0;
-}
-
-static int e100_rx_indicate(struct nic *nic, struct rx *rx,
-	unsigned int *work_done, unsigned int work_to_do)
-{
-	struct sk_buff *skb = rx->skb;
-	struct rfd *rfd = (struct rfd *)skb->data;
-	u16 rfd_status, actual_size;
-
-	if(unlikely(work_done && *work_done >= work_to_do))
-		return -EAGAIN;
-
-	/* Need to sync before taking a peek at cb_complete bit */
-	pci_dma_sync_single_for_cpu(nic->pdev, rx->dma_addr,
-		sizeof(struct rfd), PCI_DMA_FROMDEVICE);
-	rfd_status = le16_to_cpu(rfd->status);
-
-	DPRINTK(RX_STATUS, DEBUG, "status=0x%04X\n", rfd_status);
-
-	/* If data isn't ready, nothing to indicate */
-	if(unlikely(!(rfd_status & cb_complete)))
-		return -ENODATA;
-
-	/* Get actual data size */
-	actual_size = le16_to_cpu(rfd->actual_size) & 0x3FFF;
-	if(unlikely(actual_size > RFD_BUF_LEN - sizeof(struct rfd)))
-		actual_size = RFD_BUF_LEN - sizeof(struct rfd);
-
-	/* Get data */
-	pci_unmap_single(nic->pdev, rx->dma_addr,
-		RFD_BUF_LEN, PCI_DMA_FROMDEVICE);
-
-	/* this allows for a fast restart without re-enabling interrupts */
-	if(le16_to_cpu(rfd->command) & cb_el)
-		nic->ru_running = RU_SUSPENDED;
-
-	/* Pull off the RFD and put the actual data (minus eth hdr) */
-	skb_reserve(skb, sizeof(struct rfd));
-	skb_put(skb, actual_size);
-	skb->protocol = eth_type_trans(skb, nic->netdev);
-
-	if(unlikely(!(rfd_status & cb_ok))) {
-		/* Don't indicate if hardware indicates errors */
-		dev_kfree_skb_any(skb);
-	} else if(actual_size > ETH_DATA_LEN + VLAN_ETH_HLEN) {
-		/* Don't indicate oversized frames */
-		nic->rx_over_length_errors++;
-		dev_kfree_skb_any(skb);
-	} else {
-		nic->net_stats.rx_packets++;
-		nic->net_stats.rx_bytes += actual_size;
-		nic->netdev->last_rx = jiffies;
-		netif_receive_skb(skb);
-		if(work_done)
-			(*work_done)++;
-	}
-
-	rx->skb = NULL;
-
-	return 0;
-}
-
-static void e100_rx_clean(struct nic *nic, unsigned int *work_done,
-	unsigned int work_to_do)
-{
-	struct rx *rx;
-	int restart_required = 0;
-	struct rx *rx_to_start = NULL;
-
-	/* are we already rnr? then pay attention!!! this ensures that
-	 * the state machine progression never allows a start with a
-	 * partially cleaned list, avoiding a race between hardware
-	 * and rx_to_clean when in NAPI mode */
-	if(RU_SUSPENDED == nic->ru_running)
-		restart_required = 1;
-
-	/* Indicate newly arrived packets */
-	for(rx = nic->rx_to_clean; rx->skb; rx = nic->rx_to_clean = rx->next) {
-		int err = e100_rx_indicate(nic, rx, work_done, work_to_do);
-		if(-EAGAIN == err) {
-			/* hit quota so have more work to do, restart once
-			 * cleanup is complete */
-			restart_required = 0;
-			break;
-		} else if(-ENODATA == err)
-			break; /* No more to clean */
-	}
-
-	/* save our starting point as the place we'll restart the receiver */
-	if(restart_required)
-		rx_to_start = nic->rx_to_clean;
-
-	/* Alloc new skbs to refill list */
-	for(rx = nic->rx_to_use; !rx->skb; rx = nic->rx_to_use = rx->next) {
-		if(unlikely(e100_rx_alloc_skb(nic, rx)))
-			break; /* Better luck next time (see watchdog) */
-	}
-
-	if(restart_required) {
-		// ack the rnr?
-		writeb(stat_ack_rnr, &nic->csr->scb.stat_ack);
-		e100_start_receiver(nic, rx_to_start);
-		if(work_done)
-			(*work_done)++;
-	}
-}
-
-static void e100_rx_clean_list(struct nic *nic)
-{
-	struct rx *rx;
-	unsigned int i, count = nic->params.rfds.count;
-
-	nic->ru_running = RU_UNINITIALIZED;
-
-	if(nic->rxs) {
-		for(rx = nic->rxs, i = 0; i < count; rx++, i++) {
-			if(rx->skb) {
-				pci_unmap_single(nic->pdev, rx->dma_addr,
-					RFD_BUF_LEN, PCI_DMA_FROMDEVICE);
-				dev_kfree_skb(rx->skb);
-			}
-		}
-		kfree(nic->rxs);
-		nic->rxs = NULL;
-	}
-
-	nic->rx_to_use = nic->rx_to_clean = NULL;
-}
-
-static int e100_rx_alloc_list(struct nic *nic)
-{
-	struct rx *rx;
-	unsigned int i, count = nic->params.rfds.count;
-
-	nic->rx_to_use = nic->rx_to_clean = NULL;
-	nic->ru_running = RU_UNINITIALIZED;
-
-	if(!(nic->rxs = kmalloc(sizeof(struct rx) * count, GFP_ATOMIC)))
-		return -ENOMEM;
-	memset(nic->rxs, 0, sizeof(struct rx) * count);
-
-	for(rx = nic->rxs, i = 0; i < count; rx++, i++) {
-		rx->next = (i + 1 < count) ? rx + 1 : nic->rxs;
-		rx->prev = (i == 0) ? nic->rxs + count - 1 : rx - 1;
-		if(e100_rx_alloc_skb(nic, rx)) {
-			e100_rx_clean_list(nic);
-			return -ENOMEM;
-		}
-	}
-
-	nic->rx_to_use = nic->rx_to_clean = nic->rxs;
-	nic->ru_running = RU_SUSPENDED;
-
-	return 0;
-}
-
-static irqreturn_t e100_intr(int irq, void *dev_id, struct pt_regs *regs)
-{
-	struct net_device *netdev = dev_id;
-	struct nic *nic = netdev_priv(netdev);
-	u8 stat_ack = readb(&nic->csr->scb.stat_ack);
-
-	DPRINTK(INTR, DEBUG, "stat_ack = 0x%02X\n", stat_ack);
-
-	if(stat_ack == stat_ack_not_ours ||	/* Not our interrupt */
-	   stat_ack == stat_ack_not_present)	/* Hardware is ejected */
-		return IRQ_NONE;
-
-	/* Ack interrupt(s) */
-	writeb(stat_ack, &nic->csr->scb.stat_ack);
-
-	/* We hit Receive No Resource (RNR); restart RU after cleaning */
-	if(stat_ack & stat_ack_rnr)
-		nic->ru_running = RU_SUSPENDED;
-
-	if(likely(netif_rx_schedule_prep(netdev))) {
-		e100_disable_irq(nic);
-		__netif_rx_schedule(netdev);
-	}
-
-	return IRQ_HANDLED;
-}
-
-static int e100_poll(struct net_device *netdev, int *budget)
-{
-	struct nic *nic = netdev_priv(netdev);
-	unsigned int work_to_do = min(netdev->quota, *budget);
-	unsigned int work_done = 0;
-	int tx_cleaned;
-
-	e100_rx_clean(nic, &work_done, work_to_do);
-	tx_cleaned = e100_tx_clean(nic);
-
-	/* If no Rx and Tx cleanup work was done, exit polling mode. */
-	if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
-		netif_rx_complete(netdev);
-		e100_enable_irq(nic);
-		return 0;
-	}
-
-	*budget -= work_done;
-	netdev->quota -= work_done;
-
-	return 1;
-}
-
-#ifdef CONFIG_NET_POLL_CONTROLLER
-static void e100_netpoll(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	e100_disable_irq(nic);
-	e100_intr(nic->pdev->irq, netdev, NULL);
-	e100_tx_clean(nic);
-	e100_enable_irq(nic);
-}
-#endif
-
-static struct net_device_stats *e100_get_stats(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return &nic->net_stats;
-}
-
-static int e100_set_mac_address(struct net_device *netdev, void *p)
-{
-	struct nic *nic = netdev_priv(netdev);
-	struct sockaddr *addr = p;
-
-	if (!is_valid_ether_addr(addr->sa_data))
-		return -EADDRNOTAVAIL;
-
-	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
-	e100_exec_cb(nic, NULL, e100_setup_iaaddr);
-
-	return 0;
-}
-
-static int e100_change_mtu(struct net_device *netdev, int new_mtu)
-{
-	if(new_mtu < ETH_ZLEN || new_mtu > ETH_DATA_LEN)
-		return -EINVAL;
-	netdev->mtu = new_mtu;
-	return 0;
-}
-
-#ifdef CONFIG_PM
-static int e100_asf(struct nic *nic)
-{
-	/* ASF can be enabled from eeprom */
-	return((nic->pdev->device >= 0x1050) && (nic->pdev->device <= 0x1057) &&
-	   (nic->eeprom[eeprom_config_asf] & eeprom_asf) &&
-	   !(nic->eeprom[eeprom_config_asf] & eeprom_gcl) &&
-	   ((nic->eeprom[eeprom_smbus_addr] & 0xFF) != 0xFE));
-}
-#endif
-
-static int e100_up(struct nic *nic)
-{
-	int err;
-
-	if((err = e100_rx_alloc_list(nic)))
-		return err;
-	if((err = e100_alloc_cbs(nic)))
-		goto err_rx_clean_list;
-	if((err = e100_hw_init(nic)))
-		goto err_clean_cbs;
-	e100_set_multicast_list(nic->netdev);
-	e100_start_receiver(nic, NULL);
-	mod_timer(&nic->watchdog, jiffies);
-	if((err = request_irq(nic->pdev->irq, e100_intr, IRQF_SHARED,
-		nic->netdev->name, nic->netdev)))
-		goto err_no_irq;
-	netif_wake_queue(nic->netdev);
-	netif_poll_enable(nic->netdev);
-	/* enable ints _after_ enabling poll, preventing a race between
-	 * disable ints+schedule */
-	e100_enable_irq(nic);
-	return 0;
-
-err_no_irq:
-	del_timer_sync(&nic->watchdog);
-err_clean_cbs:
-	e100_clean_cbs(nic);
-err_rx_clean_list:
-	e100_rx_clean_list(nic);
-	return err;
-}
-
-static void e100_down(struct nic *nic)
-{
-	/* wait here for poll to complete */
-	netif_poll_disable(nic->netdev);
-	netif_stop_queue(nic->netdev);
-	e100_hw_reset(nic);
-	free_irq(nic->pdev->irq, nic->netdev);
-	del_timer_sync(&nic->watchdog);
-	netif_carrier_off(nic->netdev);
-	e100_clean_cbs(nic);
-	e100_rx_clean_list(nic);
-}
-
-static void e100_tx_timeout(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	/* Reset outside of interrupt context, to avoid request_irq
-	 * in interrupt context */
-	schedule_work(&nic->tx_timeout_task);
-}
-
-static void e100_tx_timeout_task(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	DPRINTK(TX_ERR, DEBUG, "scb.status=0x%02X\n",
-		readb(&nic->csr->scb.status));
-	e100_down(netdev_priv(netdev));
-	e100_up(netdev_priv(netdev));
-}
-
-static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode)
-{
-	int err;
-	struct sk_buff *skb;
-
-	/* Use driver resources to perform internal MAC or PHY
-	 * loopback test.  A single packet is prepared and transmitted
-	 * in loopback mode, and the test passes if the received
-	 * packet compares byte-for-byte to the transmitted packet. */
-
-	if((err = e100_rx_alloc_list(nic)))
-		return err;
-	if((err = e100_alloc_cbs(nic)))
-		goto err_clean_rx;
-
-	/* ICH PHY loopback is broken so do MAC loopback instead */
-	if(nic->flags & ich && loopback_mode == lb_phy)
-		loopback_mode = lb_mac;
-
-	nic->loopback = loopback_mode;
-	if((err = e100_hw_init(nic)))
-		goto err_loopback_none;
-
-	if(loopback_mode == lb_phy)
-		mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR,
-			BMCR_LOOPBACK);
-
-	e100_start_receiver(nic, NULL);
-
-	if(!(skb = dev_alloc_skb(ETH_DATA_LEN))) {
-		err = -ENOMEM;
-		goto err_loopback_none;
-	}
-	skb_put(skb, ETH_DATA_LEN);
-	memset(skb->data, 0xFF, ETH_DATA_LEN);
-	e100_xmit_frame(skb, nic->netdev);
-
-	msleep(10);
-
-	pci_dma_sync_single_for_cpu(nic->pdev, nic->rx_to_clean->dma_addr,
-			RFD_BUF_LEN, PCI_DMA_FROMDEVICE);
-
-	if(memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd),
-	   skb->data, ETH_DATA_LEN))
-		err = -EAGAIN;
-
-err_loopback_none:
-	mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR, 0);
-	nic->loopback = lb_none;
-	e100_clean_cbs(nic);
-	e100_hw_reset(nic);
-err_clean_rx:
-	e100_rx_clean_list(nic);
-	return err;
-}
-
-#define MII_LED_CONTROL	0x1B
-static void e100_blink_led(unsigned long data)
-{
-	struct nic *nic = (struct nic *)data;
-	enum led_state {
-		led_on     = 0x01,
-		led_off    = 0x04,
-		led_on_559 = 0x05,
-		led_on_557 = 0x07,
-	};
-
-	nic->leds = (nic->leds & led_on) ? led_off :
-		(nic->mac < mac_82559_D101M) ? led_on_557 : led_on_559;
-	mdio_write(nic->netdev, nic->mii.phy_id, MII_LED_CONTROL, nic->leds);
-	mod_timer(&nic->blink_timer, jiffies + HZ / 4);
-}
-
-static int e100_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return mii_ethtool_gset(&nic->mii, cmd);
-}
-
-static int e100_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
-{
-	struct nic *nic = netdev_priv(netdev);
-	int err;
-
-	mdio_write(netdev, nic->mii.phy_id, MII_BMCR, BMCR_RESET);
-	err = mii_ethtool_sset(&nic->mii, cmd);
-	e100_exec_cb(nic, NULL, e100_configure);
-
-	return err;
-}
-
-static void e100_get_drvinfo(struct net_device *netdev,
-	struct ethtool_drvinfo *info)
-{
-	struct nic *nic = netdev_priv(netdev);
-	strcpy(info->driver, DRV_NAME);
-	strcpy(info->version, DRV_VERSION);
-	strcpy(info->fw_version, "N/A");
-	strcpy(info->bus_info, pci_name(nic->pdev));
-}
-
-static int e100_get_regs_len(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-#define E100_PHY_REGS		0x1C
-#define E100_REGS_LEN		1 + E100_PHY_REGS + \
-	sizeof(nic->mem->dump_buf) / sizeof(u32)
-	return E100_REGS_LEN * sizeof(u32);
-}
-
-static void e100_get_regs(struct net_device *netdev,
-	struct ethtool_regs *regs, void *p)
-{
-	struct nic *nic = netdev_priv(netdev);
-	u32 *buff = p;
-	int i;
-
-	regs->version = (1 << 24) | nic->rev_id;
-	buff[0] = readb(&nic->csr->scb.cmd_hi) << 24 |
-		readb(&nic->csr->scb.cmd_lo) << 16 |
-		readw(&nic->csr->scb.status);
-	for(i = E100_PHY_REGS; i >= 0; i--)
-		buff[1 + E100_PHY_REGS - i] =
-			mdio_read(netdev, nic->mii.phy_id, i);
-	memset(nic->mem->dump_buf, 0, sizeof(nic->mem->dump_buf));
-	e100_exec_cb(nic, NULL, e100_dump);
-	msleep(10);
-	memcpy(&buff[2 + E100_PHY_REGS], nic->mem->dump_buf,
-		sizeof(nic->mem->dump_buf));
-}
-
-static void e100_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
-{
-	struct nic *nic = netdev_priv(netdev);
-	wol->supported = (nic->mac >= mac_82558_D101_A4) ?  WAKE_MAGIC : 0;
-	wol->wolopts = (nic->flags & wol_magic) ? WAKE_MAGIC : 0;
-}
-
-static int e100_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	if(wol->wolopts != WAKE_MAGIC && wol->wolopts != 0)
-		return -EOPNOTSUPP;
-
-	if(wol->wolopts)
-		nic->flags |= wol_magic;
-	else
-		nic->flags &= ~wol_magic;
-
-	e100_exec_cb(nic, NULL, e100_configure);
-
-	return 0;
-}
-
-static u32 e100_get_msglevel(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return nic->msg_enable;
-}
-
-static void e100_set_msglevel(struct net_device *netdev, u32 value)
-{
-	struct nic *nic = netdev_priv(netdev);
-	nic->msg_enable = value;
-}
-
-static int e100_nway_reset(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return mii_nway_restart(&nic->mii);
-}
-
-static u32 e100_get_link(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return mii_link_ok(&nic->mii);
-}
-
-static int e100_get_eeprom_len(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	return nic->eeprom_wc << 1;
-}
-
-#define E100_EEPROM_MAGIC	0x1234
-static int e100_get_eeprom(struct net_device *netdev,
-	struct ethtool_eeprom *eeprom, u8 *bytes)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	eeprom->magic = E100_EEPROM_MAGIC;
-	memcpy(bytes, &((u8 *)nic->eeprom)[eeprom->offset], eeprom->len);
-
-	return 0;
-}
-
-static int e100_set_eeprom(struct net_device *netdev,
-	struct ethtool_eeprom *eeprom, u8 *bytes)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	if(eeprom->magic != E100_EEPROM_MAGIC)
-		return -EINVAL;
-
-	memcpy(&((u8 *)nic->eeprom)[eeprom->offset], bytes, eeprom->len);
-
-	return e100_eeprom_save(nic, eeprom->offset >> 1,
-		(eeprom->len >> 1) + 1);
-}
-
-static void e100_get_ringparam(struct net_device *netdev,
-	struct ethtool_ringparam *ring)
-{
-	struct nic *nic = netdev_priv(netdev);
-	struct param_range *rfds = &nic->params.rfds;
-	struct param_range *cbs = &nic->params.cbs;
-
-	ring->rx_max_pending = rfds->max;
-	ring->tx_max_pending = cbs->max;
-	ring->rx_mini_max_pending = 0;
-	ring->rx_jumbo_max_pending = 0;
-	ring->rx_pending = rfds->count;
-	ring->tx_pending = cbs->count;
-	ring->rx_mini_pending = 0;
-	ring->rx_jumbo_pending = 0;
-}
-
-static int e100_set_ringparam(struct net_device *netdev,
-	struct ethtool_ringparam *ring)
-{
-	struct nic *nic = netdev_priv(netdev);
-	struct param_range *rfds = &nic->params.rfds;
-	struct param_range *cbs = &nic->params.cbs;
-
-	if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
-		return -EINVAL;
-
-	if(netif_running(netdev))
-		e100_down(nic);
-	rfds->count = max(ring->rx_pending, rfds->min);
-	rfds->count = min(rfds->count, rfds->max);
-	cbs->count = max(ring->tx_pending, cbs->min);
-	cbs->count = min(cbs->count, cbs->max);
-	DPRINTK(DRV, INFO, "Ring Param settings: rx: %d, tx %d\n",
-	        rfds->count, cbs->count);
-	if(netif_running(netdev))
-		e100_up(nic);
-
-	return 0;
-}
-
-static const char e100_gstrings_test[][ETH_GSTRING_LEN] = {
-	"Link test     (on/offline)",
-	"Eeprom test   (on/offline)",
-	"Self test        (offline)",
-	"Mac loopback     (offline)",
-	"Phy loopback     (offline)",
-};
-#define E100_TEST_LEN	sizeof(e100_gstrings_test) / ETH_GSTRING_LEN
-
-static int e100_diag_test_count(struct net_device *netdev)
-{
-	return E100_TEST_LEN;
-}
-
-static void e100_diag_test(struct net_device *netdev,
-	struct ethtool_test *test, u64 *data)
-{
-	struct ethtool_cmd cmd;
-	struct nic *nic = netdev_priv(netdev);
-	int i, err;
-
-	memset(data, 0, E100_TEST_LEN * sizeof(u64));
-	data[0] = !mii_link_ok(&nic->mii);
-	data[1] = e100_eeprom_load(nic);
-	if(test->flags & ETH_TEST_FL_OFFLINE) {
-
-		/* save speed, duplex & autoneg settings */
-		err = mii_ethtool_gset(&nic->mii, &cmd);
-
-		if(netif_running(netdev))
-			e100_down(nic);
-		data[2] = e100_self_test(nic);
-		data[3] = e100_loopback_test(nic, lb_mac);
-		data[4] = e100_loopback_test(nic, lb_phy);
-
-		/* restore speed, duplex & autoneg settings */
-		err = mii_ethtool_sset(&nic->mii, &cmd);
-
-		if(netif_running(netdev))
-			e100_up(nic);
-	}
-	for(i = 0; i < E100_TEST_LEN; i++)
-		test->flags |= data[i] ? ETH_TEST_FL_FAILED : 0;
-
-	msleep_interruptible(4 * 1000);
-}
-
-static int e100_phys_id(struct net_device *netdev, u32 data)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	if(!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))
-		data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ);
-	mod_timer(&nic->blink_timer, jiffies);
-	msleep_interruptible(data * 1000);
-	del_timer_sync(&nic->blink_timer);
-	mdio_write(netdev, nic->mii.phy_id, MII_LED_CONTROL, 0);
-
-	return 0;
-}
-
-static const char e100_gstrings_stats[][ETH_GSTRING_LEN] = {
-	"rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
-	"tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
-	"rx_length_errors", "rx_over_errors", "rx_crc_errors",
-	"rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
-	"tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
-	"tx_heartbeat_errors", "tx_window_errors",
-	/* device-specific stats */
-	"tx_deferred", "tx_single_collisions", "tx_multi_collisions",
-	"tx_flow_control_pause", "rx_flow_control_pause",
-	"rx_flow_control_unsupported", "tx_tco_packets", "rx_tco_packets",
-};
-#define E100_NET_STATS_LEN	21
-#define E100_STATS_LEN	sizeof(e100_gstrings_stats) / ETH_GSTRING_LEN
-
-static int e100_get_stats_count(struct net_device *netdev)
-{
-	return E100_STATS_LEN;
-}
-
-static void e100_get_ethtool_stats(struct net_device *netdev,
-	struct ethtool_stats *stats, u64 *data)
-{
-	struct nic *nic = netdev_priv(netdev);
-	int i;
-
-	for(i = 0; i < E100_NET_STATS_LEN; i++)
-		data[i] = ((unsigned long *)&nic->net_stats)[i];
-
-	data[i++] = nic->tx_deferred;
-	data[i++] = nic->tx_single_collisions;
-	data[i++] = nic->tx_multiple_collisions;
-	data[i++] = nic->tx_fc_pause;
-	data[i++] = nic->rx_fc_pause;
-	data[i++] = nic->rx_fc_unsupported;
-	data[i++] = nic->tx_tco_frames;
-	data[i++] = nic->rx_tco_frames;
-}
-
-static void e100_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
-{
-	switch(stringset) {
-	case ETH_SS_TEST:
-		memcpy(data, *e100_gstrings_test, sizeof(e100_gstrings_test));
-		break;
-	case ETH_SS_STATS:
-		memcpy(data, *e100_gstrings_stats, sizeof(e100_gstrings_stats));
-		break;
-	}
-}
-
-static struct ethtool_ops e100_ethtool_ops = {
-	.get_settings		= e100_get_settings,
-	.set_settings		= e100_set_settings,
-	.get_drvinfo		= e100_get_drvinfo,
-	.get_regs_len		= e100_get_regs_len,
-	.get_regs		= e100_get_regs,
-	.get_wol		= e100_get_wol,
-	.set_wol		= e100_set_wol,
-	.get_msglevel		= e100_get_msglevel,
-	.set_msglevel		= e100_set_msglevel,
-	.nway_reset		= e100_nway_reset,
-	.get_link		= e100_get_link,
-	.get_eeprom_len		= e100_get_eeprom_len,
-	.get_eeprom		= e100_get_eeprom,
-	.set_eeprom		= e100_set_eeprom,
-	.get_ringparam		= e100_get_ringparam,
-	.set_ringparam		= e100_set_ringparam,
-	.self_test_count	= e100_diag_test_count,
-	.self_test		= e100_diag_test,
-	.get_strings		= e100_get_strings,
-	.phys_id		= e100_phys_id,
-	.get_stats_count	= e100_get_stats_count,
-	.get_ethtool_stats	= e100_get_ethtool_stats,
-	.get_perm_addr		= ethtool_op_get_perm_addr,
-};
-
-static int e100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
-{
-	struct nic *nic = netdev_priv(netdev);
-
-	return generic_mii_ioctl(&nic->mii, if_mii(ifr), cmd, NULL);
-}
-
-static int e100_alloc(struct nic *nic)
-{
-	nic->mem = pci_alloc_consistent(nic->pdev, sizeof(struct mem),
-		&nic->dma_addr);
-	return nic->mem ? 0 : -ENOMEM;
-}
-
-static void e100_free(struct nic *nic)
-{
-	if(nic->mem) {
-		pci_free_consistent(nic->pdev, sizeof(struct mem),
-			nic->mem, nic->dma_addr);
-		nic->mem = NULL;
-	}
-}
-
-static int e100_open(struct net_device *netdev)
-{
-	struct nic *nic = netdev_priv(netdev);
-	int err = 0;
-
-	netif_carrier_off(netdev);
-	if((err = e100_up(nic)))
-		DPRINTK(IFUP, ERR, "Cannot open interface, aborting.\n");
-	return err;
-}
-
-static int e100_close(struct net_device *netdev)
-{
-	e100_down(netdev_priv(netdev));
-	return 0;
-}
-
-static int __devinit e100_probe(struct pci_dev *pdev,
-	const struct pci_device_id *ent)
-{
-	struct net_device *netdev;
-	struct nic *nic;
-	int err;
-
-	if(!(netdev = alloc_etherdev(sizeof(struct nic)))) {
-		if(((1 << debug) - 1) & NETIF_MSG_PROBE)
-			printk(KERN_ERR PFX "Etherdev alloc failed, abort.\n");
-		return -ENOMEM;
-	}
-
-	netdev->open = e100_open;
-	netdev->stop = e100_close;
-	netdev->hard_start_xmit = e100_xmit_frame;
-	netdev->get_stats = e100_get_stats;
-	netdev->set_multicast_list = e100_set_multicast_list;
-	netdev->set_mac_address = e100_set_mac_address;
-	netdev->change_mtu = e100_change_mtu;
-	netdev->do_ioctl = e100_do_ioctl;
-	SET_ETHTOOL_OPS(netdev, &e100_ethtool_ops);
-	netdev->tx_timeout = e100_tx_timeout;
-	netdev->watchdog_timeo = E100_WATCHDOG_PERIOD;
-	netdev->poll = e100_poll;
-	netdev->weight = E100_NAPI_WEIGHT;
-#ifdef CONFIG_NET_POLL_CONTROLLER
-	netdev->poll_controller = e100_netpoll;
-#endif
-	strcpy(netdev->name, pci_name(pdev));
-
-	nic = netdev_priv(netdev);
-	nic->netdev = netdev;
-	nic->pdev = pdev;
-	nic->msg_enable = (1 << debug) - 1;
-	pci_set_drvdata(pdev, netdev);
-
-	if((err = pci_enable_device(pdev))) {
-		DPRINTK(PROBE, ERR, "Cannot enable PCI device, aborting.\n");
-		goto err_out_free_dev;
-	}
-
-	if(!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
-		DPRINTK(PROBE, ERR, "Cannot find proper PCI device "
-			"base address, aborting.\n");
-		err = -ENODEV;
-		goto err_out_disable_pdev;
-	}
-
-	if((err = pci_request_regions(pdev, DRV_NAME))) {
-		DPRINTK(PROBE, ERR, "Cannot obtain PCI resources, aborting.\n");
-		goto err_out_disable_pdev;
-	}
-
-	if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
-		DPRINTK(PROBE, ERR, "No usable DMA configuration, aborting.\n");
-		goto err_out_free_res;
-	}
-
-	SET_MODULE_OWNER(netdev);
-	SET_NETDEV_DEV(netdev, &pdev->dev);
-
-	nic->csr = ioremap(pci_resource_start(pdev, 0), sizeof(struct csr));
-	if(!nic->csr) {
-		DPRINTK(PROBE, ERR, "Cannot map device registers, aborting.\n");
-		err = -ENOMEM;
-		goto err_out_free_res;
-	}
-
-	if(ent->driver_data)
-		nic->flags |= ich;
-	else
-		nic->flags &= ~ich;
-
-	e100_get_defaults(nic);
-
-	/* locks must be initialized before calling hw_reset */
-	spin_lock_init(&nic->cb_lock);
-	spin_lock_init(&nic->cmd_lock);
-	spin_lock_init(&nic->mdio_lock);
-
-	/* Reset the device before pci_set_master() in case device is in some
-	 * funky state and has an interrupt pending - hint: we don't have the
-	 * interrupt handler registered yet. */
-	e100_hw_reset(nic);
-
-	pci_set_master(pdev);
-
-	init_timer(&nic->watchdog);
-	nic->watchdog.function = e100_watchdog;
-	nic->watchdog.data = (unsigned long)nic;
-	init_timer(&nic->blink_timer);
-	nic->blink_timer.function = e100_blink_led;
-	nic->blink_timer.data = (unsigned long)nic;
-
-	INIT_WORK(&nic->tx_timeout_task,
-		(void (*)(void *))e100_tx_timeout_task, netdev);
-
-	if((err = e100_alloc(nic))) {
-		DPRINTK(PROBE, ERR, "Cannot alloc driver memory, aborting.\n");
-		goto err_out_iounmap;
-	}
-
-	if((err = e100_eeprom_load(nic)))
-		goto err_out_free;
-
-	e100_phy_init(nic);
-
-	memcpy(netdev->dev_addr, nic->eeprom, ETH_ALEN);
-	memcpy(netdev->perm_addr, nic->eeprom, ETH_ALEN);
-	if(!is_valid_ether_addr(netdev->perm_addr)) {
-		DPRINTK(PROBE, ERR, "Invalid MAC address from "
-			"EEPROM, aborting.\n");
-		err = -EAGAIN;
-		goto err_out_free;
-	}
-
-	/* Wol magic packet can be enabled from eeprom */
-	if((nic->mac >= mac_82558_D101_A4) &&
-	   (nic->eeprom[eeprom_id] & eeprom_id_wol))
-		nic->flags |= wol_magic;
-
-	/* ack any pending wake events, disable PME */
-	err = pci_enable_wake(pdev, 0, 0);
-	if (err)
-		DPRINTK(PROBE, ERR, "Error clearing wake event\n");
-
-	strcpy(netdev->name, "eth%d");
-	if((err = register_netdev(netdev))) {
-		DPRINTK(PROBE, ERR, "Cannot register net device, aborting.\n");
-		goto err_out_free;
-	}
-
-	DPRINTK(PROBE, INFO, "addr 0x%llx, irq %d, "
-		"MAC addr %02X:%02X:%02X:%02X:%02X:%02X\n",
-		(unsigned long long)pci_resource_start(pdev, 0), pdev->irq,
-		netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
-		netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
-
-	return 0;
-
-err_out_free:
-	e100_free(nic);
-err_out_iounmap:
-	iounmap(nic->csr);
-err_out_free_res:
-	pci_release_regions(pdev);
-err_out_disable_pdev:
-	pci_disable_device(pdev);
-err_out_free_dev:
-	pci_set_drvdata(pdev, NULL);
-	free_netdev(netdev);
-	return err;
-}
-
-static void __devexit e100_remove(struct pci_dev *pdev)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-
-	if(netdev) {
-		struct nic *nic = netdev_priv(netdev);
-		unregister_netdev(netdev);
-		e100_free(nic);
-		iounmap(nic->csr);
-		free_netdev(netdev);
-		pci_release_regions(pdev);
-		pci_disable_device(pdev);
-		pci_set_drvdata(pdev, NULL);
-	}
-}
-
-#ifdef CONFIG_PM
-static int e100_suspend(struct pci_dev *pdev, pm_message_t state)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-	int retval;
-
-	if(netif_running(netdev))
-		e100_down(nic);
-	e100_hw_reset(nic);
-	netif_device_detach(netdev);
-
-	pci_save_state(pdev);
-	retval = pci_enable_wake(pdev, pci_choose_state(pdev, state),
-	                         nic->flags & (wol_magic | e100_asf(nic)));
-	if (retval)
-		DPRINTK(PROBE,ERR, "Error enabling wake\n");
-	pci_disable_device(pdev);
-	retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
-	if (retval)
-		DPRINTK(PROBE,ERR, "Error %d setting power state\n", retval);
-
-	return 0;
-}
-
-static int e100_resume(struct pci_dev *pdev)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-	int retval;
-
-	retval = pci_set_power_state(pdev, PCI_D0);
-	if (retval)
-		DPRINTK(PROBE,ERR, "Error waking adapter\n");
-	pci_restore_state(pdev);
-	/* ack any pending wake events, disable PME */
-	retval = pci_enable_wake(pdev, 0, 0);
-	if (retval)
-		DPRINTK(PROBE,ERR, "Error clearing wake events\n");
-
-	netif_device_attach(netdev);
-	if(netif_running(netdev))
-		e100_up(nic);
-
-	return 0;
-}
-#endif
-
-
-static void e100_shutdown(struct pci_dev *pdev)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-	int retval;
-
-#ifdef CONFIG_PM
-	retval = pci_enable_wake(pdev, 0, nic->flags & (wol_magic | e100_asf(nic)));
-#else
-	retval = pci_enable_wake(pdev, 0, nic->flags & (wol_magic));
-#endif
-	if (retval)
-		DPRINTK(PROBE,ERR, "Error enabling wake\n");
-}
-
-/* ------------------ PCI Error Recovery infrastructure  -------------- */
-/**
- * e100_io_error_detected - called when PCI error is detected.
- * @pdev: Pointer to PCI device
- * @state: The current pci conneection state
- */
-static pci_ers_result_t e100_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-
-	/* Similar to calling e100_down(), but avoids adpater I/O. */
-	netdev->stop(netdev);
-
-	/* Detach; put netif into state similar to hotplug unplug. */
-	netif_poll_enable(netdev);
-	netif_device_detach(netdev);
-
-	/* Request a slot reset. */
-	return PCI_ERS_RESULT_NEED_RESET;
-}
-
-/**
- * e100_io_slot_reset - called after the pci bus has been reset.
- * @pdev: Pointer to PCI device
- *
- * Restart the card from scratch.
- */
-static pci_ers_result_t e100_io_slot_reset(struct pci_dev *pdev)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-
-	if (pci_enable_device(pdev)) {
-		printk(KERN_ERR "e100: Cannot re-enable PCI device after reset.\n");
-		return PCI_ERS_RESULT_DISCONNECT;
-	}
-	pci_set_master(pdev);
-
-	/* Only one device per card can do a reset */
-	if (0 != PCI_FUNC(pdev->devfn))
-		return PCI_ERS_RESULT_RECOVERED;
-	e100_hw_reset(nic);
-	e100_phy_init(nic);
-
-	return PCI_ERS_RESULT_RECOVERED;
-}
-
-/**
- * e100_io_resume - resume normal operations
- * @pdev: Pointer to PCI device
- *
- * Resume normal operations after an error recovery
- * sequence has been completed.
- */
-static void e100_io_resume(struct pci_dev *pdev)
-{
-	struct net_device *netdev = pci_get_drvdata(pdev);
-	struct nic *nic = netdev_priv(netdev);
-
-	/* ack any pending wake events, disable PME */
-	pci_enable_wake(pdev, 0, 0);
-
-	netif_device_attach(netdev);
-	if (netif_running(netdev)) {
-		e100_open(netdev);
-		mod_timer(&nic->watchdog, jiffies);
-	}
-}
-
-static struct pci_error_handlers e100_err_handler = {
-	.error_detected = e100_io_error_detected,
-	.slot_reset = e100_io_slot_reset,
-	.resume = e100_io_resume,
-};
-
-static struct pci_driver e100_driver = {
-	.name =         DRV_NAME,
-	.id_table =     e100_id_table,
-	.probe =        e100_probe,
-	.remove =       __devexit_p(e100_remove),
-#ifdef CONFIG_PM
-	.suspend =      e100_suspend,
-	.resume =       e100_resume,
-#endif
-	.shutdown =     e100_shutdown,
-	.err_handler = &e100_err_handler,
-};
-
-static int __init e100_init_module(void)
-{
-	if(((1 << debug) - 1) & NETIF_MSG_DRV) {
-		printk(KERN_INFO PFX "%s, %s\n", DRV_DESCRIPTION, DRV_VERSION);
-		printk(KERN_INFO PFX "%s\n", DRV_COPYRIGHT);
-	}
-	return pci_module_init(&e100_driver);
-}
-
-static void __exit e100_cleanup_module(void)
-{
-	pci_unregister_driver(&e100_driver);
-}
-
-module_init(e100_init_module);
-module_exit(e100_cleanup_module);
--- a/devices/forcedeth-2.6.17-ethercat.c	Mon Jul 28 08:30:44 2008 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3511 +0,0 @@
-/*
- * forcedeth: Ethernet driver for NVIDIA nForce media access controllers.
- *
- * Note: This driver is a cleanroom reimplementation based on reverse
- *      engineered documentation written by Carl-Daniel Hailfinger
- *      and Andrew de Quincey. It's neither supported nor endorsed
- *      by NVIDIA Corp. Use at your own risk.
- *
- * NVIDIA, nForce and other NVIDIA marks are trademarks or registered
- * trademarks of NVIDIA Corporation in the United States and other
- * countries.
- *
- * Copyright (C) 2003,4,5 Manfred Spraul
- * Copyright (C) 2004 Andrew de Quincey (wol support)
- * Copyright (C) 2004 Carl-Daniel Hailfinger (invalid MAC handling, insane
- *		IRQ rate fixes, bigendian fixes, cleanups, verification)
- * Copyright (c) 2004 NVIDIA Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- * Changelog:
- * 	0.01: 05 Oct 2003: First release that compiles without warnings.
- * 	0.02: 05 Oct 2003: Fix bug for nv_drain_tx: do not try to free NULL skbs.
- * 			   Check all PCI BARs for the register window.
- * 			   udelay added to mii_rw.
- * 	0.03: 06 Oct 2003: Initialize dev->irq.
- * 	0.04: 07 Oct 2003: Initialize np->lock, reduce handled irqs, add printks.
- * 	0.05: 09 Oct 2003: printk removed again, irq status print tx_timeout.
- * 	0.06: 10 Oct 2003: MAC Address read updated, pff flag generation updated,
- * 			   irq mask updated
- * 	0.07: 14 Oct 2003: Further irq mask updates.
- * 	0.08: 20 Oct 2003: rx_desc.Length initialization added, nv_alloc_rx refill
- * 			   added into irq handler, NULL check for drain_ring.
- * 	0.09: 20 Oct 2003: Basic link speed irq implementation. Only handle the
- * 			   requested interrupt sources.
- * 	0.10: 20 Oct 2003: First cleanup for release.
- * 	0.11: 21 Oct 2003: hexdump for tx added, rx buffer sizes increased.
- * 			   MAC Address init fix, set_multicast cleanup.
- * 	0.12: 23 Oct 2003: Cleanups for release.
- * 	0.13: 25 Oct 2003: Limit for concurrent tx packets increased to 10.
- * 			   Set link speed correctly. start rx before starting
- * 			   tx (nv_start_rx sets the link speed).
- * 	0.14: 25 Oct 2003: Nic dependant irq mask.
- * 	0.15: 08 Nov 2003: fix smp deadlock with set_multicast_list during
- * 			   open.
- * 	0.16: 15 Nov 2003: include file cleanup for ppc64, rx buffer size
- * 			   increased to 1628 bytes.
- * 	0.17: 16 Nov 2003: undo rx buffer size increase. Substract 1 from
- * 			   the tx length.
- * 	0.18: 17 Nov 2003: fix oops due to late initialization of dev_stats
- * 	0.19: 29 Nov 2003: Handle RxNoBuf, detect & handle invalid mac
- * 			   addresses, really stop rx if already running
- * 			   in nv_start_rx, clean up a bit.
- * 	0.20: 07 Dec 2003: alloc fixes
- * 	0.21: 12 Jan 2004: additional alloc fix, nic polling fix.
- *	0.22: 19 Jan 2004: reprogram timer to a sane rate, avoid lockup
- *			   on close.
- *	0.23: 26 Jan 2004: various small cleanups
- *	0.24: 27 Feb 2004: make driver even less anonymous in backtraces
- *	0.25: 09 Mar 2004: wol support
- *	0.26: 03 Jun 2004: netdriver specific annotation, sparse-related fixes
- *	0.27: 19 Jun 2004: Gigabit support, new descriptor rings,
- *			   added CK804/MCP04 device IDs, code fixes
- *			   for registers, link status and other minor fixes.
- *	0.28: 21 Jun 2004: Big cleanup, making driver mostly endian safe
- *	0.29: 31 Aug 2004: Add backup timer for link change notification.
- *	0.30: 25 Sep 2004: rx checksum support for nf 250 Gb. Add rx reset
- *			   into nv_close, otherwise reenabling for wol can
- *			   cause DMA to kfree'd memory.
- *	0.31: 14 Nov 2004: ethtool support for getting/setting link
- *			   capabilities.
- *	0.32: 16 Apr 2005: RX_ERROR4 handling added.
- *	0.33: 16 May 2005: Support for MCP51 added.
- *	0.34: 18 Jun 2005: Add DEV_NEED_LINKTIMER to all nForce nics.
- *	0.35: 26 Jun 2005: Support for MCP55 added.
- *	0.36: 28 Jun 2005: Add jumbo frame support.
- *	0.37: 10 Jul 2005: Additional ethtool support, cleanup of pci id list
- *	0.38: 16 Jul 2005: tx irq rewrite: Use global flags instead of
- *			   per-packet flags.
- *	0.39: 18 Jul 2005: Add 64bit descriptor support.
- *	0.40: 19 Jul 2005: Add support for mac address change.
- *	0.41: 30 Jul 2005: Write back original MAC in nv_close instead
- *			   of nv_remove
- *	0.42: 06 Aug 2005: Fix lack of link speed initialization
- *			   in the second (and later) nv_open call
- *	0.43: 10 Aug 2005: Add support for tx checksum.
- *	0.44: 20 Aug 2005: Add support for scatter gather and segmentation.
- *	0.45: 18 Sep 2005: Remove nv_stop/start_rx from every link check
- *	0.46: 20 Oct 2005: Add irq optimization modes.
- *	0.47: 26 Oct 2005: Add phyaddr 0 in phy scan.
- *	0.48: 24 Dec 2005: Disable TSO, bugfix for pci_map_single
- *	0.49: 10 Dec 2005: Fix tso for large buffers.
- *	0.50: 20 Jan 2006: Add 8021pq tagging support.
- *	0.51: 20 Jan 2006: Add 64bit consistent memory allocation for rings.
- *	0.52: 20 Jan 2006: Add MSI/MSIX support.
- *	0.53: 19 Mar 2006: Fix init from low power mode and add hw reset.
- *	0.54: 21 Mar 2006: Fix spin locks for multi irqs and cleanup.
- *
- * Known bugs:
- * We suspect that on some hardware no TX done interrupts are generated.
- * This means recovery from netif_stop_queue only happens if the hw timer
- * interrupt fires (100 times/second, configurable with NVREG_POLL_DEFAULT)
- * and the timer is active in the IRQMask, or if a rx packet arrives by chance.
- * If your hardware reliably generates tx done interrupts, then you can remove
- * DEV_NEED_TIMERIRQ from the driver_data flags.
- * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few
- * superfluous timer interrupts from the nic.
- */
-#define FORCEDETH_VERSION		"0.54"
-#define DRV_NAME			"forcedeth"
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/delay.h>
-#include <linux/spinlock.h>
-#include <linux/ethtool.h>
-#include <linux/timer.h>
-#include <linux/skbuff.h>
-#include <linux/mii.h>
-#include <linux/random.h>
-#include <linux/init.h>
-#include <linux/if_vlan.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#include "../globals.h"
-#include "ecdev.h"
-
-#if 0
-#define dprintk			printk
-#else
-#define dprintk(x...)		do { } while (0)
-#endif
-
-
-/*
- * Hardware access:
- */
-
-#define DEV_NEED_TIMERIRQ	0x0001  /* set the timer irq flag in the irq mask */
-#define DEV_NEED_LINKTIMER	0x0002	/* poll link settings. Relies on the timer irq */
-#define DEV_HAS_LARGEDESC	0x0004	/* device supports jumbo frames and needs packet format 2 */
-#define DEV_HAS_HIGH_DMA        0x0008  /* device supports 64bit dma */
-#define DEV_HAS_CHECKSUM        0x0010  /* device supports tx and rx checksum offloads */
-#define DEV_HAS_VLAN            0x0020  /* device supports vlan tagging and striping */
-#define DEV_HAS_MSI             0x0040  /* device supports MSI */
-#define DEV_HAS_MSI_X           0x0080  /* device supports MSI-X */
-#define DEV_HAS_POWER_CNTRL     0x0100  /* device supports power savings */
-
-enum {
-	NvRegIrqStatus = 0x000,
-#define NVREG_IRQSTAT_MIIEVENT	0x040
-#define NVREG_IRQSTAT_MASK		0x1ff
-	NvRegIrqMask = 0x004,
-#define NVREG_IRQ_RX_ERROR		0x0001
-#define NVREG_IRQ_RX			0x0002
-#define NVREG_IRQ_RX_NOBUF		0x0004
-#define NVREG_IRQ_TX_ERR		0x0008
-#define NVREG_IRQ_TX_OK			0x0010
-#define NVREG_IRQ_TIMER			0x0020
-#define NVREG_IRQ_LINK			0x0040
-#define NVREG_IRQ_RX_FORCED		0x0080
-#define NVREG_IRQ_TX_FORCED		0x0100
-#define NVREG_IRQMASK_THROUGHPUT	0x00df
-#define NVREG_IRQMASK_CPU		0x0040
-#define NVREG_IRQ_TX_ALL		(NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
-#define NVREG_IRQ_RX_ALL		(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED)
-#define NVREG_IRQ_OTHER			(NVREG_IRQ_TIMER|NVREG_IRQ_LINK)
-
-#define NVREG_IRQ_UNKNOWN	(~(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_TX_ERR| \
-					NVREG_IRQ_TX_OK|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RX_FORCED| \
-					NVREG_IRQ_TX_FORCED))
-
-	NvRegUnknownSetupReg6 = 0x008,
-#define NVREG_UNKSETUP6_VAL		3
-
-/*
- * NVREG_POLL_DEFAULT is the interval length of the timer source on the nic
- * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms
- */
-	NvRegPollingInterval = 0x00c,
-#define NVREG_POLL_DEFAULT_THROUGHPUT	970
-#define NVREG_POLL_DEFAULT_CPU	13
-	NvRegMSIMap0 = 0x020,
-	NvRegMSIMap1 = 0x024,
-	NvRegMSIIrqMask = 0x030,
-#define NVREG_MSI_VECTOR_0_ENABLED 0x01
-	NvRegMisc1 = 0x080,
-#define NVREG_MISC1_HD		0x02
-#define NVREG_MISC1_FORCE	0x3b0f3c
-
-	NvRegMacReset = 0x3c,
-#define NVREG_MAC_RESET_ASSERT	0x0F3
-	NvRegTransmitterControl = 0x084,
-#define NVREG_XMITCTL_START	0x01
-	NvRegTransmitterStatus = 0x088,
-#define NVREG_XMITSTAT_BUSY	0x01
-
-	NvRegPacketFilterFlags = 0x8c,
-#define NVREG_PFF_ALWAYS	0x7F0008
-#define NVREG_PFF_PROMISC	0x80
-#define NVREG_PFF_MYADDR	0x20
-
-	NvRegOffloadConfig = 0x90,
-#define NVREG_OFFLOAD_HOMEPHY	0x601
-#define NVREG_OFFLOAD_NORMAL	RX_NIC_BUFSIZE
-	NvRegReceiverControl = 0x094,
-#define NVREG_RCVCTL_START	0x01
-	NvRegReceiverStatus = 0x98,
-#define NVREG_RCVSTAT_BUSY	0x01
-
-	NvRegRandomSeed = 0x9c,
-#define NVREG_RNDSEED_MASK	0x00ff
-#define NVREG_RNDSEED_FORCE	0x7f00
-#define NVREG_RNDSEED_FORCE2	0x2d00
-#define NVREG_RNDSEED_FORCE3	0x7400
-
-	NvRegUnknownSetupReg1 = 0xA0,
-#define NVREG_UNKSETUP1_VAL	0x16070f
-	NvRegUnknownSetupReg2 = 0xA4,
-#define NVREG_UNKSETUP2_VAL	0x16
-	NvRegMacAddrA = 0xA8,
-	NvRegMacAddrB = 0xAC,
-	NvRegMulticastAddrA = 0xB0,
-#define NVREG_MCASTADDRA_FORCE	0x01
-	NvRegMulticastAddrB = 0xB4,
-	NvRegMulticastMaskA = 0xB8,
-	NvRegMulticastMaskB = 0xBC,
-
-	NvRegPhyInterface = 0xC0,
-#define PHY_RGMII		0x10000000
-
-	NvRegTxRingPhysAddr = 0x100,
-	NvRegRxRingPhysAddr = 0x104,
-	NvRegRingSizes = 0x108,
-#define NVREG_RINGSZ_TXSHIFT 0
-#define NVREG_RINGSZ_RXSHIFT 16
-	NvRegUnknownTransmitterReg = 0x10c,
-	NvRegLinkSpeed = 0x110,
-#define NVREG_LINKSPEED_FORCE 0x10000
-#define NVREG_LINKSPEED_10	1000
-#define NVREG_LINKSPEED_100	100
-#define NVREG_LINKSPEED_1000	50
-#define NVREG_LINKSPEED_MASK	(0xFFF)
-	NvRegUnknownSetupReg5 = 0x130,
-#define NVREG_UNKSETUP5_BIT31	(1<<31)
-	NvRegUnknownSetupReg3 = 0x13c,
-#define NVREG_UNKSETUP3_VAL1	0x200010
-	NvRegTxRxControl = 0x144,
-#define NVREG_TXRXCTL_KICK	0x0001
-#define NVREG_TXRXCTL_BIT1	0x0002
-#define NVREG_TXRXCTL_BIT2	0x0004
-#define NVREG_TXRXCTL_IDLE	0x0008
-#define NVREG_TXRXCTL_RESET	0x0010
-#define NVREG_TXRXCTL_RXCHECK	0x0400
-#define NVREG_TXRXCTL_DESC_1	0
-#define NVREG_TXRXCTL_DESC_2	0x02100
-#define NVREG_TXRXCTL_DESC_3	0x02200
-#define NVREG_TXRXCTL_VLANSTRIP 0x00040
-#define NVREG_TXRXCTL_VLANINS	0x00080
-	NvRegTxRingPhysAddrHigh = 0x148,
-	NvRegRxRingPhysAddrHigh = 0x14C,
-	NvRegMIIStatus = 0x180,
-#define NVREG_MIISTAT_ERROR		0x0001
-#define NVREG_MIISTAT_LINKCHANGE	0x0008
-#define NVREG_MIISTAT_MASK		0x000f
-#define NVREG_MIISTAT_MASK2		0x000f
-	NvRegUnknownSetupReg4 = 0x184,
-#define NVREG_UNKSETUP4_VAL	8
-
-	NvRegAdapterControl = 0x188,
-#define NVREG_ADAPTCTL_START	0x02
-#define NVREG_ADAPTCTL_LINKUP	0x04
-#define NVREG_ADAPTCTL_PHYVALID	0x40000
-#define NVREG_ADAPTCTL_RUNNING	0x100000
-#define NVREG_ADAPTCTL_PHYSHIFT	24
-	NvRegMIISpeed = 0x18c,
-#define NVREG_MIISPEED_BIT8	(1<<8)
-#define NVREG_MIIDELAY	5
-	NvRegMIIControl = 0x190,
-#define NVREG_MIICTL_INUSE	0x08000
-#define NVREG_MIICTL_WRITE	0x00400
-#define NVREG_MIICTL_ADDRSHIFT	5
-	NvRegMIIData = 0x194,
-	NvRegWakeUpFlags = 0x200,
-#define NVREG_WAKEUPFLAGS_VAL		0x7770
-#define NVREG_WAKEUPFLAGS_BUSYSHIFT	24
-#define NVREG_WAKEUPFLAGS_ENABLESHIFT	16
-#define NVREG_WAKEUPFLAGS_D3SHIFT	12
-#define NVREG_WAKEUPFLAGS_D2SHIFT	8
-#define NVREG_WAKEUPFLAGS_D1SHIFT	4
-#define NVREG_WAKEUPFLAGS_D0SHIFT	0
-#define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT		0x01
-#define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT	0x02
-#define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE	0x04
-#define NVREG_WAKEUPFLAGS_ENABLE	0x1111
-
-	NvRegPatternCRC = 0x204,
-	NvRegPatternMask = 0x208,
-	NvRegPowerCap = 0x268,
-#define NVREG_POWERCAP_D3SUPP	(1<<30)
-#define NVREG_POWERCAP_D2SUPP	(1<<26)
-#define NVREG_POWERCAP_D1SUPP	(1<<25)
-	NvRegPowerState = 0x26c,
-#define NVREG_POWERSTATE_POWEREDUP	0x8000
-#define NVREG_POWERSTATE_VALID		0x0100
-#define NVREG_POWERSTATE_MASK		0x0003
-#define NVREG_POWERSTATE_D0		0x0000
-#define NVREG_POWERSTATE_D1		0x0001
-#define NVREG_POWERSTATE_D2		0x0002
-#define NVREG_POWERSTATE_D3		0x0003
-	NvRegVlanControl = 0x300,
-#define NVREG_VLANCONTROL_ENABLE	0x2000
-	NvRegMSIXMap0 = 0x3e0,
-	NvRegMSIXMap1 = 0x3e4,
-	NvRegMSIXIrqStatus = 0x3f0,
-
-	NvRegPowerState2 = 0x600,
-#define NVREG_POWERSTATE2_POWERUP_MASK		0x0F11
-#define NVREG_POWERSTATE2_POWERUP_REV_A3	0x0001
-};
-
-/* Big endian: should work, but is untested */
-struct ring_desc {
-	u32 PacketBuffer;
-	u32 FlagLen;
-};
-
-struct ring_desc_ex {
-	u32 PacketBufferHigh;
-	u32 PacketBufferLow;
-	u32 TxVlan;
-	u32 FlagLen;
-};
-
-typedef union _ring_type {
-	struct ring_desc* orig;
-	struct ring_desc_ex* ex;
-} ring_type;
-
-#define FLAG_MASK_V1 0xffff0000
-#define FLAG_MASK_V2 0xffffc000
-#define LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1)
-#define LEN_MASK_V2 (0xffffffff ^ FLAG_MASK_V2)
-
-#define NV_TX_LASTPACKET	(1<<16)
-#define NV_TX_RETRYERROR	(1<<19)
-#define NV_TX_FORCED_INTERRUPT	(1<<24)
-#define NV_TX_DEFERRED		(1<<26)
-#define NV_TX_CARRIERLOST	(1<<27)
-#define NV_TX_LATECOLLISION	(1<<28)
-#define NV_TX_UNDERFLOW		(1<<29)
-#define NV_TX_ERROR		(1<<30)
-#define NV_TX_VALID		(1<<31)
-
-#define NV_TX2_LASTPACKET	(1<<29)
-#define NV_TX2_RETRYERROR	(1<<18)
-#define NV_TX2_FORCED_INTERRUPT	(1<<30)
-#define NV_TX2_DEFERRED		(1<<25)
-#define NV_TX2_CARRIERLOST	(1<<26)
-#define NV_TX2_LATECOLLISION	(1<<27)
-#define NV_TX2_UNDERFLOW	(1<<28)
-/* error and valid are the same for both */
-#define NV_TX2_ERROR		(1<<30)
-#define NV_TX2_VALID		(1<<31)
-#define NV_TX2_TSO		(1<<28)
-#define NV_TX2_TSO_SHIFT	14
-#define NV_TX2_TSO_MAX_SHIFT	14
-#define NV_TX2_TSO_MAX_SIZE	(1<<NV_TX2_TSO_MAX_SHIFT)
-#define NV_TX2_CHECKSUM_L3	(1<<27)
-#define NV_TX2_CHECKSUM_L4	(1<<26)
-
-#define NV_TX3_VLAN_TAG_PRESENT (1<<18)
-
-#define NV_RX_DESCRIPTORVALID	(1<<16)
-#define NV_RX_MISSEDFRAME	(1<<17)
-#define NV_RX_SUBSTRACT1	(1<<18)
-#define NV_RX_ERROR1		(1<<23)
-#define NV_RX_ERROR2		(1<<24)
-#define NV_RX_ERROR3		(1<<25)
-#define NV_RX_ERROR4		(1<<26)
-#define NV_RX_CRCERR		(1<<27)
-#define NV_RX_OVERFLOW		(1<<28)
-#define NV_RX_FRAMINGERR	(1<<29)
-#define NV_RX_ERROR		(1<<30)
-#define NV_RX_AVAIL		(1<<31)
-
-#define NV_RX2_CHECKSUMMASK	(0x1C000000)
-#define NV_RX2_CHECKSUMOK1	(0x10000000)
-#define NV_RX2_CHECKSUMOK2	(0x14000000)
-#define NV_RX2_CHECKSUMOK3	(0x18000000)
-#define NV_RX2_DESCRIPTORVALID	(1<<29)
-#define NV_RX2_SUBSTRACT1	(1<<25)
-#define NV_RX2_ERROR1		(1<<18)
-#define NV_RX2_ERROR2		(1<<19)
-#define NV_RX2_ERROR3		(1<<20)
-#define NV_RX2_ERROR4		(1<<21)
-#define NV_RX2_CRCERR		(1<<22)
-#define NV_RX2_OVERFLOW		(1<<23)
-#define NV_RX2_FRAMINGERR	(1<<24)
-/* error and avail are the same for both */
-#define NV_RX2_ERROR		(1<<30)
-#define NV_RX2_AVAIL		(1<<31)
-
-#define NV_RX3_VLAN_TAG_PRESENT (1<<16)
-#define NV_RX3_VLAN_TAG_MASK	(0x0000FFFF)
-
-/* Miscelaneous hardware related defines: */
-#define NV_PCI_REGSZ_VER1      	0x270
-#define NV_PCI_REGSZ_VER2      	0x604
-
-/* various timeout delays: all in usec */
-#define NV_TXRX_RESET_DELAY	4
-#define NV_TXSTOP_DELAY1	10
-#define NV_TXSTOP_DELAY1MAX	500000
-#define NV_TXSTOP_DELAY2	100
-#define NV_RXSTOP_DELAY1	10
-#define NV_RXSTOP_DELAY1MAX	500000
-#define NV_RXSTOP_DELAY2	100
-#define NV_SETUP5_DELAY		5
-#define NV_SETUP5_DELAYMAX	50000
-#define NV_POWERUP_DELAY	5
-#define NV_POWERUP_DELAYMAX	5000
-#define NV_MIIBUSY_DELAY	50
-#define NV_MIIPHY_DELAY	10
-#define NV_MIIPHY_DELAYMAX	10000
-#define NV_MAC_RESET_DELAY	64
-
-#define NV_WAKEUPPATTERNS	5
-#define NV_WAKEUPMASKENTRIES	4
-
-/* General driver defaults */
-#define NV_WATCHDOG_TIMEO	(5*HZ)
-
-#define RX_RING		128
-#define TX_RING		256
-/* 
- * If your nic mysteriously hangs then try to reduce the limits
- * to 1/0: It might be required to set NV_TX_LASTPACKET in the
- * last valid ring entry. But this would be impossible to
- * implement - probably a disassembly error.
- */
-#define TX_LIMIT_STOP	255
-#define TX_LIMIT_START	254
-
-/* rx/tx mac addr + type + vlan + align + slack*/
-#define NV_RX_HEADERS		(64)
-/* even more slack. */
-#define NV_RX_ALLOC_PAD		(64)
-
-/* maximum mtu size */
-#define NV_PKTLIMIT_1	ETH_DATA_LEN	/* hard limit not known */
-#define NV_PKTLIMIT_2	9100	/* Actual limit according to NVidia: 9202 */
-
-#define OOM_REFILL	(1+HZ/20)
-#define POLL_WAIT	(1+HZ/100)
-#define LINK_TIMEOUT	(3*HZ)
-
-/* 
- * desc_ver values:
- * The nic supports three different descriptor types:
- * - DESC_VER_1: Original
- * - DESC_VER_2: support for jumbo frames.
- * - DESC_VER_3: 64-bit format.
- */
-#define DESC_VER_1	1
-#define DESC_VER_2	2
-#define DESC_VER_3	3
-
-/* PHY defines */
-#define PHY_OUI_MARVELL	0x5043
-#define PHY_OUI_CICADA	0x03f1
-#define PHYID1_OUI_MASK	0x03ff
-#define PHYID1_OUI_SHFT	6
-#define PHYID2_OUI_MASK	0xfc00
-#define PHYID2_OUI_SHFT	10
-#define PHY_INIT1	0x0f000
-#define PHY_INIT2	0x0e00
-#define PHY_INIT3	0x01000
-#define PHY_INIT4	0x0200
-#define PHY_INIT5	0x0004
-#define PHY_INIT6	0x02000
-#define PHY_GIGABIT	0x0100
-
-#define PHY_TIMEOUT	0x1
-#define PHY_ERROR	0x2
-
-#define PHY_100	0x1
-#define PHY_1000	0x2
-#define PHY_HALF	0x100
-
-/* FIXME: MII defines that should be added to <linux/mii.h> */
-#define MII_1000BT_CR	0x09
-#define MII_1000BT_SR	0x0a
-#define ADVERTISE_1000FULL	0x0200
-#define ADVERTISE_1000HALF	0x0100
-#define LPA_1000FULL	0x0800
-#define LPA_1000HALF	0x0400
-
-/* MSI/MSI-X defines */
-#define NV_MSI_X_MAX_VECTORS  8
-#define NV_MSI_X_VECTORS_MASK 0x000f
-#define NV_MSI_CAPABLE        0x0010
-#define NV_MSI_X_CAPABLE      0x0020
-#define NV_MSI_ENABLED        0x0040
-#define NV_MSI_X_ENABLED      0x0080
-
-#define NV_MSI_X_VECTOR_ALL   0x0
-#define NV_MSI_X_VECTOR_RX    0x0
-#define NV_MSI_X_VECTOR_TX    0x1
-#define NV_MSI_X_VECTOR_OTHER 0x2
-
-/*
- * SMP locking:
- * All hardware access under dev->priv->lock, except the performance
- * critical parts:
- * - rx is (pseudo-) lockless: it relies on the single-threading provided
- *	by the arch code for interrupts.
- * - tx setup is lockless: it relies on dev->xmit_lock. Actual submission
- *	needs dev->priv->lock :-(
- * - set_multicast_list: preparation lockless, relies on dev->xmit_lock.
- */
-
-/* in dev: base, irq */
-struct fe_priv {
-	spinlock_t lock;
-
-	/* General data:
-	 * Locking: spin_lock(&np->lock); */
-	struct net_device_stats stats;
-	int in_shutdown;
-	u32 linkspeed;
-	int duplex;
-	int autoneg;
-	int fixed_mode;
-	int phyaddr;
-	int wolenabled;
-	unsigned int phy_oui;
-	u16 gigabit;
-
-	/* General data: RO fields */
-	dma_addr_t ring_addr;
-	struct pci_dev *pci_dev;
-	u32 orig_mac[2];
-	u32 irqmask;
-	u32 desc_ver;
-	u32 txrxctl_bits;
-	u32 vlanctl_bits;
-	u32 driver_data;
-	u32 register_size;
-
-	void __iomem *base;
-
-	/* rx specific fields.
-	 * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
-	 */
-	ring_type rx_ring;
-	unsigned int cur_rx, refill_rx;
-	struct sk_buff *rx_skbuff[RX_RING];
-	dma_addr_t rx_dma[RX_RING];
-	unsigned int rx_buf_sz;
-	unsigned int pkt_limit;
-	struct timer_list oom_kick;
-	struct timer_list nic_poll;
-	u32 nic_poll_irq;
-
-	/* media detection workaround.
-	 * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
-	 */
-	int need_linktimer;
-	unsigned long link_timeout;
-	/*
-	 * tx specific fields.
-	 */
-	ring_type tx_ring;
-	unsigned int next_tx, nic_tx;
-	struct sk_buff *tx_skbuff[TX_RING];
-	dma_addr_t tx_dma[TX_RING];
-	unsigned int tx_dma_len[TX_RING];
-	u32 tx_flags;
-
-	/* vlan fields */
-	struct vlan_group *vlangrp;
-
-	/* msi/msi-x fields */
-	u32 msi_flags;
-	struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS];
-
-    ec_device_t *ecdev;
-};
-
-/*
- * Maximum number of loops until we assume that a bit in the irq mask
- * is stuck. Overridable with module param.
- */
-static int max_interrupt_work = 5;
-
-/*
- * Optimization can be either throuput mode or cpu mode
- * 
- * Throughput Mode: Every tx and rx packet will generate an interrupt.
- * CPU Mode: Interrupts are controlled by a timer.
- */
-#define NV_OPTIMIZATION_MODE_THROUGHPUT 0
-#define NV_OPTIMIZATION_MODE_CPU        1
-static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT;
-
-/*
- * Poll interval for timer irq
- *
- * This interval determines how frequent an interrupt is generated.
- * The is value is determined by [(time_in_micro_secs * 100) / (2^10)]
- * Min = 0, and Max = 65535
- */
-static int poll_interval = -1;
-
-/*
- * Disable MSI interrupts
- */
-static int disable_msi = 0;
-
-/*
- * Disable MSIX interrupts
- */
-static int disable_msix = 0;
-
-static int board_idx = -1;
-
-static inline struct fe_priv *get_nvpriv(struct net_device *dev)
-{
-	return netdev_priv(dev);
-}
-
-static inline u8 __iomem *get_hwbase(struct net_device *dev)
-{
-	return ((struct fe_priv *)netdev_priv(dev))->base;
-}
-
-static inline void pci_push(u8 __iomem *base)
-{
-	/* force out pending posted writes */
-	readl(base);
-}
-
-static inline u32 nv_descr_getlength(struct ring_desc *prd, u32 v)
-{
-	return le32_to_cpu(prd->FlagLen)
-		& ((v == DESC_VER_1) ? LEN_MASK_V1 : LEN_MASK_V2);
-}
-
-static inline u32 nv_descr_getlength_ex(struct ring_desc_ex *prd, u32 v)
-{
-	return le32_to_cpu(prd->FlagLen) & LEN_MASK_V2;
-}
-
-static int reg_delay(struct net_device *dev, int offset, u32 mask, u32 target,
-				int delay, int delaymax, const char *msg)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	pci_push(base);
-	do {
-		udelay(delay);
-		delaymax -= delay;
-		if (delaymax < 0) {
-			if (msg)
-				printk(msg);
-			return 1;
-		}
-	} while ((readl(base + offset) & mask) != target);
-	return 0;
-}
-
-#define NV_SETUP_RX_RING 0x01
-#define NV_SETUP_TX_RING 0x02
-
-static void setup_hw_rings(struct net_device *dev, int rxtx_flags)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		if (rxtx_flags & NV_SETUP_RX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr);
-		}
-		if (rxtx_flags & NV_SETUP_TX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
-		}
-	} else {
-		if (rxtx_flags & NV_SETUP_RX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr);
-			writel((u32) (cpu_to_le64(np->ring_addr) >> 32), base + NvRegRxRingPhysAddrHigh);
-		}
-		if (rxtx_flags & NV_SETUP_TX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
-			writel((u32) (cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)) >> 32), base + NvRegTxRingPhysAddrHigh);
-		}
-	}
-}
-
-static int using_multi_irqs(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
-	    ((np->msi_flags & NV_MSI_X_ENABLED) &&
-	     ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1)))
-		return 0;
-	else
-		return 1;
-}
-
-static void nv_enable_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq(dev->irq);
-	} else {
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-	}
-}
-
-static void nv_disable_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq(dev->irq);
-	} else {
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-	}
-}
-
-/* In MSIX mode, a write to irqmask behaves as XOR */
-static void nv_enable_hw_interrupts(struct net_device *dev, u32 mask)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	writel(mask, base + NvRegIrqMask);
-}
-
-static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	if (np->msi_flags & NV_MSI_X_ENABLED) {
-		writel(mask, base + NvRegIrqMask);
-	} else {
-		if (np->msi_flags & NV_MSI_ENABLED)
-			writel(0, base + NvRegMSIIrqMask);
-		writel(0, base + NvRegIrqMask);
-	}
-}
-
-#define MII_READ	(-1)
-/* mii_rw: read/write a register on the PHY.
- *
- * Caller must guarantee serialization
- */
-static int mii_rw(struct net_device *dev, int addr, int miireg, int value)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 reg;
-	int retval;
-
-	writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-
-	reg = readl(base + NvRegMIIControl);
-	if (reg & NVREG_MIICTL_INUSE) {
-		writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl);
-		udelay(NV_MIIBUSY_DELAY);
-	}
-
-	reg = (addr << NVREG_MIICTL_ADDRSHIFT) | miireg;
-	if (value != MII_READ) {
-		writel(value, base + NvRegMIIData);
-		reg |= NVREG_MIICTL_WRITE;
-	}
-	writel(reg, base + NvRegMIIControl);
-
-	if (reg_delay(dev, NvRegMIIControl, NVREG_MIICTL_INUSE, 0,
-			NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX, NULL)) {
-		dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d timed out.\n",
-				dev->name, miireg, addr);
-		retval = -1;
-	} else if (value != MII_READ) {
-		/* it was a write operation - fewer failures are detectable */
-		dprintk(KERN_DEBUG "%s: mii_rw wrote 0x%x to reg %d at PHY %d\n",
-				dev->name, value, miireg, addr);
-		retval = 0;
-	} else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) {
-		dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d failed.\n",
-				dev->name, miireg, addr);
-		retval = -1;
-	} else {
-		retval = readl(base + NvRegMIIData);
-		dprintk(KERN_DEBUG "%s: mii_rw read from reg %d at PHY %d: 0x%x.\n",
-				dev->name, miireg, addr, retval);
-	}
-
-	return retval;
-}
-
-static int phy_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 miicontrol;
-	unsigned int tries = 0;
-
-	miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-	miicontrol |= BMCR_RESET;
-	if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol)) {
-		return -1;
-	}
-
-	/* wait for 500ms */
-	msleep(500);
-
-	/* must wait till reset is deasserted */
-	while (miicontrol & BMCR_RESET) {
-		msleep(10);
-		miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		/* FIXME: 100 tries seem excessive */
-		if (tries++ > 100)
-			return -1;
-	}
-	return 0;
-}
-
-static int phy_init(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 phyinterface, phy_reserved, mii_status, mii_control, mii_control_1000,reg;
-
-	/* set advertise register */
-	reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-	reg |= (ADVERTISE_10HALF|ADVERTISE_10FULL|ADVERTISE_100HALF|ADVERTISE_100FULL|0x800|0x400);
-	if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) {
-		printk(KERN_INFO "%s: phy write to advertise failed.\n", pci_name(np->pci_dev));
-		return PHY_ERROR;
-	}
-
-	/* get phy interface type */
-	phyinterface = readl(base + NvRegPhyInterface);
-
-	/* see if gigabit phy */
-	mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-	if (mii_status & PHY_GIGABIT) {
-		np->gigabit = PHY_GIGABIT;
-		mii_control_1000 = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ);
-		mii_control_1000 &= ~ADVERTISE_1000HALF;
-		if (phyinterface & PHY_RGMII)
-			mii_control_1000 |= ADVERTISE_1000FULL;
-		else
-			mii_control_1000 &= ~ADVERTISE_1000FULL;
-
-		if (mii_rw(dev, np->phyaddr, MII_1000BT_CR, mii_control_1000)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-	else
-		np->gigabit = 0;
-
-	/* reset the phy */
-	if (phy_reset(dev)) {
-		printk(KERN_INFO "%s: phy reset failed\n", pci_name(np->pci_dev));
-		return PHY_ERROR;
-	}
-
-	/* phy vendor specific configuration */
-	if ((np->phy_oui == PHY_OUI_CICADA) && (phyinterface & PHY_RGMII) ) {
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_RESV1, MII_READ);
-		phy_reserved &= ~(PHY_INIT1 | PHY_INIT2);
-		phy_reserved |= (PHY_INIT3 | PHY_INIT4);
-		if (mii_rw(dev, np->phyaddr, MII_RESV1, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ);
-		phy_reserved |= PHY_INIT5;
-		if (mii_rw(dev, np->phyaddr, MII_NCONFIG, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-	if (np->phy_oui == PHY_OUI_CICADA) {
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_SREVISION, MII_READ);
-		phy_reserved |= PHY_INIT6;
-		if (mii_rw(dev, np->phyaddr, MII_SREVISION, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-
-	/* restart auto negotiation */
-	mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-	mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
-	if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {
-		return PHY_ERROR;
-	}
-
-	return 0;
-}
-
-static void nv_start_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_start_rx\n", dev->name);
-	/* Already running? Stop it. */
-	if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) {
-		writel(0, base + NvRegReceiverControl);
-		pci_push(base);
-	}
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	pci_push(base);
-	writel(NVREG_RCVCTL_START, base + NvRegReceiverControl);
-	dprintk(KERN_DEBUG "%s: nv_start_rx to duplex %d, speed 0x%08x.\n",
-				dev->name, np->duplex, np->linkspeed);
-	pci_push(base);
-}
-
-static void nv_stop_rx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_stop_rx\n", dev->name);
-	writel(0, base + NvRegReceiverControl);
-	reg_delay(dev, NvRegReceiverStatus, NVREG_RCVSTAT_BUSY, 0,
-			NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX,
-			KERN_INFO "nv_stop_rx: ReceiverStatus remained busy");
-
-	udelay(NV_RXSTOP_DELAY2);
-	writel(0, base + NvRegLinkSpeed);
-}
-
-static void nv_start_tx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_start_tx\n", dev->name);
-	writel(NVREG_XMITCTL_START, base + NvRegTransmitterControl);
-	pci_push(base);
-}
-
-static void nv_stop_tx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_stop_tx\n", dev->name);
-	writel(0, base + NvRegTransmitterControl);
-	reg_delay(dev, NvRegTransmitterStatus, NVREG_XMITSTAT_BUSY, 0,
-			NV_TXSTOP_DELAY1, NV_TXSTOP_DELAY1MAX,
-			KERN_INFO "nv_stop_tx: TransmitterStatus remained busy");
-
-	udelay(NV_TXSTOP_DELAY2);
-	writel(0, base + NvRegUnknownTransmitterReg);
-}
-
-static void nv_txrx_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_txrx_reset\n", dev->name);
-	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-	udelay(NV_TXRX_RESET_DELAY);
-	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-}
-
-static void nv_mac_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name);
-	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-	writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset);
-	pci_push(base);
-	udelay(NV_MAC_RESET_DELAY);
-	writel(0, base + NvRegMacReset);
-	pci_push(base);
-	udelay(NV_MAC_RESET_DELAY);
-	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-}
-
-/*
- * nv_get_stats: dev->get_stats function
- * Get latest stats value from the nic.
- * Called with read_lock(&dev_base_lock) held for read -
- * only synchronized against unregister_netdevice.
- */
-static struct net_device_stats *nv_get_stats(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	/* It seems that the nic always generates interrupts and doesn't
-	 * accumulate errors internally. Thus the current values in np->stats
-	 * are already up to date.
-	 */
-	return &np->stats;
-}
-
-/*
- * nv_alloc_rx: fill rx ring entries.
- * Return 1 if the allocations for the skbs failed and the
- * rx engine is without Available descriptors
- */
-static int nv_alloc_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	unsigned int refill_rx = np->refill_rx;
-	int nr;
-
-	while (np->cur_rx != refill_rx) {
-		struct sk_buff *skb;
-
-		nr = refill_rx % RX_RING;
-		if (np->rx_skbuff[nr] == NULL) {
-
-			skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD);
-			if (!skb)
-				break;
-
-			skb->dev = dev;
-			np->rx_skbuff[nr] = skb;
-		} else {
-			skb = np->rx_skbuff[nr];
-		}
-		np->rx_dma[nr] = pci_map_single(np->pci_dev, skb->data,
-					skb->end-skb->data, PCI_DMA_FROMDEVICE);
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			np->rx_ring.orig[nr].PacketBuffer = cpu_to_le32(np->rx_dma[nr]);
-			wmb();
-			np->rx_ring.orig[nr].FlagLen = cpu_to_le32(np->rx_buf_sz | NV_RX_AVAIL);
-		} else {
-			np->rx_ring.ex[nr].PacketBufferHigh = cpu_to_le64(np->rx_dma[nr]) >> 32;
-			np->rx_ring.ex[nr].PacketBufferLow = cpu_to_le64(np->rx_dma[nr]) & 0x0FFFFFFFF;
-			wmb();
-			np->rx_ring.ex[nr].FlagLen = cpu_to_le32(np->rx_buf_sz | NV_RX2_AVAIL);
-		}
-		dprintk(KERN_DEBUG "%s: nv_alloc_rx: Packet %d marked as Available\n",
-					dev->name, refill_rx);
-		refill_rx++;
-	}
-	np->refill_rx = refill_rx;
-	if (np->cur_rx - refill_rx == RX_RING)
-		return 1;
-	return 0;
-}
-
-static void nv_do_rx_refill(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq(dev->irq);
-	} else {
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-	}
-	if (nv_alloc_rx(dev)) {
-		spin_lock_irq(&np->lock);
-		if (!np->in_shutdown)
-			mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		spin_unlock_irq(&np->lock);
-	}
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq(dev->irq);
-	} else {
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-	}
-}
-
-static void nv_init_rx(struct net_device *dev) 
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-
-	np->cur_rx = RX_RING;
-	np->refill_rx = 0;
-	for (i = 0; i < RX_RING; i++)
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->rx_ring.orig[i].FlagLen = 0;
-	        else
-			np->rx_ring.ex[i].FlagLen = 0;
-}
-
-static void nv_init_tx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-
-	np->next_tx = np->nic_tx = 0;
-	for (i = 0; i < TX_RING; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->tx_ring.orig[i].FlagLen = 0;
-	        else
-			np->tx_ring.ex[i].FlagLen = 0;
-		np->tx_skbuff[i] = NULL;
-		np->tx_dma[i] = 0;
-	}
-}
-
-static int nv_init_ring(struct net_device *dev)
-{
-	nv_init_tx(dev);
-	nv_init_rx(dev);
-	return nv_alloc_rx(dev);
-}
-
-static int nv_release_txskb(struct net_device *dev, unsigned int skbnr)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	dprintk(KERN_INFO "%s: nv_release_txskb for skbnr %d\n",
-		dev->name, skbnr);
-
-	if (np->tx_dma[skbnr]) {
-		pci_unmap_page(np->pci_dev, np->tx_dma[skbnr],
-			       np->tx_dma_len[skbnr],
-			       PCI_DMA_TODEVICE);
-		np->tx_dma[skbnr] = 0;
-	}
-
-	if (np->tx_skbuff[skbnr]) {
-		if (!np->ecdev) dev_kfree_skb_any(np->tx_skbuff[skbnr]);
-		np->tx_skbuff[skbnr] = NULL;
-		return 1;
-	} else {
-		return 0;
-	}
-}
-
-static void nv_drain_tx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	unsigned int i;
-	
-	for (i = 0; i < TX_RING; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->tx_ring.orig[i].FlagLen = 0;
-		else
-			np->tx_ring.ex[i].FlagLen = 0;
-		if (nv_release_txskb(dev, i))
-			np->stats.tx_dropped++;
-	}
-}
-
-static void nv_drain_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-	for (i = 0; i < RX_RING; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->rx_ring.orig[i].FlagLen = 0;
-		else
-			np->rx_ring.ex[i].FlagLen = 0;
-		wmb();
-		if (np->rx_skbuff[i]) {
-			pci_unmap_single(np->pci_dev, np->rx_dma[i],
-						np->rx_skbuff[i]->end-np->rx_skbuff[i]->data,
-						PCI_DMA_FROMDEVICE);
-			if (!np->ecdev) dev_kfree_skb(np->rx_skbuff[i]);
-			np->rx_skbuff[i] = NULL;
-		}
-	}
-}
-
-static void drain_ring(struct net_device *dev)
-{
-	nv_drain_tx(dev);
-	nv_drain_rx(dev);
-}
-
-/*
- * nv_start_xmit: dev->hard_start_xmit function
- * Called with dev->xmit_lock held.
- */
-static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 tx_flags = 0;
-	u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET);
-	unsigned int fragments = skb_shinfo(skb)->nr_frags;
-	unsigned int nr = (np->next_tx - 1) % TX_RING;
-	unsigned int start_nr = np->next_tx % TX_RING;
-	unsigned int i;
-	u32 offset = 0;
-	u32 bcnt;
-	u32 size = skb->len-skb->data_len;
-	u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
-	u32 tx_flags_vlan = 0;
-
-	/* add fragments to entries count */
-	for (i = 0; i < fragments; i++) {
-		entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) +
-			   ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
-	}
-
-	if (!np->ecdev) {
-		spin_lock_irq(&np->lock);
-
-		if ((np->next_tx - np->nic_tx + entries - 1) > TX_LIMIT_STOP) {
-			spin_unlock_irq(&np->lock);
-			netif_stop_queue(dev);
-			return NETDEV_TX_BUSY;
-        }
-	}
-
-	/* setup the header buffer */
-	do {
-		bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
-		nr = (nr + 1) % TX_RING;
-
-		np->tx_dma[nr] = pci_map_single(np->pci_dev, skb->data + offset, bcnt,
-						PCI_DMA_TODEVICE);
-		np->tx_dma_len[nr] = bcnt;
-
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			np->tx_ring.orig[nr].PacketBuffer = cpu_to_le32(np->tx_dma[nr]);
-			np->tx_ring.orig[nr].FlagLen = cpu_to_le32((bcnt-1) | tx_flags);
-		} else {
-			np->tx_ring.ex[nr].PacketBufferHigh = cpu_to_le64(np->tx_dma[nr]) >> 32;
-			np->tx_ring.ex[nr].PacketBufferLow = cpu_to_le64(np->tx_dma[nr]) & 0x0FFFFFFFF;
-			np->tx_ring.ex[nr].FlagLen = cpu_to_le32((bcnt-1) | tx_flags);
-		}
-		tx_flags = np->tx_flags;
-		offset += bcnt;
-		size -= bcnt;
-	} while(size);
-
-	/* setup the fragments */
-	for (i = 0; i < fragments; i++) {
-		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
-		u32 size = frag->size;
-		offset = 0;
-
-		do {
-			bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
-			nr = (nr + 1) % TX_RING;
-
-			np->tx_dma[nr] = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt,
-						      PCI_DMA_TODEVICE);
-			np->tx_dma_len[nr] = bcnt;
-
-			if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-				np->tx_ring.orig[nr].PacketBuffer = cpu_to_le32(np->tx_dma[nr]);
-				np->tx_ring.orig[nr].FlagLen = cpu_to_le32((bcnt-1) | tx_flags);
-			} else {
-				np->tx_ring.ex[nr].PacketBufferHigh = cpu_to_le64(np->tx_dma[nr]) >> 32;
-				np->tx_ring.ex[nr].PacketBufferLow = cpu_to_le64(np->tx_dma[nr]) & 0x0FFFFFFFF;
-				np->tx_ring.ex[nr].FlagLen = cpu_to_le32((bcnt-1) | tx_flags);
-			}
-			offset += bcnt;
-			size -= bcnt;
-		} while (size);
-	}
-
-	/* set last fragment flag  */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->tx_ring.orig[nr].FlagLen |= cpu_to_le32(tx_flags_extra);
-	} else {
-		np->tx_ring.ex[nr].FlagLen |= cpu_to_le32(tx_flags_extra);
-	}
-
-	np->tx_skbuff[nr] = skb;
-
-#ifdef NETIF_F_TSO
-	if (skb_shinfo(skb)->tso_size)
-		tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->tso_size << NV_TX2_TSO_SHIFT);
-	else
-#endif
-	tx_flags_extra = (skb->ip_summed == CHECKSUM_HW ? (NV_TX2_CHECKSUM_L3|NV_TX2_CHECKSUM_L4) : 0);
-
-	/* vlan tag */
-	if (np->vlangrp && vlan_tx_tag_present(skb)) {
-		tx_flags_vlan = NV_TX3_VLAN_TAG_PRESENT | vlan_tx_tag_get(skb);
-	}
-
-	/* set tx flags */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->tx_ring.orig[start_nr].FlagLen |= cpu_to_le32(tx_flags | tx_flags_extra);
-	} else {
-		np->tx_ring.ex[start_nr].TxVlan = cpu_to_le32(tx_flags_vlan);
-		np->tx_ring.ex[start_nr].FlagLen |= cpu_to_le32(tx_flags | tx_flags_extra);
-	}	
-
-	dprintk(KERN_DEBUG "%s: nv_start_xmit: packet %d (entries %d) queued for transmission. tx_flags_extra: %x\n",
-		dev->name, np->next_tx, entries, tx_flags_extra);
-	{
-		int j;
-		for (j=0; j<64; j++) {
-			if ((j%16) == 0)
-				dprintk("\n%03x:", j);
-			dprintk(" %02x", ((unsigned char*)skb->data)[j]);
-		}
-		dprintk("\n");
-	}
-
-	np->next_tx += entries;
-
-	dev->trans_start = jiffies;
-	if (!np->ecdev) spin_unlock_irq(&np->lock);
-	writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-	pci_push(get_hwbase(dev));
-	return NETDEV_TX_OK;
-}
-
-/*
- * nv_tx_done: check for completed packets, release the skbs.
- *
- * Caller must own np->lock.
- */
-static void nv_tx_done(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 Flags;
-	unsigned int i;
-	struct sk_buff *skb;
-
-	while (np->nic_tx != np->next_tx) {
-		i = np->nic_tx % TX_RING;
-
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			Flags = le32_to_cpu(np->tx_ring.orig[i].FlagLen);
-		else
-			Flags = le32_to_cpu(np->tx_ring.ex[i].FlagLen);
-
-		dprintk(KERN_DEBUG "%s: nv_tx_done: looking at packet %d, Flags 0x%x.\n",
-					dev->name, np->nic_tx, Flags);
-		if (Flags & NV_TX_VALID)
-			break;
-		if (np->desc_ver == DESC_VER_1) {
-			if (Flags & NV_TX_LASTPACKET) {
-				skb = np->tx_skbuff[i];
-				if (Flags & (NV_TX_RETRYERROR|NV_TX_CARRIERLOST|NV_TX_LATECOLLISION|
-					     NV_TX_UNDERFLOW|NV_TX_ERROR)) {
-					if (Flags & NV_TX_UNDERFLOW)
-						np->stats.tx_fifo_errors++;
-					if (Flags & NV_TX_CARRIERLOST)
-						np->stats.tx_carrier_errors++;
-					np->stats.tx_errors++;
-				} else {
-					np->stats.tx_packets++;
-					np->stats.tx_bytes += skb->len;
-				}
-			}
-		} else {
-			if (Flags & NV_TX2_LASTPACKET) {
-				skb = np->tx_skbuff[i];
-				if (Flags & (NV_TX2_RETRYERROR|NV_TX2_CARRIERLOST|NV_TX2_LATECOLLISION|
-					     NV_TX2_UNDERFLOW|NV_TX2_ERROR)) {
-					if (Flags & NV_TX2_UNDERFLOW)
-						np->stats.tx_fifo_errors++;
-					if (Flags & NV_TX2_CARRIERLOST)
-						np->stats.tx_carrier_errors++;
-					np->stats.tx_errors++;
-				} else {
-					np->stats.tx_packets++;
-					np->stats.tx_bytes += skb->len;
-				}				
-			}
-		}
-		nv_release_txskb(dev, i);
-		np->nic_tx++;
-	}
-	if (!np->ecdev && np->next_tx - np->nic_tx < TX_LIMIT_START)
-		netif_wake_queue(dev);
-}
-
-/*
- * nv_tx_timeout: dev->tx_timeout function
- * Called with dev->xmit_lock held.
- */
-static void nv_tx_timeout(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 status;
-
-	if (np->msi_flags & NV_MSI_X_ENABLED)
-		status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
-	else
-		status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
-
-	printk(KERN_INFO "%s: Got tx_timeout. irq: %08x\n", dev->name, status);
-
-	{
-		int i;
-
-		printk(KERN_INFO "%s: Ring at %lx: next %d nic %d\n",
-				dev->name, (unsigned long)np->ring_addr,
-				np->next_tx, np->nic_tx);
-		printk(KERN_INFO "%s: Dumping tx registers\n", dev->name);
-		for (i=0;i<=np->register_size;i+= 32) {
-			printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-					i,
-					readl(base + i + 0), readl(base + i + 4),
-					readl(base + i + 8), readl(base + i + 12),
-					readl(base + i + 16), readl(base + i + 20),
-					readl(base + i + 24), readl(base + i + 28));
-		}
-		printk(KERN_INFO "%s: Dumping tx ring\n", dev->name);
-		for (i=0;i<TX_RING;i+= 4) {
-			if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-				printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n",
-				       i, 
-				       le32_to_cpu(np->tx_ring.orig[i].PacketBuffer),
-				       le32_to_cpu(np->tx_ring.orig[i].FlagLen),
-				       le32_to_cpu(np->tx_ring.orig[i+1].PacketBuffer),
-				       le32_to_cpu(np->tx_ring.orig[i+1].FlagLen),
-				       le32_to_cpu(np->tx_ring.orig[i+2].PacketBuffer),
-				       le32_to_cpu(np->tx_ring.orig[i+2].FlagLen),
-				       le32_to_cpu(np->tx_ring.orig[i+3].PacketBuffer),
-				       le32_to_cpu(np->tx_ring.orig[i+3].FlagLen));
-			} else {
-				printk(KERN_INFO "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n",
-				       i, 
-				       le32_to_cpu(np->tx_ring.ex[i].PacketBufferHigh),
-				       le32_to_cpu(np->tx_ring.ex[i].PacketBufferLow),
-				       le32_to_cpu(np->tx_ring.ex[i].FlagLen),
-				       le32_to_cpu(np->tx_ring.ex[i+1].PacketBufferHigh),
-				       le32_to_cpu(np->tx_ring.ex[i+1].PacketBufferLow),
-				       le32_to_cpu(np->tx_ring.ex[i+1].FlagLen),
-				       le32_to_cpu(np->tx_ring.ex[i+2].PacketBufferHigh),
-				       le32_to_cpu(np->tx_ring.ex[i+2].PacketBufferLow),
-				       le32_to_cpu(np->tx_ring.ex[i+2].FlagLen),
-				       le32_to_cpu(np->tx_ring.ex[i+3].PacketBufferHigh),
-				       le32_to_cpu(np->tx_ring.ex[i+3].PacketBufferLow),
-				       le32_to_cpu(np->tx_ring.ex[i+3].FlagLen));
-			}
-		}
-	}
-
-	if (!np->ecdev) spin_lock_irq(&np->lock);
-
-	/* 1) stop tx engine */
-	nv_stop_tx(dev);
-
-	/* 2) check that the packets were not sent already: */
-	nv_tx_done(dev);
-
-	/* 3) if there are dead entries: clear everything */
-	if (np->next_tx != np->nic_tx) {
-		printk(KERN_DEBUG "%s: tx_timeout: dead entries!\n", dev->name);
-		nv_drain_tx(dev);
-		np->next_tx = np->nic_tx = 0;
-		setup_hw_rings(dev, NV_SETUP_TX_RING);
-		if (!np->ecdev) netif_wake_queue(dev);
-	}
-
-	/* 4) restart tx engine */
-	nv_start_tx(dev);
-	if (!np->ecdev) spin_unlock_irq(&np->lock);
-}
-
-/*
- * Called when the nic notices a mismatch between the actual data len on the
- * wire and the len indicated in the 802 header
- */
-static int nv_getlen(struct net_device *dev, void *packet, int datalen)
-{
-	int hdrlen;	/* length of the 802 header */
-	int protolen;	/* length as stored in the proto field */
-
-	/* 1) calculate len according to header */
-	if ( ((struct vlan_ethhdr *)packet)->h_vlan_proto == __constant_htons(ETH_P_8021Q)) {
-		protolen = ntohs( ((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto );
-		hdrlen = VLAN_HLEN;
-	} else {
-		protolen = ntohs( ((struct ethhdr *)packet)->h_proto);
-		hdrlen = ETH_HLEN;
-	}
-	dprintk(KERN_DEBUG "%s: nv_getlen: datalen %d, protolen %d, hdrlen %d\n",
-				dev->name, datalen, protolen, hdrlen);
-	if (protolen > ETH_DATA_LEN)
-		return datalen; /* Value in proto field not a len, no checks possible */
-
-	protolen += hdrlen;
-	/* consistency checks: */
-	if (datalen > ETH_ZLEN) {
-		if (datalen >= protolen) {
-			/* more data on wire than in 802 header, trim of
-			 * additional data.
-			 */
-			dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
-					dev->name, protolen);
-			return protolen;
-		} else {
-			/* less data on wire than mentioned in header.
-			 * Discard the packet.
-			 */
-			dprintk(KERN_DEBUG "%s: nv_getlen: discarding long packet.\n",
-					dev->name);
-			return -1;
-		}
-	} else {
-		/* short packet. Accept only if 802 values are also short */
-		if (protolen > ETH_ZLEN) {
-			dprintk(KERN_DEBUG "%s: nv_getlen: discarding short packet.\n",
-					dev->name);
-			return -1;
-		}
-		dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
-				dev->name, datalen);
-		return datalen;
-	}
-}
-
-static void nv_rx_process(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 Flags;
-	u32 vlanflags = 0;
-
-
-	for (;;) {
-		struct sk_buff *skb;
-		int len;
-		int i;
-		if (np->cur_rx - np->refill_rx >= RX_RING)
-			break;	/* we scanned the whole ring - do not continue */
-
-		i = np->cur_rx % RX_RING;
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			Flags = le32_to_cpu(np->rx_ring.orig[i].FlagLen);
-			len = nv_descr_getlength(&np->rx_ring.orig[i], np->desc_ver);
-		} else {
-			Flags = le32_to_cpu(np->rx_ring.ex[i].FlagLen);
-			len = nv_descr_getlength_ex(&np->rx_ring.ex[i], np->desc_ver);
-			vlanflags = le32_to_cpu(np->rx_ring.ex[i].PacketBufferLow);
-		}
-
-		dprintk(KERN_DEBUG "%s: nv_rx_process: looking at packet %d, Flags 0x%x.\n",
-					dev->name, np->cur_rx, Flags);
-
-		if (Flags & NV_RX_AVAIL)
-			break;	/* still owned by hardware, */
-
-		/*
-		 * the packet is for us - immediately tear down the pci mapping.
-		 * TODO: check if a prefetch of the first cacheline improves
-		 * the performance.
-		 */
-		pci_unmap_single(np->pci_dev, np->rx_dma[i],
-				np->rx_skbuff[i]->end-np->rx_skbuff[i]->data,
-				PCI_DMA_FROMDEVICE);
-
-		{
-			int j;
-			dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).",Flags);
-			for (j=0; j<64; j++) {
-				if ((j%16) == 0)
-					dprintk("\n%03x:", j);
-				dprintk(" %02x", ((unsigned char*)np->rx_skbuff[i]->data)[j]);
-			}
-			dprintk("\n");
-		}
-		/* look at what we actually got: */
-		if (np->desc_ver == DESC_VER_1) {
-			if (!(Flags & NV_RX_DESCRIPTORVALID))
-				goto next_pkt;
-
-			if (Flags & NV_RX_ERROR) {
-				if (Flags & NV_RX_MISSEDFRAME) {
-					np->stats.rx_missed_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3)) {
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX_CRCERR) {
-					np->stats.rx_crc_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX_OVERFLOW) {
-					np->stats.rx_over_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX_ERROR4) {
-					len = nv_getlen(dev, np->rx_skbuff[i]->data, len);
-					if (len < 0) {
-						np->stats.rx_errors++;
-						goto next_pkt;
-					}
-				}
-				/* framing errors are soft errors. */
-				if (Flags & NV_RX_FRAMINGERR) {
-					if (Flags & NV_RX_SUBSTRACT1) {
-						len--;
-					}
-				}
-			}
-		} else {
-			if (!(Flags & NV_RX2_DESCRIPTORVALID))
-				goto next_pkt;
-
-			if (Flags & NV_RX2_ERROR) {
-				if (Flags & (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3)) {
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX2_CRCERR) {
-					np->stats.rx_crc_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX2_OVERFLOW) {
-					np->stats.rx_over_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX2_ERROR4) {
-					len = nv_getlen(dev, np->rx_skbuff[i]->data, len);
-					if (len < 0) {
-						np->stats.rx_errors++;
-						goto next_pkt;
-					}
-				}
-				/* framing errors are soft errors */
-				if (Flags & NV_RX2_FRAMINGERR) {
-					if (Flags & NV_RX2_SUBSTRACT1) {
-						len--;
-					}
-				}
-			}
-			Flags &= NV_RX2_CHECKSUMMASK;
-			if (Flags == NV_RX2_CHECKSUMOK1 ||
-					Flags == NV_RX2_CHECKSUMOK2 ||
-					Flags == NV_RX2_CHECKSUMOK3) {
-				dprintk(KERN_DEBUG "%s: hw checksum hit!.\n", dev->name);
-				np->rx_skbuff[i]->ip_summed = CHECKSUM_UNNECESSARY;
-			} else {
-				dprintk(KERN_DEBUG "%s: hwchecksum miss!.\n", dev->name);
-			}
-		}
-		if (np->ecdev) {
-			ecdev_receive(np->ecdev, np->rx_skbuff[i]->data, len);
-		}
-		else {
-			/* got a valid packet - forward it to the network core */
-			skb = np->rx_skbuff[i];
-			np->rx_skbuff[i] = NULL;
-
-			skb_put(skb, len);
-			skb->protocol = eth_type_trans(skb, dev);
-			dprintk(KERN_DEBUG "%s: nv_rx_process: packet %d with %d bytes, proto %d accepted.\n",
-					dev->name, np->cur_rx, len, skb->protocol);
-			if (np->vlangrp && (vlanflags & NV_RX3_VLAN_TAG_PRESENT)) {
-				vlan_hwaccel_rx(skb, np->vlangrp, vlanflags & NV_RX3_VLAN_TAG_MASK);
-			} else {
-				netif_rx(skb);
-			}
-		}
-		dev->last_rx = jiffies;
-		np->stats.rx_packets++;
-		np->stats.rx_bytes += len;
-next_pkt:
-		np->cur_rx++;
-	}
-}
-
-static void set_bufsize(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (dev->mtu <= ETH_DATA_LEN)
-		np->rx_buf_sz = ETH_DATA_LEN + NV_RX_HEADERS;
-	else
-		np->rx_buf_sz = dev->mtu + NV_RX_HEADERS;
-}
-
-/*
- * nv_change_mtu: dev->change_mtu function
- * Called with dev_base_lock held for read.
- */
-static int nv_change_mtu(struct net_device *dev, int new_mtu)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int old_mtu;
-
-	if (new_mtu < 64 || new_mtu > np->pkt_limit)
-		return -EINVAL;
-
-	old_mtu = dev->mtu;
-	dev->mtu = new_mtu;
-
-	/* return early if the buffer sizes will not change */
-	if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN)
-		return 0;
-	if (old_mtu == new_mtu)
-		return 0;
-
-	/* synchronized against open : rtnl_lock() held by caller */
-	if (netif_running(dev)) {
-		u8 __iomem *base = get_hwbase(dev);
-		/*
-		 * It seems that the nic preloads valid ring entries into an
-		 * internal buffer. The procedure for flushing everything is
-		 * guessed, there is probably a simpler approach.
-		 * Changing the MTU is a rare event, it shouldn't matter.
-		 */
-		nv_disable_irq(dev);
-		spin_lock_bh(&dev->xmit_lock);
-		spin_lock(&np->lock);
-		/* stop engines */
-		nv_stop_rx(dev);
-		nv_stop_tx(dev);
-		nv_txrx_reset(dev);
-		/* drain rx queue */
-		nv_drain_rx(dev);
-		nv_drain_tx(dev);
-		/* reinit driver view of the rx queue */
-		nv_init_rx(dev);
-		nv_init_tx(dev);
-		/* alloc new rx buffers */
-		set_bufsize(dev);
-		if (nv_alloc_rx(dev)) {
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		}
-		/* reinit nic view of the rx queue */
-		writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-		setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-		writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT),
-			base + NvRegRingSizes);
-		pci_push(base);
-		writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-		pci_push(base);
-
-		/* restart rx engine */
-		nv_start_rx(dev);
-		nv_start_tx(dev);
-		spin_unlock(&np->lock);
-		spin_unlock_bh(&dev->xmit_lock);
-		nv_enable_irq(dev);
-	}
-	return 0;
-}
-
-static void nv_copy_mac_to_hw(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 mac[2];
-
-	mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) +
-			(dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24);
-	mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8);
-
-	writel(mac[0], base + NvRegMacAddrA);
-	writel(mac[1], base + NvRegMacAddrB);
-}
-
-/*
- * nv_set_mac_address: dev->set_mac_address function
- * Called with rtnl_lock() held.
- */
-static int nv_set_mac_address(struct net_device *dev, void *addr)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	struct sockaddr *macaddr = (struct sockaddr*)addr;
-
-	if(!is_valid_ether_addr(macaddr->sa_data))
-		return -EADDRNOTAVAIL;
-
-	/* synchronized against open : rtnl_lock() held by caller */
-	memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN);
-
-	if (netif_running(dev)) {
-		spin_lock_bh(&dev->xmit_lock);
-		spin_lock_irq(&np->lock);
-
-		/* stop rx engine */
-		nv_stop_rx(dev);
-
-		/* set mac address */
-		nv_copy_mac_to_hw(dev);
-
-		/* restart rx engine */
-		nv_start_rx(dev);
-		spin_unlock_irq(&np->lock);
-		spin_unlock_bh(&dev->xmit_lock);
-	} else {
-		nv_copy_mac_to_hw(dev);
-	}
-	return 0;
-}
-
-/*
- * nv_set_multicast: dev->set_multicast function
- * Called with dev->xmit_lock held.
- */
-static void nv_set_multicast(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 addr[2];
-	u32 mask[2];
-	u32 pff;
-
-	memset(addr, 0, sizeof(addr));
-	memset(mask, 0, sizeof(mask));
-
-	if (dev->flags & IFF_PROMISC) {
-		printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
-		pff = NVREG_PFF_PROMISC;
-	} else {
-		pff = NVREG_PFF_MYADDR;
-
-		if (dev->flags & IFF_ALLMULTI || dev->mc_list) {
-			u32 alwaysOff[2];
-			u32 alwaysOn[2];
-
-			alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0xffffffff;
-			if (dev->flags & IFF_ALLMULTI) {
-				alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0;
-			} else {
-				struct dev_mc_list *walk;
-
-				walk = dev->mc_list;
-				while (walk != NULL) {
-					u32 a, b;
-					a = le32_to_cpu(*(u32 *) walk->dmi_addr);
-					b = le16_to_cpu(*(u16 *) (&walk->dmi_addr[4]));
-					alwaysOn[0] &= a;
-					alwaysOff[0] &= ~a;
-					alwaysOn[1] &= b;
-					alwaysOff[1] &= ~b;
-					walk = walk->next;
-				}
-			}
-			addr[0] = alwaysOn[0];
-			addr[1] = alwaysOn[1];
-			mask[0] = alwaysOn[0] | alwaysOff[0];
-			mask[1] = alwaysOn[1] | alwaysOff[1];
-		}
-	}
-	addr[0] |= NVREG_MCASTADDRA_FORCE;
-	pff |= NVREG_PFF_ALWAYS;
-	spin_lock_irq(&np->lock);
-	nv_stop_rx(dev);
-	writel(addr[0], base + NvRegMulticastAddrA);
-	writel(addr[1], base + NvRegMulticastAddrB);
-	writel(mask[0], base + NvRegMulticastMaskA);
-	writel(mask[1], base + NvRegMulticastMaskB);
-	writel(pff, base + NvRegPacketFilterFlags);
-	dprintk(KERN_INFO "%s: reconfiguration for multicast lists.\n",
-		dev->name);
-	nv_start_rx(dev);
-	spin_unlock_irq(&np->lock);
-}
-
-/**
- * nv_update_linkspeed: Setup the MAC according to the link partner
- * @dev: Network device to be configured
- *
- * The function queries the PHY and checks if there is a link partner.
- * If yes, then it sets up the MAC accordingly. Otherwise, the MAC is
- * set to 10 MBit HD.
- *
- * The function returns 0 if there is no link partner and 1 if there is
- * a good link partner.
- */
-static int nv_update_linkspeed(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int adv, lpa;
-	int newls = np->linkspeed;
-	int newdup = np->duplex;
-	int mii_status;
-	int retval = 0;
-	u32 control_1000, status_1000, phyreg;
-
-	/* BMSR_LSTATUS is latched, read it twice:
-	 * we want the current value.
-	 */
-	mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-	mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-
-	if (!(mii_status & BMSR_LSTATUS)) {
-		dprintk(KERN_DEBUG "%s: no link detected by phy - falling back to 10HD.\n",
-				dev->name);
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-		retval = 0;
-		goto set_speed;
-	}
-
-	if (np->autoneg == 0) {
-		dprintk(KERN_DEBUG "%s: nv_update_linkspeed: autoneg off, PHY set to 0x%04x.\n",
-				dev->name, np->fixed_mode);
-		if (np->fixed_mode & LPA_100FULL) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-			newdup = 1;
-		} else if (np->fixed_mode & LPA_100HALF) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-			newdup = 0;
-		} else if (np->fixed_mode & LPA_10FULL) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-			newdup = 1;
-		} else {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-			newdup = 0;
-		}
-		retval = 1;
-		goto set_speed;
-	}
-	/* check auto negotiation is complete */
-	if (!(mii_status & BMSR_ANEGCOMPLETE)) {
-		/* still in autonegotiation - configure nic for 10 MBit HD and wait. */
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-		retval = 0;
-		dprintk(KERN_DEBUG "%s: autoneg not completed - falling back to 10HD.\n", dev->name);
-		goto set_speed;
-	}
-
-	retval = 1;
-	if (np->gigabit == PHY_GIGABIT) {
-		control_1000 = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ);
-		status_1000 = mii_rw(dev, np->phyaddr, MII_1000BT_SR, MII_READ);
-
-		if ((control_1000 & ADVERTISE_1000FULL) &&
-			(status_1000 & LPA_1000FULL)) {
-			dprintk(KERN_DEBUG "%s: nv_update_linkspeed: GBit ethernet detected.\n",
-				dev->name);
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_1000;
-			newdup = 1;
-			goto set_speed;
-		}
-	}
-
-	adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-	lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ);
-	dprintk(KERN_DEBUG "%s: nv_update_linkspeed: PHY advertises 0x%04x, lpa 0x%04x.\n",
-				dev->name, adv, lpa);
-
-	/* FIXME: handle parallel detection properly */
-	lpa = lpa & adv;
-	if (lpa & LPA_100FULL) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-		newdup = 1;
-	} else if (lpa & LPA_100HALF) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-		newdup = 0;
-	} else if (lpa & LPA_10FULL) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 1;
-	} else if (lpa & LPA_10HALF) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-	} else {
-		dprintk(KERN_DEBUG "%s: bad ability %04x - falling back to 10HD.\n", dev->name, lpa);
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-	}
-
-set_speed:
-	if (np->duplex == newdup && np->linkspeed == newls)
-		return retval;
-
-	dprintk(KERN_INFO "%s: changing link setting from %d/%d to %d/%d.\n",
-			dev->name, np->linkspeed, np->duplex, newls, newdup);
-
-	np->duplex = newdup;
-	np->linkspeed = newls;
-
-	if (np->gigabit == PHY_GIGABIT) {
-		phyreg = readl(base + NvRegRandomSeed);
-		phyreg &= ~(0x3FF00);
-		if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_10)
-			phyreg |= NVREG_RNDSEED_FORCE3;
-		else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_100)
-			phyreg |= NVREG_RNDSEED_FORCE2;
-		else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_1000)
-			phyreg |= NVREG_RNDSEED_FORCE;
-		writel(phyreg, base + NvRegRandomSeed);
-	}
-
-	phyreg = readl(base + NvRegPhyInterface);
-	phyreg &= ~(PHY_HALF|PHY_100|PHY_1000);
-	if (np->duplex == 0)
-		phyreg |= PHY_HALF;
-	if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_100)
-		phyreg |= PHY_100;
-	else if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
-		phyreg |= PHY_1000;
-	writel(phyreg, base + NvRegPhyInterface);
-
-	writel(NVREG_MISC1_FORCE | ( np->duplex ? 0 : NVREG_MISC1_HD),
-		base + NvRegMisc1);
-	pci_push(base);
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	pci_push(base);
-
-	return retval;
-}
-
-static void nv_linkchange(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-    if (np->ecdev) {
-        int link = nv_update_linkspeed(dev);
-        ecdev_set_link(np->ecdev, link);
-        return;
-    }
-
-	if (nv_update_linkspeed(dev)) {
-		if (!netif_carrier_ok(dev)) {
-			netif_carrier_on(dev);
-			printk(KERN_INFO "%s: link up.\n", dev->name);
-			nv_start_rx(dev);
-		}
-	} else {
-		if (netif_carrier_ok(dev)) {
-			netif_carrier_off(dev);
-			printk(KERN_INFO "%s: link down.\n", dev->name);
-			nv_stop_rx(dev);
-		}
-	}
-}
-
-static void nv_link_irq(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 miistat;
-
-	miistat = readl(base + NvRegMIIStatus);
-	writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-	dprintk(KERN_INFO "%s: link change irq, status 0x%x.\n", dev->name, miistat);
-
-	if (miistat & (NVREG_MIISTAT_LINKCHANGE))
-		nv_linkchange(dev);
-	dprintk(KERN_DEBUG "%s: link change notification done.\n", dev->name);
-}
-
-static irqreturn_t nv_nic_irq(int foo, void *data, struct pt_regs *regs)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq\n", dev->name);
-
-	for (i=0; ; i++) {
-		if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
-			events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
-			writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-		} else {
-			events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
-			writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
-		}
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		if (!np->ecdev) spin_lock(&np->lock);
-		nv_tx_done(dev);
-		if (!np->ecdev) spin_unlock(&np->lock);
-		
-		nv_rx_process(dev);
-		if (nv_alloc_rx(dev)) {
-			spin_lock(&np->lock);
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-			spin_unlock(&np->lock);
-		}
-		
-		if (events & NVREG_IRQ_LINK) {
-			if (!np->ecdev) spin_lock(&np->lock);
-			nv_link_irq(dev);
-			if (!np->ecdev) spin_unlock(&np->lock);
-		}
-		if (np->need_linktimer && time_after(jiffies, np->link_timeout)) {
-			if (!np->ecdev) spin_lock(&np->lock);
-			nv_linkchange(dev);
-			if (!np->ecdev) spin_unlock(&np->lock);
-			np->link_timeout = jiffies + LINK_TIMEOUT;
-		}
-		if (events & (NVREG_IRQ_TX_ERR)) {
-			dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n",
-						dev->name, events);
-		}
-		if (events & (NVREG_IRQ_UNKNOWN)) {
-			printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
-						dev->name, events);
-		}
-		if (i > max_interrupt_work) {
-			if (!np->ecdev) {
-				spin_lock(&np->lock);
-				/* disable interrupts on the nic */
-				if (!(np->msi_flags & NV_MSI_X_ENABLED))
-					writel(0, base + NvRegIrqMask);
-				else
-					writel(np->irqmask, base + NvRegIrqMask);
-				pci_push(base);
-
-				if (!np->in_shutdown) {
-					np->nic_poll_irq = np->irqmask;
-					mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-				}
-				spin_unlock(&np->lock);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq.\n", dev->name, i);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static irqreturn_t nv_nic_irq_tx(int foo, void *data, struct pt_regs *regs)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL;
-		writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: tx irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		if (!np->ecdev) spin_lock_irq(&np->lock);
-		nv_tx_done(dev);
-		if (!np->ecdev) spin_unlock_irq(&np->lock);
-		
-		if (events & (NVREG_IRQ_TX_ERR)) {
-			dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n",
-						dev->name, events);
-		}
-		if (i > max_interrupt_work) {
-			if (!np->ecdev) { 
-				spin_lock_irq(&np->lock);
-				/* disable interrupts on the nic */
-				writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask);
-				pci_push(base);
-
-				if (!np->in_shutdown) {
-					np->nic_poll_irq |= NVREG_IRQ_TX_ALL;
-					mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-				}
-				spin_unlock_irq(&np->lock);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_tx.\n", dev->name, i);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_tx completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static irqreturn_t nv_nic_irq_rx(int foo, void *data, struct pt_regs *regs)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL;
-		writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-		
-		nv_rx_process(dev);
-		if (nv_alloc_rx(dev) && !np->ecdev) {
-			spin_lock_irq(&np->lock);
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-			spin_unlock_irq(&np->lock);
-		}
-		
-		if (i > max_interrupt_work) {
-			if (!np->ecdev) {
-				spin_lock_irq(&np->lock);
-				/* disable interrupts on the nic */
-				writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
-				pci_push(base);
-
-				if (!np->in_shutdown) {
-					np->nic_poll_irq |= NVREG_IRQ_RX_ALL;
-					mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-				}
-				spin_unlock_irq(&np->lock);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_rx.\n", dev->name, i);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_rx completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static irqreturn_t nv_nic_irq_other(int foo, void *data, struct pt_regs *regs)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER;
-		writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-		
-		if (events & NVREG_IRQ_LINK) {
-			if (!np->ecdev) spin_lock_irq(&np->lock);
-			nv_link_irq(dev);
-			if (!np->ecdev) spin_unlock_irq(&np->lock);
-		}
-		if (np->need_linktimer && time_after(jiffies, np->link_timeout)) {
-			if (!np->ecdev) spin_lock_irq(&np->lock);
-			nv_linkchange(dev);
-			if (!np->ecdev) spin_unlock_irq(&np->lock);
-			np->link_timeout = jiffies + LINK_TIMEOUT;
-		}
-		if (events & (NVREG_IRQ_UNKNOWN)) {
-			printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
-						dev->name, events);
-		}
-		if (i > max_interrupt_work) {
-			if (!np->ecdev) { 
-				spin_lock_irq(&np->lock);
-				/* disable interrupts on the nic */
-				writel(NVREG_IRQ_OTHER, base + NvRegIrqMask);
-				pci_push(base);
-
-				if (!np->in_shutdown) {
-					np->nic_poll_irq |= NVREG_IRQ_OTHER;
-					mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-				}
-				spin_unlock_irq(&np->lock);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_other.\n", dev->name, i);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_other completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-void ec_poll(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		nv_nic_irq((int) 0, dev, (struct pt_regs *) NULL);
-	} else {
-		if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
-			nv_nic_irq_rx((int) 0, dev, (struct pt_regs *) NULL);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
-			nv_nic_irq_tx((int) 0, dev, (struct pt_regs *) NULL);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
-			nv_nic_irq_other((int) 0, dev, (struct pt_regs *) NULL);
-		}
-	}
-}
-
-static void nv_do_nic_poll(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 mask = 0;
-
-	/*
-	 * First disable irq(s) and then
-	 * reenable interrupts on the nic, we have to do this before calling
-	 * nv_nic_irq because that may decide to do otherwise
-	 */
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq(dev->irq);
-		mask = np->irqmask;
-	} else {
-		if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-			mask |= NVREG_IRQ_RX_ALL;
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-			mask |= NVREG_IRQ_TX_ALL;
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-			mask |= NVREG_IRQ_OTHER;
-		}
-	}
-	np->nic_poll_irq = 0;
-
-	/* FIXME: Do we need synchronize_irq(dev->irq) here? */
-	
-	writel(mask, base + NvRegIrqMask);
-	pci_push(base);
-
-	if (!using_multi_irqs(dev)) {
-		nv_nic_irq((int) 0, (void *) data, (struct pt_regs *) NULL);
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq(dev->irq);
-	} else {
-		if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
-			nv_nic_irq_rx((int) 0, (void *) data, (struct pt_regs *) NULL);
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
-			nv_nic_irq_tx((int) 0, (void *) data, (struct pt_regs *) NULL);
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
-			nv_nic_irq_other((int) 0, (void *) data, (struct pt_regs *) NULL);
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-		}
-	}
-}
-
-#ifdef CONFIG_NET_POLL_CONTROLLER
-static void nv_poll_controller(struct net_device *dev)
-{
-	nv_do_nic_poll((unsigned long) dev);
-}
-#endif
-
-static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	strcpy(info->driver, "forcedeth");
-	strcpy(info->version, FORCEDETH_VERSION);
-	strcpy(info->bus_info, pci_name(np->pci_dev));
-}
-
-static void nv_get_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	wolinfo->supported = WAKE_MAGIC;
-
-	spin_lock_irq(&np->lock);
-	if (np->wolenabled)
-		wolinfo->wolopts = WAKE_MAGIC;
-	spin_unlock_irq(&np->lock);
-}
-
-static int nv_set_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	spin_lock_irq(&np->lock);
-	if (wolinfo->wolopts == 0) {
-		writel(0, base + NvRegWakeUpFlags);
-		np->wolenabled = 0;
-	}
-	if (wolinfo->wolopts & WAKE_MAGIC) {
-		writel(NVREG_WAKEUPFLAGS_ENABLE, base + NvRegWakeUpFlags);
-		np->wolenabled = 1;
-	}
-	spin_unlock_irq(&np->lock);
-	return 0;
-}
-
-static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int adv;
-
-	spin_lock_irq(&np->lock);
-	ecmd->port = PORT_MII;
-	if (!netif_running(dev)) {
-		/* We do not track link speed / duplex setting if the
-		 * interface is disabled. Force a link check */
-		nv_update_linkspeed(dev);
-	}
-	switch(np->linkspeed & (NVREG_LINKSPEED_MASK)) {
-		case NVREG_LINKSPEED_10:
-			ecmd->speed = SPEED_10;
-			break;
-		case NVREG_LINKSPEED_100:
-			ecmd->speed = SPEED_100;
-			break;
-		case NVREG_LINKSPEED_1000:
-			ecmd->speed = SPEED_1000;
-			break;
-	}
-	ecmd->duplex = DUPLEX_HALF;
-	if (np->duplex)
-		ecmd->duplex = DUPLEX_FULL;
-
-	ecmd->autoneg = np->autoneg;
-
-	ecmd->advertising = ADVERTISED_MII;
-	if (np->autoneg) {
-		ecmd->advertising |= ADVERTISED_Autoneg;
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-	} else {
-		adv = np->fixed_mode;
-	}
-	if (adv & ADVERTISE_10HALF)
-		ecmd->advertising |= ADVERTISED_10baseT_Half;
-	if (adv & ADVERTISE_10FULL)
-		ecmd->advertising |= ADVERTISED_10baseT_Full;
-	if (adv & ADVERTISE_100HALF)
-		ecmd->advertising |= ADVERTISED_100baseT_Half;
-	if (adv & ADVERTISE_100FULL)
-		ecmd->advertising |= ADVERTISED_100baseT_Full;
-	if (np->autoneg && np->gigabit == PHY_GIGABIT) {
-		adv = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ);
-		if (adv & ADVERTISE_1000FULL)
-			ecmd->advertising |= ADVERTISED_1000baseT_Full;
-	}
-
-	ecmd->supported = (SUPPORTED_Autoneg |
-		SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
-		SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
-		SUPPORTED_MII);
-	if (np->gigabit == PHY_GIGABIT)
-		ecmd->supported |= SUPPORTED_1000baseT_Full;
-
-	ecmd->phy_address = np->phyaddr;
-	ecmd->transceiver = XCVR_EXTERNAL;
-
-	/* ignore maxtxpkt, maxrxpkt for now */
-	spin_unlock_irq(&np->lock);
-	return 0;
-}
-
-static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (ecmd->port != PORT_MII)
-		return -EINVAL;
-	if (ecmd->transceiver != XCVR_EXTERNAL)
-		return -EINVAL;
-	if (ecmd->phy_address != np->phyaddr) {
-		/* TODO: support switching between multiple phys. Should be
-		 * trivial, but not enabled due to lack of test hardware. */
-		return -EINVAL;
-	}
-	if (ecmd->autoneg == AUTONEG_ENABLE) {
-		u32 mask;
-
-		mask = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
-			  ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
-		if (np->gigabit == PHY_GIGABIT)
-			mask |= ADVERTISED_1000baseT_Full;
-
-		if ((ecmd->advertising & mask) == 0)
-			return -EINVAL;
-
-	} else if (ecmd->autoneg == AUTONEG_DISABLE) {
-		/* Note: autonegotiation disable, speed 1000 intentionally
-		 * forbidden - noone should need that. */
-
-		if (ecmd->speed != SPEED_10 && ecmd->speed != SPEED_100)
-			return -EINVAL;
-		if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
-			return -EINVAL;
-	} else {
-		return -EINVAL;
-	}
-
-	spin_lock_irq(&np->lock);
-	if (ecmd->autoneg == AUTONEG_ENABLE) {
-		int adv, bmcr;
-
-		np->autoneg = 1;
-
-		/* advertise only what has been requested */
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
-		if (ecmd->advertising & ADVERTISED_10baseT_Half)
-			adv |= ADVERTISE_10HALF;
-		if (ecmd->advertising & ADVERTISED_10baseT_Full)
-			adv |= ADVERTISE_10FULL;
-		if (ecmd->advertising & ADVERTISED_100baseT_Half)
-			adv |= ADVERTISE_100HALF;
-		if (ecmd->advertising & ADVERTISED_100baseT_Full)
-			adv |= ADVERTISE_100FULL;
-		mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
-
-		if (np->gigabit == PHY_GIGABIT) {
-			adv = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ);
-			adv &= ~ADVERTISE_1000FULL;
-			if (ecmd->advertising & ADVERTISED_1000baseT_Full)
-				adv |= ADVERTISE_1000FULL;
-			mii_rw(dev, np->phyaddr, MII_1000BT_CR, adv);
-		}
-
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-		mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-
-	} else {
-		int adv, bmcr;
-
-		np->autoneg = 0;
-
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
-		if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_HALF)
-			adv |= ADVERTISE_10HALF;
-		if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_FULL)
-			adv |= ADVERTISE_10FULL;
-		if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_HALF)
-			adv |= ADVERTISE_100HALF;
-		if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_FULL)
-			adv |= ADVERTISE_100FULL;
-		mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
-		np->fixed_mode = adv;
-
-		if (np->gigabit == PHY_GIGABIT) {
-			adv = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ);
-			adv &= ~ADVERTISE_1000FULL;
-			mii_rw(dev, np->phyaddr, MII_1000BT_CR, adv);
-		}
-
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		bmcr |= ~(BMCR_ANENABLE|BMCR_SPEED100|BMCR_FULLDPLX);
-		if (adv & (ADVERTISE_10FULL|ADVERTISE_100FULL))
-			bmcr |= BMCR_FULLDPLX;
-		if (adv & (ADVERTISE_100HALF|ADVERTISE_100FULL))
-			bmcr |= BMCR_SPEED100;
-		mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-
-		if (netif_running(dev)) {
-			/* Wait a bit and then reconfigure the nic. */
-			udelay(10);
-			nv_linkchange(dev);
-		}
-	}
-	spin_unlock_irq(&np->lock);
-
-	return 0;
-}
-
-#define FORCEDETH_REGS_VER	1
-
-static int nv_get_regs_len(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	return np->register_size;
-}
-
-static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 *rbuf = buf;
-	int i;
-
-	regs->version = FORCEDETH_REGS_VER;
-	spin_lock_irq(&np->lock);
-	for (i = 0;i <= np->register_size/sizeof(u32); i++)
-		rbuf[i] = readl(base + i*sizeof(u32));
-	spin_unlock_irq(&np->lock);
-}
-
-static int nv_nway_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int ret;
-
-	spin_lock_irq(&np->lock);
-	if (np->autoneg) {
-		int bmcr;
-
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-		mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-
-		ret = 0;
-	} else {
-		ret = -EINVAL;
-	}
-	spin_unlock_irq(&np->lock);
-
-	return ret;
-}
-
-#ifdef NETIF_F_TSO
-static int nv_set_tso(struct net_device *dev, u32 value)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if ((np->driver_data & DEV_HAS_CHECKSUM))
-		return ethtool_op_set_tso(dev, value);
-	else
-		return value ? -EOPNOTSUPP : 0;
-}
-#endif
-
-static struct ethtool_ops ops = {
-	.get_drvinfo = nv_get_drvinfo,
-	.get_link = ethtool_op_get_link,
-	.get_wol = nv_get_wol,
-	.set_wol = nv_set_wol,
-	.get_settings = nv_get_settings,
-	.set_settings = nv_set_settings,
-	.get_regs_len = nv_get_regs_len,
-	.get_regs = nv_get_regs,
-	.nway_reset = nv_nway_reset,
-	.get_perm_addr = ethtool_op_get_perm_addr,
-#ifdef NETIF_F_TSO
-	.get_tso = ethtool_op_get_tso,
-	.set_tso = nv_set_tso
-#endif
-};
-
-static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	spin_lock_irq(&np->lock);
-
-	/* save vlan group */
-	np->vlangrp = grp;
-
-	if (grp) {
-		/* enable vlan on MAC */
-		np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS;
-	} else {
-		/* disable vlan on MAC */
-		np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP;
-		np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS;
-	}
-
-	writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-
-	spin_unlock_irq(&np->lock);
-};
-
-static void nv_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
-{
-	/* nothing to do */
-};
-
-static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	int i;
-	u32 msixmap = 0;
-
-	/* Each interrupt bit can be mapped to a MSIX vector (4 bits).
-	 * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents
-	 * the remaining 8 interrupts.
-	 */
-	for (i = 0; i < 8; i++) {
-		if ((irqmask >> i) & 0x1) {
-			msixmap |= vector << (i << 2);
-		}
-	}
-	writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0);
-
-	msixmap = 0;
-	for (i = 0; i < 8; i++) {
-		if ((irqmask >> (i + 8)) & 0x1) {
-			msixmap |= vector << (i << 2);
-		}
-	}
-	writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1);
-}
-
-static int nv_request_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int ret = 1;
-	int i;
-
-	if (np->msi_flags & NV_MSI_X_CAPABLE) {
-		for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
-			np->msi_x_entry[i].entry = i;
-		}
-		if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) {
-			np->msi_flags |= NV_MSI_X_ENABLED;
-			if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) {
-				/* Request irq for rx handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, &nv_nic_irq_rx, SA_SHIRQ, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for rx %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_err;
-				}
-				/* Request irq for tx handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, &nv_nic_irq_tx, SA_SHIRQ, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for tx %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_free_rx;
-				}
-				/* Request irq for link and timer handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector, &nv_nic_irq_other, SA_SHIRQ, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for link %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_free_tx;
-				}
-				/* map interrupts to their respective vector */
-				writel(0, base + NvRegMSIXMap0);
-				writel(0, base + NvRegMSIXMap1);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER);
-			} else {
-				/* Request irq for all interrupts */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_err;
-				}
-
-				/* map interrupts to vector 0 */
-				writel(0, base + NvRegMSIXMap0);
-				writel(0, base + NvRegMSIXMap1);
-			}
-		}
-	}
-	if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) {
-		if ((ret = pci_enable_msi(np->pci_dev)) == 0) {
-			np->msi_flags |= NV_MSI_ENABLED;
-			if (request_irq(np->pci_dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) {
-				printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
-				pci_disable_msi(np->pci_dev);
-				np->msi_flags &= ~NV_MSI_ENABLED;
-				goto out_err;
-			}
-
-			/* map interrupts to vector 0 */
-			writel(0, base + NvRegMSIMap0);
-			writel(0, base + NvRegMSIMap1);
-			/* enable msi vector 0 */
-			writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask);
-		}
-	}
-	if (ret != 0) {
-		if (request_irq(np->pci_dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0)
-			goto out_err;
-	}
-
-	return 0;
-out_free_tx:
-	free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, dev);
-out_free_rx:
-	free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, dev);
-out_err:
-	return 1;
-}
-
-static void nv_free_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	int i;
-
-	if (np->msi_flags & NV_MSI_X_ENABLED) {
-		for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
-			free_irq(np->msi_x_entry[i].vector, dev);
-		}
-		pci_disable_msix(np->pci_dev);
-		np->msi_flags &= ~NV_MSI_X_ENABLED;
-	} else {
-		free_irq(np->pci_dev->irq, dev);
-		if (np->msi_flags & NV_MSI_ENABLED) {
-			pci_disable_msi(np->pci_dev);
-			np->msi_flags &= ~NV_MSI_ENABLED;
-		}
-	}
-}
-
-static int nv_open(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int ret = 1;
-	int oom, i;
-
-	dprintk(KERN_DEBUG "nv_open: begin\n");
-
-	/* 1) erase previous misconfiguration */
-	if (np->driver_data & DEV_HAS_POWER_CNTRL)
-		nv_mac_reset(dev);
-	/* 4.1-1: stop adapter: ignored, 4.3 seems to be overkill */
-	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
-	writel(0, base + NvRegMulticastAddrB);
-	writel(0, base + NvRegMulticastMaskA);
-	writel(0, base + NvRegMulticastMaskB);
-	writel(0, base + NvRegPacketFilterFlags);
-
-	writel(0, base + NvRegTransmitterControl);
-	writel(0, base + NvRegReceiverControl);
-
-	writel(0, base + NvRegAdapterControl);
-
-	/* 2) initialize descriptor rings */
-	set_bufsize(dev);
-	oom = nv_init_ring(dev);
-
-	writel(0, base + NvRegLinkSpeed);
-	writel(0, base + NvRegUnknownTransmitterReg);
-	nv_txrx_reset(dev);
-	writel(0, base + NvRegUnknownSetupReg6);
-
-	np->in_shutdown = 0;
-
-	/* 3) set mac address */
-	nv_copy_mac_to_hw(dev);
-
-	/* 4) give hw rings */
-	setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-	writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT),
-		base + NvRegRingSizes);
-
-	/* 5) continue setup */
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	writel(NVREG_UNKSETUP3_VAL1, base + NvRegUnknownSetupReg3);
-	writel(np->txrxctl_bits, base + NvRegTxRxControl);
-	writel(np->vlanctl_bits, base + NvRegVlanControl);
-	pci_push(base);
-	writel(NVREG_TXRXCTL_BIT1|np->txrxctl_bits, base + NvRegTxRxControl);
-	reg_delay(dev, NvRegUnknownSetupReg5, NVREG_UNKSETUP5_BIT31, NVREG_UNKSETUP5_BIT31,
-			NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX,
-			KERN_INFO "open: SetupReg5, Bit 31 remained off\n");
-
-	writel(0, base + NvRegUnknownSetupReg4);
-	writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-	writel(NVREG_MIISTAT_MASK2, base + NvRegMIIStatus);
-
-	/* 6) continue setup */
-	writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1);
-	writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus);
-	writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags);
-	writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-
-	writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);
-	get_random_bytes(&i, sizeof(i));
-	writel(NVREG_RNDSEED_FORCE | (i&NVREG_RNDSEED_MASK), base + NvRegRandomSeed);
-	writel(NVREG_UNKSETUP1_VAL, base + NvRegUnknownSetupReg1);
-	writel(NVREG_UNKSETUP2_VAL, base + NvRegUnknownSetupReg2);
-	if (poll_interval == -1) {
-		if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT)
-			writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval);
-		else
-			writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
-	}
-	else
-		writel(poll_interval & 0xFFFF, base + NvRegPollingInterval);
-	writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
-	writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING,
-			base + NvRegAdapterControl);
-	writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed);
-	writel(NVREG_UNKSETUP4_VAL, base + NvRegUnknownSetupReg4);
-	writel(NVREG_WAKEUPFLAGS_VAL, base + NvRegWakeUpFlags);
-
-	i = readl(base + NvRegPowerState);
-	if ( (i & NVREG_POWERSTATE_POWEREDUP) == 0)
-		writel(NVREG_POWERSTATE_POWEREDUP|i, base + NvRegPowerState);
-
-	pci_push(base);
-	udelay(10);
-	writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID, base + NvRegPowerState);
-
-	nv_disable_hw_interrupts(dev, np->irqmask);
-	pci_push(base);
-	writel(NVREG_MIISTAT_MASK2, base + NvRegMIIStatus);
-	writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-	pci_push(base);
-
-	if (!np->ecdev) {
-		if (nv_request_irq(dev)) {
-			goto out_drain;
-        }
-
-		/* ask for interrupts */
-		nv_enable_hw_interrupts(dev, np->irqmask);
-
-		spin_lock_irq(&np->lock);
-	}
-
-	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
-	writel(0, base + NvRegMulticastAddrB);
-	writel(0, base + NvRegMulticastMaskA);
-	writel(0, base + NvRegMulticastMaskB);
-	writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);
-	/* One manual link speed update: Interrupts are enabled, future link
-	 * speed changes cause interrupts and are handled by nv_link_irq().
-	 */
-	{
-		u32 miistat;
-		miistat = readl(base + NvRegMIIStatus);
-		writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-		dprintk(KERN_INFO "startup: got 0x%08x.\n", miistat);
-	}
-	/* set linkspeed to invalid value, thus force nv_update_linkspeed
-	 * to init hw */
-	np->linkspeed = 0;
-	ret = nv_update_linkspeed(dev);
-	nv_start_rx(dev);
-	nv_start_tx(dev);
-
-	if (np->ecdev) {
-		ecdev_set_link(np->ecdev, ret);
-	}
-	else {
-		netif_start_queue(dev);
-		if (ret) {
-			netif_carrier_on(dev);
-		} else {
-			printk("%s: no link during initialization.\n", dev->name);
-			netif_carrier_off(dev);
-		}
-		if (oom)
-			mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-        spin_unlock_irq(&np->lock);
-	}
-
-	return 0;
-out_drain:
-	drain_ring(dev);
-	return ret;
-}
-
-static int nv_close(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base;
-
-	if (!np->ecdev) {
-		spin_lock_irq(&np->lock);
-		np->in_shutdown = 1;
-		spin_unlock_irq(&np->lock);
-		synchronize_irq(dev->irq);
-
-		del_timer_sync(&np->oom_kick);
-		del_timer_sync(&np->nic_poll);
-
-		netif_stop_queue(dev);
-		spin_lock_irq(&np->lock);
-	}
-
-	nv_stop_tx(dev);
-	nv_stop_rx(dev);
-	nv_txrx_reset(dev);
-
-    base = get_hwbase(dev);
-
-	if (!np->ecdev) {
-		/* disable interrupts on the nic or we will lock up */
-		nv_disable_hw_interrupts(dev, np->irqmask);
-		pci_push(base);
-		dprintk(KERN_INFO "%s: Irqmask is zero again\n", dev->name);
-
-		spin_unlock_irq(&np->lock);
-
-		nv_free_irq(dev);
-	}
-
-	drain_ring(dev);
-
-	if (np->wolenabled)
-		nv_start_rx(dev);
-
-	/* special op: write back the misordered MAC address - otherwise
-	 * the next nv_probe would see a wrong address.
-	 */
-	writel(np->orig_mac[0], base + NvRegMacAddrA);
-	writel(np->orig_mac[1], base + NvRegMacAddrB);
-
-	/* FIXME: power down nic */
-
-	return 0;
-}
-
-static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
-{
-	struct net_device *dev;
-	struct fe_priv *np;
-	unsigned long addr;
-	u8 __iomem *base;
-	int err, i;
-	u32 powerstate;
-
-    board_idx++;
-
-	dev = alloc_etherdev(sizeof(struct fe_priv));
-	err = -ENOMEM;
-	if (!dev)
-		goto out;
-
-	np = netdev_priv(dev);
-	np->pci_dev = pci_dev;
-	spin_lock_init(&np->lock);
-	SET_MODULE_OWNER(dev);
-	SET_NETDEV_DEV(dev, &pci_dev->dev);
-
-	init_timer(&np->oom_kick);
-	np->oom_kick.data = (unsigned long) dev;
-	np->oom_kick.function = &nv_do_rx_refill;	/* timer handler */
-	init_timer(&np->nic_poll);
-	np->nic_poll.data = (unsigned long) dev;
-	np->nic_poll.function = &nv_do_nic_poll;	/* timer handler */
-
-	err = pci_enable_device(pci_dev);
-	if (err) {
-		printk(KERN_INFO "forcedeth: pci_enable_dev failed (%d) for device %s\n",
-				err, pci_name(pci_dev));
-		goto out_free;
-	}
-
-	pci_set_master(pci_dev);
-
-	err = pci_request_regions(pci_dev, DRV_NAME);
-	if (err < 0)
-		goto out_disable;
-
-	if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL))
-		np->register_size = NV_PCI_REGSZ_VER2;
-	else
-		np->register_size = NV_PCI_REGSZ_VER1;
-
-	err = -EINVAL;
-	addr = 0;
-	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
-		dprintk(KERN_DEBUG "%s: resource %d start %p len %ld flags 0x%08lx.\n",
-				pci_name(pci_dev), i, (void*)pci_resource_start(pci_dev, i),
-				pci_resource_len(pci_dev, i),
-				pci_resource_flags(pci_dev, i));
-		if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM &&
-				pci_resource_len(pci_dev, i) >= np->register_size) {
-			addr = pci_resource_start(pci_dev, i);
-			break;
-		}
-	}
-	if (i == DEVICE_COUNT_RESOURCE) {
-		printk(KERN_INFO "forcedeth: Couldn't find register window for device %s.\n",
-					pci_name(pci_dev));
-		goto out_relreg;
-	}
-
-	/* copy of driver data */
-	np->driver_data = id->driver_data;
-
-	/* handle different descriptor versions */
-	if (id->driver_data & DEV_HAS_HIGH_DMA) {
-		/* packet format 3: supports 40-bit addressing */
-		np->desc_ver = DESC_VER_3;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_3;
-		if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) {
-			printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n",
-					pci_name(pci_dev));
-		} else {
-			dev->features |= NETIF_F_HIGHDMA;
-			printk(KERN_INFO "forcedeth: using HIGHDMA\n");
-		}
-		if (pci_set_consistent_dma_mask(pci_dev, 0x0000007fffffffffULL)) {
-			printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed for device %s.\n",
-			       pci_name(pci_dev));
-		}
-	} else if (id->driver_data & DEV_HAS_LARGEDESC) {
-		/* packet format 2: supports jumbo frames */
-		np->desc_ver = DESC_VER_2;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_2;
-	} else {
-		/* original packet format */
-		np->desc_ver = DESC_VER_1;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_1;
-	}
-
-	np->pkt_limit = NV_PKTLIMIT_1;
-	if (id->driver_data & DEV_HAS_LARGEDESC)
-		np->pkt_limit = NV_PKTLIMIT_2;
-
-	if (id->driver_data & DEV_HAS_CHECKSUM) {
-		np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK;
-		dev->features |= NETIF_F_HW_CSUM | NETIF_F_SG;
-#ifdef NETIF_F_TSO
-		dev->features |= NETIF_F_TSO;
-#endif
- 	}
-
-	np->vlanctl_bits = 0;
-	if (id->driver_data & DEV_HAS_VLAN) {
-		np->vlanctl_bits = NVREG_VLANCONTROL_ENABLE;
-		dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX;
-		dev->vlan_rx_register = nv_vlan_rx_register;
-		dev->vlan_rx_kill_vid = nv_vlan_rx_kill_vid;
-	}
-
-	np->msi_flags = 0;
-	if ((id->driver_data & DEV_HAS_MSI) && !disable_msi) {
-		np->msi_flags |= NV_MSI_CAPABLE;
-	}
-	if ((id->driver_data & DEV_HAS_MSI_X) && !disable_msix) {
-		np->msi_flags |= NV_MSI_X_CAPABLE;
-	}
-
-	err = -ENOMEM;
-	np->base = ioremap(addr, np->register_size);
-	if (!np->base)
-		goto out_relreg;
-	dev->base_addr = (unsigned long)np->base;
-
-	dev->irq = pci_dev->irq;
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->rx_ring.orig = pci_alloc_consistent(pci_dev,
-					sizeof(struct ring_desc) * (RX_RING + TX_RING),
-					&np->ring_addr);
-		if (!np->rx_ring.orig)
-			goto out_unmap;
-		np->tx_ring.orig = &np->rx_ring.orig[RX_RING];
-	} else {
-		np->rx_ring.ex = pci_alloc_consistent(pci_dev,
-					sizeof(struct ring_desc_ex) * (RX_RING + TX_RING),
-					&np->ring_addr);
-		if (!np->rx_ring.ex)
-			goto out_unmap;
-		np->tx_ring.ex = &np->rx_ring.ex[RX_RING];
-	}
-
-	dev->open = nv_open;
-	dev->stop = nv_close;
-	dev->hard_start_xmit = nv_start_xmit;
-	dev->get_stats = nv_get_stats;
-	dev->change_mtu = nv_change_mtu;
-	dev->set_mac_address = nv_set_mac_address;
-	dev->set_multicast_list = nv_set_multicast;
-#ifdef CONFIG_NET_POLL_CONTROLLER
-	dev->poll_controller = nv_poll_controller;
-#endif
-	SET_ETHTOOL_OPS(dev, &ops);
-	dev->tx_timeout = nv_tx_timeout;
-	dev->watchdog_timeo = NV_WATCHDOG_TIMEO;
-
-	pci_set_drvdata(pci_dev, dev);
-
-	/* read the mac address */
-	base = get_hwbase(dev);
-	np->orig_mac[0] = readl(base + NvRegMacAddrA);
-	np->orig_mac[1] = readl(base + NvRegMacAddrB);
-
-	dev->dev_addr[0] = (np->orig_mac[1] >>  8) & 0xff;
-	dev->dev_addr[1] = (np->orig_mac[1] >>  0) & 0xff;
-	dev->dev_addr[2] = (np->orig_mac[0] >> 24) & 0xff;
-	dev->dev_addr[3] = (np->orig_mac[0] >> 16) & 0xff;
-	dev->dev_addr[4] = (np->orig_mac[0] >>  8) & 0xff;
-	dev->dev_addr[5] = (np->orig_mac[0] >>  0) & 0xff;
-	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
-
-	if (!is_valid_ether_addr(dev->perm_addr)) {
-		/*
-		 * Bad mac address. At least one bios sets the mac address
-		 * to 01:23:45:67:89:ab
-		 */
-		printk(KERN_ERR "%s: Invalid Mac address detected: %02x:%02x:%02x:%02x:%02x:%02x\n",
-			pci_name(pci_dev),
-			dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
-			dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
-		printk(KERN_ERR "Please complain to your hardware vendor. Switching to a random MAC.\n");
-		dev->dev_addr[0] = 0x00;
-		dev->dev_addr[1] = 0x00;
-		dev->dev_addr[2] = 0x6c;
-		get_random_bytes(&dev->dev_addr[3], 3);
-	}
-
-	dprintk(KERN_DEBUG "%s: MAC Address %02x:%02x:%02x:%02x:%02x:%02x\n", pci_name(pci_dev),
-			dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
-			dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
-
-	/* disable WOL */
-	writel(0, base + NvRegWakeUpFlags);
-	np->wolenabled = 0;
-
-	if (id->driver_data & DEV_HAS_POWER_CNTRL) {
-		u8 revision_id;
-		pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id);
-
-		/* take phy and nic out of low power mode */
-		powerstate = readl(base + NvRegPowerState2);
-		powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK;
-		if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 ||
-		     id->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) &&
-		    revision_id >= 0xA3)
-			powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3;
-		writel(powerstate, base + NvRegPowerState2);
-	}
-
-	if (np->desc_ver == DESC_VER_1) {
-		np->tx_flags = NV_TX_VALID;
-	} else {
-		np->tx_flags = NV_TX2_VALID;
-	}
-	if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) {
-		np->irqmask = NVREG_IRQMASK_THROUGHPUT;
-		if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
-			np->msi_flags |= 0x0003;
-	} else {
-		np->irqmask = NVREG_IRQMASK_CPU;
-		if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
-			np->msi_flags |= 0x0001;
-	}
-
-	if (id->driver_data & DEV_NEED_TIMERIRQ)
-		np->irqmask |= NVREG_IRQ_TIMER;
-	if (id->driver_data & DEV_NEED_LINKTIMER) {
-		dprintk(KERN_INFO "%s: link timer on.\n", pci_name(pci_dev));
-		np->need_linktimer = 1;
-		np->link_timeout = jiffies + LINK_TIMEOUT;
-	} else {
-		dprintk(KERN_INFO "%s: link timer off.\n", pci_name(pci_dev));
-		np->need_linktimer = 0;
-	}
-
-	/* find a suitable phy */
-	for (i = 1; i <= 32; i++) {
-		int id1, id2;
-		int phyaddr = i & 0x1F;
-
-		spin_lock_irq(&np->lock);
-		id1 = mii_rw(dev, phyaddr, MII_PHYSID1, MII_READ);
-		spin_unlock_irq(&np->lock);
-		if (id1 < 0 || id1 == 0xffff)
-			continue;
-		spin_lock_irq(&np->lock);
-		id2 = mii_rw(dev, phyaddr, MII_PHYSID2, MII_READ);
-		spin_unlock_irq(&np->lock);
-		if (id2 < 0 || id2 == 0xffff)
-			continue;
-
-		id1 = (id1 & PHYID1_OUI_MASK) << PHYID1_OUI_SHFT;
-		id2 = (id2 & PHYID2_OUI_MASK) >> PHYID2_OUI_SHFT;
-		dprintk(KERN_DEBUG "%s: open: Found PHY %04x:%04x at address %d.\n",
-			pci_name(pci_dev), id1, id2, phyaddr);
-		np->phyaddr = phyaddr;
-		np->phy_oui = id1 | id2;
-		break;
-	}
-	if (i == 33) {
-		printk(KERN_INFO "%s: open: Could not find a valid PHY.\n",
-		       pci_name(pci_dev));
-		goto out_freering;
-	}
-	
-	/* reset it */
-	phy_init(dev);
-
-	/* set default link speed settings */
-	np->linkspeed = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-	np->duplex = 0;
-	np->autoneg = 1;
-
-	// offer device to EtherCAT master module
-	if (ecdev_offer(dev, ec_poll, THIS_MODULE, &np->ecdev)) {
-		printk(KERN_ERR "forcedeth: Failed to offer device.\n");
-		goto out_freering;
-	}
-
-	if (np->ecdev) {
-		if (ecdev_open(np->ecdev)) {
-			ecdev_withdraw(np->ecdev);
-			goto out_freering;
-		}
-	}
-	else {
-		err = register_netdev(dev);
-		if (err) {
-			printk(KERN_INFO "forcedeth: unable to register netdev: %d\n", err);
-			goto out_freering;
-		}
-	}
-	printk(KERN_INFO "%s: forcedeth.c: subsystem: %05x:%04x bound to %s\n",
-			dev->name, pci_dev->subsystem_vendor, pci_dev->subsystem_device,
-			pci_name(pci_dev));
-
-	return 0;
-
-out_freering:
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-		pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING),
-				    np->rx_ring.orig, np->ring_addr);
-	else
-		pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (RX_RING + TX_RING),
-				    np->rx_ring.ex, np->ring_addr);
-	pci_set_drvdata(pci_dev, NULL);
-out_unmap:
-	iounmap(get_hwbase(dev));
-out_relreg:
-	pci_release_regions(pci_dev);
-out_disable:
-	pci_disable_device(pci_dev);
-out_free:
-	free_netdev(dev);
-out:
-	return err;
-}
-
-static void __devexit nv_remove(struct pci_dev *pci_dev)
-{
-	struct net_device *dev = pci_get_drvdata(pci_dev);
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (np->ecdev) {
-		ecdev_close(np->ecdev);
-		ecdev_withdraw(np->ecdev);
-	}
-	else {
-		unregister_netdev(dev);
-	}
-
-	/* free all structures */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-		pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING), np->rx_ring.orig, np->ring_addr);
-	else
-		pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (RX_RING + TX_RING), np->rx_ring.ex, np->ring_addr);
-	iounmap(get_hwbase(dev));
-	pci_release_regions(pci_dev);
-	pci_disable_device(pci_dev);
-	free_netdev(dev);
-	pci_set_drvdata(pci_dev, NULL);
-}
-
-static struct pci_device_id pci_tbl[] = {
-	{	/* nForce Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_1),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce2 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_2),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_3),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_4),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_5),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_6),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_7),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* CK804 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_8),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* CK804 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_9),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP04 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_10),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP04 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_11),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP51 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL,
-	},
-	{	/* MCP51 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL,
-	},
-	{	/* MCP55 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL,
-	},
-	{	/* MCP55 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL,
-	},
-	{0,},
-};
-
-static struct pci_driver driver = {
-	.name = "forcedeth",
-	.id_table = pci_tbl,
-	.probe = nv_probe,
-	.remove = __devexit_p(nv_remove),
-};
-
-
-static int __init init_nic(void)
-{
-	printk(KERN_INFO "forcedeth: EtherCAT-capable nForce ethernet driver."
-			" Version %s, master %s.\n",
-            FORCEDETH_VERSION, EC_MASTER_VERSION);
-	return pci_module_init(&driver);
-}
-
-static void __exit exit_nic(void)
-{
-	pci_unregister_driver(&driver);
-}
-
-module_param(max_interrupt_work, int, 0);
-MODULE_PARM_DESC(max_interrupt_work, "forcedeth maximum events handled per interrupt");
-module_param(optimization_mode, int, 0);
-MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer.");
-module_param(poll_interval, int, 0);
-MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535.");
-module_param(disable_msi, int, 0);
-MODULE_PARM_DESC(disable_msi, "Disable MSI interrupts by setting to 1.");
-module_param(disable_msix, int, 0);
-MODULE_PARM_DESC(disable_msix, "Disable MSIX interrupts by setting to 1.");
-
-MODULE_AUTHOR("Dipl.-Ing. (FH) Florian Pose <fp@igh-essen.com>");
-MODULE_DESCRIPTION("EtherCAT-capable nForce ethernet driver");
-MODULE_LICENSE("GPL");
-
-//MODULE_DEVICE_TABLE(pci, pci_tbl); // prevent auto-loading
-
-module_init(init_nic);
-module_exit(exit_nic);
--- a/devices/forcedeth-2.6.17-orig.c	Mon Jul 28 08:30:44 2008 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,3423 +0,0 @@
-/*
- * forcedeth: Ethernet driver for NVIDIA nForce media access controllers.
- *
- * Note: This driver is a cleanroom reimplementation based on reverse
- *      engineered documentation written by Carl-Daniel Hailfinger
- *      and Andrew de Quincey. It's neither supported nor endorsed
- *      by NVIDIA Corp. Use at your own risk.
- *
- * NVIDIA, nForce and other NVIDIA marks are trademarks or registered
- * trademarks of NVIDIA Corporation in the United States and other
- * countries.
- *
- * Copyright (C) 2003,4,5 Manfred Spraul
- * Copyright (C) 2004 Andrew de Quincey (wol support)
- * Copyright (C) 2004 Carl-Daniel Hailfinger (invalid MAC handling, insane
- *		IRQ rate fixes, bigendian fixes, cleanups, verification)
- * Copyright (c) 2004 NVIDIA Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- * Changelog:
- * 	0.01: 05 Oct 2003: First release that compiles without warnings.
- * 	0.02: 05 Oct 2003: Fix bug for nv_drain_tx: do not try to free NULL skbs.
- * 			   Check all PCI BARs for the register window.
- * 			   udelay added to mii_rw.
- * 	0.03: 06 Oct 2003: Initialize dev->irq.
- * 	0.04: 07 Oct 2003: Initialize np->lock, reduce handled irqs, add printks.
- * 	0.05: 09 Oct 2003: printk removed again, irq status print tx_timeout.
- * 	0.06: 10 Oct 2003: MAC Address read updated, pff flag generation updated,
- * 			   irq mask updated
- * 	0.07: 14 Oct 2003: Further irq mask updates.
- * 	0.08: 20 Oct 2003: rx_desc.Length initialization added, nv_alloc_rx refill
- * 			   added into irq handler, NULL check for drain_ring.
- * 	0.09: 20 Oct 2003: Basic link speed irq implementation. Only handle the
- * 			   requested interrupt sources.
- * 	0.10: 20 Oct 2003: First cleanup for release.
- * 	0.11: 21 Oct 2003: hexdump for tx added, rx buffer sizes increased.
- * 			   MAC Address init fix, set_multicast cleanup.
- * 	0.12: 23 Oct 2003: Cleanups for release.
- * 	0.13: 25 Oct 2003: Limit for concurrent tx packets increased to 10.
- * 			   Set link speed correctly. start rx before starting
- * 			   tx (nv_start_rx sets the link speed).
- * 	0.14: 25 Oct 2003: Nic dependant irq mask.
- * 	0.15: 08 Nov 2003: fix smp deadlock with set_multicast_list during
- * 			   open.
- * 	0.16: 15 Nov 2003: include file cleanup for ppc64, rx buffer size
- * 			   increased to 1628 bytes.
- * 	0.17: 16 Nov 2003: undo rx buffer size increase. Substract 1 from
- * 			   the tx length.
- * 	0.18: 17 Nov 2003: fix oops due to late initialization of dev_stats
- * 	0.19: 29 Nov 2003: Handle RxNoBuf, detect & handle invalid mac
- * 			   addresses, really stop rx if already running
- * 			   in nv_start_rx, clean up a bit.
- * 	0.20: 07 Dec 2003: alloc fixes
- * 	0.21: 12 Jan 2004: additional alloc fix, nic polling fix.
- *	0.22: 19 Jan 2004: reprogram timer to a sane rate, avoid lockup
- *			   on close.
- *	0.23: 26 Jan 2004: various small cleanups
- *	0.24: 27 Feb 2004: make driver even less anonymous in backtraces
- *	0.25: 09 Mar 2004: wol support
- *	0.26: 03 Jun 2004: netdriver specific annotation, sparse-related fixes
- *	0.27: 19 Jun 2004: Gigabit support, new descriptor rings,
- *			   added CK804/MCP04 device IDs, code fixes
- *			   for registers, link status and other minor fixes.
- *	0.28: 21 Jun 2004: Big cleanup, making driver mostly endian safe
- *	0.29: 31 Aug 2004: Add backup timer for link change notification.
- *	0.30: 25 Sep 2004: rx checksum support for nf 250 Gb. Add rx reset
- *			   into nv_close, otherwise reenabling for wol can
- *			   cause DMA to kfree'd memory.
- *	0.31: 14 Nov 2004: ethtool support for getting/setting link
- *			   capabilities.
- *	0.32: 16 Apr 2005: RX_ERROR4 handling added.
- *	0.33: 16 May 2005: Support for MCP51 added.
- *	0.34: 18 Jun 2005: Add DEV_NEED_LINKTIMER to all nForce nics.
- *	0.35: 26 Jun 2005: Support for MCP55 added.
- *	0.36: 28 Jun 2005: Add jumbo frame support.
- *	0.37: 10 Jul 2005: Additional ethtool support, cleanup of pci id list
- *	0.38: 16 Jul 2005: tx irq rewrite: Use global flags instead of
- *			   per-packet flags.
- *	0.39: 18 Jul 2005: Add 64bit descriptor support.
- *	0.40: 19 Jul 2005: Add support for mac address change.
- *	0.41: 30 Jul 2005: Write back original MAC in nv_close instead
- *			   of nv_remove
- *	0.42: 06 Aug 2005: Fix lack of link speed initialization
- *			   in the second (and later) nv_open call
- *	0.43: 10 Aug 2005: Add support for tx checksum.
- *	0.44: 20 Aug 2005: Add support for scatter gather and segmentation.
- *	0.45: 18 Sep 2005: Remove nv_stop/start_rx from every link check
- *	0.46: 20 Oct 2005: Add irq optimization modes.
- *	0.47: 26 Oct 2005: Add phyaddr 0 in phy scan.
- *	0.48: 24 Dec 2005: Disable TSO, bugfix for pci_map_single
- *	0.49: 10 Dec 2005: Fix tso for large buffers.
- *	0.50: 20 Jan 2006: Add 8021pq tagging support.
- *	0.51: 20 Jan 2006: Add 64bit consistent memory allocation for rings.
- *	0.52: 20 Jan 2006: Add MSI/MSIX support.
- *	0.53: 19 Mar 2006: Fix init from low power mode and add hw reset.
- *	0.54: 21 Mar 2006: Fix spin locks for multi irqs and cleanup.
- *
- * Known bugs:
- * We suspect that on some hardware no TX done interrupts are generated.
- * This means recovery from netif_stop_queue only happens if the hw timer
- * interrupt fires (100 times/second, configurable with NVREG_POLL_DEFAULT)
- * and the timer is active in the IRQMask, or if a rx packet arrives by chance.
- * If your hardware reliably generates tx done interrupts, then you can remove
- * DEV_NEED_TIMERIRQ from the driver_data flags.
- * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few
- * superfluous timer interrupts from the nic.
- */
-#define FORCEDETH_VERSION		"0.54"
-#define DRV_NAME			"forcedeth"
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/delay.h>
-#include <linux/spinlock.h>
-#include <linux/ethtool.h>
-#include <linux/timer.h>
-#include <linux/skbuff.h>
-#include <linux/mii.h>
-#include <linux/random.h>
-#include <linux/init.h>
-#include <linux/if_vlan.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#if 0
-#define dprintk			printk
-#else
-#define dprintk(x...)		do { } while (0)
-#endif
-
-
-/*
- * Hardware access:
- */
-
-#define DEV_NEED_TIMERIRQ	0x0001  /* set the timer irq flag in the irq mask */
-#define DEV_NEED_LINKTIMER	0x0002	/* poll link settings. Relies on the timer irq */
-#define DEV_HAS_LARGEDESC	0x0004	/* device supports jumbo frames and needs packet format 2 */
-#define DEV_HAS_HIGH_DMA        0x0008  /* device supports 64bit dma */
-#define DEV_HAS_CHECKSUM        0x0010  /* device supports tx and rx checksum offloads */
-#define DEV_HAS_VLAN            0x0020  /* device supports vlan tagging and striping */
-#define DEV_HAS_MSI             0x0040  /* device supports MSI */
-#define DEV_HAS_MSI_X           0x0080  /* device supports MSI-X */
-#define DEV_HAS_POWER_CNTRL     0x0100  /* device supports power savings */
-
-enum {
-	NvRegIrqStatus = 0x000,
-#define NVREG_IRQSTAT_MIIEVENT	0x040
-#define NVREG_IRQSTAT_MASK		0x1ff
-	NvRegIrqMask = 0x004,
-#define NVREG_IRQ_RX_ERROR		0x0001
-#define NVREG_IRQ_RX			0x0002
-#define NVREG_IRQ_RX_NOBUF		0x0004
-#define NVREG_IRQ_TX_ERR		0x0008
-#define NVREG_IRQ_TX_OK			0x0010
-#define NVREG_IRQ_TIMER			0x0020
-#define NVREG_IRQ_LINK			0x0040
-#define NVREG_IRQ_RX_FORCED		0x0080
-#define NVREG_IRQ_TX_FORCED		0x0100
-#define NVREG_IRQMASK_THROUGHPUT	0x00df
-#define NVREG_IRQMASK_CPU		0x0040
-#define NVREG_IRQ_TX_ALL		(NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
-#define NVREG_IRQ_RX_ALL		(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED)
-#define NVREG_IRQ_OTHER			(NVREG_IRQ_TIMER|NVREG_IRQ_LINK)
-
-#define NVREG_IRQ_UNKNOWN	(~(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_TX_ERR| \
-					NVREG_IRQ_TX_OK|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RX_FORCED| \
-					NVREG_IRQ_TX_FORCED))
-
-	NvRegUnknownSetupReg6 = 0x008,
-#define NVREG_UNKSETUP6_VAL		3
-
-/*
- * NVREG_POLL_DEFAULT is the interval length of the timer source on the nic
- * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms
- */
-	NvRegPollingInterval = 0x00c,
-#define NVREG_POLL_DEFAULT_THROUGHPUT	970
-#define NVREG_POLL_DEFAULT_CPU	13
-	NvRegMSIMap0 = 0x020,
-	NvRegMSIMap1 = 0x024,
-	NvRegMSIIrqMask = 0x030,
-#define NVREG_MSI_VECTOR_0_ENABLED 0x01
-	NvRegMisc1 = 0x080,
-#define NVREG_MISC1_HD		0x02
-#define NVREG_MISC1_FORCE	0x3b0f3c
-
-	NvRegMacReset = 0x3c,
-#define NVREG_MAC_RESET_ASSERT	0x0F3
-	NvRegTransmitterControl = 0x084,
-#define NVREG_XMITCTL_START	0x01
-	NvRegTransmitterStatus = 0x088,
-#define NVREG_XMITSTAT_BUSY	0x01
-
-	NvRegPacketFilterFlags = 0x8c,
-#define NVREG_PFF_ALWAYS	0x7F0008
-#define NVREG_PFF_PROMISC	0x80
-#define NVREG_PFF_MYADDR	0x20
-
-	NvRegOffloadConfig = 0x90,
-#define NVREG_OFFLOAD_HOMEPHY	0x601
-#define NVREG_OFFLOAD_NORMAL	RX_NIC_BUFSIZE
-	NvRegReceiverControl = 0x094,
-#define NVREG_RCVCTL_START	0x01
-	NvRegReceiverStatus = 0x98,
-#define NVREG_RCVSTAT_BUSY	0x01
-
-	NvRegRandomSeed = 0x9c,
-#define NVREG_RNDSEED_MASK	0x00ff
-#define NVREG_RNDSEED_FORCE	0x7f00
-#define NVREG_RNDSEED_FORCE2	0x2d00
-#define NVREG_RNDSEED_FORCE3	0x7400
-
-	NvRegUnknownSetupReg1 = 0xA0,
-#define NVREG_UNKSETUP1_VAL	0x16070f
-	NvRegUnknownSetupReg2 = 0xA4,
-#define NVREG_UNKSETUP2_VAL	0x16
-	NvRegMacAddrA = 0xA8,
-	NvRegMacAddrB = 0xAC,
-	NvRegMulticastAddrA = 0xB0,
-#define NVREG_MCASTADDRA_FORCE	0x01
-	NvRegMulticastAddrB = 0xB4,
-	NvRegMulticastMaskA = 0xB8,
-	NvRegMulticastMaskB = 0xBC,
-
-	NvRegPhyInterface = 0xC0,
-#define PHY_RGMII		0x10000000
-
-	NvRegTxRingPhysAddr = 0x100,
-	NvRegRxRingPhysAddr = 0x104,
-	NvRegRingSizes = 0x108,
-#define NVREG_RINGSZ_TXSHIFT 0
-#define NVREG_RINGSZ_RXSHIFT 16
-	NvRegUnknownTransmitterReg = 0x10c,
-	NvRegLinkSpeed = 0x110,
-#define NVREG_LINKSPEED_FORCE 0x10000
-#define NVREG_LINKSPEED_10	1000
-#define NVREG_LINKSPEED_100	100
-#define NVREG_LINKSPEED_1000	50
-#define NVREG_LINKSPEED_MASK	(0xFFF)
-	NvRegUnknownSetupReg5 = 0x130,
-#define NVREG_UNKSETUP5_BIT31	(1<<31)
-	NvRegUnknownSetupReg3 = 0x13c,
-#define NVREG_UNKSETUP3_VAL1	0x200010
-	NvRegTxRxControl = 0x144,
-#define NVREG_TXRXCTL_KICK	0x0001
-#define NVREG_TXRXCTL_BIT1	0x0002
-#define NVREG_TXRXCTL_BIT2	0x0004
-#define NVREG_TXRXCTL_IDLE	0x0008
-#define NVREG_TXRXCTL_RESET	0x0010
-#define NVREG_TXRXCTL_RXCHECK	0x0400
-#define NVREG_TXRXCTL_DESC_1	0
-#define NVREG_TXRXCTL_DESC_2	0x02100
-#define NVREG_TXRXCTL_DESC_3	0x02200
-#define NVREG_TXRXCTL_VLANSTRIP 0x00040
-#define NVREG_TXRXCTL_VLANINS	0x00080
-	NvRegTxRingPhysAddrHigh = 0x148,
-	NvRegRxRingPhysAddrHigh = 0x14C,
-	NvRegMIIStatus = 0x180,
-#define NVREG_MIISTAT_ERROR		0x0001
-#define NVREG_MIISTAT_LINKCHANGE	0x0008
-#define NVREG_MIISTAT_MASK		0x000f
-#define NVREG_MIISTAT_MASK2		0x000f
-	NvRegUnknownSetupReg4 = 0x184,
-#define NVREG_UNKSETUP4_VAL	8
-
-	NvRegAdapterControl = 0x188,
-#define NVREG_ADAPTCTL_START	0x02
-#define NVREG_ADAPTCTL_LINKUP	0x04
-#define NVREG_ADAPTCTL_PHYVALID	0x40000
-#define NVREG_ADAPTCTL_RUNNING	0x100000
-#define NVREG_ADAPTCTL_PHYSHIFT	24
-	NvRegMIISpeed = 0x18c,
-#define NVREG_MIISPEED_BIT8	(1<<8)
-#define NVREG_MIIDELAY	5
-	NvRegMIIControl = 0x190,
-#define NVREG_MIICTL_INUSE	0x08000
-#define NVREG_MIICTL_WRITE	0x00400
-#define NVREG_MIICTL_ADDRSHIFT	5
-	NvRegMIIData = 0x194,
-	NvRegWakeUpFlags = 0x200,
-#define NVREG_WAKEUPFLAGS_VAL		0x7770
-#define NVREG_WAKEUPFLAGS_BUSYSHIFT	24
-#define NVREG_WAKEUPFLAGS_ENABLESHIFT	16
-#define NVREG_WAKEUPFLAGS_D3SHIFT	12
-#define NVREG_WAKEUPFLAGS_D2SHIFT	8
-#define NVREG_WAKEUPFLAGS_D1SHIFT	4
-#define NVREG_WAKEUPFLAGS_D0SHIFT	0
-#define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT		0x01
-#define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT	0x02
-#define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE	0x04
-#define NVREG_WAKEUPFLAGS_ENABLE	0x1111
-
-	NvRegPatternCRC = 0x204,
-	NvRegPatternMask = 0x208,
-	NvRegPowerCap = 0x268,
-#define NVREG_POWERCAP_D3SUPP	(1<<30)
-#define NVREG_POWERCAP_D2SUPP	(1<<26)
-#define NVREG_POWERCAP_D1SUPP	(1<<25)
-	NvRegPowerState = 0x26c,
-#define NVREG_POWERSTATE_POWEREDUP	0x8000
-#define NVREG_POWERSTATE_VALID		0x0100
-#define NVREG_POWERSTATE_MASK		0x0003
-#define NVREG_POWERSTATE_D0		0x0000
-#define NVREG_POWERSTATE_D1		0x0001
-#define NVREG_POWERSTATE_D2		0x0002
-#define NVREG_POWERSTATE_D3		0x0003
-	NvRegVlanControl = 0x300,
-#define NVREG_VLANCONTROL_ENABLE	0x2000
-	NvRegMSIXMap0 = 0x3e0,
-	NvRegMSIXMap1 = 0x3e4,
-	NvRegMSIXIrqStatus = 0x3f0,
-
-	NvRegPowerState2 = 0x600,
-#define NVREG_POWERSTATE2_POWERUP_MASK		0x0F11
-#define NVREG_POWERSTATE2_POWERUP_REV_A3	0x0001
-};
-
-/* Big endian: should work, but is untested */
-struct ring_desc {
-	u32 PacketBuffer;
-	u32 FlagLen;
-};
-
-struct ring_desc_ex {
-	u32 PacketBufferHigh;
-	u32 PacketBufferLow;
-	u32 TxVlan;
-	u32 FlagLen;
-};
-
-typedef union _ring_type {
-	struct ring_desc* orig;
-	struct ring_desc_ex* ex;
-} ring_type;
-
-#define FLAG_MASK_V1 0xffff0000
-#define FLAG_MASK_V2 0xffffc000
-#define LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1)
-#define LEN_MASK_V2 (0xffffffff ^ FLAG_MASK_V2)
-
-#define NV_TX_LASTPACKET	(1<<16)
-#define NV_TX_RETRYERROR	(1<<19)
-#define NV_TX_FORCED_INTERRUPT	(1<<24)
-#define NV_TX_DEFERRED		(1<<26)
-#define NV_TX_CARRIERLOST	(1<<27)
-#define NV_TX_LATECOLLISION	(1<<28)
-#define NV_TX_UNDERFLOW		(1<<29)
-#define NV_TX_ERROR		(1<<30)
-#define NV_TX_VALID		(1<<31)
-
-#define NV_TX2_LASTPACKET	(1<<29)
-#define NV_TX2_RETRYERROR	(1<<18)
-#define NV_TX2_FORCED_INTERRUPT	(1<<30)
-#define NV_TX2_DEFERRED		(1<<25)
-#define NV_TX2_CARRIERLOST	(1<<26)
-#define NV_TX2_LATECOLLISION	(1<<27)
-#define NV_TX2_UNDERFLOW	(1<<28)
-/* error and valid are the same for both */
-#define NV_TX2_ERROR		(1<<30)
-#define NV_TX2_VALID		(1<<31)
-#define NV_TX2_TSO		(1<<28)
-#define NV_TX2_TSO_SHIFT	14
-#define NV_TX2_TSO_MAX_SHIFT	14
-#define NV_TX2_TSO_MAX_SIZE	(1<<NV_TX2_TSO_MAX_SHIFT)
-#define NV_TX2_CHECKSUM_L3	(1<<27)
-#define NV_TX2_CHECKSUM_L4	(1<<26)
-
-#define NV_TX3_VLAN_TAG_PRESENT (1<<18)
-
-#define NV_RX_DESCRIPTORVALID	(1<<16)
-#define NV_RX_MISSEDFRAME	(1<<17)
-#define NV_RX_SUBSTRACT1	(1<<18)
-#define NV_RX_ERROR1		(1<<23)
-#define NV_RX_ERROR2		(1<<24)
-#define NV_RX_ERROR3		(1<<25)
-#define NV_RX_ERROR4		(1<<26)
-#define NV_RX_CRCERR		(1<<27)
-#define NV_RX_OVERFLOW		(1<<28)
-#define NV_RX_FRAMINGERR	(1<<29)
-#define NV_RX_ERROR		(1<<30)
-#define NV_RX_AVAIL		(1<<31)
-
-#define NV_RX2_CHECKSUMMASK	(0x1C000000)
-#define NV_RX2_CHECKSUMOK1	(0x10000000)
-#define NV_RX2_CHECKSUMOK2	(0x14000000)
-#define NV_RX2_CHECKSUMOK3	(0x18000000)
-#define NV_RX2_DESCRIPTORVALID	(1<<29)
-#define NV_RX2_SUBSTRACT1	(1<<25)
-#define NV_RX2_ERROR1		(1<<18)
-#define NV_RX2_ERROR2		(1<<19)
-#define NV_RX2_ERROR3		(1<<20)
-#define NV_RX2_ERROR4		(1<<21)
-#define NV_RX2_CRCERR		(1<<22)
-#define NV_RX2_OVERFLOW		(1<<23)
-#define NV_RX2_FRAMINGERR	(1<<24)
-/* error and avail are the same for both */
-#define NV_RX2_ERROR		(1<<30)
-#define NV_RX2_AVAIL		(1<<31)
-
-#define NV_RX3_VLAN_TAG_PRESENT (1<<16)
-#define NV_RX3_VLAN_TAG_MASK	(0x0000FFFF)
-
-/* Miscelaneous hardware related defines: */
-#define NV_PCI_REGSZ_VER1      	0x270
-#define NV_PCI_REGSZ_VER2      	0x604
-
-/* various timeout delays: all in usec */
-#define NV_TXRX_RESET_DELAY	4
-#define NV_TXSTOP_DELAY1	10
-#define NV_TXSTOP_DELAY1MAX	500000
-#define NV_TXSTOP_DELAY2	100
-#define NV_RXSTOP_DELAY1	10
-#define NV_RXSTOP_DELAY1MAX	500000
-#define NV_RXSTOP_DELAY2	100
-#define NV_SETUP5_DELAY		5
-#define NV_SETUP5_DELAYMAX	50000
-#define NV_POWERUP_DELAY	5
-#define NV_POWERUP_DELAYMAX	5000
-#define NV_MIIBUSY_DELAY	50
-#define NV_MIIPHY_DELAY	10
-#define NV_MIIPHY_DELAYMAX	10000
-#define NV_MAC_RESET_DELAY	64
-
-#define NV_WAKEUPPATTERNS	5
-#define NV_WAKEUPMASKENTRIES	4
-
-/* General driver defaults */
-#define NV_WATCHDOG_TIMEO	(5*HZ)
-
-#define RX_RING		128
-#define TX_RING		256
-/* 
- * If your nic mysteriously hangs then try to reduce the limits
- * to 1/0: It might be required to set NV_TX_LASTPACKET in the
- * last valid ring entry. But this would be impossible to
- * implement - probably a disassembly error.
- */
-#define TX_LIMIT_STOP	255
-#define TX_LIMIT_START	254
-
-/* rx/tx mac addr + type + vlan + align + slack*/
-#define NV_RX_HEADERS		(64)
-/* even more slack. */
-#define NV_RX_ALLOC_PAD		(64)
-
-/* maximum mtu size */
-#define NV_PKTLIMIT_1	ETH_DATA_LEN	/* hard limit not known */
-#define NV_PKTLIMIT_2	9100	/* Actual limit according to NVidia: 9202 */
-
-#define OOM_REFILL	(1+HZ/20)
-#define POLL_WAIT	(1+HZ/100)
-#define LINK_TIMEOUT	(3*HZ)
-
-/* 
- * desc_ver values:
- * The nic supports three different descriptor types:
- * - DESC_VER_1: Original
- * - DESC_VER_2: support for jumbo frames.
- * - DESC_VER_3: 64-bit format.
- */
-#define DESC_VER_1	1
-#define DESC_VER_2	2
-#define DESC_VER_3	3
-
-/* PHY defines */
-#define PHY_OUI_MARVELL	0x5043
-#define PHY_OUI_CICADA	0x03f1
-#define PHYID1_OUI_MASK	0x03ff
-#define PHYID1_OUI_SHFT	6
-#define PHYID2_OUI_MASK	0xfc00
-#define PHYID2_OUI_SHFT	10
-#define PHY_INIT1	0x0f000
-#define PHY_INIT2	0x0e00
-#define PHY_INIT3	0x01000
-#define PHY_INIT4	0x0200
-#define PHY_INIT5	0x0004
-#define PHY_INIT6	0x02000
-#define PHY_GIGABIT	0x0100
-
-#define PHY_TIMEOUT	0x1
-#define PHY_ERROR	0x2
-
-#define PHY_100	0x1
-#define PHY_1000	0x2
-#define PHY_HALF	0x100
-
-/* FIXME: MII defines that should be added to <linux/mii.h> */
-#define MII_1000BT_CR	0x09
-#define MII_1000BT_SR	0x0a
-#define ADVERTISE_1000FULL	0x0200
-#define ADVERTISE_1000HALF	0x0100
-#define LPA_1000FULL	0x0800
-#define LPA_1000HALF	0x0400
-
-/* MSI/MSI-X defines */
-#define NV_MSI_X_MAX_VECTORS  8
-#define NV_MSI_X_VECTORS_MASK 0x000f
-#define NV_MSI_CAPABLE        0x0010
-#define NV_MSI_X_CAPABLE      0x0020
-#define NV_MSI_ENABLED        0x0040
-#define NV_MSI_X_ENABLED      0x0080
-
-#define NV_MSI_X_VECTOR_ALL   0x0
-#define NV_MSI_X_VECTOR_RX    0x0
-#define NV_MSI_X_VECTOR_TX    0x1
-#define NV_MSI_X_VECTOR_OTHER 0x2
-
-/*
- * SMP locking:
- * All hardware access under dev->priv->lock, except the performance
- * critical parts:
- * - rx is (pseudo-) lockless: it relies on the single-threading provided
- *	by the arch code for interrupts.
- * - tx setup is lockless: it relies on dev->xmit_lock. Actual submission
- *	needs dev->priv->lock :-(
- * - set_multicast_list: preparation lockless, relies on dev->xmit_lock.
- */
-
-/* in dev: base, irq */
-struct fe_priv {
-	spinlock_t lock;
-
-	/* General data:
-	 * Locking: spin_lock(&np->lock); */
-	struct net_device_stats stats;
-	int in_shutdown;
-	u32 linkspeed;
-	int duplex;
-	int autoneg;
-	int fixed_mode;
-	int phyaddr;
-	int wolenabled;
-	unsigned int phy_oui;
-	u16 gigabit;
-
-	/* General data: RO fields */
-	dma_addr_t ring_addr;
-	struct pci_dev *pci_dev;
-	u32 orig_mac[2];
-	u32 irqmask;
-	u32 desc_ver;
-	u32 txrxctl_bits;
-	u32 vlanctl_bits;
-	u32 driver_data;
-	u32 register_size;
-
-	void __iomem *base;
-
-	/* rx specific fields.
-	 * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
-	 */
-	ring_type rx_ring;
-	unsigned int cur_rx, refill_rx;
-	struct sk_buff *rx_skbuff[RX_RING];
-	dma_addr_t rx_dma[RX_RING];
-	unsigned int rx_buf_sz;
-	unsigned int pkt_limit;
-	struct timer_list oom_kick;
-	struct timer_list nic_poll;
-	u32 nic_poll_irq;
-
-	/* media detection workaround.
-	 * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
-	 */
-	int need_linktimer;
-	unsigned long link_timeout;
-	/*
-	 * tx specific fields.
-	 */
-	ring_type tx_ring;
-	unsigned int next_tx, nic_tx;
-	struct sk_buff *tx_skbuff[TX_RING];
-	dma_addr_t tx_dma[TX_RING];
-	unsigned int tx_dma_len[TX_RING];
-	u32 tx_flags;
-
-	/* vlan fields */
-	struct vlan_group *vlangrp;
-
-	/* msi/msi-x fields */
-	u32 msi_flags;
-	struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS];
-};
-
-/*
- * Maximum number of loops until we assume that a bit in the irq mask
- * is stuck. Overridable with module param.
- */
-static int max_interrupt_work = 5;
-
-/*
- * Optimization can be either throuput mode or cpu mode
- * 
- * Throughput Mode: Every tx and rx packet will generate an interrupt.
- * CPU Mode: Interrupts are controlled by a timer.
- */
-#define NV_OPTIMIZATION_MODE_THROUGHPUT 0
-#define NV_OPTIMIZATION_MODE_CPU        1
-static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT;
-
-/*
- * Poll interval for timer irq
- *
- * This interval determines how frequent an interrupt is generated.
- * The is value is determined by [(time_in_micro_secs * 100) / (2^10)]
- * Min = 0, and Max = 65535
- */
-static int poll_interval = -1;
-
-/*
- * Disable MSI interrupts
- */
-static int disable_msi = 0;
-
-/*
- * Disable MSIX interrupts
- */
-static int disable_msix = 0;
-
-static inline struct fe_priv *get_nvpriv(struct net_device *dev)
-{
-	return netdev_priv(dev);
-}
-
-static inline u8 __iomem *get_hwbase(struct net_device *dev)
-{
-	return ((struct fe_priv *)netdev_priv(dev))->base;
-}
-
-static inline void pci_push(u8 __iomem *base)
-{
-	/* force out pending posted writes */
-	readl(base);
-}
-
-static inline u32 nv_descr_getlength(struct ring_desc *prd, u32 v)
-{
-	return le32_to_cpu(prd->FlagLen)
-		& ((v == DESC_VER_1) ? LEN_MASK_V1 : LEN_MASK_V2);
-}
-
-static inline u32 nv_descr_getlength_ex(struct ring_desc_ex *prd, u32 v)
-{
-	return le32_to_cpu(prd->FlagLen) & LEN_MASK_V2;
-}
-
-static int reg_delay(struct net_device *dev, int offset, u32 mask, u32 target,
-				int delay, int delaymax, const char *msg)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	pci_push(base);
-	do {
-		udelay(delay);
-		delaymax -= delay;
-		if (delaymax < 0) {
-			if (msg)
-				printk(msg);
-			return 1;
-		}
-	} while ((readl(base + offset) & mask) != target);
-	return 0;
-}
-
-#define NV_SETUP_RX_RING 0x01
-#define NV_SETUP_TX_RING 0x02
-
-static void setup_hw_rings(struct net_device *dev, int rxtx_flags)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		if (rxtx_flags & NV_SETUP_RX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr);
-		}
-		if (rxtx_flags & NV_SETUP_TX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
-		}
-	} else {
-		if (rxtx_flags & NV_SETUP_RX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr);
-			writel((u32) (cpu_to_le64(np->ring_addr) >> 32), base + NvRegRxRingPhysAddrHigh);
-		}
-		if (rxtx_flags & NV_SETUP_TX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
-			writel((u32) (cpu_to_le64(np->ring_addr + RX_RING*sizeof(struct ring_desc_ex)) >> 32), base + NvRegTxRingPhysAddrHigh);
-		}
-	}
-}
-
-static int using_multi_irqs(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
-	    ((np->msi_flags & NV_MSI_X_ENABLED) &&
-	     ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1)))
-		return 0;
-	else
-		return 1;
-}
-
-static void nv_enable_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq(dev->irq);
-	} else {
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-	}
-}
-
-static void nv_disable_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq(dev->irq);
-	} else {
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-	}
-}
-
-/* In MSIX mode, a write to irqmask behaves as XOR */
-static void nv_enable_hw_interrupts(struct net_device *dev, u32 mask)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	writel(mask, base + NvRegIrqMask);
-}
-
-static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	if (np->msi_flags & NV_MSI_X_ENABLED) {
-		writel(mask, base + NvRegIrqMask);
-	} else {
-		if (np->msi_flags & NV_MSI_ENABLED)
-			writel(0, base + NvRegMSIIrqMask);
-		writel(0, base + NvRegIrqMask);
-	}
-}
-
-#define MII_READ	(-1)
-/* mii_rw: read/write a register on the PHY.
- *
- * Caller must guarantee serialization
- */
-static int mii_rw(struct net_device *dev, int addr, int miireg, int value)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 reg;
-	int retval;
-
-	writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-
-	reg = readl(base + NvRegMIIControl);
-	if (reg & NVREG_MIICTL_INUSE) {
-		writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl);
-		udelay(NV_MIIBUSY_DELAY);
-	}
-
-	reg = (addr << NVREG_MIICTL_ADDRSHIFT) | miireg;
-	if (value != MII_READ) {
-		writel(value, base + NvRegMIIData);
-		reg |= NVREG_MIICTL_WRITE;
-	}
-	writel(reg, base + NvRegMIIControl);
-
-	if (reg_delay(dev, NvRegMIIControl, NVREG_MIICTL_INUSE, 0,
-			NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX, NULL)) {
-		dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d timed out.\n",
-				dev->name, miireg, addr);
-		retval = -1;
-	} else if (value != MII_READ) {
-		/* it was a write operation - fewer failures are detectable */
-		dprintk(KERN_DEBUG "%s: mii_rw wrote 0x%x to reg %d at PHY %d\n",
-				dev->name, value, miireg, addr);
-		retval = 0;
-	} else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) {
-		dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d failed.\n",
-				dev->name, miireg, addr);
-		retval = -1;
-	} else {
-		retval = readl(base + NvRegMIIData);
-		dprintk(KERN_DEBUG "%s: mii_rw read from reg %d at PHY %d: 0x%x.\n",
-				dev->name, miireg, addr, retval);
-	}
-
-	return retval;
-}
-
-static int phy_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 miicontrol;
-	unsigned int tries = 0;
-
-	miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-	miicontrol |= BMCR_RESET;
-	if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol)) {
-		return -1;
-	}
-
-	/* wait for 500ms */
-	msleep(500);
-
-	/* must wait till reset is deasserted */
-	while (miicontrol & BMCR_RESET) {
-		msleep(10);
-		miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		/* FIXME: 100 tries seem excessive */
-		if (tries++ > 100)
-			return -1;
-	}
-	return 0;
-}
-
-static int phy_init(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 phyinterface, phy_reserved, mii_status, mii_control, mii_control_1000,reg;
-
-	/* set advertise register */
-	reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-	reg |= (ADVERTISE_10HALF|ADVERTISE_10FULL|ADVERTISE_100HALF|ADVERTISE_100FULL|0x800|0x400);
-	if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) {
-		printk(KERN_INFO "%s: phy write to advertise failed.\n", pci_name(np->pci_dev));
-		return PHY_ERROR;
-	}
-
-	/* get phy interface type */
-	phyinterface = readl(base + NvRegPhyInterface);
-
-	/* see if gigabit phy */
-	mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-	if (mii_status & PHY_GIGABIT) {
-		np->gigabit = PHY_GIGABIT;
-		mii_control_1000 = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ);
-		mii_control_1000 &= ~ADVERTISE_1000HALF;
-		if (phyinterface & PHY_RGMII)
-			mii_control_1000 |= ADVERTISE_1000FULL;
-		else
-			mii_control_1000 &= ~ADVERTISE_1000FULL;
-
-		if (mii_rw(dev, np->phyaddr, MII_1000BT_CR, mii_control_1000)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-	else
-		np->gigabit = 0;
-
-	/* reset the phy */
-	if (phy_reset(dev)) {
-		printk(KERN_INFO "%s: phy reset failed\n", pci_name(np->pci_dev));
-		return PHY_ERROR;
-	}
-
-	/* phy vendor specific configuration */
-	if ((np->phy_oui == PHY_OUI_CICADA) && (phyinterface & PHY_RGMII) ) {
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_RESV1, MII_READ);
-		phy_reserved &= ~(PHY_INIT1 | PHY_INIT2);
-		phy_reserved |= (PHY_INIT3 | PHY_INIT4);
-		if (mii_rw(dev, np->phyaddr, MII_RESV1, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ);
-		phy_reserved |= PHY_INIT5;
-		if (mii_rw(dev, np->phyaddr, MII_NCONFIG, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-	if (np->phy_oui == PHY_OUI_CICADA) {
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_SREVISION, MII_READ);
-		phy_reserved |= PHY_INIT6;
-		if (mii_rw(dev, np->phyaddr, MII_SREVISION, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-
-	/* restart auto negotiation */
-	mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-	mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
-	if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {
-		return PHY_ERROR;
-	}
-
-	return 0;
-}
-
-static void nv_start_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_start_rx\n", dev->name);
-	/* Already running? Stop it. */
-	if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) {
-		writel(0, base + NvRegReceiverControl);
-		pci_push(base);
-	}
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	pci_push(base);
-	writel(NVREG_RCVCTL_START, base + NvRegReceiverControl);
-	dprintk(KERN_DEBUG "%s: nv_start_rx to duplex %d, speed 0x%08x.\n",
-				dev->name, np->duplex, np->linkspeed);
-	pci_push(base);
-}
-
-static void nv_stop_rx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_stop_rx\n", dev->name);
-	writel(0, base + NvRegReceiverControl);
-	reg_delay(dev, NvRegReceiverStatus, NVREG_RCVSTAT_BUSY, 0,
-			NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX,
-			KERN_INFO "nv_stop_rx: ReceiverStatus remained busy");
-
-	udelay(NV_RXSTOP_DELAY2);
-	writel(0, base + NvRegLinkSpeed);
-}
-
-static void nv_start_tx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_start_tx\n", dev->name);
-	writel(NVREG_XMITCTL_START, base + NvRegTransmitterControl);
-	pci_push(base);
-}
-
-static void nv_stop_tx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_stop_tx\n", dev->name);
-	writel(0, base + NvRegTransmitterControl);
-	reg_delay(dev, NvRegTransmitterStatus, NVREG_XMITSTAT_BUSY, 0,
-			NV_TXSTOP_DELAY1, NV_TXSTOP_DELAY1MAX,
-			KERN_INFO "nv_stop_tx: TransmitterStatus remained busy");
-
-	udelay(NV_TXSTOP_DELAY2);
-	writel(0, base + NvRegUnknownTransmitterReg);
-}
-
-static void nv_txrx_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_txrx_reset\n", dev->name);
-	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-	udelay(NV_TXRX_RESET_DELAY);
-	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-}
-
-static void nv_mac_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name);
-	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-	writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset);
-	pci_push(base);
-	udelay(NV_MAC_RESET_DELAY);
-	writel(0, base + NvRegMacReset);
-	pci_push(base);
-	udelay(NV_MAC_RESET_DELAY);
-	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-}
-
-/*
- * nv_get_stats: dev->get_stats function
- * Get latest stats value from the nic.
- * Called with read_lock(&dev_base_lock) held for read -
- * only synchronized against unregister_netdevice.
- */
-static struct net_device_stats *nv_get_stats(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	/* It seems that the nic always generates interrupts and doesn't
-	 * accumulate errors internally. Thus the current values in np->stats
-	 * are already up to date.
-	 */
-	return &np->stats;
-}
-
-/*
- * nv_alloc_rx: fill rx ring entries.
- * Return 1 if the allocations for the skbs failed and the
- * rx engine is without Available descriptors
- */
-static int nv_alloc_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	unsigned int refill_rx = np->refill_rx;
-	int nr;
-
-	while (np->cur_rx != refill_rx) {
-		struct sk_buff *skb;
-
-		nr = refill_rx % RX_RING;
-		if (np->rx_skbuff[nr] == NULL) {
-
-			skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD);
-			if (!skb)
-				break;
-
-			skb->dev = dev;
-			np->rx_skbuff[nr] = skb;
-		} else {
-			skb = np->rx_skbuff[nr];
-		}
-		np->rx_dma[nr] = pci_map_single(np->pci_dev, skb->data,
-					skb->end-skb->data, PCI_DMA_FROMDEVICE);
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			np->rx_ring.orig[nr].PacketBuffer = cpu_to_le32(np->rx_dma[nr]);
-			wmb();
-			np->rx_ring.orig[nr].FlagLen = cpu_to_le32(np->rx_buf_sz | NV_RX_AVAIL);
-		} else {
-			np->rx_ring.ex[nr].PacketBufferHigh = cpu_to_le64(np->rx_dma[nr]) >> 32;
-			np->rx_ring.ex[nr].PacketBufferLow = cpu_to_le64(np->rx_dma[nr]) & 0x0FFFFFFFF;
-			wmb();
-			np->rx_ring.ex[nr].FlagLen = cpu_to_le32(np->rx_buf_sz | NV_RX2_AVAIL);
-		}
-		dprintk(KERN_DEBUG "%s: nv_alloc_rx: Packet %d marked as Available\n",
-					dev->name, refill_rx);
-		refill_rx++;
-	}
-	np->refill_rx = refill_rx;
-	if (np->cur_rx - refill_rx == RX_RING)
-		return 1;
-	return 0;
-}
-
-static void nv_do_rx_refill(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq(dev->irq);
-	} else {
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-	}
-	if (nv_alloc_rx(dev)) {
-		spin_lock_irq(&np->lock);
-		if (!np->in_shutdown)
-			mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		spin_unlock_irq(&np->lock);
-	}
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq(dev->irq);
-	} else {
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-	}
-}
-
-static void nv_init_rx(struct net_device *dev) 
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-
-	np->cur_rx = RX_RING;
-	np->refill_rx = 0;
-	for (i = 0; i < RX_RING; i++)
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->rx_ring.orig[i].FlagLen = 0;
-	        else
-			np->rx_ring.ex[i].FlagLen = 0;
-}
-
-static void nv_init_tx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-
-	np->next_tx = np->nic_tx = 0;
-	for (i = 0; i < TX_RING; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->tx_ring.orig[i].FlagLen = 0;
-	        else
-			np->tx_ring.ex[i].FlagLen = 0;
-		np->tx_skbuff[i] = NULL;
-		np->tx_dma[i] = 0;
-	}
-}
-
-static int nv_init_ring(struct net_device *dev)
-{
-	nv_init_tx(dev);
-	nv_init_rx(dev);
-	return nv_alloc_rx(dev);
-}
-
-static int nv_release_txskb(struct net_device *dev, unsigned int skbnr)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	dprintk(KERN_INFO "%s: nv_release_txskb for skbnr %d\n",
-		dev->name, skbnr);
-
-	if (np->tx_dma[skbnr]) {
-		pci_unmap_page(np->pci_dev, np->tx_dma[skbnr],
-			       np->tx_dma_len[skbnr],
-			       PCI_DMA_TODEVICE);
-		np->tx_dma[skbnr] = 0;
-	}
-
-	if (np->tx_skbuff[skbnr]) {
-		dev_kfree_skb_any(np->tx_skbuff[skbnr]);
-		np->tx_skbuff[skbnr] = NULL;
-		return 1;
-	} else {
-		return 0;
-	}
-}
-
-static void nv_drain_tx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	unsigned int i;
-	
-	for (i = 0; i < TX_RING; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->tx_ring.orig[i].FlagLen = 0;
-		else
-			np->tx_ring.ex[i].FlagLen = 0;
-		if (nv_release_txskb(dev, i))
-			np->stats.tx_dropped++;
-	}
-}
-
-static void nv_drain_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-	for (i = 0; i < RX_RING; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->rx_ring.orig[i].FlagLen = 0;
-		else
-			np->rx_ring.ex[i].FlagLen = 0;
-		wmb();
-		if (np->rx_skbuff[i]) {
-			pci_unmap_single(np->pci_dev, np->rx_dma[i],
-						np->rx_skbuff[i]->end-np->rx_skbuff[i]->data,
-						PCI_DMA_FROMDEVICE);
-			dev_kfree_skb(np->rx_skbuff[i]);
-			np->rx_skbuff[i] = NULL;
-		}
-	}
-}
-
-static void drain_ring(struct net_device *dev)
-{
-	nv_drain_tx(dev);
-	nv_drain_rx(dev);
-}
-
-/*
- * nv_start_xmit: dev->hard_start_xmit function
- * Called with dev->xmit_lock held.
- */
-static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 tx_flags = 0;
-	u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET);
-	unsigned int fragments = skb_shinfo(skb)->nr_frags;
-	unsigned int nr = (np->next_tx - 1) % TX_RING;
-	unsigned int start_nr = np->next_tx % TX_RING;
-	unsigned int i;
-	u32 offset = 0;
-	u32 bcnt;
-	u32 size = skb->len-skb->data_len;
-	u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
-	u32 tx_flags_vlan = 0;
-
-	/* add fragments to entries count */
-	for (i = 0; i < fragments; i++) {
-		entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) +
-			   ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
-	}
-
-	spin_lock_irq(&np->lock);
-
-	if ((np->next_tx - np->nic_tx + entries - 1) > TX_LIMIT_STOP) {
-		spin_unlock_irq(&np->lock);
-		netif_stop_queue(dev);
-		return NETDEV_TX_BUSY;
-	}
-
-	/* setup the header buffer */
-	do {
-		bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
-		nr = (nr + 1) % TX_RING;
-
-		np->tx_dma[nr] = pci_map_single(np->pci_dev, skb->data + offset, bcnt,
-						PCI_DMA_TODEVICE);
-		np->tx_dma_len[nr] = bcnt;
-
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			np->tx_ring.orig[nr].PacketBuffer = cpu_to_le32(np->tx_dma[nr]);
-			np->tx_ring.orig[nr].FlagLen = cpu_to_le32((bcnt-1) | tx_flags);
-		} else {
-			np->tx_ring.ex[nr].PacketBufferHigh = cpu_to_le64(np->tx_dma[nr]) >> 32;
-			np->tx_ring.ex[nr].PacketBufferLow = cpu_to_le64(np->tx_dma[nr]) & 0x0FFFFFFFF;
-			np->tx_ring.ex[nr].FlagLen = cpu_to_le32((bcnt-1) | tx_flags);
-		}
-		tx_flags = np->tx_flags;
-		offset += bcnt;
-		size -= bcnt;
-	} while(size);
-
-	/* setup the fragments */
-	for (i = 0; i < fragments; i++) {
-		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
-		u32 size = frag->size;
-		offset = 0;
-
-		do {
-			bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
-			nr = (nr + 1) % TX_RING;
-
-			np->tx_dma[nr] = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt,
-						      PCI_DMA_TODEVICE);
-			np->tx_dma_len[nr] = bcnt;
-
-			if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-				np->tx_ring.orig[nr].PacketBuffer = cpu_to_le32(np->tx_dma[nr]);
-				np->tx_ring.orig[nr].FlagLen = cpu_to_le32((bcnt-1) | tx_flags);
-			} else {
-				np->tx_ring.ex[nr].PacketBufferHigh = cpu_to_le64(np->tx_dma[nr]) >> 32;
-				np->tx_ring.ex[nr].PacketBufferLow = cpu_to_le64(np->tx_dma[nr]) & 0x0FFFFFFFF;
-				np->tx_ring.ex[nr].FlagLen = cpu_to_le32((bcnt-1) | tx_flags);
-			}
-			offset += bcnt;
-			size -= bcnt;
-		} while (size);
-	}
-
-	/* set last fragment flag  */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->tx_ring.orig[nr].FlagLen |= cpu_to_le32(tx_flags_extra);
-	} else {
-		np->tx_ring.ex[nr].FlagLen |= cpu_to_le32(tx_flags_extra);
-	}
-
-	np->tx_skbuff[nr] = skb;
-
-#ifdef NETIF_F_TSO
-	if (skb_shinfo(skb)->tso_size)
-		tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->tso_size << NV_TX2_TSO_SHIFT);
-	else
-#endif
-	tx_flags_extra = (skb->ip_summed == CHECKSUM_HW ? (NV_TX2_CHECKSUM_L3|NV_TX2_CHECKSUM_L4) : 0);
-
-	/* vlan tag */
-	if (np->vlangrp && vlan_tx_tag_present(skb)) {
-		tx_flags_vlan = NV_TX3_VLAN_TAG_PRESENT | vlan_tx_tag_get(skb);
-	}
-
-	/* set tx flags */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->tx_ring.orig[start_nr].FlagLen |= cpu_to_le32(tx_flags | tx_flags_extra);
-	} else {
-		np->tx_ring.ex[start_nr].TxVlan = cpu_to_le32(tx_flags_vlan);
-		np->tx_ring.ex[start_nr].FlagLen |= cpu_to_le32(tx_flags | tx_flags_extra);
-	}	
-
-	dprintk(KERN_DEBUG "%s: nv_start_xmit: packet %d (entries %d) queued for transmission. tx_flags_extra: %x\n",
-		dev->name, np->next_tx, entries, tx_flags_extra);
-	{
-		int j;
-		for (j=0; j<64; j++) {
-			if ((j%16) == 0)
-				dprintk("\n%03x:", j);
-			dprintk(" %02x", ((unsigned char*)skb->data)[j]);
-		}
-		dprintk("\n");
-	}
-
-	np->next_tx += entries;
-
-	dev->trans_start = jiffies;
-	spin_unlock_irq(&np->lock);
-	writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-	pci_push(get_hwbase(dev));
-	return NETDEV_TX_OK;
-}
-
-/*
- * nv_tx_done: check for completed packets, release the skbs.
- *
- * Caller must own np->lock.
- */
-static void nv_tx_done(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 Flags;
-	unsigned int i;
-	struct sk_buff *skb;
-
-	while (np->nic_tx != np->next_tx) {
-		i = np->nic_tx % TX_RING;
-
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			Flags = le32_to_cpu(np->tx_ring.orig[i].FlagLen);
-		else
-			Flags = le32_to_cpu(np->tx_ring.ex[i].FlagLen);
-
-		dprintk(KERN_DEBUG "%s: nv_tx_done: looking at packet %d, Flags 0x%x.\n",
-					dev->name, np->nic_tx, Flags);
-		if (Flags & NV_TX_VALID)
-			break;
-		if (np->desc_ver == DESC_VER_1) {
-			if (Flags & NV_TX_LASTPACKET) {
-				skb = np->tx_skbuff[i];
-				if (Flags & (NV_TX_RETRYERROR|NV_TX_CARRIERLOST|NV_TX_LATECOLLISION|
-					     NV_TX_UNDERFLOW|NV_TX_ERROR)) {
-					if (Flags & NV_TX_UNDERFLOW)
-						np->stats.tx_fifo_errors++;
-					if (Flags & NV_TX_CARRIERLOST)
-						np->stats.tx_carrier_errors++;
-					np->stats.tx_errors++;
-				} else {
-					np->stats.tx_packets++;
-					np->stats.tx_bytes += skb->len;
-				}
-			}
-		} else {
-			if (Flags & NV_TX2_LASTPACKET) {
-				skb = np->tx_skbuff[i];
-				if (Flags & (NV_TX2_RETRYERROR|NV_TX2_CARRIERLOST|NV_TX2_LATECOLLISION|
-					     NV_TX2_UNDERFLOW|NV_TX2_ERROR)) {
-					if (Flags & NV_TX2_UNDERFLOW)
-						np->stats.tx_fifo_errors++;
-					if (Flags & NV_TX2_CARRIERLOST)
-						np->stats.tx_carrier_errors++;
-					np->stats.tx_errors++;
-				} else {
-					np->stats.tx_packets++;
-					np->stats.tx_bytes += skb->len;
-				}				
-			}
-		}
-		nv_release_txskb(dev, i);
-		np->nic_tx++;
-	}
-	if (np->next_tx - np->nic_tx < TX_LIMIT_START)
-		netif_wake_queue(dev);
-}
-
-/*
- * nv_tx_timeout: dev->tx_timeout function
- * Called with dev->xmit_lock held.
- */
-static void nv_tx_timeout(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 status;
-
-	if (np->msi_flags & NV_MSI_X_ENABLED)
-		status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
-	else
-		status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
-
-	printk(KERN_INFO "%s: Got tx_timeout. irq: %08x\n", dev->name, status);
-
-	{
-		int i;
-
-		printk(KERN_INFO "%s: Ring at %lx: next %d nic %d\n",
-				dev->name, (unsigned long)np->ring_addr,
-				np->next_tx, np->nic_tx);
-		printk(KERN_INFO "%s: Dumping tx registers\n", dev->name);
-		for (i=0;i<=np->register_size;i+= 32) {
-			printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-					i,
-					readl(base + i + 0), readl(base + i + 4),
-					readl(base + i + 8), readl(base + i + 12),
-					readl(base + i + 16), readl(base + i + 20),
-					readl(base + i + 24), readl(base + i + 28));
-		}
-		printk(KERN_INFO "%s: Dumping tx ring\n", dev->name);
-		for (i=0;i<TX_RING;i+= 4) {
-			if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-				printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n",
-				       i, 
-				       le32_to_cpu(np->tx_ring.orig[i].PacketBuffer),
-				       le32_to_cpu(np->tx_ring.orig[i].FlagLen),
-				       le32_to_cpu(np->tx_ring.orig[i+1].PacketBuffer),
-				       le32_to_cpu(np->tx_ring.orig[i+1].FlagLen),
-				       le32_to_cpu(np->tx_ring.orig[i+2].PacketBuffer),
-				       le32_to_cpu(np->tx_ring.orig[i+2].FlagLen),
-				       le32_to_cpu(np->tx_ring.orig[i+3].PacketBuffer),
-				       le32_to_cpu(np->tx_ring.orig[i+3].FlagLen));
-			} else {
-				printk(KERN_INFO "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n",
-				       i, 
-				       le32_to_cpu(np->tx_ring.ex[i].PacketBufferHigh),
-				       le32_to_cpu(np->tx_ring.ex[i].PacketBufferLow),
-				       le32_to_cpu(np->tx_ring.ex[i].FlagLen),
-				       le32_to_cpu(np->tx_ring.ex[i+1].PacketBufferHigh),
-				       le32_to_cpu(np->tx_ring.ex[i+1].PacketBufferLow),
-				       le32_to_cpu(np->tx_ring.ex[i+1].FlagLen),
-				       le32_to_cpu(np->tx_ring.ex[i+2].PacketBufferHigh),
-				       le32_to_cpu(np->tx_ring.ex[i+2].PacketBufferLow),
-				       le32_to_cpu(np->tx_ring.ex[i+2].FlagLen),
-				       le32_to_cpu(np->tx_ring.ex[i+3].PacketBufferHigh),
-				       le32_to_cpu(np->tx_ring.ex[i+3].PacketBufferLow),
-				       le32_to_cpu(np->tx_ring.ex[i+3].FlagLen));
-			}
-		}
-	}
-
-	spin_lock_irq(&np->lock);
-
-	/* 1) stop tx engine */
-	nv_stop_tx(dev);
-
-	/* 2) check that the packets were not sent already: */
-	nv_tx_done(dev);
-
-	/* 3) if there are dead entries: clear everything */
-	if (np->next_tx != np->nic_tx) {
-		printk(KERN_DEBUG "%s: tx_timeout: dead entries!\n", dev->name);
-		nv_drain_tx(dev);
-		np->next_tx = np->nic_tx = 0;
-		setup_hw_rings(dev, NV_SETUP_TX_RING);
-		netif_wake_queue(dev);
-	}
-
-	/* 4) restart tx engine */
-	nv_start_tx(dev);
-	spin_unlock_irq(&np->lock);
-}
-
-/*
- * Called when the nic notices a mismatch between the actual data len on the
- * wire and the len indicated in the 802 header
- */
-static int nv_getlen(struct net_device *dev, void *packet, int datalen)
-{
-	int hdrlen;	/* length of the 802 header */
-	int protolen;	/* length as stored in the proto field */
-
-	/* 1) calculate len according to header */
-	if ( ((struct vlan_ethhdr *)packet)->h_vlan_proto == __constant_htons(ETH_P_8021Q)) {
-		protolen = ntohs( ((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto );
-		hdrlen = VLAN_HLEN;
-	} else {
-		protolen = ntohs( ((struct ethhdr *)packet)->h_proto);
-		hdrlen = ETH_HLEN;
-	}
-	dprintk(KERN_DEBUG "%s: nv_getlen: datalen %d, protolen %d, hdrlen %d\n",
-				dev->name, datalen, protolen, hdrlen);
-	if (protolen > ETH_DATA_LEN)
-		return datalen; /* Value in proto field not a len, no checks possible */
-
-	protolen += hdrlen;
-	/* consistency checks: */
-	if (datalen > ETH_ZLEN) {
-		if (datalen >= protolen) {
-			/* more data on wire than in 802 header, trim of
-			 * additional data.
-			 */
-			dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
-					dev->name, protolen);
-			return protolen;
-		} else {
-			/* less data on wire than mentioned in header.
-			 * Discard the packet.
-			 */
-			dprintk(KERN_DEBUG "%s: nv_getlen: discarding long packet.\n",
-					dev->name);
-			return -1;
-		}
-	} else {
-		/* short packet. Accept only if 802 values are also short */
-		if (protolen > ETH_ZLEN) {
-			dprintk(KERN_DEBUG "%s: nv_getlen: discarding short packet.\n",
-					dev->name);
-			return -1;
-		}
-		dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
-				dev->name, datalen);
-		return datalen;
-	}
-}
-
-static void nv_rx_process(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 Flags;
-	u32 vlanflags = 0;
-
-
-	for (;;) {
-		struct sk_buff *skb;
-		int len;
-		int i;
-		if (np->cur_rx - np->refill_rx >= RX_RING)
-			break;	/* we scanned the whole ring - do not continue */
-
-		i = np->cur_rx % RX_RING;
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			Flags = le32_to_cpu(np->rx_ring.orig[i].FlagLen);
-			len = nv_descr_getlength(&np->rx_ring.orig[i], np->desc_ver);
-		} else {
-			Flags = le32_to_cpu(np->rx_ring.ex[i].FlagLen);
-			len = nv_descr_getlength_ex(&np->rx_ring.ex[i], np->desc_ver);
-			vlanflags = le32_to_cpu(np->rx_ring.ex[i].PacketBufferLow);
-		}
-
-		dprintk(KERN_DEBUG "%s: nv_rx_process: looking at packet %d, Flags 0x%x.\n",
-					dev->name, np->cur_rx, Flags);
-
-		if (Flags & NV_RX_AVAIL)
-			break;	/* still owned by hardware, */
-
-		/*
-		 * the packet is for us - immediately tear down the pci mapping.
-		 * TODO: check if a prefetch of the first cacheline improves
-		 * the performance.
-		 */
-		pci_unmap_single(np->pci_dev, np->rx_dma[i],
-				np->rx_skbuff[i]->end-np->rx_skbuff[i]->data,
-				PCI_DMA_FROMDEVICE);
-
-		{
-			int j;
-			dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).",Flags);
-			for (j=0; j<64; j++) {
-				if ((j%16) == 0)
-					dprintk("\n%03x:", j);
-				dprintk(" %02x", ((unsigned char*)np->rx_skbuff[i]->data)[j]);
-			}
-			dprintk("\n");
-		}
-		/* look at what we actually got: */
-		if (np->desc_ver == DESC_VER_1) {
-			if (!(Flags & NV_RX_DESCRIPTORVALID))
-				goto next_pkt;
-
-			if (Flags & NV_RX_ERROR) {
-				if (Flags & NV_RX_MISSEDFRAME) {
-					np->stats.rx_missed_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3)) {
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX_CRCERR) {
-					np->stats.rx_crc_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX_OVERFLOW) {
-					np->stats.rx_over_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX_ERROR4) {
-					len = nv_getlen(dev, np->rx_skbuff[i]->data, len);
-					if (len < 0) {
-						np->stats.rx_errors++;
-						goto next_pkt;
-					}
-				}
-				/* framing errors are soft errors. */
-				if (Flags & NV_RX_FRAMINGERR) {
-					if (Flags & NV_RX_SUBSTRACT1) {
-						len--;
-					}
-				}
-			}
-		} else {
-			if (!(Flags & NV_RX2_DESCRIPTORVALID))
-				goto next_pkt;
-
-			if (Flags & NV_RX2_ERROR) {
-				if (Flags & (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3)) {
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX2_CRCERR) {
-					np->stats.rx_crc_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX2_OVERFLOW) {
-					np->stats.rx_over_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (Flags & NV_RX2_ERROR4) {
-					len = nv_getlen(dev, np->rx_skbuff[i]->data, len);
-					if (len < 0) {
-						np->stats.rx_errors++;
-						goto next_pkt;
-					}
-				}
-				/* framing errors are soft errors */
-				if (Flags & NV_RX2_FRAMINGERR) {
-					if (Flags & NV_RX2_SUBSTRACT1) {
-						len--;
-					}
-				}
-			}
-			Flags &= NV_RX2_CHECKSUMMASK;
-			if (Flags == NV_RX2_CHECKSUMOK1 ||
-					Flags == NV_RX2_CHECKSUMOK2 ||
-					Flags == NV_RX2_CHECKSUMOK3) {
-				dprintk(KERN_DEBUG "%s: hw checksum hit!.\n", dev->name);
-				np->rx_skbuff[i]->ip_summed = CHECKSUM_UNNECESSARY;
-			} else {
-				dprintk(KERN_DEBUG "%s: hwchecksum miss!.\n", dev->name);
-			}
-		}
-		/* got a valid packet - forward it to the network core */
-		skb = np->rx_skbuff[i];
-		np->rx_skbuff[i] = NULL;
-
-		skb_put(skb, len);
-		skb->protocol = eth_type_trans(skb, dev);
-		dprintk(KERN_DEBUG "%s: nv_rx_process: packet %d with %d bytes, proto %d accepted.\n",
-					dev->name, np->cur_rx, len, skb->protocol);
-		if (np->vlangrp && (vlanflags & NV_RX3_VLAN_TAG_PRESENT)) {
-			vlan_hwaccel_rx(skb, np->vlangrp, vlanflags & NV_RX3_VLAN_TAG_MASK);
-		} else {
-			netif_rx(skb);
-		}
-		dev->last_rx = jiffies;
-		np->stats.rx_packets++;
-		np->stats.rx_bytes += len;
-next_pkt:
-		np->cur_rx++;
-	}
-}
-
-static void set_bufsize(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (dev->mtu <= ETH_DATA_LEN)
-		np->rx_buf_sz = ETH_DATA_LEN + NV_RX_HEADERS;
-	else
-		np->rx_buf_sz = dev->mtu + NV_RX_HEADERS;
-}
-
-/*
- * nv_change_mtu: dev->change_mtu function
- * Called with dev_base_lock held for read.
- */
-static int nv_change_mtu(struct net_device *dev, int new_mtu)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int old_mtu;
-
-	if (new_mtu < 64 || new_mtu > np->pkt_limit)
-		return -EINVAL;
-
-	old_mtu = dev->mtu;
-	dev->mtu = new_mtu;
-
-	/* return early if the buffer sizes will not change */
-	if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN)
-		return 0;
-	if (old_mtu == new_mtu)
-		return 0;
-
-	/* synchronized against open : rtnl_lock() held by caller */
-	if (netif_running(dev)) {
-		u8 __iomem *base = get_hwbase(dev);
-		/*
-		 * It seems that the nic preloads valid ring entries into an
-		 * internal buffer. The procedure for flushing everything is
-		 * guessed, there is probably a simpler approach.
-		 * Changing the MTU is a rare event, it shouldn't matter.
-		 */
-		nv_disable_irq(dev);
-		spin_lock_bh(&dev->xmit_lock);
-		spin_lock(&np->lock);
-		/* stop engines */
-		nv_stop_rx(dev);
-		nv_stop_tx(dev);
-		nv_txrx_reset(dev);
-		/* drain rx queue */
-		nv_drain_rx(dev);
-		nv_drain_tx(dev);
-		/* reinit driver view of the rx queue */
-		nv_init_rx(dev);
-		nv_init_tx(dev);
-		/* alloc new rx buffers */
-		set_bufsize(dev);
-		if (nv_alloc_rx(dev)) {
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		}
-		/* reinit nic view of the rx queue */
-		writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-		setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-		writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT),
-			base + NvRegRingSizes);
-		pci_push(base);
-		writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-		pci_push(base);
-
-		/* restart rx engine */
-		nv_start_rx(dev);
-		nv_start_tx(dev);
-		spin_unlock(&np->lock);
-		spin_unlock_bh(&dev->xmit_lock);
-		nv_enable_irq(dev);
-	}
-	return 0;
-}
-
-static void nv_copy_mac_to_hw(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 mac[2];
-
-	mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) +
-			(dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24);
-	mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8);
-
-	writel(mac[0], base + NvRegMacAddrA);
-	writel(mac[1], base + NvRegMacAddrB);
-}
-
-/*
- * nv_set_mac_address: dev->set_mac_address function
- * Called with rtnl_lock() held.
- */
-static int nv_set_mac_address(struct net_device *dev, void *addr)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	struct sockaddr *macaddr = (struct sockaddr*)addr;
-
-	if(!is_valid_ether_addr(macaddr->sa_data))
-		return -EADDRNOTAVAIL;
-
-	/* synchronized against open : rtnl_lock() held by caller */
-	memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN);
-
-	if (netif_running(dev)) {
-		spin_lock_bh(&dev->xmit_lock);
-		spin_lock_irq(&np->lock);
-
-		/* stop rx engine */
-		nv_stop_rx(dev);
-
-		/* set mac address */
-		nv_copy_mac_to_hw(dev);
-
-		/* restart rx engine */
-		nv_start_rx(dev);
-		spin_unlock_irq(&np->lock);
-		spin_unlock_bh(&dev->xmit_lock);
-	} else {
-		nv_copy_mac_to_hw(dev);
-	}
-	return 0;
-}
-
-/*
- * nv_set_multicast: dev->set_multicast function
- * Called with dev->xmit_lock held.
- */
-static void nv_set_multicast(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 addr[2];
-	u32 mask[2];
-	u32 pff;
-
-	memset(addr, 0, sizeof(addr));
-	memset(mask, 0, sizeof(mask));
-
-	if (dev->flags & IFF_PROMISC) {
-		printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", dev->name);
-		pff = NVREG_PFF_PROMISC;
-	} else {
-		pff = NVREG_PFF_MYADDR;
-
-		if (dev->flags & IFF_ALLMULTI || dev->mc_list) {
-			u32 alwaysOff[2];
-			u32 alwaysOn[2];
-
-			alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0xffffffff;
-			if (dev->flags & IFF_ALLMULTI) {
-				alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0;
-			} else {
-				struct dev_mc_list *walk;
-
-				walk = dev->mc_list;
-				while (walk != NULL) {
-					u32 a, b;
-					a = le32_to_cpu(*(u32 *) walk->dmi_addr);
-					b = le16_to_cpu(*(u16 *) (&walk->dmi_addr[4]));
-					alwaysOn[0] &= a;
-					alwaysOff[0] &= ~a;
-					alwaysOn[1] &= b;
-					alwaysOff[1] &= ~b;
-					walk = walk->next;
-				}
-			}
-			addr[0] = alwaysOn[0];
-			addr[1] = alwaysOn[1];
-			mask[0] = alwaysOn[0] | alwaysOff[0];
-			mask[1] = alwaysOn[1] | alwaysOff[1];
-		}
-	}
-	addr[0] |= NVREG_MCASTADDRA_FORCE;
-	pff |= NVREG_PFF_ALWAYS;
-	spin_lock_irq(&np->lock);
-	nv_stop_rx(dev);
-	writel(addr[0], base + NvRegMulticastAddrA);
-	writel(addr[1], base + NvRegMulticastAddrB);
-	writel(mask[0], base + NvRegMulticastMaskA);
-	writel(mask[1], base + NvRegMulticastMaskB);
-	writel(pff, base + NvRegPacketFilterFlags);
-	dprintk(KERN_INFO "%s: reconfiguration for multicast lists.\n",
-		dev->name);
-	nv_start_rx(dev);
-	spin_unlock_irq(&np->lock);
-}
-
-/**
- * nv_update_linkspeed: Setup the MAC according to the link partner
- * @dev: Network device to be configured
- *
- * The function queries the PHY and checks if there is a link partner.
- * If yes, then it sets up the MAC accordingly. Otherwise, the MAC is
- * set to 10 MBit HD.
- *
- * The function returns 0 if there is no link partner and 1 if there is
- * a good link partner.
- */
-static int nv_update_linkspeed(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int adv, lpa;
-	int newls = np->linkspeed;
-	int newdup = np->duplex;
-	int mii_status;
-	int retval = 0;
-	u32 control_1000, status_1000, phyreg;
-
-	/* BMSR_LSTATUS is latched, read it twice:
-	 * we want the current value.
-	 */
-	mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-	mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-
-	if (!(mii_status & BMSR_LSTATUS)) {
-		dprintk(KERN_DEBUG "%s: no link detected by phy - falling back to 10HD.\n",
-				dev->name);
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-		retval = 0;
-		goto set_speed;
-	}
-
-	if (np->autoneg == 0) {
-		dprintk(KERN_DEBUG "%s: nv_update_linkspeed: autoneg off, PHY set to 0x%04x.\n",
-				dev->name, np->fixed_mode);
-		if (np->fixed_mode & LPA_100FULL) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-			newdup = 1;
-		} else if (np->fixed_mode & LPA_100HALF) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-			newdup = 0;
-		} else if (np->fixed_mode & LPA_10FULL) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-			newdup = 1;
-		} else {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-			newdup = 0;
-		}
-		retval = 1;
-		goto set_speed;
-	}
-	/* check auto negotiation is complete */
-	if (!(mii_status & BMSR_ANEGCOMPLETE)) {
-		/* still in autonegotiation - configure nic for 10 MBit HD and wait. */
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-		retval = 0;
-		dprintk(KERN_DEBUG "%s: autoneg not completed - falling back to 10HD.\n", dev->name);
-		goto set_speed;
-	}
-
-	retval = 1;
-	if (np->gigabit == PHY_GIGABIT) {
-		control_1000 = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ);
-		status_1000 = mii_rw(dev, np->phyaddr, MII_1000BT_SR, MII_READ);
-
-		if ((control_1000 & ADVERTISE_1000FULL) &&
-			(status_1000 & LPA_1000FULL)) {
-			dprintk(KERN_DEBUG "%s: nv_update_linkspeed: GBit ethernet detected.\n",
-				dev->name);
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_1000;
-			newdup = 1;
-			goto set_speed;
-		}
-	}
-
-	adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-	lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ);
-	dprintk(KERN_DEBUG "%s: nv_update_linkspeed: PHY advertises 0x%04x, lpa 0x%04x.\n",
-				dev->name, adv, lpa);
-
-	/* FIXME: handle parallel detection properly */
-	lpa = lpa & adv;
-	if (lpa & LPA_100FULL) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-		newdup = 1;
-	} else if (lpa & LPA_100HALF) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-		newdup = 0;
-	} else if (lpa & LPA_10FULL) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 1;
-	} else if (lpa & LPA_10HALF) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-	} else {
-		dprintk(KERN_DEBUG "%s: bad ability %04x - falling back to 10HD.\n", dev->name, lpa);
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-	}
-
-set_speed:
-	if (np->duplex == newdup && np->linkspeed == newls)
-		return retval;
-
-	dprintk(KERN_INFO "%s: changing link setting from %d/%d to %d/%d.\n",
-			dev->name, np->linkspeed, np->duplex, newls, newdup);
-
-	np->duplex = newdup;
-	np->linkspeed = newls;
-
-	if (np->gigabit == PHY_GIGABIT) {
-		phyreg = readl(base + NvRegRandomSeed);
-		phyreg &= ~(0x3FF00);
-		if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_10)
-			phyreg |= NVREG_RNDSEED_FORCE3;
-		else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_100)
-			phyreg |= NVREG_RNDSEED_FORCE2;
-		else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_1000)
-			phyreg |= NVREG_RNDSEED_FORCE;
-		writel(phyreg, base + NvRegRandomSeed);
-	}
-
-	phyreg = readl(base + NvRegPhyInterface);
-	phyreg &= ~(PHY_HALF|PHY_100|PHY_1000);
-	if (np->duplex == 0)
-		phyreg |= PHY_HALF;
-	if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_100)
-		phyreg |= PHY_100;
-	else if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
-		phyreg |= PHY_1000;
-	writel(phyreg, base + NvRegPhyInterface);
-
-	writel(NVREG_MISC1_FORCE | ( np->duplex ? 0 : NVREG_MISC1_HD),
-		base + NvRegMisc1);
-	pci_push(base);
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	pci_push(base);
-
-	return retval;
-}
-
-static void nv_linkchange(struct net_device *dev)
-{
-	if (nv_update_linkspeed(dev)) {
-		if (!netif_carrier_ok(dev)) {
-			netif_carrier_on(dev);
-			printk(KERN_INFO "%s: link up.\n", dev->name);
-			nv_start_rx(dev);
-		}
-	} else {
-		if (netif_carrier_ok(dev)) {
-			netif_carrier_off(dev);
-			printk(KERN_INFO "%s: link down.\n", dev->name);
-			nv_stop_rx(dev);
-		}
-	}
-}
-
-static void nv_link_irq(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 miistat;
-
-	miistat = readl(base + NvRegMIIStatus);
-	writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-	dprintk(KERN_INFO "%s: link change irq, status 0x%x.\n", dev->name, miistat);
-
-	if (miistat & (NVREG_MIISTAT_LINKCHANGE))
-		nv_linkchange(dev);
-	dprintk(KERN_DEBUG "%s: link change notification done.\n", dev->name);
-}
-
-static irqreturn_t nv_nic_irq(int foo, void *data, struct pt_regs *regs)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq\n", dev->name);
-
-	for (i=0; ; i++) {
-		if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
-			events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
-			writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-		} else {
-			events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
-			writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
-		}
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		spin_lock(&np->lock);
-		nv_tx_done(dev);
-		spin_unlock(&np->lock);
-		
-		nv_rx_process(dev);
-		if (nv_alloc_rx(dev)) {
-			spin_lock(&np->lock);
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-			spin_unlock(&np->lock);
-		}
-		
-		if (events & NVREG_IRQ_LINK) {
-			spin_lock(&np->lock);
-			nv_link_irq(dev);
-			spin_unlock(&np->lock);
-		}
-		if (np->need_linktimer && time_after(jiffies, np->link_timeout)) {
-			spin_lock(&np->lock);
-			nv_linkchange(dev);
-			spin_unlock(&np->lock);
-			np->link_timeout = jiffies + LINK_TIMEOUT;
-		}
-		if (events & (NVREG_IRQ_TX_ERR)) {
-			dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n",
-						dev->name, events);
-		}
-		if (events & (NVREG_IRQ_UNKNOWN)) {
-			printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
-						dev->name, events);
-		}
-		if (i > max_interrupt_work) {
-			spin_lock(&np->lock);
-			/* disable interrupts on the nic */
-			if (!(np->msi_flags & NV_MSI_X_ENABLED))
-				writel(0, base + NvRegIrqMask);
-			else
-				writel(np->irqmask, base + NvRegIrqMask);
-			pci_push(base);
-
-			if (!np->in_shutdown) {
-				np->nic_poll_irq = np->irqmask;
-				mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq.\n", dev->name, i);
-			spin_unlock(&np->lock);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static irqreturn_t nv_nic_irq_tx(int foo, void *data, struct pt_regs *regs)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL;
-		writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: tx irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		spin_lock_irq(&np->lock);
-		nv_tx_done(dev);
-		spin_unlock_irq(&np->lock);
-		
-		if (events & (NVREG_IRQ_TX_ERR)) {
-			dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n",
-						dev->name, events);
-		}
-		if (i > max_interrupt_work) {
-			spin_lock_irq(&np->lock);
-			/* disable interrupts on the nic */
-			writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask);
-			pci_push(base);
-
-			if (!np->in_shutdown) {
-				np->nic_poll_irq |= NVREG_IRQ_TX_ALL;
-				mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_tx.\n", dev->name, i);
-			spin_unlock_irq(&np->lock);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_tx completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static irqreturn_t nv_nic_irq_rx(int foo, void *data, struct pt_regs *regs)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL;
-		writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-		
-		nv_rx_process(dev);
-		if (nv_alloc_rx(dev)) {
-			spin_lock_irq(&np->lock);
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-			spin_unlock_irq(&np->lock);
-		}
-		
-		if (i > max_interrupt_work) {
-			spin_lock_irq(&np->lock);
-			/* disable interrupts on the nic */
-			writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
-			pci_push(base);
-
-			if (!np->in_shutdown) {
-				np->nic_poll_irq |= NVREG_IRQ_RX_ALL;
-				mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_rx.\n", dev->name, i);
-			spin_unlock_irq(&np->lock);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_rx completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static irqreturn_t nv_nic_irq_other(int foo, void *data, struct pt_regs *regs)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER;
-		writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-		
-		if (events & NVREG_IRQ_LINK) {
-			spin_lock_irq(&np->lock);
-			nv_link_irq(dev);
-			spin_unlock_irq(&np->lock);
-		}
-		if (np->need_linktimer && time_after(jiffies, np->link_timeout)) {
-			spin_lock_irq(&np->lock);
-			nv_linkchange(dev);
-			spin_unlock_irq(&np->lock);
-			np->link_timeout = jiffies + LINK_TIMEOUT;
-		}
-		if (events & (NVREG_IRQ_UNKNOWN)) {
-			printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
-						dev->name, events);
-		}
-		if (i > max_interrupt_work) {
-			spin_lock_irq(&np->lock);
-			/* disable interrupts on the nic */
-			writel(NVREG_IRQ_OTHER, base + NvRegIrqMask);
-			pci_push(base);
-
-			if (!np->in_shutdown) {
-				np->nic_poll_irq |= NVREG_IRQ_OTHER;
-				mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_other.\n", dev->name, i);
-			spin_unlock_irq(&np->lock);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_other completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static void nv_do_nic_poll(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 mask = 0;
-
-	/*
-	 * First disable irq(s) and then
-	 * reenable interrupts on the nic, we have to do this before calling
-	 * nv_nic_irq because that may decide to do otherwise
-	 */
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq(dev->irq);
-		mask = np->irqmask;
-	} else {
-		if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-			mask |= NVREG_IRQ_RX_ALL;
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-			mask |= NVREG_IRQ_TX_ALL;
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-			mask |= NVREG_IRQ_OTHER;
-		}
-	}
-	np->nic_poll_irq = 0;
-
-	/* FIXME: Do we need synchronize_irq(dev->irq) here? */
-	
-	writel(mask, base + NvRegIrqMask);
-	pci_push(base);
-
-	if (!using_multi_irqs(dev)) {
-		nv_nic_irq((int) 0, (void *) data, (struct pt_regs *) NULL);
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq(dev->irq);
-	} else {
-		if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
-			nv_nic_irq_rx((int) 0, (void *) data, (struct pt_regs *) NULL);
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
-			nv_nic_irq_tx((int) 0, (void *) data, (struct pt_regs *) NULL);
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
-			nv_nic_irq_other((int) 0, (void *) data, (struct pt_regs *) NULL);
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-		}
-	}
-}
-
-#ifdef CONFIG_NET_POLL_CONTROLLER
-static void nv_poll_controller(struct net_device *dev)
-{
-	nv_do_nic_poll((unsigned long) dev);
-}
-#endif
-
-static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	strcpy(info->driver, "forcedeth");
-	strcpy(info->version, FORCEDETH_VERSION);
-	strcpy(info->bus_info, pci_name(np->pci_dev));
-}
-
-static void nv_get_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	wolinfo->supported = WAKE_MAGIC;
-
-	spin_lock_irq(&np->lock);
-	if (np->wolenabled)
-		wolinfo->wolopts = WAKE_MAGIC;
-	spin_unlock_irq(&np->lock);
-}
-
-static int nv_set_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	spin_lock_irq(&np->lock);
-	if (wolinfo->wolopts == 0) {
-		writel(0, base + NvRegWakeUpFlags);
-		np->wolenabled = 0;
-	}
-	if (wolinfo->wolopts & WAKE_MAGIC) {
-		writel(NVREG_WAKEUPFLAGS_ENABLE, base + NvRegWakeUpFlags);
-		np->wolenabled = 1;
-	}
-	spin_unlock_irq(&np->lock);
-	return 0;
-}
-
-static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int adv;
-
-	spin_lock_irq(&np->lock);
-	ecmd->port = PORT_MII;
-	if (!netif_running(dev)) {
-		/* We do not track link speed / duplex setting if the
-		 * interface is disabled. Force a link check */
-		nv_update_linkspeed(dev);
-	}
-	switch(np->linkspeed & (NVREG_LINKSPEED_MASK)) {
-		case NVREG_LINKSPEED_10:
-			ecmd->speed = SPEED_10;
-			break;
-		case NVREG_LINKSPEED_100:
-			ecmd->speed = SPEED_100;
-			break;
-		case NVREG_LINKSPEED_1000:
-			ecmd->speed = SPEED_1000;
-			break;
-	}
-	ecmd->duplex = DUPLEX_HALF;
-	if (np->duplex)
-		ecmd->duplex = DUPLEX_FULL;
-
-	ecmd->autoneg = np->autoneg;
-
-	ecmd->advertising = ADVERTISED_MII;
-	if (np->autoneg) {
-		ecmd->advertising |= ADVERTISED_Autoneg;
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-	} else {
-		adv = np->fixed_mode;
-	}
-	if (adv & ADVERTISE_10HALF)
-		ecmd->advertising |= ADVERTISED_10baseT_Half;
-	if (adv & ADVERTISE_10FULL)
-		ecmd->advertising |= ADVERTISED_10baseT_Full;
-	if (adv & ADVERTISE_100HALF)
-		ecmd->advertising |= ADVERTISED_100baseT_Half;
-	if (adv & ADVERTISE_100FULL)
-		ecmd->advertising |= ADVERTISED_100baseT_Full;
-	if (np->autoneg && np->gigabit == PHY_GIGABIT) {
-		adv = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ);
-		if (adv & ADVERTISE_1000FULL)
-			ecmd->advertising |= ADVERTISED_1000baseT_Full;
-	}
-
-	ecmd->supported = (SUPPORTED_Autoneg |
-		SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
-		SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
-		SUPPORTED_MII);
-	if (np->gigabit == PHY_GIGABIT)
-		ecmd->supported |= SUPPORTED_1000baseT_Full;
-
-	ecmd->phy_address = np->phyaddr;
-	ecmd->transceiver = XCVR_EXTERNAL;
-
-	/* ignore maxtxpkt, maxrxpkt for now */
-	spin_unlock_irq(&np->lock);
-	return 0;
-}
-
-static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (ecmd->port != PORT_MII)
-		return -EINVAL;
-	if (ecmd->transceiver != XCVR_EXTERNAL)
-		return -EINVAL;
-	if (ecmd->phy_address != np->phyaddr) {
-		/* TODO: support switching between multiple phys. Should be
-		 * trivial, but not enabled due to lack of test hardware. */
-		return -EINVAL;
-	}
-	if (ecmd->autoneg == AUTONEG_ENABLE) {
-		u32 mask;
-
-		mask = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
-			  ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
-		if (np->gigabit == PHY_GIGABIT)
-			mask |= ADVERTISED_1000baseT_Full;
-
-		if ((ecmd->advertising & mask) == 0)
-			return -EINVAL;
-
-	} else if (ecmd->autoneg == AUTONEG_DISABLE) {
-		/* Note: autonegotiation disable, speed 1000 intentionally
-		 * forbidden - noone should need that. */
-
-		if (ecmd->speed != SPEED_10 && ecmd->speed != SPEED_100)
-			return -EINVAL;
-		if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
-			return -EINVAL;
-	} else {
-		return -EINVAL;
-	}
-
-	spin_lock_irq(&np->lock);
-	if (ecmd->autoneg == AUTONEG_ENABLE) {
-		int adv, bmcr;
-
-		np->autoneg = 1;
-
-		/* advertise only what has been requested */
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
-		if (ecmd->advertising & ADVERTISED_10baseT_Half)
-			adv |= ADVERTISE_10HALF;
-		if (ecmd->advertising & ADVERTISED_10baseT_Full)
-			adv |= ADVERTISE_10FULL;
-		if (ecmd->advertising & ADVERTISED_100baseT_Half)
-			adv |= ADVERTISE_100HALF;
-		if (ecmd->advertising & ADVERTISED_100baseT_Full)
-			adv |= ADVERTISE_100FULL;
-		mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
-
-		if (np->gigabit == PHY_GIGABIT) {
-			adv = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ);
-			adv &= ~ADVERTISE_1000FULL;
-			if (ecmd->advertising & ADVERTISED_1000baseT_Full)
-				adv |= ADVERTISE_1000FULL;
-			mii_rw(dev, np->phyaddr, MII_1000BT_CR, adv);
-		}
-
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-		mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-
-	} else {
-		int adv, bmcr;
-
-		np->autoneg = 0;
-
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
-		if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_HALF)
-			adv |= ADVERTISE_10HALF;
-		if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_FULL)
-			adv |= ADVERTISE_10FULL;
-		if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_HALF)
-			adv |= ADVERTISE_100HALF;
-		if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_FULL)
-			adv |= ADVERTISE_100FULL;
-		mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
-		np->fixed_mode = adv;
-
-		if (np->gigabit == PHY_GIGABIT) {
-			adv = mii_rw(dev, np->phyaddr, MII_1000BT_CR, MII_READ);
-			adv &= ~ADVERTISE_1000FULL;
-			mii_rw(dev, np->phyaddr, MII_1000BT_CR, adv);
-		}
-
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		bmcr |= ~(BMCR_ANENABLE|BMCR_SPEED100|BMCR_FULLDPLX);
-		if (adv & (ADVERTISE_10FULL|ADVERTISE_100FULL))
-			bmcr |= BMCR_FULLDPLX;
-		if (adv & (ADVERTISE_100HALF|ADVERTISE_100FULL))
-			bmcr |= BMCR_SPEED100;
-		mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-
-		if (netif_running(dev)) {
-			/* Wait a bit and then reconfigure the nic. */
-			udelay(10);
-			nv_linkchange(dev);
-		}
-	}
-	spin_unlock_irq(&np->lock);
-
-	return 0;
-}
-
-#define FORCEDETH_REGS_VER	1
-
-static int nv_get_regs_len(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	return np->register_size;
-}
-
-static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 *rbuf = buf;
-	int i;
-
-	regs->version = FORCEDETH_REGS_VER;
-	spin_lock_irq(&np->lock);
-	for (i = 0;i <= np->register_size/sizeof(u32); i++)
-		rbuf[i] = readl(base + i*sizeof(u32));
-	spin_unlock_irq(&np->lock);
-}
-
-static int nv_nway_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int ret;
-
-	spin_lock_irq(&np->lock);
-	if (np->autoneg) {
-		int bmcr;
-
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-		mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-
-		ret = 0;
-	} else {
-		ret = -EINVAL;
-	}
-	spin_unlock_irq(&np->lock);
-
-	return ret;
-}
-
-#ifdef NETIF_F_TSO
-static int nv_set_tso(struct net_device *dev, u32 value)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if ((np->driver_data & DEV_HAS_CHECKSUM))
-		return ethtool_op_set_tso(dev, value);
-	else
-		return value ? -EOPNOTSUPP : 0;
-}
-#endif
-
-static struct ethtool_ops ops = {
-	.get_drvinfo = nv_get_drvinfo,
-	.get_link = ethtool_op_get_link,
-	.get_wol = nv_get_wol,
-	.set_wol = nv_set_wol,
-	.get_settings = nv_get_settings,
-	.set_settings = nv_set_settings,
-	.get_regs_len = nv_get_regs_len,
-	.get_regs = nv_get_regs,
-	.nway_reset = nv_nway_reset,
-	.get_perm_addr = ethtool_op_get_perm_addr,
-#ifdef NETIF_F_TSO
-	.get_tso = ethtool_op_get_tso,
-	.set_tso = nv_set_tso
-#endif
-};
-
-static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	spin_lock_irq(&np->lock);
-
-	/* save vlan group */
-	np->vlangrp = grp;
-
-	if (grp) {
-		/* enable vlan on MAC */
-		np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS;
-	} else {
-		/* disable vlan on MAC */
-		np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP;
-		np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS;
-	}
-
-	writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-
-	spin_unlock_irq(&np->lock);
-};
-
-static void nv_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
-{
-	/* nothing to do */
-};
-
-static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	int i;
-	u32 msixmap = 0;
-
-	/* Each interrupt bit can be mapped to a MSIX vector (4 bits).
-	 * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents
-	 * the remaining 8 interrupts.
-	 */
-	for (i = 0; i < 8; i++) {
-		if ((irqmask >> i) & 0x1) {
-			msixmap |= vector << (i << 2);
-		}
-	}
-	writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0);
-
-	msixmap = 0;
-	for (i = 0; i < 8; i++) {
-		if ((irqmask >> (i + 8)) & 0x1) {
-			msixmap |= vector << (i << 2);
-		}
-	}
-	writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1);
-}
-
-static int nv_request_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int ret = 1;
-	int i;
-
-	if (np->msi_flags & NV_MSI_X_CAPABLE) {
-		for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
-			np->msi_x_entry[i].entry = i;
-		}
-		if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) {
-			np->msi_flags |= NV_MSI_X_ENABLED;
-			if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) {
-				/* Request irq for rx handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, &nv_nic_irq_rx, SA_SHIRQ, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for rx %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_err;
-				}
-				/* Request irq for tx handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, &nv_nic_irq_tx, SA_SHIRQ, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for tx %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_free_rx;
-				}
-				/* Request irq for link and timer handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector, &nv_nic_irq_other, SA_SHIRQ, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for link %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_free_tx;
-				}
-				/* map interrupts to their respective vector */
-				writel(0, base + NvRegMSIXMap0);
-				writel(0, base + NvRegMSIXMap1);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER);
-			} else {
-				/* Request irq for all interrupts */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_err;
-				}
-
-				/* map interrupts to vector 0 */
-				writel(0, base + NvRegMSIXMap0);
-				writel(0, base + NvRegMSIXMap1);
-			}
-		}
-	}
-	if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) {
-		if ((ret = pci_enable_msi(np->pci_dev)) == 0) {
-			np->msi_flags |= NV_MSI_ENABLED;
-			if (request_irq(np->pci_dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0) {
-				printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
-				pci_disable_msi(np->pci_dev);
-				np->msi_flags &= ~NV_MSI_ENABLED;
-				goto out_err;
-			}
-
-			/* map interrupts to vector 0 */
-			writel(0, base + NvRegMSIMap0);
-			writel(0, base + NvRegMSIMap1);
-			/* enable msi vector 0 */
-			writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask);
-		}
-	}
-	if (ret != 0) {
-		if (request_irq(np->pci_dev->irq, &nv_nic_irq, SA_SHIRQ, dev->name, dev) != 0)
-			goto out_err;
-	}
-
-	return 0;
-out_free_tx:
-	free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, dev);
-out_free_rx:
-	free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, dev);
-out_err:
-	return 1;
-}
-
-static void nv_free_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	int i;
-
-	if (np->msi_flags & NV_MSI_X_ENABLED) {
-		for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
-			free_irq(np->msi_x_entry[i].vector, dev);
-		}
-		pci_disable_msix(np->pci_dev);
-		np->msi_flags &= ~NV_MSI_X_ENABLED;
-	} else {
-		free_irq(np->pci_dev->irq, dev);
-		if (np->msi_flags & NV_MSI_ENABLED) {
-			pci_disable_msi(np->pci_dev);
-			np->msi_flags &= ~NV_MSI_ENABLED;
-		}
-	}
-}
-
-static int nv_open(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int ret = 1;
-	int oom, i;
-
-	dprintk(KERN_DEBUG "nv_open: begin\n");
-
-	/* 1) erase previous misconfiguration */
-	if (np->driver_data & DEV_HAS_POWER_CNTRL)
-		nv_mac_reset(dev);
-	/* 4.1-1: stop adapter: ignored, 4.3 seems to be overkill */
-	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
-	writel(0, base + NvRegMulticastAddrB);
-	writel(0, base + NvRegMulticastMaskA);
-	writel(0, base + NvRegMulticastMaskB);
-	writel(0, base + NvRegPacketFilterFlags);
-
-	writel(0, base + NvRegTransmitterControl);
-	writel(0, base + NvRegReceiverControl);
-
-	writel(0, base + NvRegAdapterControl);
-
-	/* 2) initialize descriptor rings */
-	set_bufsize(dev);
-	oom = nv_init_ring(dev);
-
-	writel(0, base + NvRegLinkSpeed);
-	writel(0, base + NvRegUnknownTransmitterReg);
-	nv_txrx_reset(dev);
-	writel(0, base + NvRegUnknownSetupReg6);
-
-	np->in_shutdown = 0;
-
-	/* 3) set mac address */
-	nv_copy_mac_to_hw(dev);
-
-	/* 4) give hw rings */
-	setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-	writel( ((RX_RING-1) << NVREG_RINGSZ_RXSHIFT) + ((TX_RING-1) << NVREG_RINGSZ_TXSHIFT),
-		base + NvRegRingSizes);
-
-	/* 5) continue setup */
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	writel(NVREG_UNKSETUP3_VAL1, base + NvRegUnknownSetupReg3);
-	writel(np->txrxctl_bits, base + NvRegTxRxControl);
-	writel(np->vlanctl_bits, base + NvRegVlanControl);
-	pci_push(base);
-	writel(NVREG_TXRXCTL_BIT1|np->txrxctl_bits, base + NvRegTxRxControl);
-	reg_delay(dev, NvRegUnknownSetupReg5, NVREG_UNKSETUP5_BIT31, NVREG_UNKSETUP5_BIT31,
-			NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX,
-			KERN_INFO "open: SetupReg5, Bit 31 remained off\n");
-
-	writel(0, base + NvRegUnknownSetupReg4);
-	writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-	writel(NVREG_MIISTAT_MASK2, base + NvRegMIIStatus);
-
-	/* 6) continue setup */
-	writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1);
-	writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus);
-	writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags);
-	writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-
-	writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);
-	get_random_bytes(&i, sizeof(i));
-	writel(NVREG_RNDSEED_FORCE | (i&NVREG_RNDSEED_MASK), base + NvRegRandomSeed);
-	writel(NVREG_UNKSETUP1_VAL, base + NvRegUnknownSetupReg1);
-	writel(NVREG_UNKSETUP2_VAL, base + NvRegUnknownSetupReg2);
-	if (poll_interval == -1) {
-		if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT)
-			writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval);
-		else
-			writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
-	}
-	else
-		writel(poll_interval & 0xFFFF, base + NvRegPollingInterval);
-	writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
-	writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING,
-			base + NvRegAdapterControl);
-	writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed);
-	writel(NVREG_UNKSETUP4_VAL, base + NvRegUnknownSetupReg4);
-	writel(NVREG_WAKEUPFLAGS_VAL, base + NvRegWakeUpFlags);
-
-	i = readl(base + NvRegPowerState);
-	if ( (i & NVREG_POWERSTATE_POWEREDUP) == 0)
-		writel(NVREG_POWERSTATE_POWEREDUP|i, base + NvRegPowerState);
-
-	pci_push(base);
-	udelay(10);
-	writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID, base + NvRegPowerState);
-
-	nv_disable_hw_interrupts(dev, np->irqmask);
-	pci_push(base);
-	writel(NVREG_MIISTAT_MASK2, base + NvRegMIIStatus);
-	writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-	pci_push(base);
-
-	if (nv_request_irq(dev)) {
-		goto out_drain;
-	}
-
-	/* ask for interrupts */
-	nv_enable_hw_interrupts(dev, np->irqmask);
-
-	spin_lock_irq(&np->lock);
-	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
-	writel(0, base + NvRegMulticastAddrB);
-	writel(0, base + NvRegMulticastMaskA);
-	writel(0, base + NvRegMulticastMaskB);
-	writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);
-	/* One manual link speed update: Interrupts are enabled, future link
-	 * speed changes cause interrupts and are handled by nv_link_irq().
-	 */
-	{
-		u32 miistat;
-		miistat = readl(base + NvRegMIIStatus);
-		writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-		dprintk(KERN_INFO "startup: got 0x%08x.\n", miistat);
-	}
-	/* set linkspeed to invalid value, thus force nv_update_linkspeed
-	 * to init hw */
-	np->linkspeed = 0;
-	ret = nv_update_linkspeed(dev);
-	nv_start_rx(dev);
-	nv_start_tx(dev);
-	netif_start_queue(dev);
-	if (ret) {
-		netif_carrier_on(dev);
-	} else {
-		printk("%s: no link during initialization.\n", dev->name);
-		netif_carrier_off(dev);
-	}
-	if (oom)
-		mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-	spin_unlock_irq(&np->lock);
-
-	return 0;
-out_drain:
-	drain_ring(dev);
-	return ret;
-}
-
-static int nv_close(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base;
-
-	spin_lock_irq(&np->lock);
-	np->in_shutdown = 1;
-	spin_unlock_irq(&np->lock);
-	synchronize_irq(dev->irq);
-
-	del_timer_sync(&np->oom_kick);
-	del_timer_sync(&np->nic_poll);
-
-	netif_stop_queue(dev);
-	spin_lock_irq(&np->lock);
-	nv_stop_tx(dev);
-	nv_stop_rx(dev);
-	nv_txrx_reset(dev);
-
-	/* disable interrupts on the nic or we will lock up */
-	base = get_hwbase(dev);
-	nv_disable_hw_interrupts(dev, np->irqmask);
-	pci_push(base);
-	dprintk(KERN_INFO "%s: Irqmask is zero again\n", dev->name);
-
-	spin_unlock_irq(&np->lock);
-
-	nv_free_irq(dev);
-
-	drain_ring(dev);
-
-	if (np->wolenabled)
-		nv_start_rx(dev);
-
-	/* special op: write back the misordered MAC address - otherwise
-	 * the next nv_probe would see a wrong address.
-	 */
-	writel(np->orig_mac[0], base + NvRegMacAddrA);
-	writel(np->orig_mac[1], base + NvRegMacAddrB);
-
-	/* FIXME: power down nic */
-
-	return 0;
-}
-
-static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
-{
-	struct net_device *dev;
-	struct fe_priv *np;
-	unsigned long addr;
-	u8 __iomem *base;
-	int err, i;
-	u32 powerstate;
-
-	dev = alloc_etherdev(sizeof(struct fe_priv));
-	err = -ENOMEM;
-	if (!dev)
-		goto out;
-
-	np = netdev_priv(dev);
-	np->pci_dev = pci_dev;
-	spin_lock_init(&np->lock);
-	SET_MODULE_OWNER(dev);
-	SET_NETDEV_DEV(dev, &pci_dev->dev);
-
-	init_timer(&np->oom_kick);
-	np->oom_kick.data = (unsigned long) dev;
-	np->oom_kick.function = &nv_do_rx_refill;	/* timer handler */
-	init_timer(&np->nic_poll);
-	np->nic_poll.data = (unsigned long) dev;
-	np->nic_poll.function = &nv_do_nic_poll;	/* timer handler */
-
-	err = pci_enable_device(pci_dev);
-	if (err) {
-		printk(KERN_INFO "forcedeth: pci_enable_dev failed (%d) for device %s\n",
-				err, pci_name(pci_dev));
-		goto out_free;
-	}
-
-	pci_set_master(pci_dev);
-
-	err = pci_request_regions(pci_dev, DRV_NAME);
-	if (err < 0)
-		goto out_disable;
-
-	if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL))
-		np->register_size = NV_PCI_REGSZ_VER2;
-	else
-		np->register_size = NV_PCI_REGSZ_VER1;
-
-	err = -EINVAL;
-	addr = 0;
-	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
-		dprintk(KERN_DEBUG "%s: resource %d start %p len %ld flags 0x%08lx.\n",
-				pci_name(pci_dev), i, (void*)pci_resource_start(pci_dev, i),
-				pci_resource_len(pci_dev, i),
-				pci_resource_flags(pci_dev, i));
-		if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM &&
-				pci_resource_len(pci_dev, i) >= np->register_size) {
-			addr = pci_resource_start(pci_dev, i);
-			break;
-		}
-	}
-	if (i == DEVICE_COUNT_RESOURCE) {
-		printk(KERN_INFO "forcedeth: Couldn't find register window for device %s.\n",
-					pci_name(pci_dev));
-		goto out_relreg;
-	}
-
-	/* copy of driver data */
-	np->driver_data = id->driver_data;
-
-	/* handle different descriptor versions */
-	if (id->driver_data & DEV_HAS_HIGH_DMA) {
-		/* packet format 3: supports 40-bit addressing */
-		np->desc_ver = DESC_VER_3;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_3;
-		if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) {
-			printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n",
-					pci_name(pci_dev));
-		} else {
-			dev->features |= NETIF_F_HIGHDMA;
-			printk(KERN_INFO "forcedeth: using HIGHDMA\n");
-		}
-		if (pci_set_consistent_dma_mask(pci_dev, 0x0000007fffffffffULL)) {
-			printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed for device %s.\n",
-			       pci_name(pci_dev));
-		}
-	} else if (id->driver_data & DEV_HAS_LARGEDESC) {
-		/* packet format 2: supports jumbo frames */
-		np->desc_ver = DESC_VER_2;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_2;
-	} else {
-		/* original packet format */
-		np->desc_ver = DESC_VER_1;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_1;
-	}
-
-	np->pkt_limit = NV_PKTLIMIT_1;
-	if (id->driver_data & DEV_HAS_LARGEDESC)
-		np->pkt_limit = NV_PKTLIMIT_2;
-
-	if (id->driver_data & DEV_HAS_CHECKSUM) {
-		np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK;
-		dev->features |= NETIF_F_HW_CSUM | NETIF_F_SG;
-#ifdef NETIF_F_TSO
-		dev->features |= NETIF_F_TSO;
-#endif
- 	}
-
-	np->vlanctl_bits = 0;
-	if (id->driver_data & DEV_HAS_VLAN) {
-		np->vlanctl_bits = NVREG_VLANCONTROL_ENABLE;
-		dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX;
-		dev->vlan_rx_register = nv_vlan_rx_register;
-		dev->vlan_rx_kill_vid = nv_vlan_rx_kill_vid;
-	}
-
-	np->msi_flags = 0;
-	if ((id->driver_data & DEV_HAS_MSI) && !disable_msi) {
-		np->msi_flags |= NV_MSI_CAPABLE;
-	}
-	if ((id->driver_data & DEV_HAS_MSI_X) && !disable_msix) {
-		np->msi_flags |= NV_MSI_X_CAPABLE;
-	}
-
-	err = -ENOMEM;
-	np->base = ioremap(addr, np->register_size);
-	if (!np->base)
-		goto out_relreg;
-	dev->base_addr = (unsigned long)np->base;
-
-	dev->irq = pci_dev->irq;
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->rx_ring.orig = pci_alloc_consistent(pci_dev,
-					sizeof(struct ring_desc) * (RX_RING + TX_RING),
-					&np->ring_addr);
-		if (!np->rx_ring.orig)
-			goto out_unmap;
-		np->tx_ring.orig = &np->rx_ring.orig[RX_RING];
-	} else {
-		np->rx_ring.ex = pci_alloc_consistent(pci_dev,
-					sizeof(struct ring_desc_ex) * (RX_RING + TX_RING),
-					&np->ring_addr);
-		if (!np->rx_ring.ex)
-			goto out_unmap;
-		np->tx_ring.ex = &np->rx_ring.ex[RX_RING];
-	}
-
-	dev->open = nv_open;
-	dev->stop = nv_close;
-	dev->hard_start_xmit = nv_start_xmit;
-	dev->get_stats = nv_get_stats;
-	dev->change_mtu = nv_change_mtu;
-	dev->set_mac_address = nv_set_mac_address;
-	dev->set_multicast_list = nv_set_multicast;
-#ifdef CONFIG_NET_POLL_CONTROLLER
-	dev->poll_controller = nv_poll_controller;
-#endif
-	SET_ETHTOOL_OPS(dev, &ops);
-	dev->tx_timeout = nv_tx_timeout;
-	dev->watchdog_timeo = NV_WATCHDOG_TIMEO;
-
-	pci_set_drvdata(pci_dev, dev);
-
-	/* read the mac address */
-	base = get_hwbase(dev);
-	np->orig_mac[0] = readl(base + NvRegMacAddrA);
-	np->orig_mac[1] = readl(base + NvRegMacAddrB);
-
-	dev->dev_addr[0] = (np->orig_mac[1] >>  8) & 0xff;
-	dev->dev_addr[1] = (np->orig_mac[1] >>  0) & 0xff;
-	dev->dev_addr[2] = (np->orig_mac[0] >> 24) & 0xff;
-	dev->dev_addr[3] = (np->orig_mac[0] >> 16) & 0xff;
-	dev->dev_addr[4] = (np->orig_mac[0] >>  8) & 0xff;
-	dev->dev_addr[5] = (np->orig_mac[0] >>  0) & 0xff;
-	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
-
-	if (!is_valid_ether_addr(dev->perm_addr)) {
-		/*
-		 * Bad mac address. At least one bios sets the mac address
-		 * to 01:23:45:67:89:ab
-		 */
-		printk(KERN_ERR "%s: Invalid Mac address detected: %02x:%02x:%02x:%02x:%02x:%02x\n",
-			pci_name(pci_dev),
-			dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
-			dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
-		printk(KERN_ERR "Please complain to your hardware vendor. Switching to a random MAC.\n");
-		dev->dev_addr[0] = 0x00;
-		dev->dev_addr[1] = 0x00;
-		dev->dev_addr[2] = 0x6c;
-		get_random_bytes(&dev->dev_addr[3], 3);
-	}
-
-	dprintk(KERN_DEBUG "%s: MAC Address %02x:%02x:%02x:%02x:%02x:%02x\n", pci_name(pci_dev),
-			dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
-			dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
-
-	/* disable WOL */
-	writel(0, base + NvRegWakeUpFlags);
-	np->wolenabled = 0;
-
-	if (id->driver_data & DEV_HAS_POWER_CNTRL) {
-		u8 revision_id;
-		pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id);
-
-		/* take phy and nic out of low power mode */
-		powerstate = readl(base + NvRegPowerState2);
-		powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK;
-		if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 ||
-		     id->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) &&
-		    revision_id >= 0xA3)
-			powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3;
-		writel(powerstate, base + NvRegPowerState2);
-	}
-
-	if (np->desc_ver == DESC_VER_1) {
-		np->tx_flags = NV_TX_VALID;
-	} else {
-		np->tx_flags = NV_TX2_VALID;
-	}
-	if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) {
-		np->irqmask = NVREG_IRQMASK_THROUGHPUT;
-		if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
-			np->msi_flags |= 0x0003;
-	} else {
-		np->irqmask = NVREG_IRQMASK_CPU;
-		if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
-			np->msi_flags |= 0x0001;
-	}
-
-	if (id->driver_data & DEV_NEED_TIMERIRQ)
-		np->irqmask |= NVREG_IRQ_TIMER;
-	if (id->driver_data & DEV_NEED_LINKTIMER) {
-		dprintk(KERN_INFO "%s: link timer on.\n", pci_name(pci_dev));
-		np->need_linktimer = 1;
-		np->link_timeout = jiffies + LINK_TIMEOUT;
-	} else {
-		dprintk(KERN_INFO "%s: link timer off.\n", pci_name(pci_dev));
-		np->need_linktimer = 0;
-	}
-
-	/* find a suitable phy */
-	for (i = 1; i <= 32; i++) {
-		int id1, id2;
-		int phyaddr = i & 0x1F;
-
-		spin_lock_irq(&np->lock);
-		id1 = mii_rw(dev, phyaddr, MII_PHYSID1, MII_READ);
-		spin_unlock_irq(&np->lock);
-		if (id1 < 0 || id1 == 0xffff)
-			continue;
-		spin_lock_irq(&np->lock);
-		id2 = mii_rw(dev, phyaddr, MII_PHYSID2, MII_READ);
-		spin_unlock_irq(&np->lock);
-		if (id2 < 0 || id2 == 0xffff)
-			continue;
-
-		id1 = (id1 & PHYID1_OUI_MASK) << PHYID1_OUI_SHFT;
-		id2 = (id2 & PHYID2_OUI_MASK) >> PHYID2_OUI_SHFT;
-		dprintk(KERN_DEBUG "%s: open: Found PHY %04x:%04x at address %d.\n",
-			pci_name(pci_dev), id1, id2, phyaddr);
-		np->phyaddr = phyaddr;
-		np->phy_oui = id1 | id2;
-		break;
-	}
-	if (i == 33) {
-		printk(KERN_INFO "%s: open: Could not find a valid PHY.\n",
-		       pci_name(pci_dev));
-		goto out_freering;
-	}
-	
-	/* reset it */
-	phy_init(dev);
-
-	/* set default link speed settings */
-	np->linkspeed = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-	np->duplex = 0;
-	np->autoneg = 1;
-
-	err = register_netdev(dev);
-	if (err) {
-		printk(KERN_INFO "forcedeth: unable to register netdev: %d\n", err);
-		goto out_freering;
-	}
-	printk(KERN_INFO "%s: forcedeth.c: subsystem: %05x:%04x bound to %s\n",
-			dev->name, pci_dev->subsystem_vendor, pci_dev->subsystem_device,
-			pci_name(pci_dev));
-
-	return 0;
-
-out_freering:
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-		pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING),
-				    np->rx_ring.orig, np->ring_addr);
-	else
-		pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (RX_RING + TX_RING),
-				    np->rx_ring.ex, np->ring_addr);
-	pci_set_drvdata(pci_dev, NULL);
-out_unmap:
-	iounmap(get_hwbase(dev));
-out_relreg:
-	pci_release_regions(pci_dev);
-out_disable:
-	pci_disable_device(pci_dev);
-out_free:
-	free_netdev(dev);
-out:
-	return err;
-}
-
-static void __devexit nv_remove(struct pci_dev *pci_dev)
-{
-	struct net_device *dev = pci_get_drvdata(pci_dev);
-	struct fe_priv *np = netdev_priv(dev);
-
-	unregister_netdev(dev);
-
-	/* free all structures */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-		pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (RX_RING + TX_RING), np->rx_ring.orig, np->ring_addr);
-	else
-		pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (RX_RING + TX_RING), np->rx_ring.ex, np->ring_addr);
-	iounmap(get_hwbase(dev));
-	pci_release_regions(pci_dev);
-	pci_disable_device(pci_dev);
-	free_netdev(dev);
-	pci_set_drvdata(pci_dev, NULL);
-}
-
-static struct pci_device_id pci_tbl[] = {
-	{	/* nForce Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_1),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce2 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_2),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_3),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_4),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_5),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_6),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_7),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* CK804 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_8),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* CK804 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_9),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP04 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_10),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP04 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_11),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP51 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL,
-	},
-	{	/* MCP51 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL,
-	},
-	{	/* MCP55 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL,
-	},
-	{	/* MCP55 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL,
-	},
-	{0,},
-};
-
-static struct pci_driver driver = {
-	.name = "forcedeth",
-	.id_table = pci_tbl,
-	.probe = nv_probe,
-	.remove = __devexit_p(nv_remove),
-};
-
-
-static int __init init_nic(void)
-{
-	printk(KERN_INFO "forcedeth.c: Reverse Engineered nForce ethernet driver. Version %s.\n", FORCEDETH_VERSION);
-	return pci_module_init(&driver);
-}
-
-static void __exit exit_nic(void)
-{
-	pci_unregister_driver(&driver);
-}
-
-module_param(max_interrupt_work, int, 0);
-MODULE_PARM_DESC(max_interrupt_work, "forcedeth maximum events handled per interrupt");
-module_param(optimization_mode, int, 0);
-MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer.");
-module_param(poll_interval, int, 0);
-MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535.");
-module_param(disable_msi, int, 0);
-MODULE_PARM_DESC(disable_msi, "Disable MSI interrupts by setting to 1.");
-module_param(disable_msix, int, 0);
-MODULE_PARM_DESC(disable_msix, "Disable MSIX interrupts by setting to 1.");
-
-MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>");
-MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver");
-MODULE_LICENSE("GPL");
-
-MODULE_DEVICE_TABLE(pci, pci_tbl);
-
-module_init(init_nic);
-module_exit(exit_nic);
--- a/devices/forcedeth-2.6.19-ethercat.c	Mon Jul 28 08:30:44 2008 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,4837 +0,0 @@
-/*
- * forcedeth: Ethernet driver for NVIDIA nForce media access controllers.
- *
- * Note: This driver is a cleanroom reimplementation based on reverse
- *      engineered documentation written by Carl-Daniel Hailfinger
- *      and Andrew de Quincey. It's neither supported nor endorsed
- *      by NVIDIA Corp. Use at your own risk.
- *
- * NVIDIA, nForce and other NVIDIA marks are trademarks or registered
- * trademarks of NVIDIA Corporation in the United States and other
- * countries.
- *
- * Copyright (C) 2003,4,5 Manfred Spraul
- * Copyright (C) 2004 Andrew de Quincey (wol support)
- * Copyright (C) 2004 Carl-Daniel Hailfinger (invalid MAC handling, insane
- *		IRQ rate fixes, bigendian fixes, cleanups, verification)
- * Copyright (c) 2004 NVIDIA Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- * Changelog:
- * 	0.01: 05 Oct 2003: First release that compiles without warnings.
- * 	0.02: 05 Oct 2003: Fix bug for nv_drain_tx: do not try to free NULL skbs.
- * 			   Check all PCI BARs for the register window.
- * 			   udelay added to mii_rw.
- * 	0.03: 06 Oct 2003: Initialize dev->irq.
- * 	0.04: 07 Oct 2003: Initialize np->lock, reduce handled irqs, add printks.
- * 	0.05: 09 Oct 2003: printk removed again, irq status print tx_timeout.
- * 	0.06: 10 Oct 2003: MAC Address read updated, pff flag generation updated,
- * 			   irq mask updated
- * 	0.07: 14 Oct 2003: Further irq mask updates.
- * 	0.08: 20 Oct 2003: rx_desc.Length initialization added, nv_alloc_rx refill
- * 			   added into irq handler, NULL check for drain_ring.
- * 	0.09: 20 Oct 2003: Basic link speed irq implementation. Only handle the
- * 			   requested interrupt sources.
- * 	0.10: 20 Oct 2003: First cleanup for release.
- * 	0.11: 21 Oct 2003: hexdump for tx added, rx buffer sizes increased.
- * 			   MAC Address init fix, set_multicast cleanup.
- * 	0.12: 23 Oct 2003: Cleanups for release.
- * 	0.13: 25 Oct 2003: Limit for concurrent tx packets increased to 10.
- * 			   Set link speed correctly. start rx before starting
- * 			   tx (nv_start_rx sets the link speed).
- * 	0.14: 25 Oct 2003: Nic dependant irq mask.
- * 	0.15: 08 Nov 2003: fix smp deadlock with set_multicast_list during
- * 			   open.
- * 	0.16: 15 Nov 2003: include file cleanup for ppc64, rx buffer size
- * 			   increased to 1628 bytes.
- * 	0.17: 16 Nov 2003: undo rx buffer size increase. Substract 1 from
- * 			   the tx length.
- * 	0.18: 17 Nov 2003: fix oops due to late initialization of dev_stats
- * 	0.19: 29 Nov 2003: Handle RxNoBuf, detect & handle invalid mac
- * 			   addresses, really stop rx if already running
- * 			   in nv_start_rx, clean up a bit.
- * 	0.20: 07 Dec 2003: alloc fixes
- * 	0.21: 12 Jan 2004: additional alloc fix, nic polling fix.
- *	0.22: 19 Jan 2004: reprogram timer to a sane rate, avoid lockup
- *			   on close.
- *	0.23: 26 Jan 2004: various small cleanups
- *	0.24: 27 Feb 2004: make driver even less anonymous in backtraces
- *	0.25: 09 Mar 2004: wol support
- *	0.26: 03 Jun 2004: netdriver specific annotation, sparse-related fixes
- *	0.27: 19 Jun 2004: Gigabit support, new descriptor rings,
- *			   added CK804/MCP04 device IDs, code fixes
- *			   for registers, link status and other minor fixes.
- *	0.28: 21 Jun 2004: Big cleanup, making driver mostly endian safe
- *	0.29: 31 Aug 2004: Add backup timer for link change notification.
- *	0.30: 25 Sep 2004: rx checksum support for nf 250 Gb. Add rx reset
- *			   into nv_close, otherwise reenabling for wol can
- *			   cause DMA to kfree'd memory.
- *	0.31: 14 Nov 2004: ethtool support for getting/setting link
- *			   capabilities.
- *	0.32: 16 Apr 2005: RX_ERROR4 handling added.
- *	0.33: 16 May 2005: Support for MCP51 added.
- *	0.34: 18 Jun 2005: Add DEV_NEED_LINKTIMER to all nForce nics.
- *	0.35: 26 Jun 2005: Support for MCP55 added.
- *	0.36: 28 Jun 2005: Add jumbo frame support.
- *	0.37: 10 Jul 2005: Additional ethtool support, cleanup of pci id list
- *	0.38: 16 Jul 2005: tx irq rewrite: Use global flags instead of
- *			   per-packet flags.
- *	0.39: 18 Jul 2005: Add 64bit descriptor support.
- *	0.40: 19 Jul 2005: Add support for mac address change.
- *	0.41: 30 Jul 2005: Write back original MAC in nv_close instead
- *			   of nv_remove
- *	0.42: 06 Aug 2005: Fix lack of link speed initialization
- *			   in the second (and later) nv_open call
- *	0.43: 10 Aug 2005: Add support for tx checksum.
- *	0.44: 20 Aug 2005: Add support for scatter gather and segmentation.
- *	0.45: 18 Sep 2005: Remove nv_stop/start_rx from every link check
- *	0.46: 20 Oct 2005: Add irq optimization modes.
- *	0.47: 26 Oct 2005: Add phyaddr 0 in phy scan.
- *	0.48: 24 Dec 2005: Disable TSO, bugfix for pci_map_single
- *	0.49: 10 Dec 2005: Fix tso for large buffers.
- *	0.50: 20 Jan 2006: Add 8021pq tagging support.
- *	0.51: 20 Jan 2006: Add 64bit consistent memory allocation for rings.
- *	0.52: 20 Jan 2006: Add MSI/MSIX support.
- *	0.53: 19 Mar 2006: Fix init from low power mode and add hw reset.
- *	0.54: 21 Mar 2006: Fix spin locks for multi irqs and cleanup.
- *	0.55: 22 Mar 2006: Add flow control (pause frame).
- *	0.56: 22 Mar 2006: Additional ethtool config and moduleparam support.
- *	0.57: 14 May 2006: Mac address set in probe/remove and order corrections.
- *
- * Known bugs:
- * We suspect that on some hardware no TX done interrupts are generated.
- * This means recovery from netif_stop_queue only happens if the hw timer
- * interrupt fires (100 times/second, configurable with NVREG_POLL_DEFAULT)
- * and the timer is active in the IRQMask, or if a rx packet arrives by chance.
- * If your hardware reliably generates tx done interrupts, then you can remove
- * DEV_NEED_TIMERIRQ from the driver_data flags.
- * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few
- * superfluous timer interrupts from the nic.
- */
-#ifdef CONFIG_FORCEDETH_NAPI
-#define DRIVERNAPI "-NAPI"
-#else
-#define DRIVERNAPI
-#endif
-#define FORCEDETH_VERSION		"0.57"
-#define DRV_NAME			"forcedeth"
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/delay.h>
-#include <linux/spinlock.h>
-#include <linux/ethtool.h>
-#include <linux/timer.h>
-#include <linux/skbuff.h>
-#include <linux/mii.h>
-#include <linux/random.h>
-#include <linux/init.h>
-#include <linux/if_vlan.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#include "../globals.h"
-#include "ecdev.h"
-
-#if 0
-#define dprintk			printk
-#else
-#define dprintk(x...)		do { } while (0)
-#endif
-
-
-/*
- * Hardware access:
- */
-
-#define DEV_NEED_TIMERIRQ	0x0001  /* set the timer irq flag in the irq mask */
-#define DEV_NEED_LINKTIMER	0x0002	/* poll link settings. Relies on the timer irq */
-#define DEV_HAS_LARGEDESC	0x0004	/* device supports jumbo frames and needs packet format 2 */
-#define DEV_HAS_HIGH_DMA        0x0008  /* device supports 64bit dma */
-#define DEV_HAS_CHECKSUM        0x0010  /* device supports tx and rx checksum offloads */
-#define DEV_HAS_VLAN            0x0020  /* device supports vlan tagging and striping */
-#define DEV_HAS_MSI             0x0040  /* device supports MSI */
-#define DEV_HAS_MSI_X           0x0080  /* device supports MSI-X */
-#define DEV_HAS_POWER_CNTRL     0x0100  /* device supports power savings */
-#define DEV_HAS_PAUSEFRAME_TX   0x0200  /* device supports tx pause frames */
-#define DEV_HAS_STATISTICS      0x0400  /* device supports hw statistics */
-#define DEV_HAS_TEST_EXTENDED   0x0800  /* device supports extended diagnostic test */
-
-enum {
-	NvRegIrqStatus = 0x000,
-#define NVREG_IRQSTAT_MIIEVENT	0x040
-#define NVREG_IRQSTAT_MASK		0x1ff
-	NvRegIrqMask = 0x004,
-#define NVREG_IRQ_RX_ERROR		0x0001
-#define NVREG_IRQ_RX			0x0002
-#define NVREG_IRQ_RX_NOBUF		0x0004
-#define NVREG_IRQ_TX_ERR		0x0008
-#define NVREG_IRQ_TX_OK			0x0010
-#define NVREG_IRQ_TIMER			0x0020
-#define NVREG_IRQ_LINK			0x0040
-#define NVREG_IRQ_RX_FORCED		0x0080
-#define NVREG_IRQ_TX_FORCED		0x0100
-#define NVREG_IRQMASK_THROUGHPUT	0x00df
-#define NVREG_IRQMASK_CPU		0x0040
-#define NVREG_IRQ_TX_ALL		(NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
-#define NVREG_IRQ_RX_ALL		(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED)
-#define NVREG_IRQ_OTHER			(NVREG_IRQ_TIMER|NVREG_IRQ_LINK)
-
-#define NVREG_IRQ_UNKNOWN	(~(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_TX_ERR| \
-					NVREG_IRQ_TX_OK|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RX_FORCED| \
-					NVREG_IRQ_TX_FORCED))
-
-	NvRegUnknownSetupReg6 = 0x008,
-#define NVREG_UNKSETUP6_VAL		3
-
-/*
- * NVREG_POLL_DEFAULT is the interval length of the timer source on the nic
- * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms
- */
-	NvRegPollingInterval = 0x00c,
-#define NVREG_POLL_DEFAULT_THROUGHPUT	970
-#define NVREG_POLL_DEFAULT_CPU	13
-	NvRegMSIMap0 = 0x020,
-	NvRegMSIMap1 = 0x024,
-	NvRegMSIIrqMask = 0x030,
-#define NVREG_MSI_VECTOR_0_ENABLED 0x01
-	NvRegMisc1 = 0x080,
-#define NVREG_MISC1_PAUSE_TX	0x01
-#define NVREG_MISC1_HD		0x02
-#define NVREG_MISC1_FORCE	0x3b0f3c
-
-	NvRegMacReset = 0x3c,
-#define NVREG_MAC_RESET_ASSERT	0x0F3
-	NvRegTransmitterControl = 0x084,
-#define NVREG_XMITCTL_START	0x01
-	NvRegTransmitterStatus = 0x088,
-#define NVREG_XMITSTAT_BUSY	0x01
-
-	NvRegPacketFilterFlags = 0x8c,
-#define NVREG_PFF_PAUSE_RX	0x08
-#define NVREG_PFF_ALWAYS	0x7F0000
-#define NVREG_PFF_PROMISC	0x80
-#define NVREG_PFF_MYADDR	0x20
-#define NVREG_PFF_LOOPBACK	0x10
-
-	NvRegOffloadConfig = 0x90,
-#define NVREG_OFFLOAD_HOMEPHY	0x601
-#define NVREG_OFFLOAD_NORMAL	RX_NIC_BUFSIZE
-	NvRegReceiverControl = 0x094,
-#define NVREG_RCVCTL_START	0x01
-	NvRegReceiverStatus = 0x98,
-#define NVREG_RCVSTAT_BUSY	0x01
-
-	NvRegRandomSeed = 0x9c,
-#define NVREG_RNDSEED_MASK	0x00ff
-#define NVREG_RNDSEED_FORCE	0x7f00
-#define NVREG_RNDSEED_FORCE2	0x2d00
-#define NVREG_RNDSEED_FORCE3	0x7400
-
-	NvRegTxDeferral = 0xA0,
-#define NVREG_TX_DEFERRAL_DEFAULT	0x15050f
-#define NVREG_TX_DEFERRAL_RGMII_10_100	0x16070f
-#define NVREG_TX_DEFERRAL_RGMII_1000	0x14050f
-	NvRegRxDeferral = 0xA4,
-#define NVREG_RX_DEFERRAL_DEFAULT	0x16
-	NvRegMacAddrA = 0xA8,
-	NvRegMacAddrB = 0xAC,
-	NvRegMulticastAddrA = 0xB0,
-#define NVREG_MCASTADDRA_FORCE	0x01
-	NvRegMulticastAddrB = 0xB4,
-	NvRegMulticastMaskA = 0xB8,
-	NvRegMulticastMaskB = 0xBC,
-
-	NvRegPhyInterface = 0xC0,
-#define PHY_RGMII		0x10000000
-
-	NvRegTxRingPhysAddr = 0x100,
-	NvRegRxRingPhysAddr = 0x104,
-	NvRegRingSizes = 0x108,
-#define NVREG_RINGSZ_TXSHIFT 0
-#define NVREG_RINGSZ_RXSHIFT 16
-	NvRegTransmitPoll = 0x10c,
-#define NVREG_TRANSMITPOLL_MAC_ADDR_REV	0x00008000
-	NvRegLinkSpeed = 0x110,
-#define NVREG_LINKSPEED_FORCE 0x10000
-#define NVREG_LINKSPEED_10	1000
-#define NVREG_LINKSPEED_100	100
-#define NVREG_LINKSPEED_1000	50
-#define NVREG_LINKSPEED_MASK	(0xFFF)
-	NvRegUnknownSetupReg5 = 0x130,
-#define NVREG_UNKSETUP5_BIT31	(1<<31)
-	NvRegTxWatermark = 0x13c,
-#define NVREG_TX_WM_DESC1_DEFAULT	0x0200010
-#define NVREG_TX_WM_DESC2_3_DEFAULT	0x1e08000
-#define NVREG_TX_WM_DESC2_3_1000	0xfe08000
-	NvRegTxRxControl = 0x144,
-#define NVREG_TXRXCTL_KICK	0x0001
-#define NVREG_TXRXCTL_BIT1	0x0002
-#define NVREG_TXRXCTL_BIT2	0x0004
-#define NVREG_TXRXCTL_IDLE	0x0008
-#define NVREG_TXRXCTL_RESET	0x0010
-#define NVREG_TXRXCTL_RXCHECK	0x0400
-#define NVREG_TXRXCTL_DESC_1	0
-#define NVREG_TXRXCTL_DESC_2	0x02100
-#define NVREG_TXRXCTL_DESC_3	0x02200
-#define NVREG_TXRXCTL_VLANSTRIP 0x00040
-#define NVREG_TXRXCTL_VLANINS	0x00080
-	NvRegTxRingPhysAddrHigh = 0x148,
-	NvRegRxRingPhysAddrHigh = 0x14C,
-	NvRegTxPauseFrame = 0x170,
-#define NVREG_TX_PAUSEFRAME_DISABLE	0x1ff0080
-#define NVREG_TX_PAUSEFRAME_ENABLE	0x0c00030
-	NvRegMIIStatus = 0x180,
-#define NVREG_MIISTAT_ERROR		0x0001
-#define NVREG_MIISTAT_LINKCHANGE	0x0008
-#define NVREG_MIISTAT_MASK		0x000f
-#define NVREG_MIISTAT_MASK2		0x000f
-	NvRegUnknownSetupReg4 = 0x184,
-#define NVREG_UNKSETUP4_VAL	8
-
-	NvRegAdapterControl = 0x188,
-#define NVREG_ADAPTCTL_START	0x02
-#define NVREG_ADAPTCTL_LINKUP	0x04
-#define NVREG_ADAPTCTL_PHYVALID	0x40000
-#define NVREG_ADAPTCTL_RUNNING	0x100000
-#define NVREG_ADAPTCTL_PHYSHIFT	24
-	NvRegMIISpeed = 0x18c,
-#define NVREG_MIISPEED_BIT8	(1<<8)
-#define NVREG_MIIDELAY	5
-	NvRegMIIControl = 0x190,
-#define NVREG_MIICTL_INUSE	0x08000
-#define NVREG_MIICTL_WRITE	0x00400
-#define NVREG_MIICTL_ADDRSHIFT	5
-	NvRegMIIData = 0x194,
-	NvRegWakeUpFlags = 0x200,
-#define NVREG_WAKEUPFLAGS_VAL		0x7770
-#define NVREG_WAKEUPFLAGS_BUSYSHIFT	24
-#define NVREG_WAKEUPFLAGS_ENABLESHIFT	16
-#define NVREG_WAKEUPFLAGS_D3SHIFT	12
-#define NVREG_WAKEUPFLAGS_D2SHIFT	8
-#define NVREG_WAKEUPFLAGS_D1SHIFT	4
-#define NVREG_WAKEUPFLAGS_D0SHIFT	0
-#define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT		0x01
-#define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT	0x02
-#define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE	0x04
-#define NVREG_WAKEUPFLAGS_ENABLE	0x1111
-
-	NvRegPatternCRC = 0x204,
-	NvRegPatternMask = 0x208,
-	NvRegPowerCap = 0x268,
-#define NVREG_POWERCAP_D3SUPP	(1<<30)
-#define NVREG_POWERCAP_D2SUPP	(1<<26)
-#define NVREG_POWERCAP_D1SUPP	(1<<25)
-	NvRegPowerState = 0x26c,
-#define NVREG_POWERSTATE_POWEREDUP	0x8000
-#define NVREG_POWERSTATE_VALID		0x0100
-#define NVREG_POWERSTATE_MASK		0x0003
-#define NVREG_POWERSTATE_D0		0x0000
-#define NVREG_POWERSTATE_D1		0x0001
-#define NVREG_POWERSTATE_D2		0x0002
-#define NVREG_POWERSTATE_D3		0x0003
-	NvRegTxCnt = 0x280,
-	NvRegTxZeroReXmt = 0x284,
-	NvRegTxOneReXmt = 0x288,
-	NvRegTxManyReXmt = 0x28c,
-	NvRegTxLateCol = 0x290,
-	NvRegTxUnderflow = 0x294,
-	NvRegTxLossCarrier = 0x298,
-	NvRegTxExcessDef = 0x29c,
-	NvRegTxRetryErr = 0x2a0,
-	NvRegRxFrameErr = 0x2a4,
-	NvRegRxExtraByte = 0x2a8,
-	NvRegRxLateCol = 0x2ac,
-	NvRegRxRunt = 0x2b0,
-	NvRegRxFrameTooLong = 0x2b4,
-	NvRegRxOverflow = 0x2b8,
-	NvRegRxFCSErr = 0x2bc,
-	NvRegRxFrameAlignErr = 0x2c0,
-	NvRegRxLenErr = 0x2c4,
-	NvRegRxUnicast = 0x2c8,
-	NvRegRxMulticast = 0x2cc,
-	NvRegRxBroadcast = 0x2d0,
-	NvRegTxDef = 0x2d4,
-	NvRegTxFrame = 0x2d8,
-	NvRegRxCnt = 0x2dc,
-	NvRegTxPause = 0x2e0,
-	NvRegRxPause = 0x2e4,
-	NvRegRxDropFrame = 0x2e8,
-	NvRegVlanControl = 0x300,
-#define NVREG_VLANCONTROL_ENABLE	0x2000
-	NvRegMSIXMap0 = 0x3e0,
-	NvRegMSIXMap1 = 0x3e4,
-	NvRegMSIXIrqStatus = 0x3f0,
-
-	NvRegPowerState2 = 0x600,
-#define NVREG_POWERSTATE2_POWERUP_MASK		0x0F11
-#define NVREG_POWERSTATE2_POWERUP_REV_A3	0x0001
-};
-
-/* Big endian: should work, but is untested */
-struct ring_desc {
-	__le32 buf;
-	__le32 flaglen;
-};
-
-struct ring_desc_ex {
-	__le32 bufhigh;
-	__le32 buflow;
-	__le32 txvlan;
-	__le32 flaglen;
-};
-
-union ring_type {
-	struct ring_desc* orig;
-	struct ring_desc_ex* ex;
-};
-
-#define FLAG_MASK_V1 0xffff0000
-#define FLAG_MASK_V2 0xffffc000
-#define LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1)
-#define LEN_MASK_V2 (0xffffffff ^ FLAG_MASK_V2)
-
-#define NV_TX_LASTPACKET	(1<<16)
-#define NV_TX_RETRYERROR	(1<<19)
-#define NV_TX_FORCED_INTERRUPT	(1<<24)
-#define NV_TX_DEFERRED		(1<<26)
-#define NV_TX_CARRIERLOST	(1<<27)
-#define NV_TX_LATECOLLISION	(1<<28)
-#define NV_TX_UNDERFLOW		(1<<29)
-#define NV_TX_ERROR		(1<<30)
-#define NV_TX_VALID		(1<<31)
-
-#define NV_TX2_LASTPACKET	(1<<29)
-#define NV_TX2_RETRYERROR	(1<<18)
-#define NV_TX2_FORCED_INTERRUPT	(1<<30)
-#define NV_TX2_DEFERRED		(1<<25)
-#define NV_TX2_CARRIERLOST	(1<<26)
-#define NV_TX2_LATECOLLISION	(1<<27)
-#define NV_TX2_UNDERFLOW	(1<<28)
-/* error and valid are the same for both */
-#define NV_TX2_ERROR		(1<<30)
-#define NV_TX2_VALID		(1<<31)
-#define NV_TX2_TSO		(1<<28)
-#define NV_TX2_TSO_SHIFT	14
-#define NV_TX2_TSO_MAX_SHIFT	14
-#define NV_TX2_TSO_MAX_SIZE	(1<<NV_TX2_TSO_MAX_SHIFT)
-#define NV_TX2_CHECKSUM_L3	(1<<27)
-#define NV_TX2_CHECKSUM_L4	(1<<26)
-
-#define NV_TX3_VLAN_TAG_PRESENT (1<<18)
-
-#define NV_RX_DESCRIPTORVALID	(1<<16)
-#define NV_RX_MISSEDFRAME	(1<<17)
-#define NV_RX_SUBSTRACT1	(1<<18)
-#define NV_RX_ERROR1		(1<<23)
-#define NV_RX_ERROR2		(1<<24)
-#define NV_RX_ERROR3		(1<<25)
-#define NV_RX_ERROR4		(1<<26)
-#define NV_RX_CRCERR		(1<<27)
-#define NV_RX_OVERFLOW		(1<<28)
-#define NV_RX_FRAMINGERR	(1<<29)
-#define NV_RX_ERROR		(1<<30)
-#define NV_RX_AVAIL		(1<<31)
-
-#define NV_RX2_CHECKSUMMASK	(0x1C000000)
-#define NV_RX2_CHECKSUMOK1	(0x10000000)
-#define NV_RX2_CHECKSUMOK2	(0x14000000)
-#define NV_RX2_CHECKSUMOK3	(0x18000000)
-#define NV_RX2_DESCRIPTORVALID	(1<<29)
-#define NV_RX2_SUBSTRACT1	(1<<25)
-#define NV_RX2_ERROR1		(1<<18)
-#define NV_RX2_ERROR2		(1<<19)
-#define NV_RX2_ERROR3		(1<<20)
-#define NV_RX2_ERROR4		(1<<21)
-#define NV_RX2_CRCERR		(1<<22)
-#define NV_RX2_OVERFLOW		(1<<23)
-#define NV_RX2_FRAMINGERR	(1<<24)
-/* error and avail are the same for both */
-#define NV_RX2_ERROR		(1<<30)
-#define NV_RX2_AVAIL		(1<<31)
-
-#define NV_RX3_VLAN_TAG_PRESENT (1<<16)
-#define NV_RX3_VLAN_TAG_MASK	(0x0000FFFF)
-
-/* Miscelaneous hardware related defines: */
-#define NV_PCI_REGSZ_VER1      	0x270
-#define NV_PCI_REGSZ_VER2      	0x604
-
-/* various timeout delays: all in usec */
-#define NV_TXRX_RESET_DELAY	4
-#define NV_TXSTOP_DELAY1	10
-#define NV_TXSTOP_DELAY1MAX	500000
-#define NV_TXSTOP_DELAY2	100
-#define NV_RXSTOP_DELAY1	10
-#define NV_RXSTOP_DELAY1MAX	500000
-#define NV_RXSTOP_DELAY2	100
-#define NV_SETUP5_DELAY		5
-#define NV_SETUP5_DELAYMAX	50000
-#define NV_POWERUP_DELAY	5
-#define NV_POWERUP_DELAYMAX	5000
-#define NV_MIIBUSY_DELAY	50
-#define NV_MIIPHY_DELAY	10
-#define NV_MIIPHY_DELAYMAX	10000
-#define NV_MAC_RESET_DELAY	64
-
-#define NV_WAKEUPPATTERNS	5
-#define NV_WAKEUPMASKENTRIES	4
-
-/* General driver defaults */
-#define NV_WATCHDOG_TIMEO	(5*HZ)
-
-#define RX_RING_DEFAULT		128
-#define TX_RING_DEFAULT		256
-#define RX_RING_MIN		128
-#define TX_RING_MIN		64
-#define RING_MAX_DESC_VER_1	1024
-#define RING_MAX_DESC_VER_2_3	16384
-/*
- * Difference between the get and put pointers for the tx ring.
- * This is used to throttle the amount of data outstanding in the
- * tx ring.
- */
-#define TX_LIMIT_DIFFERENCE	1
-
-/* rx/tx mac addr + type + vlan + align + slack*/
-#define NV_RX_HEADERS		(64)
-/* even more slack. */
-#define NV_RX_ALLOC_PAD		(64)
-
-/* maximum mtu size */
-#define NV_PKTLIMIT_1	ETH_DATA_LEN	/* hard limit not known */
-#define NV_PKTLIMIT_2	9100	/* Actual limit according to NVidia: 9202 */
-
-#define OOM_REFILL	(1+HZ/20)
-#define POLL_WAIT	(1+HZ/100)
-#define LINK_TIMEOUT	(3*HZ)
-#define STATS_INTERVAL	(10*HZ)
-
-/*
- * desc_ver values:
- * The nic supports three different descriptor types:
- * - DESC_VER_1: Original
- * - DESC_VER_2: support for jumbo frames.
- * - DESC_VER_3: 64-bit format.
- */
-#define DESC_VER_1	1
-#define DESC_VER_2	2
-#define DESC_VER_3	3
-
-/* PHY defines */
-#define PHY_OUI_MARVELL	0x5043
-#define PHY_OUI_CICADA	0x03f1
-#define PHYID1_OUI_MASK	0x03ff
-#define PHYID1_OUI_SHFT	6
-#define PHYID2_OUI_MASK	0xfc00
-#define PHYID2_OUI_SHFT	10
-#define PHYID2_MODEL_MASK		0x03f0
-#define PHY_MODEL_MARVELL_E3016		0x220
-#define PHY_MARVELL_E3016_INITMASK	0x0300
-#define PHY_INIT1	0x0f000
-#define PHY_INIT2	0x0e00
-#define PHY_INIT3	0x01000
-#define PHY_INIT4	0x0200
-#define PHY_INIT5	0x0004
-#define PHY_INIT6	0x02000
-#define PHY_GIGABIT	0x0100
-
-#define PHY_TIMEOUT	0x1
-#define PHY_ERROR	0x2
-
-#define PHY_100	0x1
-#define PHY_1000	0x2
-#define PHY_HALF	0x100
-
-#define NV_PAUSEFRAME_RX_CAPABLE 0x0001
-#define NV_PAUSEFRAME_TX_CAPABLE 0x0002
-#define NV_PAUSEFRAME_RX_ENABLE  0x0004
-#define NV_PAUSEFRAME_TX_ENABLE  0x0008
-#define NV_PAUSEFRAME_RX_REQ     0x0010
-#define NV_PAUSEFRAME_TX_REQ     0x0020
-#define NV_PAUSEFRAME_AUTONEG    0x0040
-
-/* MSI/MSI-X defines */
-#define NV_MSI_X_MAX_VECTORS  8
-#define NV_MSI_X_VECTORS_MASK 0x000f
-#define NV_MSI_CAPABLE        0x0010
-#define NV_MSI_X_CAPABLE      0x0020
-#define NV_MSI_ENABLED        0x0040
-#define NV_MSI_X_ENABLED      0x0080
-
-#define NV_MSI_X_VECTOR_ALL   0x0
-#define NV_MSI_X_VECTOR_RX    0x0
-#define NV_MSI_X_VECTOR_TX    0x1
-#define NV_MSI_X_VECTOR_OTHER 0x2
-
-/* statistics */
-struct nv_ethtool_str {
-	char name[ETH_GSTRING_LEN];
-};
-
-static const struct nv_ethtool_str nv_estats_str[] = {
-	{ "tx_bytes" },
-	{ "tx_zero_rexmt" },
-	{ "tx_one_rexmt" },
-	{ "tx_many_rexmt" },
-	{ "tx_late_collision" },
-	{ "tx_fifo_errors" },
-	{ "tx_carrier_errors" },
-	{ "tx_excess_deferral" },
-	{ "tx_retry_error" },
-	{ "tx_deferral" },
-	{ "tx_packets" },
-	{ "tx_pause" },
-	{ "rx_frame_error" },
-	{ "rx_extra_byte" },
-	{ "rx_late_collision" },
-	{ "rx_runt" },
-	{ "rx_frame_too_long" },
-	{ "rx_over_errors" },
-	{ "rx_crc_errors" },
-	{ "rx_frame_align_error" },
-	{ "rx_length_error" },
-	{ "rx_unicast" },
-	{ "rx_multicast" },
-	{ "rx_broadcast" },
-	{ "rx_bytes" },
-	{ "rx_pause" },
-	{ "rx_drop_frame" },
-	{ "rx_packets" },
-	{ "rx_errors_total" }
-};
-
-struct nv_ethtool_stats {
-	u64 tx_bytes;
-	u64 tx_zero_rexmt;
-	u64 tx_one_rexmt;
-	u64 tx_many_rexmt;
-	u64 tx_late_collision;
-	u64 tx_fifo_errors;
-	u64 tx_carrier_errors;
-	u64 tx_excess_deferral;
-	u64 tx_retry_error;
-	u64 tx_deferral;
-	u64 tx_packets;
-	u64 tx_pause;
-	u64 rx_frame_error;
-	u64 rx_extra_byte;
-	u64 rx_late_collision;
-	u64 rx_runt;
-	u64 rx_frame_too_long;
-	u64 rx_over_errors;
-	u64 rx_crc_errors;
-	u64 rx_frame_align_error;
-	u64 rx_length_error;
-	u64 rx_unicast;
-	u64 rx_multicast;
-	u64 rx_broadcast;
-	u64 rx_bytes;
-	u64 rx_pause;
-	u64 rx_drop_frame;
-	u64 rx_packets;
-	u64 rx_errors_total;
-};
-
-/* diagnostics */
-#define NV_TEST_COUNT_BASE 3
-#define NV_TEST_COUNT_EXTENDED 4
-
-static const struct nv_ethtool_str nv_etests_str[] = {
-	{ "link      (online/offline)" },
-	{ "register  (offline)       " },
-	{ "interrupt (offline)       " },
-	{ "loopback  (offline)       " }
-};
-
-struct register_test {
-	__le32 reg;
-	__le32 mask;
-};
-
-static const struct register_test nv_registers_test[] = {
-	{ NvRegUnknownSetupReg6, 0x01 },
-	{ NvRegMisc1, 0x03c },
-	{ NvRegOffloadConfig, 0x03ff },
-	{ NvRegMulticastAddrA, 0xffffffff },
-	{ NvRegTxWatermark, 0x0ff },
-	{ NvRegWakeUpFlags, 0x07777 },
-	{ 0,0 }
-};
-
-/*
- * SMP locking:
- * All hardware access under dev->priv->lock, except the performance
- * critical parts:
- * - rx is (pseudo-) lockless: it relies on the single-threading provided
- *	by the arch code for interrupts.
- * - tx setup is lockless: it relies on netif_tx_lock. Actual submission
- *	needs dev->priv->lock :-(
- * - set_multicast_list: preparation lockless, relies on netif_tx_lock.
- */
-
-/* in dev: base, irq */
-struct fe_priv {
-	spinlock_t lock;
-
-	/* General data:
-	 * Locking: spin_lock(&np->lock); */
-	struct net_device_stats stats;
-	struct nv_ethtool_stats estats;
-	int in_shutdown;
-	u32 linkspeed;
-	int duplex;
-	int autoneg;
-	int fixed_mode;
-	int phyaddr;
-	int wolenabled;
-	unsigned int phy_oui;
-	unsigned int phy_model;
-	u16 gigabit;
-	int intr_test;
-
-	/* General data: RO fields */
-	dma_addr_t ring_addr;
-	struct pci_dev *pci_dev;
-	u32 orig_mac[2];
-	u32 irqmask;
-	u32 desc_ver;
-	u32 txrxctl_bits;
-	u32 vlanctl_bits;
-	u32 driver_data;
-	u32 register_size;
-	int rx_csum;
-
-	void __iomem *base;
-
-	/* rx specific fields.
-	 * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
-	 */
-	union ring_type rx_ring;
-	unsigned int cur_rx, refill_rx;
-	struct sk_buff **rx_skbuff;
-	dma_addr_t *rx_dma;
-	unsigned int rx_buf_sz;
-	unsigned int pkt_limit;
-	struct timer_list oom_kick;
-	struct timer_list nic_poll;
-	struct timer_list stats_poll;
-	u32 nic_poll_irq;
-	int rx_ring_size;
-
-	/* media detection workaround.
-	 * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
-	 */
-	int need_linktimer;
-	unsigned long link_timeout;
-	/*
-	 * tx specific fields.
-	 */
-	union ring_type tx_ring;
-	unsigned int next_tx, nic_tx;
-	struct sk_buff **tx_skbuff;
-	dma_addr_t *tx_dma;
-	unsigned int *tx_dma_len;
-	u32 tx_flags;
-	int tx_ring_size;
-	int tx_limit_start;
-	int tx_limit_stop;
-
-	/* vlan fields */
-	struct vlan_group *vlangrp;
-
-	/* msi/msi-x fields */
-	u32 msi_flags;
-	struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS];
-
-	/* flow control */
-	u32 pause_flags;
-
-    ec_device_t *ecdev;
-};
-
-/*
- * Maximum number of loops until we assume that a bit in the irq mask
- * is stuck. Overridable with module param.
- */
-static int max_interrupt_work = 5;
-
-/*
- * Optimization can be either throuput mode or cpu mode
- *
- * Throughput Mode: Every tx and rx packet will generate an interrupt.
- * CPU Mode: Interrupts are controlled by a timer.
- */
-enum {
-	NV_OPTIMIZATION_MODE_THROUGHPUT,
-	NV_OPTIMIZATION_MODE_CPU
-};
-static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT;
-
-/*
- * Poll interval for timer irq
- *
- * This interval determines how frequent an interrupt is generated.
- * The is value is determined by [(time_in_micro_secs * 100) / (2^10)]
- * Min = 0, and Max = 65535
- */
-static int poll_interval = -1;
-
-/*
- * MSI interrupts
- */
-enum {
-	NV_MSI_INT_DISABLED,
-	NV_MSI_INT_ENABLED
-};
-static int msi = NV_MSI_INT_ENABLED;
-
-/*
- * MSIX interrupts
- */
-enum {
-	NV_MSIX_INT_DISABLED,
-	NV_MSIX_INT_ENABLED
-};
-static int msix = NV_MSIX_INT_ENABLED;
-
-/*
- * DMA 64bit
- */
-enum {
-	NV_DMA_64BIT_DISABLED,
-	NV_DMA_64BIT_ENABLED
-};
-static int dma_64bit = NV_DMA_64BIT_ENABLED;
-
-static int board_idx = -1;
-
-static inline struct fe_priv *get_nvpriv(struct net_device *dev)
-{
-	return netdev_priv(dev);
-}
-
-static inline u8 __iomem *get_hwbase(struct net_device *dev)
-{
-	return ((struct fe_priv *)netdev_priv(dev))->base;
-}
-
-static inline void pci_push(u8 __iomem *base)
-{
-	/* force out pending posted writes */
-	readl(base);
-}
-
-static inline u32 nv_descr_getlength(struct ring_desc *prd, u32 v)
-{
-	return le32_to_cpu(prd->flaglen)
-		& ((v == DESC_VER_1) ? LEN_MASK_V1 : LEN_MASK_V2);
-}
-
-static inline u32 nv_descr_getlength_ex(struct ring_desc_ex *prd, u32 v)
-{
-	return le32_to_cpu(prd->flaglen) & LEN_MASK_V2;
-}
-
-static int reg_delay(struct net_device *dev, int offset, u32 mask, u32 target,
-				int delay, int delaymax, const char *msg)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	pci_push(base);
-	do {
-		udelay(delay);
-		delaymax -= delay;
-		if (delaymax < 0) {
-			if (msg)
-				printk(msg);
-			return 1;
-		}
-	} while ((readl(base + offset) & mask) != target);
-	return 0;
-}
-
-#define NV_SETUP_RX_RING 0x01
-#define NV_SETUP_TX_RING 0x02
-
-static void setup_hw_rings(struct net_device *dev, int rxtx_flags)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		if (rxtx_flags & NV_SETUP_RX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr);
-		}
-		if (rxtx_flags & NV_SETUP_TX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
-		}
-	} else {
-		if (rxtx_flags & NV_SETUP_RX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr);
-			writel((u32) (cpu_to_le64(np->ring_addr) >> 32), base + NvRegRxRingPhysAddrHigh);
-		}
-		if (rxtx_flags & NV_SETUP_TX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
-			writel((u32) (cpu_to_le64(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)) >> 32), base + NvRegTxRingPhysAddrHigh);
-		}
-	}
-}
-
-static void free_rings(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		if (np->rx_ring.orig)
-			pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size),
-					    np->rx_ring.orig, np->ring_addr);
-	} else {
-		if (np->rx_ring.ex)
-			pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size),
-					    np->rx_ring.ex, np->ring_addr);
-	}
-	if (np->rx_skbuff)
-		kfree(np->rx_skbuff);
-	if (np->rx_dma)
-		kfree(np->rx_dma);
-	if (np->tx_skbuff)
-		kfree(np->tx_skbuff);
-	if (np->tx_dma)
-		kfree(np->tx_dma);
-	if (np->tx_dma_len)
-		kfree(np->tx_dma_len);
-}
-
-static int using_multi_irqs(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
-	    ((np->msi_flags & NV_MSI_X_ENABLED) &&
-	     ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1)))
-		return 0;
-	else
-		return 1;
-}
-
-static void nv_enable_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq(dev->irq);
-	} else {
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-	}
-}
-
-static void nv_disable_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq(dev->irq);
-	} else {
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-	}
-}
-
-/* In MSIX mode, a write to irqmask behaves as XOR */
-static void nv_enable_hw_interrupts(struct net_device *dev, u32 mask)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	writel(mask, base + NvRegIrqMask);
-}
-
-static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	if (np->msi_flags & NV_MSI_X_ENABLED) {
-		writel(mask, base + NvRegIrqMask);
-	} else {
-		if (np->msi_flags & NV_MSI_ENABLED)
-			writel(0, base + NvRegMSIIrqMask);
-		writel(0, base + NvRegIrqMask);
-	}
-}
-
-#define MII_READ	(-1)
-/* mii_rw: read/write a register on the PHY.
- *
- * Caller must guarantee serialization
- */
-static int mii_rw(struct net_device *dev, int addr, int miireg, int value)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 reg;
-	int retval;
-
-	writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-
-	reg = readl(base + NvRegMIIControl);
-	if (reg & NVREG_MIICTL_INUSE) {
-		writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl);
-		udelay(NV_MIIBUSY_DELAY);
-	}
-
-	reg = (addr << NVREG_MIICTL_ADDRSHIFT) | miireg;
-	if (value != MII_READ) {
-		writel(value, base + NvRegMIIData);
-		reg |= NVREG_MIICTL_WRITE;
-	}
-	writel(reg, base + NvRegMIIControl);
-
-	if (reg_delay(dev, NvRegMIIControl, NVREG_MIICTL_INUSE, 0,
-			NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX, NULL)) {
-		dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d timed out.\n",
-				dev->name, miireg, addr);
-		retval = -1;
-	} else if (value != MII_READ) {
-		/* it was a write operation - fewer failures are detectable */
-		dprintk(KERN_DEBUG "%s: mii_rw wrote 0x%x to reg %d at PHY %d\n",
-				dev->name, value, miireg, addr);
-		retval = 0;
-	} else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) {
-		dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d failed.\n",
-				dev->name, miireg, addr);
-		retval = -1;
-	} else {
-		retval = readl(base + NvRegMIIData);
-		dprintk(KERN_DEBUG "%s: mii_rw read from reg %d at PHY %d: 0x%x.\n",
-				dev->name, miireg, addr, retval);
-	}
-
-	return retval;
-}
-
-static int phy_reset(struct net_device *dev, u32 bmcr_setup)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 miicontrol;
-	unsigned int tries = 0;
-
-	miicontrol = BMCR_RESET | bmcr_setup;
-	if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol)) {
-		return -1;
-	}
-
-	/* wait for 500ms */
-	msleep(500);
-
-	/* must wait till reset is deasserted */
-	while (miicontrol & BMCR_RESET) {
-		msleep(10);
-		miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		/* FIXME: 100 tries seem excessive */
-		if (tries++ > 100)
-			return -1;
-	}
-	return 0;
-}
-
-static int phy_init(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 phyinterface, phy_reserved, mii_status, mii_control, mii_control_1000,reg;
-
-	/* phy errata for E3016 phy */
-	if (np->phy_model == PHY_MODEL_MARVELL_E3016) {
-		reg = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ);
-		reg &= ~PHY_MARVELL_E3016_INITMASK;
-		if (mii_rw(dev, np->phyaddr, MII_NCONFIG, reg)) {
-			printk(KERN_INFO "%s: phy write to errata reg failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-
-	/* set advertise register */
-	reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-	reg |= (ADVERTISE_10HALF|ADVERTISE_10FULL|ADVERTISE_100HALF|ADVERTISE_100FULL|ADVERTISE_PAUSE_ASYM|ADVERTISE_PAUSE_CAP);
-	if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) {
-		printk(KERN_INFO "%s: phy write to advertise failed.\n", pci_name(np->pci_dev));
-		return PHY_ERROR;
-	}
-
-	/* get phy interface type */
-	phyinterface = readl(base + NvRegPhyInterface);
-
-	/* see if gigabit phy */
-	mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-	if (mii_status & PHY_GIGABIT) {
-		np->gigabit = PHY_GIGABIT;
-		mii_control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
-		mii_control_1000 &= ~ADVERTISE_1000HALF;
-		if (phyinterface & PHY_RGMII)
-			mii_control_1000 |= ADVERTISE_1000FULL;
-		else
-			mii_control_1000 &= ~ADVERTISE_1000FULL;
-
-		if (mii_rw(dev, np->phyaddr, MII_CTRL1000, mii_control_1000)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-	else
-		np->gigabit = 0;
-
-	mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-	mii_control |= BMCR_ANENABLE;
-
-	/* reset the phy
-	 * (certain phys need bmcr to be setup with reset)
-	 */
-	if (phy_reset(dev, mii_control)) {
-		printk(KERN_INFO "%s: phy reset failed\n", pci_name(np->pci_dev));
-		return PHY_ERROR;
-	}
-
-	/* phy vendor specific configuration */
-	if ((np->phy_oui == PHY_OUI_CICADA) && (phyinterface & PHY_RGMII) ) {
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_RESV1, MII_READ);
-		phy_reserved &= ~(PHY_INIT1 | PHY_INIT2);
-		phy_reserved |= (PHY_INIT3 | PHY_INIT4);
-		if (mii_rw(dev, np->phyaddr, MII_RESV1, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ);
-		phy_reserved |= PHY_INIT5;
-		if (mii_rw(dev, np->phyaddr, MII_NCONFIG, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-	if (np->phy_oui == PHY_OUI_CICADA) {
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_SREVISION, MII_READ);
-		phy_reserved |= PHY_INIT6;
-		if (mii_rw(dev, np->phyaddr, MII_SREVISION, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-	/* some phys clear out pause advertisment on reset, set it back */
-	mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg);
-
-	/* restart auto negotiation */
-	mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-	mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
-	if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {
-		return PHY_ERROR;
-	}
-
-	return 0;
-}
-
-static void nv_start_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_start_rx\n", dev->name);
-	/* Already running? Stop it. */
-	if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) {
-		writel(0, base + NvRegReceiverControl);
-		pci_push(base);
-	}
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	pci_push(base);
-	writel(NVREG_RCVCTL_START, base + NvRegReceiverControl);
-	dprintk(KERN_DEBUG "%s: nv_start_rx to duplex %d, speed 0x%08x.\n",
-				dev->name, np->duplex, np->linkspeed);
-	pci_push(base);
-}
-
-static void nv_stop_rx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_stop_rx\n", dev->name);
-	writel(0, base + NvRegReceiverControl);
-	reg_delay(dev, NvRegReceiverStatus, NVREG_RCVSTAT_BUSY, 0,
-			NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX,
-			KERN_INFO "nv_stop_rx: ReceiverStatus remained busy");
-
-	udelay(NV_RXSTOP_DELAY2);
-	writel(0, base + NvRegLinkSpeed);
-}
-
-static void nv_start_tx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_start_tx\n", dev->name);
-	writel(NVREG_XMITCTL_START, base + NvRegTransmitterControl);
-	pci_push(base);
-}
-
-static void nv_stop_tx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_stop_tx\n", dev->name);
-	writel(0, base + NvRegTransmitterControl);
-	reg_delay(dev, NvRegTransmitterStatus, NVREG_XMITSTAT_BUSY, 0,
-			NV_TXSTOP_DELAY1, NV_TXSTOP_DELAY1MAX,
-			KERN_INFO "nv_stop_tx: TransmitterStatus remained busy");
-
-	udelay(NV_TXSTOP_DELAY2);
-	writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
-}
-
-static void nv_txrx_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_txrx_reset\n", dev->name);
-	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-	udelay(NV_TXRX_RESET_DELAY);
-	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-}
-
-static void nv_mac_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name);
-	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-	writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset);
-	pci_push(base);
-	udelay(NV_MAC_RESET_DELAY);
-	writel(0, base + NvRegMacReset);
-	pci_push(base);
-	udelay(NV_MAC_RESET_DELAY);
-	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-}
-
-/*
- * nv_get_stats: dev->get_stats function
- * Get latest stats value from the nic.
- * Called with read_lock(&dev_base_lock) held for read -
- * only synchronized against unregister_netdevice.
- */
-static struct net_device_stats *nv_get_stats(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	/* It seems that the nic always generates interrupts and doesn't
-	 * accumulate errors internally. Thus the current values in np->stats
-	 * are already up to date.
-	 */
-	return &np->stats;
-}
-
-/*
- * nv_alloc_rx: fill rx ring entries.
- * Return 1 if the allocations for the skbs failed and the
- * rx engine is without Available descriptors
- */
-static int nv_alloc_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	unsigned int refill_rx = np->refill_rx;
-	int nr;
-
-	while (np->cur_rx != refill_rx) {
-		struct sk_buff *skb;
-
-		nr = refill_rx % np->rx_ring_size;
-		if (np->rx_skbuff[nr] == NULL) {
-
-			skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD);
-			if (!skb)
-				break;
-
-			skb->dev = dev;
-			np->rx_skbuff[nr] = skb;
-		} else {
-			skb = np->rx_skbuff[nr];
-		}
-		np->rx_dma[nr] = pci_map_single(np->pci_dev, skb->data,
-					skb->end-skb->data, PCI_DMA_FROMDEVICE);
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			np->rx_ring.orig[nr].buf = cpu_to_le32(np->rx_dma[nr]);
-			wmb();
-			np->rx_ring.orig[nr].flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX_AVAIL);
-		} else {
-			np->rx_ring.ex[nr].bufhigh = cpu_to_le64(np->rx_dma[nr]) >> 32;
-			np->rx_ring.ex[nr].buflow = cpu_to_le64(np->rx_dma[nr]) & 0x0FFFFFFFF;
-			wmb();
-			np->rx_ring.ex[nr].flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX2_AVAIL);
-		}
-		dprintk(KERN_DEBUG "%s: nv_alloc_rx: Packet %d marked as Available\n",
-					dev->name, refill_rx);
-		refill_rx++;
-	}
-	np->refill_rx = refill_rx;
-	if (np->cur_rx - refill_rx == np->rx_ring_size)
-		return 1;
-	return 0;
-}
-
-/* If rx bufs are exhausted called after 50ms to attempt to refresh */
-#ifdef CONFIG_FORCEDETH_NAPI
-static void nv_do_rx_refill(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-
-	/* Just reschedule NAPI rx processing */
-	netif_rx_schedule(dev);
-}
-#else
-static void nv_do_rx_refill(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq(dev->irq);
-	} else {
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-	}
-	if (nv_alloc_rx(dev)) {
-		spin_lock_irq(&np->lock);
-		if (!np->in_shutdown)
-			mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		spin_unlock_irq(&np->lock);
-	}
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq(dev->irq);
-	} else {
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-	}
-}
-#endif
-
-static void nv_init_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-
-	np->cur_rx = np->rx_ring_size;
-	np->refill_rx = 0;
-	for (i = 0; i < np->rx_ring_size; i++)
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->rx_ring.orig[i].flaglen = 0;
-	        else
-			np->rx_ring.ex[i].flaglen = 0;
-}
-
-static void nv_init_tx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-
-	np->next_tx = np->nic_tx = 0;
-	for (i = 0; i < np->tx_ring_size; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->tx_ring.orig[i].flaglen = 0;
-	        else
-			np->tx_ring.ex[i].flaglen = 0;
-		np->tx_skbuff[i] = NULL;
-		np->tx_dma[i] = 0;
-	}
-}
-
-static int nv_init_ring(struct net_device *dev)
-{
-	nv_init_tx(dev);
-	nv_init_rx(dev);
-	return nv_alloc_rx(dev);
-}
-
-static int nv_release_txskb(struct net_device *dev, unsigned int skbnr)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	dprintk(KERN_INFO "%s: nv_release_txskb for skbnr %d\n",
-		dev->name, skbnr);
-
-	if (np->tx_dma[skbnr]) {
-		pci_unmap_page(np->pci_dev, np->tx_dma[skbnr],
-			       np->tx_dma_len[skbnr],
-			       PCI_DMA_TODEVICE);
-		np->tx_dma[skbnr] = 0;
-	}
-
-	if (np->tx_skbuff[skbnr]) {
-		if (!np->ecdev) dev_kfree_skb_any(np->tx_skbuff[skbnr]);
-		np->tx_skbuff[skbnr] = NULL;
-		return 1;
-	} else {
-		return 0;
-	}
-}
-
-static void nv_drain_tx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	unsigned int i;
-
-	for (i = 0; i < np->tx_ring_size; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->tx_ring.orig[i].flaglen = 0;
-		else
-			np->tx_ring.ex[i].flaglen = 0;
-		if (nv_release_txskb(dev, i))
-			np->stats.tx_dropped++;
-	}
-}
-
-static void nv_drain_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-	for (i = 0; i < np->rx_ring_size; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->rx_ring.orig[i].flaglen = 0;
-		else
-			np->rx_ring.ex[i].flaglen = 0;
-		wmb();
-		if (np->rx_skbuff[i]) {
-			pci_unmap_single(np->pci_dev, np->rx_dma[i],
-						np->rx_skbuff[i]->end-np->rx_skbuff[i]->data,
-						PCI_DMA_FROMDEVICE);
-			if (!np->ecdev) dev_kfree_skb(np->rx_skbuff[i]);
-			np->rx_skbuff[i] = NULL;
-		}
-	}
-}
-
-static void drain_ring(struct net_device *dev)
-{
-	nv_drain_tx(dev);
-	nv_drain_rx(dev);
-}
-
-/*
- * nv_start_xmit: dev->hard_start_xmit function
- * Called with netif_tx_lock held.
- */
-static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 tx_flags = 0;
-	u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET);
-	unsigned int fragments = skb_shinfo(skb)->nr_frags;
-	unsigned int nr = (np->next_tx - 1) % np->tx_ring_size;
-	unsigned int start_nr = np->next_tx % np->tx_ring_size;
-	unsigned int i;
-	u32 offset = 0;
-	u32 bcnt;
-	u32 size = skb->len-skb->data_len;
-	u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
-	u32 tx_flags_vlan = 0;
-
-	/* add fragments to entries count */
-	for (i = 0; i < fragments; i++) {
-		entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) +
-			   ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
-	}
-
-	if (!np->ecdev) {
-		spin_lock_irq(&np->lock);
-
-        if ((np->next_tx - np->nic_tx + entries - 1) > np->tx_limit_stop) {
-            spin_unlock_irq(&np->lock);
-            netif_stop_queue(dev);
-            return NETDEV_TX_BUSY;
-        }
-	}
-
-	/* setup the header buffer */
-	do {
-		bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
-		nr = (nr + 1) % np->tx_ring_size;
-
-		np->tx_dma[nr] = pci_map_single(np->pci_dev, skb->data + offset, bcnt,
-						PCI_DMA_TODEVICE);
-		np->tx_dma_len[nr] = bcnt;
-
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			np->tx_ring.orig[nr].buf = cpu_to_le32(np->tx_dma[nr]);
-			np->tx_ring.orig[nr].flaglen = cpu_to_le32((bcnt-1) | tx_flags);
-		} else {
-			np->tx_ring.ex[nr].bufhigh = cpu_to_le64(np->tx_dma[nr]) >> 32;
-			np->tx_ring.ex[nr].buflow = cpu_to_le64(np->tx_dma[nr]) & 0x0FFFFFFFF;
-			np->tx_ring.ex[nr].flaglen = cpu_to_le32((bcnt-1) | tx_flags);
-		}
-		tx_flags = np->tx_flags;
-		offset += bcnt;
-		size -= bcnt;
-	} while (size);
-
-	/* setup the fragments */
-	for (i = 0; i < fragments; i++) {
-		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
-		u32 size = frag->size;
-		offset = 0;
-
-		do {
-			bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
-			nr = (nr + 1) % np->tx_ring_size;
-
-			np->tx_dma[nr] = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt,
-						      PCI_DMA_TODEVICE);
-			np->tx_dma_len[nr] = bcnt;
-
-			if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-				np->tx_ring.orig[nr].buf = cpu_to_le32(np->tx_dma[nr]);
-				np->tx_ring.orig[nr].flaglen = cpu_to_le32((bcnt-1) | tx_flags);
-			} else {
-				np->tx_ring.ex[nr].bufhigh = cpu_to_le64(np->tx_dma[nr]) >> 32;
-				np->tx_ring.ex[nr].buflow = cpu_to_le64(np->tx_dma[nr]) & 0x0FFFFFFFF;
-				np->tx_ring.ex[nr].flaglen = cpu_to_le32((bcnt-1) | tx_flags);
-			}
-			offset += bcnt;
-			size -= bcnt;
-		} while (size);
-	}
-
-	/* set last fragment flag  */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->tx_ring.orig[nr].flaglen |= cpu_to_le32(tx_flags_extra);
-	} else {
-		np->tx_ring.ex[nr].flaglen |= cpu_to_le32(tx_flags_extra);
-	}
-
-	np->tx_skbuff[nr] = skb;
-
-#ifdef NETIF_F_TSO
-	if (skb_is_gso(skb))
-		tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT);
-	else
-#endif
-	tx_flags_extra = skb->ip_summed == CHECKSUM_PARTIAL ?
-			 NV_TX2_CHECKSUM_L3 | NV_TX2_CHECKSUM_L4 : 0;
-
-	/* vlan tag */
-	if (np->vlangrp && vlan_tx_tag_present(skb)) {
-		tx_flags_vlan = NV_TX3_VLAN_TAG_PRESENT | vlan_tx_tag_get(skb);
-	}
-
-	/* set tx flags */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->tx_ring.orig[start_nr].flaglen |= cpu_to_le32(tx_flags | tx_flags_extra);
-	} else {
-		np->tx_ring.ex[start_nr].txvlan = cpu_to_le32(tx_flags_vlan);
-		np->tx_ring.ex[start_nr].flaglen |= cpu_to_le32(tx_flags | tx_flags_extra);
-	}
-
-	dprintk(KERN_DEBUG "%s: nv_start_xmit: packet %d (entries %d) queued for transmission. tx_flags_extra: %x\n",
-		dev->name, np->next_tx, entries, tx_flags_extra);
-	{
-		int j;
-		for (j=0; j<64; j++) {
-			if ((j%16) == 0)
-				dprintk("\n%03x:", j);
-			dprintk(" %02x", ((unsigned char*)skb->data)[j]);
-		}
-		dprintk("\n");
-	}
-
-	np->next_tx += entries;
-
-	dev->trans_start = jiffies;
-	if (!np->ecdev) spin_unlock_irq(&np->lock);
-	writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-	pci_push(get_hwbase(dev));
-	return NETDEV_TX_OK;
-}
-
-/*
- * nv_tx_done: check for completed packets, release the skbs.
- *
- * Caller must own np->lock.
- */
-static void nv_tx_done(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 flags;
-	unsigned int i;
-	struct sk_buff *skb;
-
-	while (np->nic_tx != np->next_tx) {
-		i = np->nic_tx % np->tx_ring_size;
-
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			flags = le32_to_cpu(np->tx_ring.orig[i].flaglen);
-		else
-			flags = le32_to_cpu(np->tx_ring.ex[i].flaglen);
-
-		dprintk(KERN_DEBUG "%s: nv_tx_done: looking at packet %d, flags 0x%x.\n",
-					dev->name, np->nic_tx, flags);
-		if (flags & NV_TX_VALID)
-			break;
-		if (np->desc_ver == DESC_VER_1) {
-			if (flags & NV_TX_LASTPACKET) {
-				skb = np->tx_skbuff[i];
-				if (flags & (NV_TX_RETRYERROR|NV_TX_CARRIERLOST|NV_TX_LATECOLLISION|
-					     NV_TX_UNDERFLOW|NV_TX_ERROR)) {
-					if (flags & NV_TX_UNDERFLOW)
-						np->stats.tx_fifo_errors++;
-					if (flags & NV_TX_CARRIERLOST)
-						np->stats.tx_carrier_errors++;
-					np->stats.tx_errors++;
-				} else {
-					np->stats.tx_packets++;
-					np->stats.tx_bytes += skb->len;
-				}
-			}
-		} else {
-			if (flags & NV_TX2_LASTPACKET) {
-				skb = np->tx_skbuff[i];
-				if (flags & (NV_TX2_RETRYERROR|NV_TX2_CARRIERLOST|NV_TX2_LATECOLLISION|
-					     NV_TX2_UNDERFLOW|NV_TX2_ERROR)) {
-					if (flags & NV_TX2_UNDERFLOW)
-						np->stats.tx_fifo_errors++;
-					if (flags & NV_TX2_CARRIERLOST)
-						np->stats.tx_carrier_errors++;
-					np->stats.tx_errors++;
-				} else {
-					np->stats.tx_packets++;
-					np->stats.tx_bytes += skb->len;
-				}
-			}
-		}
-		nv_release_txskb(dev, i);
-		np->nic_tx++;
-	}
-	if (!np->ecdev && np->next_tx - np->nic_tx < np->tx_limit_start)
-		netif_wake_queue(dev);
-}
-
-/*
- * nv_tx_timeout: dev->tx_timeout function
- * Called with netif_tx_lock held.
- */
-static void nv_tx_timeout(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 status;
-
-	if (np->msi_flags & NV_MSI_X_ENABLED)
-		status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
-	else
-		status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
-
-	printk(KERN_INFO "%s: Got tx_timeout. irq: %08x\n", dev->name, status);
-
-	{
-		int i;
-
-		printk(KERN_INFO "%s: Ring at %lx: next %d nic %d\n",
-				dev->name, (unsigned long)np->ring_addr,
-				np->next_tx, np->nic_tx);
-		printk(KERN_INFO "%s: Dumping tx registers\n", dev->name);
-		for (i=0;i<=np->register_size;i+= 32) {
-			printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-					i,
-					readl(base + i + 0), readl(base + i + 4),
-					readl(base + i + 8), readl(base + i + 12),
-					readl(base + i + 16), readl(base + i + 20),
-					readl(base + i + 24), readl(base + i + 28));
-		}
-		printk(KERN_INFO "%s: Dumping tx ring\n", dev->name);
-		for (i=0;i<np->tx_ring_size;i+= 4) {
-			if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-				printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n",
-				       i,
-				       le32_to_cpu(np->tx_ring.orig[i].buf),
-				       le32_to_cpu(np->tx_ring.orig[i].flaglen),
-				       le32_to_cpu(np->tx_ring.orig[i+1].buf),
-				       le32_to_cpu(np->tx_ring.orig[i+1].flaglen),
-				       le32_to_cpu(np->tx_ring.orig[i+2].buf),
-				       le32_to_cpu(np->tx_ring.orig[i+2].flaglen),
-				       le32_to_cpu(np->tx_ring.orig[i+3].buf),
-				       le32_to_cpu(np->tx_ring.orig[i+3].flaglen));
-			} else {
-				printk(KERN_INFO "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n",
-				       i,
-				       le32_to_cpu(np->tx_ring.ex[i].bufhigh),
-				       le32_to_cpu(np->tx_ring.ex[i].buflow),
-				       le32_to_cpu(np->tx_ring.ex[i].flaglen),
-				       le32_to_cpu(np->tx_ring.ex[i+1].bufhigh),
-				       le32_to_cpu(np->tx_ring.ex[i+1].buflow),
-				       le32_to_cpu(np->tx_ring.ex[i+1].flaglen),
-				       le32_to_cpu(np->tx_ring.ex[i+2].bufhigh),
-				       le32_to_cpu(np->tx_ring.ex[i+2].buflow),
-				       le32_to_cpu(np->tx_ring.ex[i+2].flaglen),
-				       le32_to_cpu(np->tx_ring.ex[i+3].bufhigh),
-				       le32_to_cpu(np->tx_ring.ex[i+3].buflow),
-				       le32_to_cpu(np->tx_ring.ex[i+3].flaglen));
-			}
-		}
-	}
-
-	if (!np->ecdev) spin_lock_irq(&np->lock);
-
-	/* 1) stop tx engine */
-	nv_stop_tx(dev);
-
-	/* 2) check that the packets were not sent already: */
-	nv_tx_done(dev);
-
-	/* 3) if there are dead entries: clear everything */
-	if (np->next_tx != np->nic_tx) {
-		printk(KERN_DEBUG "%s: tx_timeout: dead entries!\n", dev->name);
-		nv_drain_tx(dev);
-		np->next_tx = np->nic_tx = 0;
-		setup_hw_rings(dev, NV_SETUP_TX_RING);
-		if (!np->ecdev) netif_wake_queue(dev);
-	}
-
-	/* 4) restart tx engine */
-	nv_start_tx(dev);
-	if (!np->ecdev) spin_unlock_irq(&np->lock);
-}
-
-/*
- * Called when the nic notices a mismatch between the actual data len on the
- * wire and the len indicated in the 802 header
- */
-static int nv_getlen(struct net_device *dev, void *packet, int datalen)
-{
-	int hdrlen;	/* length of the 802 header */
-	int protolen;	/* length as stored in the proto field */
-
-	/* 1) calculate len according to header */
-	if ( ((struct vlan_ethhdr *)packet)->h_vlan_proto == htons(ETH_P_8021Q)) {
-		protolen = ntohs( ((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto );
-		hdrlen = VLAN_HLEN;
-	} else {
-		protolen = ntohs( ((struct ethhdr *)packet)->h_proto);
-		hdrlen = ETH_HLEN;
-	}
-	dprintk(KERN_DEBUG "%s: nv_getlen: datalen %d, protolen %d, hdrlen %d\n",
-				dev->name, datalen, protolen, hdrlen);
-	if (protolen > ETH_DATA_LEN)
-		return datalen; /* Value in proto field not a len, no checks possible */
-
-	protolen += hdrlen;
-	/* consistency checks: */
-	if (datalen > ETH_ZLEN) {
-		if (datalen >= protolen) {
-			/* more data on wire than in 802 header, trim of
-			 * additional data.
-			 */
-			dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
-					dev->name, protolen);
-			return protolen;
-		} else {
-			/* less data on wire than mentioned in header.
-			 * Discard the packet.
-			 */
-			dprintk(KERN_DEBUG "%s: nv_getlen: discarding long packet.\n",
-					dev->name);
-			return -1;
-		}
-	} else {
-		/* short packet. Accept only if 802 values are also short */
-		if (protolen > ETH_ZLEN) {
-			dprintk(KERN_DEBUG "%s: nv_getlen: discarding short packet.\n",
-					dev->name);
-			return -1;
-		}
-		dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
-				dev->name, datalen);
-		return datalen;
-	}
-}
-
-static int nv_rx_process(struct net_device *dev, int limit)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 flags;
-	u32 vlanflags = 0;
-	int count;
-
- 	for (count = 0; count < limit; ++count) {
-		struct sk_buff *skb;
-		int len;
-		int i;
-		if (np->cur_rx - np->refill_rx >= np->rx_ring_size)
-			break;	/* we scanned the whole ring - do not continue */
-
-		i = np->cur_rx % np->rx_ring_size;
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			flags = le32_to_cpu(np->rx_ring.orig[i].flaglen);
-			len = nv_descr_getlength(&np->rx_ring.orig[i], np->desc_ver);
-		} else {
-			flags = le32_to_cpu(np->rx_ring.ex[i].flaglen);
-			len = nv_descr_getlength_ex(&np->rx_ring.ex[i], np->desc_ver);
-			vlanflags = le32_to_cpu(np->rx_ring.ex[i].buflow);
-		}
-
-		dprintk(KERN_DEBUG "%s: nv_rx_process: looking at packet %d, flags 0x%x.\n",
-					dev->name, np->cur_rx, flags);
-
-		if (flags & NV_RX_AVAIL)
-			break;	/* still owned by hardware, */
-
-		/*
-		 * the packet is for us - immediately tear down the pci mapping.
-		 * TODO: check if a prefetch of the first cacheline improves
-		 * the performance.
-		 */
-		pci_unmap_single(np->pci_dev, np->rx_dma[i],
-				np->rx_skbuff[i]->end-np->rx_skbuff[i]->data,
-				PCI_DMA_FROMDEVICE);
-
-		{
-			int j;
-			dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).",flags);
-			for (j=0; j<64; j++) {
-				if ((j%16) == 0)
-					dprintk("\n%03x:", j);
-				dprintk(" %02x", ((unsigned char*)np->rx_skbuff[i]->data)[j]);
-			}
-			dprintk("\n");
-		}
-		/* look at what we actually got: */
-		if (np->desc_ver == DESC_VER_1) {
-			if (!(flags & NV_RX_DESCRIPTORVALID))
-				goto next_pkt;
-
-			if (flags & NV_RX_ERROR) {
-				if (flags & NV_RX_MISSEDFRAME) {
-					np->stats.rx_missed_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3)) {
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX_CRCERR) {
-					np->stats.rx_crc_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX_OVERFLOW) {
-					np->stats.rx_over_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX_ERROR4) {
-					len = nv_getlen(dev, np->rx_skbuff[i]->data, len);
-					if (len < 0) {
-						np->stats.rx_errors++;
-						goto next_pkt;
-					}
-				}
-				/* framing errors are soft errors. */
-				if (flags & NV_RX_FRAMINGERR) {
-					if (flags & NV_RX_SUBSTRACT1) {
-						len--;
-					}
-				}
-			}
-		} else {
-			if (!(flags & NV_RX2_DESCRIPTORVALID))
-				goto next_pkt;
-
-			if (flags & NV_RX2_ERROR) {
-				if (flags & (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3)) {
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX2_CRCERR) {
-					np->stats.rx_crc_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX2_OVERFLOW) {
-					np->stats.rx_over_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX2_ERROR4) {
-					len = nv_getlen(dev, np->rx_skbuff[i]->data, len);
-					if (len < 0) {
-						np->stats.rx_errors++;
-						goto next_pkt;
-					}
-				}
-				/* framing errors are soft errors */
-				if (flags & NV_RX2_FRAMINGERR) {
-					if (flags & NV_RX2_SUBSTRACT1) {
-						len--;
-					}
-				}
-			}
-			if (np->rx_csum) {
-				flags &= NV_RX2_CHECKSUMMASK;
-				if (flags == NV_RX2_CHECKSUMOK1 ||
-				    flags == NV_RX2_CHECKSUMOK2 ||
-				    flags == NV_RX2_CHECKSUMOK3) {
-					dprintk(KERN_DEBUG "%s: hw checksum hit!.\n", dev->name);
-					np->rx_skbuff[i]->ip_summed = CHECKSUM_UNNECESSARY;
-				} else {
-					dprintk(KERN_DEBUG "%s: hwchecksum miss!.\n", dev->name);
-				}
-			}
-		}
-		if (np->ecdev) {
-			ecdev_receive(np->ecdev, np->rx_skbuff[i]->data, len);
-		}
-		else {
-			/* got a valid packet - forward it to the network core */
-			skb = np->rx_skbuff[i];
-			np->rx_skbuff[i] = NULL;
-
-			skb_put(skb, len);
-			skb->protocol = eth_type_trans(skb, dev);
-			dprintk(KERN_DEBUG "%s: nv_rx_process: packet %d with %d bytes, proto %d accepted.\n",
-					dev->name, np->cur_rx, len, skb->protocol);
-#ifdef CONFIG_FORCEDETH_NAPI
-			if (np->vlangrp && (vlanflags & NV_RX3_VLAN_TAG_PRESENT))
-				vlan_hwaccel_receive_skb(skb, np->vlangrp,
-						vlanflags & NV_RX3_VLAN_TAG_MASK);
-			else
-				netif_receive_skb(skb);
-#else
-			if (np->vlangrp && (vlanflags & NV_RX3_VLAN_TAG_PRESENT))
-				vlan_hwaccel_rx(skb, np->vlangrp,
-						vlanflags & NV_RX3_VLAN_TAG_MASK);
-			else
-				netif_rx(skb);
-#endif
-		}
-		dev->last_rx = jiffies;
-		np->stats.rx_packets++;
-		np->stats.rx_bytes += len;
-next_pkt:
-		np->cur_rx++;
-	}
-
-	return count;
-}
-
-static void set_bufsize(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (dev->mtu <= ETH_DATA_LEN)
-		np->rx_buf_sz = ETH_DATA_LEN + NV_RX_HEADERS;
-	else
-		np->rx_buf_sz = dev->mtu + NV_RX_HEADERS;
-}
-
-/*
- * nv_change_mtu: dev->change_mtu function
- * Called with dev_base_lock held for read.
- */
-static int nv_change_mtu(struct net_device *dev, int new_mtu)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int old_mtu;
-
-	if (new_mtu < 64 || new_mtu > np->pkt_limit)
-		return -EINVAL;
-
-	old_mtu = dev->mtu;
-	dev->mtu = new_mtu;
-
-	/* return early if the buffer sizes will not change */
-	if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN)
-		return 0;
-	if (old_mtu == new_mtu)
-		return 0;
-
-	/* synchronized against open : rtnl_lock() held by caller */
-	if (netif_running(dev)) {
-		u8 __iomem *base = get_hwbase(dev);
-		/*
-		 * It seems that the nic preloads valid ring entries into an
-		 * internal buffer. The procedure for flushing everything is
-		 * guessed, there is probably a simpler approach.
-		 * Changing the MTU is a rare event, it shouldn't matter.
-		 */
-		nv_disable_irq(dev);
-		netif_tx_lock_bh(dev);
-		spin_lock(&np->lock);
-		/* stop engines */
-		nv_stop_rx(dev);
-		nv_stop_tx(dev);
-		nv_txrx_reset(dev);
-		/* drain rx queue */
-		nv_drain_rx(dev);
-		nv_drain_tx(dev);
-		/* reinit driver view of the rx queue */
-		set_bufsize(dev);
-		if (nv_init_ring(dev)) {
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		}
-		/* reinit nic view of the rx queue */
-		writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-		setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-		writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
-			base + NvRegRingSizes);
-		pci_push(base);
-		writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-		pci_push(base);
-
-		/* restart rx engine */
-		nv_start_rx(dev);
-		nv_start_tx(dev);
-		spin_unlock(&np->lock);
-		netif_tx_unlock_bh(dev);
-		nv_enable_irq(dev);
-	}
-	return 0;
-}
-
-static void nv_copy_mac_to_hw(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 mac[2];
-
-	mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) +
-			(dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24);
-	mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8);
-
-	writel(mac[0], base + NvRegMacAddrA);
-	writel(mac[1], base + NvRegMacAddrB);
-}
-
-/*
- * nv_set_mac_address: dev->set_mac_address function
- * Called with rtnl_lock() held.
- */
-static int nv_set_mac_address(struct net_device *dev, void *addr)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	struct sockaddr *macaddr = (struct sockaddr*)addr;
-
-	if (!is_valid_ether_addr(macaddr->sa_data))
-		return -EADDRNOTAVAIL;
-
-	/* synchronized against open : rtnl_lock() held by caller */
-	memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN);
-
-	if (netif_running(dev)) {
-		netif_tx_lock_bh(dev);
-		spin_lock_irq(&np->lock);
-
-		/* stop rx engine */
-		nv_stop_rx(dev);
-
-		/* set mac address */
-		nv_copy_mac_to_hw(dev);
-
-		/* restart rx engine */
-		nv_start_rx(dev);
-		spin_unlock_irq(&np->lock);
-		netif_tx_unlock_bh(dev);
-	} else {
-		nv_copy_mac_to_hw(dev);
-	}
-	return 0;
-}
-
-/*
- * nv_set_multicast: dev->set_multicast function
- * Called with netif_tx_lock held.
- */
-static void nv_set_multicast(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 addr[2];
-	u32 mask[2];
-	u32 pff = readl(base + NvRegPacketFilterFlags) & NVREG_PFF_PAUSE_RX;
-
-	memset(addr, 0, sizeof(addr));
-	memset(mask, 0, sizeof(mask));
-
-	if (dev->flags & IFF_PROMISC) {
-		pff |= NVREG_PFF_PROMISC;
-	} else {
-		pff |= NVREG_PFF_MYADDR;
-
-		if (dev->flags & IFF_ALLMULTI || dev->mc_list) {
-			u32 alwaysOff[2];
-			u32 alwaysOn[2];
-
-			alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0xffffffff;
-			if (dev->flags & IFF_ALLMULTI) {
-				alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0;
-			} else {
-				struct dev_mc_list *walk;
-
-				walk = dev->mc_list;
-				while (walk != NULL) {
-					u32 a, b;
-					a = le32_to_cpu(*(u32 *) walk->dmi_addr);
-					b = le16_to_cpu(*(u16 *) (&walk->dmi_addr[4]));
-					alwaysOn[0] &= a;
-					alwaysOff[0] &= ~a;
-					alwaysOn[1] &= b;
-					alwaysOff[1] &= ~b;
-					walk = walk->next;
-				}
-			}
-			addr[0] = alwaysOn[0];
-			addr[1] = alwaysOn[1];
-			mask[0] = alwaysOn[0] | alwaysOff[0];
-			mask[1] = alwaysOn[1] | alwaysOff[1];
-		}
-	}
-	addr[0] |= NVREG_MCASTADDRA_FORCE;
-	pff |= NVREG_PFF_ALWAYS;
-	spin_lock_irq(&np->lock);
-	nv_stop_rx(dev);
-	writel(addr[0], base + NvRegMulticastAddrA);
-	writel(addr[1], base + NvRegMulticastAddrB);
-	writel(mask[0], base + NvRegMulticastMaskA);
-	writel(mask[1], base + NvRegMulticastMaskB);
-	writel(pff, base + NvRegPacketFilterFlags);
-	dprintk(KERN_INFO "%s: reconfiguration for multicast lists.\n",
-		dev->name);
-	nv_start_rx(dev);
-	spin_unlock_irq(&np->lock);
-}
-
-static void nv_update_pause(struct net_device *dev, u32 pause_flags)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	np->pause_flags &= ~(NV_PAUSEFRAME_TX_ENABLE | NV_PAUSEFRAME_RX_ENABLE);
-
-	if (np->pause_flags & NV_PAUSEFRAME_RX_CAPABLE) {
-		u32 pff = readl(base + NvRegPacketFilterFlags) & ~NVREG_PFF_PAUSE_RX;
-		if (pause_flags & NV_PAUSEFRAME_RX_ENABLE) {
-			writel(pff|NVREG_PFF_PAUSE_RX, base + NvRegPacketFilterFlags);
-			np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
-		} else {
-			writel(pff, base + NvRegPacketFilterFlags);
-		}
-	}
-	if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) {
-		u32 regmisc = readl(base + NvRegMisc1) & ~NVREG_MISC1_PAUSE_TX;
-		if (pause_flags & NV_PAUSEFRAME_TX_ENABLE) {
-			writel(NVREG_TX_PAUSEFRAME_ENABLE,  base + NvRegTxPauseFrame);
-			writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1);
-			np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-		} else {
-			writel(NVREG_TX_PAUSEFRAME_DISABLE,  base + NvRegTxPauseFrame);
-			writel(regmisc, base + NvRegMisc1);
-		}
-	}
-}
-
-/**
- * nv_update_linkspeed: Setup the MAC according to the link partner
- * @dev: Network device to be configured
- *
- * The function queries the PHY and checks if there is a link partner.
- * If yes, then it sets up the MAC accordingly. Otherwise, the MAC is
- * set to 10 MBit HD.
- *
- * The function returns 0 if there is no link partner and 1 if there is
- * a good link partner.
- */
-static int nv_update_linkspeed(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int adv = 0;
-	int lpa = 0;
-	int adv_lpa, adv_pause, lpa_pause;
-	int newls = np->linkspeed;
-	int newdup = np->duplex;
-	int mii_status;
-	int retval = 0;
-	u32 control_1000, status_1000, phyreg, pause_flags, txreg;
-
-	/* BMSR_LSTATUS is latched, read it twice:
-	 * we want the current value.
-	 */
-	mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-	mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-
-	if (!(mii_status & BMSR_LSTATUS)) {
-		dprintk(KERN_DEBUG "%s: no link detected by phy - falling back to 10HD.\n",
-				dev->name);
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-		retval = 0;
-		goto set_speed;
-	}
-
-	if (np->autoneg == 0) {
-		dprintk(KERN_DEBUG "%s: nv_update_linkspeed: autoneg off, PHY set to 0x%04x.\n",
-				dev->name, np->fixed_mode);
-		if (np->fixed_mode & LPA_100FULL) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-			newdup = 1;
-		} else if (np->fixed_mode & LPA_100HALF) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-			newdup = 0;
-		} else if (np->fixed_mode & LPA_10FULL) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-			newdup = 1;
-		} else {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-			newdup = 0;
-		}
-		retval = 1;
-		goto set_speed;
-	}
-	/* check auto negotiation is complete */
-	if (!(mii_status & BMSR_ANEGCOMPLETE)) {
-		/* still in autonegotiation - configure nic for 10 MBit HD and wait. */
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-		retval = 0;
-		dprintk(KERN_DEBUG "%s: autoneg not completed - falling back to 10HD.\n", dev->name);
-		goto set_speed;
-	}
-
-	adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-	lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ);
-	dprintk(KERN_DEBUG "%s: nv_update_linkspeed: PHY advertises 0x%04x, lpa 0x%04x.\n",
-				dev->name, adv, lpa);
-
-	retval = 1;
-	if (np->gigabit == PHY_GIGABIT) {
-		control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
-		status_1000 = mii_rw(dev, np->phyaddr, MII_STAT1000, MII_READ);
-
-		if ((control_1000 & ADVERTISE_1000FULL) &&
-			(status_1000 & LPA_1000FULL)) {
-			dprintk(KERN_DEBUG "%s: nv_update_linkspeed: GBit ethernet detected.\n",
-				dev->name);
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_1000;
-			newdup = 1;
-			goto set_speed;
-		}
-	}
-
-	/* FIXME: handle parallel detection properly */
-	adv_lpa = lpa & adv;
-	if (adv_lpa & LPA_100FULL) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-		newdup = 1;
-	} else if (adv_lpa & LPA_100HALF) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-		newdup = 0;
-	} else if (adv_lpa & LPA_10FULL) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 1;
-	} else if (adv_lpa & LPA_10HALF) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-	} else {
-		dprintk(KERN_DEBUG "%s: bad ability %04x - falling back to 10HD.\n", dev->name, adv_lpa);
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-	}
-
-set_speed:
-	if (np->duplex == newdup && np->linkspeed == newls)
-		return retval;
-
-	dprintk(KERN_INFO "%s: changing link setting from %d/%d to %d/%d.\n",
-			dev->name, np->linkspeed, np->duplex, newls, newdup);
-
-	np->duplex = newdup;
-	np->linkspeed = newls;
-
-	if (np->gigabit == PHY_GIGABIT) {
-		phyreg = readl(base + NvRegRandomSeed);
-		phyreg &= ~(0x3FF00);
-		if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_10)
-			phyreg |= NVREG_RNDSEED_FORCE3;
-		else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_100)
-			phyreg |= NVREG_RNDSEED_FORCE2;
-		else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_1000)
-			phyreg |= NVREG_RNDSEED_FORCE;
-		writel(phyreg, base + NvRegRandomSeed);
-	}
-
-	phyreg = readl(base + NvRegPhyInterface);
-	phyreg &= ~(PHY_HALF|PHY_100|PHY_1000);
-	if (np->duplex == 0)
-		phyreg |= PHY_HALF;
-	if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_100)
-		phyreg |= PHY_100;
-	else if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
-		phyreg |= PHY_1000;
-	writel(phyreg, base + NvRegPhyInterface);
-
-	if (phyreg & PHY_RGMII) {
-		if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
-			txreg = NVREG_TX_DEFERRAL_RGMII_1000;
-		else
-			txreg = NVREG_TX_DEFERRAL_RGMII_10_100;
-	} else {
-		txreg = NVREG_TX_DEFERRAL_DEFAULT;
-	}
-	writel(txreg, base + NvRegTxDeferral);
-
-	if (np->desc_ver == DESC_VER_1) {
-		txreg = NVREG_TX_WM_DESC1_DEFAULT;
-	} else {
-		if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
-			txreg = NVREG_TX_WM_DESC2_3_1000;
-		else
-			txreg = NVREG_TX_WM_DESC2_3_DEFAULT;
-	}
-	writel(txreg, base + NvRegTxWatermark);
-
-	writel(NVREG_MISC1_FORCE | ( np->duplex ? 0 : NVREG_MISC1_HD),
-		base + NvRegMisc1);
-	pci_push(base);
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	pci_push(base);
-
-	pause_flags = 0;
-	/* setup pause frame */
-	if (np->duplex != 0) {
-		if (np->autoneg && np->pause_flags & NV_PAUSEFRAME_AUTONEG) {
-			adv_pause = adv & (ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM);
-			lpa_pause = lpa & (LPA_PAUSE_CAP| LPA_PAUSE_ASYM);
-
-			switch (adv_pause) {
-			case ADVERTISE_PAUSE_CAP:
-				if (lpa_pause & LPA_PAUSE_CAP) {
-					pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
-					if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
-						pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-				}
-				break;
-			case ADVERTISE_PAUSE_ASYM:
-				if (lpa_pause == (LPA_PAUSE_CAP| LPA_PAUSE_ASYM))
-				{
-					pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-				}
-				break;
-			case ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM:
-				if (lpa_pause & LPA_PAUSE_CAP)
-				{
-					pause_flags |=  NV_PAUSEFRAME_RX_ENABLE;
-					if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
-						pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-				}
-				if (lpa_pause == LPA_PAUSE_ASYM)
-				{
-					pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
-				}
-				break;
-			}
-		} else {
-			pause_flags = np->pause_flags;
-		}
-	}
-	nv_update_pause(dev, pause_flags);
-
-	return retval;
-}
-
-static void nv_linkchange(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-    if (np->ecdev) {
-        int link = nv_update_linkspeed(dev);
-        ecdev_set_link(np->ecdev, link);
-        return;
-    }
-
-	if (nv_update_linkspeed(dev)) {
-		if (!netif_carrier_ok(dev)) {
-			netif_carrier_on(dev);
-			printk(KERN_INFO "%s: link up.\n", dev->name);
-			nv_start_rx(dev);
-		}
-	} else {
-		if (netif_carrier_ok(dev)) {
-			netif_carrier_off(dev);
-			printk(KERN_INFO "%s: link down.\n", dev->name);
-			nv_stop_rx(dev);
-		}
-	}
-}
-
-static void nv_link_irq(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 miistat;
-
-	miistat = readl(base + NvRegMIIStatus);
-	writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-	dprintk(KERN_INFO "%s: link change irq, status 0x%x.\n", dev->name, miistat);
-
-	if (miistat & (NVREG_MIISTAT_LINKCHANGE))
-		nv_linkchange(dev);
-	dprintk(KERN_DEBUG "%s: link change notification done.\n", dev->name);
-}
-
-static irqreturn_t nv_nic_irq(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq\n", dev->name);
-
-	for (i=0; ; i++) {
-		if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
-			events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
-			writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-		} else {
-			events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
-			writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
-		}
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		if (!np->ecdev) spin_lock(&np->lock);
-		nv_tx_done(dev);
-		if (!np->ecdev) spin_unlock(&np->lock);
-
-		if (events & NVREG_IRQ_LINK) {
-			if (!np->ecdev) spin_lock(&np->lock);
-			nv_link_irq(dev);
-			if (!np->ecdev) spin_unlock(&np->lock);
-		}
-		if (np->need_linktimer && time_after(jiffies, np->link_timeout)) {
-			if (!np->ecdev) spin_lock(&np->lock);
-			nv_linkchange(dev);
-			if (!np->ecdev) spin_unlock(&np->lock);
-			np->link_timeout = jiffies + LINK_TIMEOUT;
-		}
-		if (events & (NVREG_IRQ_TX_ERR)) {
-			dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n",
-						dev->name, events);
-		}
-		if (events & (NVREG_IRQ_UNKNOWN)) {
-			printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
-						dev->name, events);
-		}
-#ifdef CONFIG_FORCEDETH_NAPI
-		if (events & NVREG_IRQ_RX_ALL) {
-			if (np->ecdev) {
-				nv_rx_process(dev, dev->weight);
-			}
-			else {
-				netif_rx_schedule(dev);
-
-				/* Disable furthur receive irq's */
-				spin_lock(&np->lock);
-				np->irqmask &= ~NVREG_IRQ_RX_ALL;
-
-				if (np->msi_flags & NV_MSI_X_ENABLED)
-					writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
-				else
-					writel(np->irqmask, base + NvRegIrqMask);
-				spin_unlock(&np->lock);
-			}
-		}
-#else
-		nv_rx_process(dev, dev->weight);
-		if (nv_alloc_rx(dev) && !np->ecdev) {
-			spin_lock(&np->lock);
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-			spin_unlock(&np->lock);
-		}
-#endif
-		if (i > max_interrupt_work) {
-			if (!np->ecdev) {
-				spin_lock(&np->lock);
-				/* disable interrupts on the nic */
-				if (!(np->msi_flags & NV_MSI_X_ENABLED))
-					writel(0, base + NvRegIrqMask);
-				else
-					writel(np->irqmask, base + NvRegIrqMask);
-				pci_push(base);
-
-				if (!np->in_shutdown) {
-					np->nic_poll_irq = np->irqmask;
-					mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-				}
-				spin_unlock(&np->lock);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq.\n", dev->name, i);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static irqreturn_t nv_nic_irq_tx(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-	unsigned long flags = 0;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL;
-		writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: tx irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		if (!np->ecdev) spin_lock_irqsave(&np->lock, flags);
-		nv_tx_done(dev);
-		if (!np->ecdev) spin_unlock_irqrestore(&np->lock, flags);
-
-		if (events & (NVREG_IRQ_TX_ERR)) {
-			dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n",
-						dev->name, events);
-		}
-		if (i > max_interrupt_work) {
-			if (!np->ecdev) { 
-				spin_lock_irqsave(&np->lock, flags);
-				/* disable interrupts on the nic */
-				writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask);
-				pci_push(base);
-
-				if (!np->in_shutdown) {
-					np->nic_poll_irq |= NVREG_IRQ_TX_ALL;
-					mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-				}
-				spin_unlock_irqrestore(&np->lock, flags);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_tx.\n", dev->name, i);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_tx completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-#ifdef CONFIG_FORCEDETH_NAPI
-static int nv_napi_poll(struct net_device *dev, int *budget)
-{
-	int pkts, limit = min(*budget, dev->quota);
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	pkts = nv_rx_process(dev, limit);
-
-	if (nv_alloc_rx(dev)) {
-		spin_lock_irq(&np->lock);
-		if (!np->in_shutdown)
-			mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		spin_unlock_irq(&np->lock);
-	}
-
-	if (pkts < limit) {
-		/* all done, no more packets present */
-		netif_rx_complete(dev);
-
-		/* re-enable receive interrupts */
-		spin_lock_irq(&np->lock);
-		np->irqmask |= NVREG_IRQ_RX_ALL;
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
-		else
-			writel(np->irqmask, base + NvRegIrqMask);
-		spin_unlock_irq(&np->lock);
-		return 0;
-	} else {
-		/* used up our quantum, so reschedule */
-		dev->quota -= pkts;
-		*budget -= pkts;
-		return 1;
-	}
-}
-#endif
-
-#ifdef CONFIG_FORCEDETH_NAPI
-static irqreturn_t nv_nic_irq_rx(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-
-	events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL;
-	writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus);
-
-	if (events && !np->ecdev) {
-		netif_rx_schedule(dev);
-		/* disable receive interrupts on the nic */
-		writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
-		pci_push(base);
-	}
-	return IRQ_HANDLED;
-}
-#else
-static irqreturn_t nv_nic_irq_rx(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-	unsigned long flags;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL;
-		writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		nv_rx_process(dev, dev->weight);
-		if (nv_alloc_rx(dev) && !np->ecdev) {
-			spin_lock_irqsave(&np->lock, flags);
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-			spin_unlock_irqrestore(&np->lock, flags);
-		}
-
-		if (i > max_interrupt_work) {
-			if (!np->ecdev) {
-				spin_lock_irqsave(&np->lock, flags);
-				/* disable interrupts on the nic */
-				writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
-				pci_push(base);
-
-				if (!np->in_shutdown) {
-					np->nic_poll_irq |= NVREG_IRQ_RX_ALL;
-					mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-				}
-				spin_unlock_irqrestore(&np->lock, flags);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_rx.\n", dev->name, i);
-			break;
-		}
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_rx completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-#endif
-
-static irqreturn_t nv_nic_irq_other(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-	unsigned long flags = 0;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER;
-		writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		if (events & NVREG_IRQ_LINK) {
-			if (!np->ecdev) spin_lock_irqsave(&np->lock, flags);
-			nv_link_irq(dev);
-			if (!np->ecdev) spin_unlock_irqrestore(&np->lock, flags);
-		}
-		if (np->need_linktimer && time_after(jiffies, np->link_timeout)) {
-			if (!np->ecdev) spin_lock_irqsave(&np->lock, flags);
-			nv_linkchange(dev);
-			if (!np->ecdev) spin_unlock_irqrestore(&np->lock, flags);
-			np->link_timeout = jiffies + LINK_TIMEOUT;
-		}
-		if (events & (NVREG_IRQ_UNKNOWN)) {
-			printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
-						dev->name, events);
-		}
-		if (i > max_interrupt_work) {
-			if (!np->ecdev) { 
-				spin_lock_irqsave(&np->lock, flags);
-				/* disable interrupts on the nic */
-				writel(NVREG_IRQ_OTHER, base + NvRegIrqMask);
-				pci_push(base);
-
-				if (!np->in_shutdown) {
-					np->nic_poll_irq |= NVREG_IRQ_OTHER;
-					mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-				}
-				spin_unlock_irqrestore(&np->lock, flags);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_other.\n", dev->name, i);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_other completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static irqreturn_t nv_nic_irq_test(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_test\n", dev->name);
-
-	if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
-		events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
-		writel(NVREG_IRQ_TIMER, base + NvRegIrqStatus);
-	} else {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
-		writel(NVREG_IRQ_TIMER, base + NvRegMSIXIrqStatus);
-	}
-	pci_push(base);
-	dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
-	if (!(events & NVREG_IRQ_TIMER))
-		return IRQ_RETVAL(0);
-
-	spin_lock(&np->lock);
-	np->intr_test = 1;
-	spin_unlock(&np->lock);
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_test completed\n", dev->name);
-
-	return IRQ_RETVAL(1);
-}
-
-static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	int i;
-	u32 msixmap = 0;
-
-	/* Each interrupt bit can be mapped to a MSIX vector (4 bits).
-	 * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents
-	 * the remaining 8 interrupts.
-	 */
-	for (i = 0; i < 8; i++) {
-		if ((irqmask >> i) & 0x1) {
-			msixmap |= vector << (i << 2);
-		}
-	}
-	writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0);
-
-	msixmap = 0;
-	for (i = 0; i < 8; i++) {
-		if ((irqmask >> (i + 8)) & 0x1) {
-			msixmap |= vector << (i << 2);
-		}
-	}
-	writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1);
-}
-
-static int nv_request_irq(struct net_device *dev, int intr_test)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int ret = 1;
-	int i;
-
-	if (np->msi_flags & NV_MSI_X_CAPABLE) {
-		for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
-			np->msi_x_entry[i].entry = i;
-		}
-		if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) {
-			np->msi_flags |= NV_MSI_X_ENABLED;
-			if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT && !intr_test) {
-				/* Request irq for rx handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, &nv_nic_irq_rx, IRQF_SHARED, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for rx %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_err;
-				}
-				/* Request irq for tx handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, &nv_nic_irq_tx, IRQF_SHARED, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for tx %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_free_rx;
-				}
-				/* Request irq for link and timer handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector, &nv_nic_irq_other, IRQF_SHARED, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for link %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_free_tx;
-				}
-				/* map interrupts to their respective vector */
-				writel(0, base + NvRegMSIXMap0);
-				writel(0, base + NvRegMSIXMap1);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER);
-			} else {
-				/* Request irq for all interrupts */
-				if ((!intr_test &&
-				     request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, &nv_nic_irq, IRQF_SHARED, dev->name, dev) != 0) ||
-				    (intr_test &&
-				     request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, &nv_nic_irq_test, IRQF_SHARED, dev->name, dev) != 0)) {
-					printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_err;
-				}
-
-				/* map interrupts to vector 0 */
-				writel(0, base + NvRegMSIXMap0);
-				writel(0, base + NvRegMSIXMap1);
-			}
-		}
-	}
-	if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) {
-		if ((ret = pci_enable_msi(np->pci_dev)) == 0) {
-			pci_intx(np->pci_dev, 0);
-			np->msi_flags |= NV_MSI_ENABLED;
-			if ((!intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq, IRQF_SHARED, dev->name, dev) != 0) ||
-			    (intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq_test, IRQF_SHARED, dev->name, dev) != 0)) {
-				printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
-				pci_disable_msi(np->pci_dev);
-				pci_intx(np->pci_dev, 1);
-				np->msi_flags &= ~NV_MSI_ENABLED;
-				goto out_err;
-			}
-
-			/* map interrupts to vector 0 */
-			writel(0, base + NvRegMSIMap0);
-			writel(0, base + NvRegMSIMap1);
-			/* enable msi vector 0 */
-			writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask);
-		}
-	}
-	if (ret != 0) {
-		if ((!intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq, IRQF_SHARED, dev->name, dev) != 0) ||
-		    (intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq_test, IRQF_SHARED, dev->name, dev) != 0))
-			goto out_err;
-
-	}
-
-	return 0;
-out_free_tx:
-	free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, dev);
-out_free_rx:
-	free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, dev);
-out_err:
-	return 1;
-}
-
-static void nv_free_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	int i;
-
-	if (np->msi_flags & NV_MSI_X_ENABLED) {
-		for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
-			free_irq(np->msi_x_entry[i].vector, dev);
-		}
-		pci_disable_msix(np->pci_dev);
-		np->msi_flags &= ~NV_MSI_X_ENABLED;
-	} else {
-		free_irq(np->pci_dev->irq, dev);
-		if (np->msi_flags & NV_MSI_ENABLED) {
-			pci_disable_msi(np->pci_dev);
-			pci_intx(np->pci_dev, 1);
-			np->msi_flags &= ~NV_MSI_ENABLED;
-		}
-	}
-}
-
-void ec_poll(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		nv_nic_irq(0, dev);
-	} else {
-		if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
-			nv_nic_irq_rx(0, dev);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
-			nv_nic_irq_tx(0, dev);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
-			nv_nic_irq_other(0, dev);
-		}
-	}
-}
-
-static void nv_do_nic_poll(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 mask = 0;
-
-	/*
-	 * First disable irq(s) and then
-	 * reenable interrupts on the nic, we have to do this before calling
-	 * nv_nic_irq because that may decide to do otherwise
-	 */
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq_lockdep(dev->irq);
-		mask = np->irqmask;
-	} else {
-		if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
-			disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-			mask |= NVREG_IRQ_RX_ALL;
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
-			disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-			mask |= NVREG_IRQ_TX_ALL;
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
-			disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-			mask |= NVREG_IRQ_OTHER;
-		}
-	}
-	np->nic_poll_irq = 0;
-
-	/* FIXME: Do we need synchronize_irq(dev->irq) here? */
-
-	writel(mask, base + NvRegIrqMask);
-	pci_push(base);
-
-	if (!using_multi_irqs(dev)) {
-		nv_nic_irq(0, dev);
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq_lockdep(dev->irq);
-	} else {
-		if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
-			nv_nic_irq_rx(0, dev);
-			enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
-			nv_nic_irq_tx(0, dev);
-			enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
-			nv_nic_irq_other(0, dev);
-			enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-		}
-	}
-}
-
-#ifdef CONFIG_NET_POLL_CONTROLLER
-static void nv_poll_controller(struct net_device *dev)
-{
-	nv_do_nic_poll((unsigned long) dev);
-}
-#endif
-
-static void nv_do_stats_poll(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	np->estats.tx_bytes += readl(base + NvRegTxCnt);
-	np->estats.tx_zero_rexmt += readl(base + NvRegTxZeroReXmt);
-	np->estats.tx_one_rexmt += readl(base + NvRegTxOneReXmt);
-	np->estats.tx_many_rexmt += readl(base + NvRegTxManyReXmt);
-	np->estats.tx_late_collision += readl(base + NvRegTxLateCol);
-	np->estats.tx_fifo_errors += readl(base + NvRegTxUnderflow);
-	np->estats.tx_carrier_errors += readl(base + NvRegTxLossCarrier);
-	np->estats.tx_excess_deferral += readl(base + NvRegTxExcessDef);
-	np->estats.tx_retry_error += readl(base + NvRegTxRetryErr);
-	np->estats.tx_deferral += readl(base + NvRegTxDef);
-	np->estats.tx_packets += readl(base + NvRegTxFrame);
-	np->estats.tx_pause += readl(base + NvRegTxPause);
-	np->estats.rx_frame_error += readl(base + NvRegRxFrameErr);
-	np->estats.rx_extra_byte += readl(base + NvRegRxExtraByte);
-	np->estats.rx_late_collision += readl(base + NvRegRxLateCol);
-	np->estats.rx_runt += readl(base + NvRegRxRunt);
-	np->estats.rx_frame_too_long += readl(base + NvRegRxFrameTooLong);
-	np->estats.rx_over_errors += readl(base + NvRegRxOverflow);
-	np->estats.rx_crc_errors += readl(base + NvRegRxFCSErr);
-	np->estats.rx_frame_align_error += readl(base + NvRegRxFrameAlignErr);
-	np->estats.rx_length_error += readl(base + NvRegRxLenErr);
-	np->estats.rx_unicast += readl(base + NvRegRxUnicast);
-	np->estats.rx_multicast += readl(base + NvRegRxMulticast);
-	np->estats.rx_broadcast += readl(base + NvRegRxBroadcast);
-	np->estats.rx_bytes += readl(base + NvRegRxCnt);
-	np->estats.rx_pause += readl(base + NvRegRxPause);
-	np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame);
-	np->estats.rx_packets =
-		np->estats.rx_unicast +
-		np->estats.rx_multicast +
-		np->estats.rx_broadcast;
-	np->estats.rx_errors_total =
-		np->estats.rx_crc_errors +
-		np->estats.rx_over_errors +
-		np->estats.rx_frame_error +
-		(np->estats.rx_frame_align_error - np->estats.rx_extra_byte) +
-		np->estats.rx_late_collision +
-		np->estats.rx_runt +
-		np->estats.rx_frame_too_long;
-
-	if (!np->in_shutdown)
-		mod_timer(&np->stats_poll, jiffies + STATS_INTERVAL);
-}
-
-static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	strcpy(info->driver, "forcedeth");
-	strcpy(info->version, FORCEDETH_VERSION);
-	strcpy(info->bus_info, pci_name(np->pci_dev));
-}
-
-static void nv_get_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	wolinfo->supported = WAKE_MAGIC;
-
-	spin_lock_irq(&np->lock);
-	if (np->wolenabled)
-		wolinfo->wolopts = WAKE_MAGIC;
-	spin_unlock_irq(&np->lock);
-}
-
-static int nv_set_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 flags = 0;
-
-	if (wolinfo->wolopts == 0) {
-		np->wolenabled = 0;
-	} else if (wolinfo->wolopts & WAKE_MAGIC) {
-		np->wolenabled = 1;
-		flags = NVREG_WAKEUPFLAGS_ENABLE;
-	}
-	if (netif_running(dev)) {
-		spin_lock_irq(&np->lock);
-		writel(flags, base + NvRegWakeUpFlags);
-		spin_unlock_irq(&np->lock);
-	}
-	return 0;
-}
-
-static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int adv;
-
-	spin_lock_irq(&np->lock);
-	ecmd->port = PORT_MII;
-	if (!netif_running(dev)) {
-		/* We do not track link speed / duplex setting if the
-		 * interface is disabled. Force a link check */
-		if (nv_update_linkspeed(dev)) {
-			if (!netif_carrier_ok(dev))
-				netif_carrier_on(dev);
-		} else {
-			if (netif_carrier_ok(dev))
-				netif_carrier_off(dev);
-		}
-	}
-
-	if (netif_carrier_ok(dev)) {
-		switch(np->linkspeed & (NVREG_LINKSPEED_MASK)) {
-		case NVREG_LINKSPEED_10:
-			ecmd->speed = SPEED_10;
-			break;
-		case NVREG_LINKSPEED_100:
-			ecmd->speed = SPEED_100;
-			break;
-		case NVREG_LINKSPEED_1000:
-			ecmd->speed = SPEED_1000;
-			break;
-		}
-		ecmd->duplex = DUPLEX_HALF;
-		if (np->duplex)
-			ecmd->duplex = DUPLEX_FULL;
-	} else {
-		ecmd->speed = -1;
-		ecmd->duplex = -1;
-	}
-
-	ecmd->autoneg = np->autoneg;
-
-	ecmd->advertising = ADVERTISED_MII;
-	if (np->autoneg) {
-		ecmd->advertising |= ADVERTISED_Autoneg;
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		if (adv & ADVERTISE_10HALF)
-			ecmd->advertising |= ADVERTISED_10baseT_Half;
-		if (adv & ADVERTISE_10FULL)
-			ecmd->advertising |= ADVERTISED_10baseT_Full;
-		if (adv & ADVERTISE_100HALF)
-			ecmd->advertising |= ADVERTISED_100baseT_Half;
-		if (adv & ADVERTISE_100FULL)
-			ecmd->advertising |= ADVERTISED_100baseT_Full;
-		if (np->gigabit == PHY_GIGABIT) {
-			adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
-			if (adv & ADVERTISE_1000FULL)
-				ecmd->advertising |= ADVERTISED_1000baseT_Full;
-		}
-	}
-	ecmd->supported = (SUPPORTED_Autoneg |
-		SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
-		SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
-		SUPPORTED_MII);
-	if (np->gigabit == PHY_GIGABIT)
-		ecmd->supported |= SUPPORTED_1000baseT_Full;
-
-	ecmd->phy_address = np->phyaddr;
-	ecmd->transceiver = XCVR_EXTERNAL;
-
-	/* ignore maxtxpkt, maxrxpkt for now */
-	spin_unlock_irq(&np->lock);
-	return 0;
-}
-
-static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (ecmd->port != PORT_MII)
-		return -EINVAL;
-	if (ecmd->transceiver != XCVR_EXTERNAL)
-		return -EINVAL;
-	if (ecmd->phy_address != np->phyaddr) {
-		/* TODO: support switching between multiple phys. Should be
-		 * trivial, but not enabled due to lack of test hardware. */
-		return -EINVAL;
-	}
-	if (ecmd->autoneg == AUTONEG_ENABLE) {
-		u32 mask;
-
-		mask = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
-			  ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
-		if (np->gigabit == PHY_GIGABIT)
-			mask |= ADVERTISED_1000baseT_Full;
-
-		if ((ecmd->advertising & mask) == 0)
-			return -EINVAL;
-
-	} else if (ecmd->autoneg == AUTONEG_DISABLE) {
-		/* Note: autonegotiation disable, speed 1000 intentionally
-		 * forbidden - noone should need that. */
-
-		if (ecmd->speed != SPEED_10 && ecmd->speed != SPEED_100)
-			return -EINVAL;
-		if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
-			return -EINVAL;
-	} else {
-		return -EINVAL;
-	}
-
-	netif_carrier_off(dev);
-	if (netif_running(dev)) {
-		nv_disable_irq(dev);
-		netif_tx_lock_bh(dev);
-		spin_lock(&np->lock);
-		/* stop engines */
-		nv_stop_rx(dev);
-		nv_stop_tx(dev);
-		spin_unlock(&np->lock);
-		netif_tx_unlock_bh(dev);
-	}
-
-	if (ecmd->autoneg == AUTONEG_ENABLE) {
-		int adv, bmcr;
-
-		np->autoneg = 1;
-
-		/* advertise only what has been requested */
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
-		if (ecmd->advertising & ADVERTISED_10baseT_Half)
-			adv |= ADVERTISE_10HALF;
-		if (ecmd->advertising & ADVERTISED_10baseT_Full)
-			adv |= ADVERTISE_10FULL;
-		if (ecmd->advertising & ADVERTISED_100baseT_Half)
-			adv |= ADVERTISE_100HALF;
-		if (ecmd->advertising & ADVERTISED_100baseT_Full)
-			adv |= ADVERTISE_100FULL;
-		if (np->pause_flags & NV_PAUSEFRAME_RX_REQ)  /* for rx we set both advertisments but disable tx pause */
-			adv |=  ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
-		if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
-			adv |=  ADVERTISE_PAUSE_ASYM;
-		mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
-
-		if (np->gigabit == PHY_GIGABIT) {
-			adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
-			adv &= ~ADVERTISE_1000FULL;
-			if (ecmd->advertising & ADVERTISED_1000baseT_Full)
-				adv |= ADVERTISE_1000FULL;
-			mii_rw(dev, np->phyaddr, MII_CTRL1000, adv);
-		}
-
-		if (netif_running(dev))
-			printk(KERN_INFO "%s: link down.\n", dev->name);
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		if (np->phy_model == PHY_MODEL_MARVELL_E3016) {
-			bmcr |= BMCR_ANENABLE;
-			/* reset the phy in order for settings to stick,
-			 * and cause autoneg to start */
-			if (phy_reset(dev, bmcr)) {
-				printk(KERN_INFO "%s: phy reset failed\n", dev->name);
-				return -EINVAL;
-			}
-		} else {
-			bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-			mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-		}
-	} else {
-		int adv, bmcr;
-
-		np->autoneg = 0;
-
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
-		if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_HALF)
-			adv |= ADVERTISE_10HALF;
-		if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_FULL)
-			adv |= ADVERTISE_10FULL;
-		if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_HALF)
-			adv |= ADVERTISE_100HALF;
-		if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_FULL)
-			adv |= ADVERTISE_100FULL;
-		np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE);
-		if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) {/* for rx we set both advertisments but disable tx pause */
-			adv |=  ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
-			np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
-		}
-		if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) {
-			adv |=  ADVERTISE_PAUSE_ASYM;
-			np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-		}
-		mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
-		np->fixed_mode = adv;
-
-		if (np->gigabit == PHY_GIGABIT) {
-			adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
-			adv &= ~ADVERTISE_1000FULL;
-			mii_rw(dev, np->phyaddr, MII_CTRL1000, adv);
-		}
-
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		bmcr &= ~(BMCR_ANENABLE|BMCR_SPEED100|BMCR_SPEED1000|BMCR_FULLDPLX);
-		if (np->fixed_mode & (ADVERTISE_10FULL|ADVERTISE_100FULL))
-			bmcr |= BMCR_FULLDPLX;
-		if (np->fixed_mode & (ADVERTISE_100HALF|ADVERTISE_100FULL))
-			bmcr |= BMCR_SPEED100;
-		if (np->phy_oui == PHY_OUI_MARVELL) {
-			/* reset the phy in order for forced mode settings to stick */
-			if (phy_reset(dev, bmcr)) {
-				printk(KERN_INFO "%s: phy reset failed\n", dev->name);
-				return -EINVAL;
-			}
-		} else {
-			mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-			if (netif_running(dev)) {
-				/* Wait a bit and then reconfigure the nic. */
-				udelay(10);
-				nv_linkchange(dev);
-			}
-		}
-	}
-
-	if (netif_running(dev)) {
-		nv_start_rx(dev);
-		nv_start_tx(dev);
-		nv_enable_irq(dev);
-	}
-
-	return 0;
-}
-
-#define FORCEDETH_REGS_VER	1
-
-static int nv_get_regs_len(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	return np->register_size;
-}
-
-static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 *rbuf = buf;
-	int i;
-
-	regs->version = FORCEDETH_REGS_VER;
-	spin_lock_irq(&np->lock);
-	for (i = 0;i <= np->register_size/sizeof(u32); i++)
-		rbuf[i] = readl(base + i*sizeof(u32));
-	spin_unlock_irq(&np->lock);
-}
-
-static int nv_nway_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int ret;
-
-	if (np->autoneg) {
-		int bmcr;
-
-		netif_carrier_off(dev);
-		if (netif_running(dev)) {
-			nv_disable_irq(dev);
-			netif_tx_lock_bh(dev);
-			spin_lock(&np->lock);
-			/* stop engines */
-			nv_stop_rx(dev);
-			nv_stop_tx(dev);
-			spin_unlock(&np->lock);
-			netif_tx_unlock_bh(dev);
-			printk(KERN_INFO "%s: link down.\n", dev->name);
-		}
-
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		if (np->phy_model == PHY_MODEL_MARVELL_E3016) {
-			bmcr |= BMCR_ANENABLE;
-			/* reset the phy in order for settings to stick*/
-			if (phy_reset(dev, bmcr)) {
-				printk(KERN_INFO "%s: phy reset failed\n", dev->name);
-				return -EINVAL;
-			}
-		} else {
-			bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-			mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-		}
-
-		if (netif_running(dev)) {
-			nv_start_rx(dev);
-			nv_start_tx(dev);
-			nv_enable_irq(dev);
-		}
-		ret = 0;
-	} else {
-		ret = -EINVAL;
-	}
-
-	return ret;
-}
-
-static int nv_set_tso(struct net_device *dev, u32 value)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if ((np->driver_data & DEV_HAS_CHECKSUM))
-		return ethtool_op_set_tso(dev, value);
-	else
-		return -EOPNOTSUPP;
-}
-
-static void nv_get_ringparam(struct net_device *dev, struct ethtool_ringparam* ring)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	ring->rx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3;
-	ring->rx_mini_max_pending = 0;
-	ring->rx_jumbo_max_pending = 0;
-	ring->tx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3;
-
-	ring->rx_pending = np->rx_ring_size;
-	ring->rx_mini_pending = 0;
-	ring->rx_jumbo_pending = 0;
-	ring->tx_pending = np->tx_ring_size;
-}
-
-static int nv_set_ringparam(struct net_device *dev, struct ethtool_ringparam* ring)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u8 *rxtx_ring, *rx_skbuff, *tx_skbuff, *rx_dma, *tx_dma, *tx_dma_len;
-	dma_addr_t ring_addr;
-
-	if (ring->rx_pending < RX_RING_MIN ||
-	    ring->tx_pending < TX_RING_MIN ||
-	    ring->rx_mini_pending != 0 ||
-	    ring->rx_jumbo_pending != 0 ||
-	    (np->desc_ver == DESC_VER_1 &&
-	     (ring->rx_pending > RING_MAX_DESC_VER_1 ||
-	      ring->tx_pending > RING_MAX_DESC_VER_1)) ||
-	    (np->desc_ver != DESC_VER_1 &&
-	     (ring->rx_pending > RING_MAX_DESC_VER_2_3 ||
-	      ring->tx_pending > RING_MAX_DESC_VER_2_3))) {
-		return -EINVAL;
-	}
-
-	/* allocate new rings */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		rxtx_ring = pci_alloc_consistent(np->pci_dev,
-					    sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending),
-					    &ring_addr);
-	} else {
-		rxtx_ring = pci_alloc_consistent(np->pci_dev,
-					    sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending),
-					    &ring_addr);
-	}
-	rx_skbuff = kmalloc(sizeof(struct sk_buff*) * ring->rx_pending, GFP_KERNEL);
-	rx_dma = kmalloc(sizeof(dma_addr_t) * ring->rx_pending, GFP_KERNEL);
-	tx_skbuff = kmalloc(sizeof(struct sk_buff*) * ring->tx_pending, GFP_KERNEL);
-	tx_dma = kmalloc(sizeof(dma_addr_t) * ring->tx_pending, GFP_KERNEL);
-	tx_dma_len = kmalloc(sizeof(unsigned int) * ring->tx_pending, GFP_KERNEL);
-	if (!rxtx_ring || !rx_skbuff || !rx_dma || !tx_skbuff || !tx_dma || !tx_dma_len) {
-		/* fall back to old rings */
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			if (rxtx_ring)
-				pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending),
-						    rxtx_ring, ring_addr);
-		} else {
-			if (rxtx_ring)
-				pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending),
-						    rxtx_ring, ring_addr);
-		}
-		if (rx_skbuff)
-			kfree(rx_skbuff);
-		if (rx_dma)
-			kfree(rx_dma);
-		if (tx_skbuff)
-			kfree(tx_skbuff);
-		if (tx_dma)
-			kfree(tx_dma);
-		if (tx_dma_len)
-			kfree(tx_dma_len);
-		goto exit;
-	}
-
-	if (netif_running(dev)) {
-		nv_disable_irq(dev);
-		netif_tx_lock_bh(dev);
-		spin_lock(&np->lock);
-		/* stop engines */
-		nv_stop_rx(dev);
-		nv_stop_tx(dev);
-		nv_txrx_reset(dev);
-		/* drain queues */
-		nv_drain_rx(dev);
-		nv_drain_tx(dev);
-		/* delete queues */
-		free_rings(dev);
-	}
-
-	/* set new values */
-	np->rx_ring_size = ring->rx_pending;
-	np->tx_ring_size = ring->tx_pending;
-	np->tx_limit_stop = ring->tx_pending - TX_LIMIT_DIFFERENCE;
-	np->tx_limit_start = ring->tx_pending - TX_LIMIT_DIFFERENCE - 1;
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->rx_ring.orig = (struct ring_desc*)rxtx_ring;
-		np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size];
-	} else {
-		np->rx_ring.ex = (struct ring_desc_ex*)rxtx_ring;
-		np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size];
-	}
-	np->rx_skbuff = (struct sk_buff**)rx_skbuff;
-	np->rx_dma = (dma_addr_t*)rx_dma;
-	np->tx_skbuff = (struct sk_buff**)tx_skbuff;
-	np->tx_dma = (dma_addr_t*)tx_dma;
-	np->tx_dma_len = (unsigned int*)tx_dma_len;
-	np->ring_addr = ring_addr;
-
-	memset(np->rx_skbuff, 0, sizeof(struct sk_buff*) * np->rx_ring_size);
-	memset(np->rx_dma, 0, sizeof(dma_addr_t) * np->rx_ring_size);
-	memset(np->tx_skbuff, 0, sizeof(struct sk_buff*) * np->tx_ring_size);
-	memset(np->tx_dma, 0, sizeof(dma_addr_t) * np->tx_ring_size);
-	memset(np->tx_dma_len, 0, sizeof(unsigned int) * np->tx_ring_size);
-
-	if (netif_running(dev)) {
-		/* reinit driver view of the queues */
-		set_bufsize(dev);
-		if (nv_init_ring(dev)) {
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		}
-
-		/* reinit nic view of the queues */
-		writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-		setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-		writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
-			base + NvRegRingSizes);
-		pci_push(base);
-		writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-		pci_push(base);
-
-		/* restart engines */
-		nv_start_rx(dev);
-		nv_start_tx(dev);
-		spin_unlock(&np->lock);
-		netif_tx_unlock_bh(dev);
-		nv_enable_irq(dev);
-	}
-	return 0;
-exit:
-	return -ENOMEM;
-}
-
-static void nv_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	pause->autoneg = (np->pause_flags & NV_PAUSEFRAME_AUTONEG) != 0;
-	pause->rx_pause = (np->pause_flags & NV_PAUSEFRAME_RX_ENABLE) != 0;
-	pause->tx_pause = (np->pause_flags & NV_PAUSEFRAME_TX_ENABLE) != 0;
-}
-
-static int nv_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int adv, bmcr;
-
-	if ((!np->autoneg && np->duplex == 0) ||
-	    (np->autoneg && !pause->autoneg && np->duplex == 0)) {
-		printk(KERN_INFO "%s: can not set pause settings when forced link is in half duplex.\n",
-		       dev->name);
-		return -EINVAL;
-	}
-	if (pause->tx_pause && !(np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE)) {
-		printk(KERN_INFO "%s: hardware does not support tx pause frames.\n", dev->name);
-		return -EINVAL;
-	}
-
-	netif_carrier_off(dev);
-	if (netif_running(dev)) {
-		nv_disable_irq(dev);
-		netif_tx_lock_bh(dev);
-		spin_lock(&np->lock);
-		/* stop engines */
-		nv_stop_rx(dev);
-		nv_stop_tx(dev);
-		spin_unlock(&np->lock);
-		netif_tx_unlock_bh(dev);
-	}
-
-	np->pause_flags &= ~(NV_PAUSEFRAME_RX_REQ|NV_PAUSEFRAME_TX_REQ);
-	if (pause->rx_pause)
-		np->pause_flags |= NV_PAUSEFRAME_RX_REQ;
-	if (pause->tx_pause)
-		np->pause_flags |= NV_PAUSEFRAME_TX_REQ;
-
-	if (np->autoneg && pause->autoneg) {
-		np->pause_flags |= NV_PAUSEFRAME_AUTONEG;
-
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		adv &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
-		if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisments but disable tx pause */
-			adv |=  ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
-		if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
-			adv |=  ADVERTISE_PAUSE_ASYM;
-		mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
-
-		if (netif_running(dev))
-			printk(KERN_INFO "%s: link down.\n", dev->name);
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-		mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-	} else {
-		np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE);
-		if (pause->rx_pause)
-			np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
-		if (pause->tx_pause)
-			np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-
-		if (!netif_running(dev))
-			nv_update_linkspeed(dev);
-		else
-			nv_update_pause(dev, np->pause_flags);
-	}
-
-	if (netif_running(dev)) {
-		nv_start_rx(dev);
-		nv_start_tx(dev);
-		nv_enable_irq(dev);
-	}
-	return 0;
-}
-
-static u32 nv_get_rx_csum(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	return (np->rx_csum) != 0;
-}
-
-static int nv_set_rx_csum(struct net_device *dev, u32 data)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int retcode = 0;
-
-	if (np->driver_data & DEV_HAS_CHECKSUM) {
-		if (data) {
-			np->rx_csum = 1;
-			np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK;
-		} else {
-			np->rx_csum = 0;
-			/* vlan is dependent on rx checksum offload */
-			if (!(np->vlanctl_bits & NVREG_VLANCONTROL_ENABLE))
-				np->txrxctl_bits &= ~NVREG_TXRXCTL_RXCHECK;
-		}
-		if (netif_running(dev)) {
-			spin_lock_irq(&np->lock);
-			writel(np->txrxctl_bits, base + NvRegTxRxControl);
-			spin_unlock_irq(&np->lock);
-		}
-	} else {
-		return -EINVAL;
-	}
-
-	return retcode;
-}
-
-static int nv_set_tx_csum(struct net_device *dev, u32 data)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (np->driver_data & DEV_HAS_CHECKSUM)
-		return ethtool_op_set_tx_hw_csum(dev, data);
-	else
-		return -EOPNOTSUPP;
-}
-
-static int nv_set_sg(struct net_device *dev, u32 data)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (np->driver_data & DEV_HAS_CHECKSUM)
-		return ethtool_op_set_sg(dev, data);
-	else
-		return -EOPNOTSUPP;
-}
-
-static int nv_get_stats_count(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (np->driver_data & DEV_HAS_STATISTICS)
-		return sizeof(struct nv_ethtool_stats)/sizeof(u64);
-	else
-		return 0;
-}
-
-static void nv_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *estats, u64 *buffer)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	/* update stats */
-	nv_do_stats_poll((unsigned long)dev);
-
-	memcpy(buffer, &np->estats, nv_get_stats_count(dev)*sizeof(u64));
-}
-
-static int nv_self_test_count(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (np->driver_data & DEV_HAS_TEST_EXTENDED)
-		return NV_TEST_COUNT_EXTENDED;
-	else
-		return NV_TEST_COUNT_BASE;
-}
-
-static int nv_link_test(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int mii_status;
-
-	mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-	mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-
-	/* check phy link status */
-	if (!(mii_status & BMSR_LSTATUS))
-		return 0;
-	else
-		return 1;
-}
-
-static int nv_register_test(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	int i = 0;
-	u32 orig_read, new_read;
-
-	do {
-		orig_read = readl(base + nv_registers_test[i].reg);
-
-		/* xor with mask to toggle bits */
-		orig_read ^= nv_registers_test[i].mask;
-
-		writel(orig_read, base + nv_registers_test[i].reg);
-
-		new_read = readl(base + nv_registers_test[i].reg);
-
-		if ((new_read & nv_registers_test[i].mask) != (orig_read & nv_registers_test[i].mask))
-			return 0;
-
-		/* restore original value */
-		orig_read ^= nv_registers_test[i].mask;
-		writel(orig_read, base + nv_registers_test[i].reg);
-
-	} while (nv_registers_test[++i].reg != 0);
-
-	return 1;
-}
-
-static int nv_interrupt_test(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int ret = 1;
-	int testcnt;
-	u32 save_msi_flags, save_poll_interval = 0;
-
-	if (netif_running(dev)) {
-		/* free current irq */
-		nv_free_irq(dev);
-		save_poll_interval = readl(base+NvRegPollingInterval);
-	}
-
-	/* flag to test interrupt handler */
-	np->intr_test = 0;
-
-	/* setup test irq */
-	save_msi_flags = np->msi_flags;
-	np->msi_flags &= ~NV_MSI_X_VECTORS_MASK;
-	np->msi_flags |= 0x001; /* setup 1 vector */
-	if (nv_request_irq(dev, 1))
-		return 0;
-
-	/* setup timer interrupt */
-	writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
-	writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
-
-	nv_enable_hw_interrupts(dev, NVREG_IRQ_TIMER);
-
-	/* wait for at least one interrupt */
-	msleep(100);
-
-	spin_lock_irq(&np->lock);
-
-	/* flag should be set within ISR */
-	testcnt = np->intr_test;
-	if (!testcnt)
-		ret = 2;
-
-	nv_disable_hw_interrupts(dev, NVREG_IRQ_TIMER);
-	if (!(np->msi_flags & NV_MSI_X_ENABLED))
-		writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-	else
-		writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
-
-	spin_unlock_irq(&np->lock);
-
-	nv_free_irq(dev);
-
-	np->msi_flags = save_msi_flags;
-
-	if (netif_running(dev)) {
-		writel(save_poll_interval, base + NvRegPollingInterval);
-		writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
-		/* restore original irq */
-		if (nv_request_irq(dev, 0))
-			return 0;
-	}
-
-	return ret;
-}
-
-static int nv_loopback_test(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	struct sk_buff *tx_skb, *rx_skb;
-	dma_addr_t test_dma_addr;
-	u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET);
-	u32 flags;
-	int len, i, pkt_len;
-	u8 *pkt_data;
-	u32 filter_flags = 0;
-	u32 misc1_flags = 0;
-	int ret = 1;
-
-	if (netif_running(dev)) {
-		nv_disable_irq(dev);
-		filter_flags = readl(base + NvRegPacketFilterFlags);
-		misc1_flags = readl(base + NvRegMisc1);
-	} else {
-		nv_txrx_reset(dev);
-	}
-
-	/* reinit driver view of the rx queue */
-	set_bufsize(dev);
-	nv_init_ring(dev);
-
-	/* setup hardware for loopback */
-	writel(NVREG_MISC1_FORCE, base + NvRegMisc1);
-	writel(NVREG_PFF_ALWAYS | NVREG_PFF_LOOPBACK, base + NvRegPacketFilterFlags);
-
-	/* reinit nic view of the rx queue */
-	writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-	setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-	writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
-		base + NvRegRingSizes);
-	pci_push(base);
-
-	/* restart rx engine */
-	nv_start_rx(dev);
-	nv_start_tx(dev);
-
-	/* setup packet for tx */
-	pkt_len = ETH_DATA_LEN;
-	tx_skb = dev_alloc_skb(pkt_len);
-	if (!tx_skb) {
-		printk(KERN_ERR "dev_alloc_skb() failed during loopback test"
-			 " of %s\n", dev->name);
-		ret = 0;
-		goto out;
-	}
-	pkt_data = skb_put(tx_skb, pkt_len);
-	for (i = 0; i < pkt_len; i++)
-		pkt_data[i] = (u8)(i & 0xff);
-	test_dma_addr = pci_map_single(np->pci_dev, tx_skb->data,
-				       tx_skb->end-tx_skb->data, PCI_DMA_FROMDEVICE);
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->tx_ring.orig[0].buf = cpu_to_le32(test_dma_addr);
-		np->tx_ring.orig[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra);
-	} else {
-		np->tx_ring.ex[0].bufhigh = cpu_to_le64(test_dma_addr) >> 32;
-		np->tx_ring.ex[0].buflow = cpu_to_le64(test_dma_addr) & 0x0FFFFFFFF;
-		np->tx_ring.ex[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra);
-	}
-	writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-	pci_push(get_hwbase(dev));
-
-	msleep(500);
-
-	/* check for rx of the packet */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		flags = le32_to_cpu(np->rx_ring.orig[0].flaglen);
-		len = nv_descr_getlength(&np->rx_ring.orig[0], np->desc_ver);
-
-	} else {
-		flags = le32_to_cpu(np->rx_ring.ex[0].flaglen);
-		len = nv_descr_getlength_ex(&np->rx_ring.ex[0], np->desc_ver);
-	}
-
-	if (flags & NV_RX_AVAIL) {
-		ret = 0;
-	} else if (np->desc_ver == DESC_VER_1) {
-		if (flags & NV_RX_ERROR)
-			ret = 0;
-	} else {
-		if (flags & NV_RX2_ERROR) {
-			ret = 0;
-		}
-	}
-
-	if (ret) {
-		if (len != pkt_len) {
-			ret = 0;
-			dprintk(KERN_DEBUG "%s: loopback len mismatch %d vs %d\n",
-				dev->name, len, pkt_len);
-		} else {
-			rx_skb = np->rx_skbuff[0];
-			for (i = 0; i < pkt_len; i++) {
-				if (rx_skb->data[i] != (u8)(i & 0xff)) {
-					ret = 0;
-					dprintk(KERN_DEBUG "%s: loopback pattern check failed on byte %d\n",
-						dev->name, i);
-					break;
-				}
-			}
-		}
-	} else {
-		dprintk(KERN_DEBUG "%s: loopback - did not receive test packet\n", dev->name);
-	}
-
-	pci_unmap_page(np->pci_dev, test_dma_addr,
-		       tx_skb->end-tx_skb->data,
-		       PCI_DMA_TODEVICE);
-	dev_kfree_skb_any(tx_skb);
- out:
-	/* stop engines */
-	nv_stop_rx(dev);
-	nv_stop_tx(dev);
-	nv_txrx_reset(dev);
-	/* drain rx queue */
-	nv_drain_rx(dev);
-	nv_drain_tx(dev);
-
-	if (netif_running(dev)) {
-		writel(misc1_flags, base + NvRegMisc1);
-		writel(filter_flags, base + NvRegPacketFilterFlags);
-		nv_enable_irq(dev);
-	}
-
-	return ret;
-}
-
-static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64 *buffer)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int result;
-	memset(buffer, 0, nv_self_test_count(dev)*sizeof(u64));
-
-	if (!nv_link_test(dev)) {
-		test->flags |= ETH_TEST_FL_FAILED;
-		buffer[0] = 1;
-	}
-
-	if (test->flags & ETH_TEST_FL_OFFLINE) {
-		if (netif_running(dev)) {
-			netif_stop_queue(dev);
-			netif_poll_disable(dev);
-			netif_tx_lock_bh(dev);
-			spin_lock_irq(&np->lock);
-			nv_disable_hw_interrupts(dev, np->irqmask);
-			if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
-				writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-			} else {
-				writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
-			}
-			/* stop engines */
-			nv_stop_rx(dev);
-			nv_stop_tx(dev);
-			nv_txrx_reset(dev);
-			/* drain rx queue */
-			nv_drain_rx(dev);
-			nv_drain_tx(dev);
-			spin_unlock_irq(&np->lock);
-			netif_tx_unlock_bh(dev);
-		}
-
-		if (!nv_register_test(dev)) {
-			test->flags |= ETH_TEST_FL_FAILED;
-			buffer[1] = 1;
-		}
-
-		result = nv_interrupt_test(dev);
-		if (result != 1) {
-			test->flags |= ETH_TEST_FL_FAILED;
-			buffer[2] = 1;
-		}
-		if (result == 0) {
-			/* bail out */
-			return;
-		}
-
-		if (!nv_loopback_test(dev)) {
-			test->flags |= ETH_TEST_FL_FAILED;
-			buffer[3] = 1;
-		}
-
-		if (netif_running(dev)) {
-			/* reinit driver view of the rx queue */
-			set_bufsize(dev);
-			if (nv_init_ring(dev)) {
-				if (!np->in_shutdown)
-					mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-			}
-			/* reinit nic view of the rx queue */
-			writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-			setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-			writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
-				base + NvRegRingSizes);
-			pci_push(base);
-			writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-			pci_push(base);
-			/* restart rx engine */
-			nv_start_rx(dev);
-			nv_start_tx(dev);
-			netif_start_queue(dev);
-			netif_poll_enable(dev);
-			nv_enable_hw_interrupts(dev, np->irqmask);
-		}
-	}
-}
-
-static void nv_get_strings(struct net_device *dev, u32 stringset, u8 *buffer)
-{
-	switch (stringset) {
-	case ETH_SS_STATS:
-		memcpy(buffer, &nv_estats_str, nv_get_stats_count(dev)*sizeof(struct nv_ethtool_str));
-		break;
-	case ETH_SS_TEST:
-		memcpy(buffer, &nv_etests_str, nv_self_test_count(dev)*sizeof(struct nv_ethtool_str));
-		break;
-	}
-}
-
-static const struct ethtool_ops ops = {
-	.get_drvinfo = nv_get_drvinfo,
-	.get_link = ethtool_op_get_link,
-	.get_wol = nv_get_wol,
-	.set_wol = nv_set_wol,
-	.get_settings = nv_get_settings,
-	.set_settings = nv_set_settings,
-	.get_regs_len = nv_get_regs_len,
-	.get_regs = nv_get_regs,
-	.nway_reset = nv_nway_reset,
-	.get_perm_addr = ethtool_op_get_perm_addr,
-	.get_tso = ethtool_op_get_tso,
-	.set_tso = nv_set_tso,
-	.get_ringparam = nv_get_ringparam,
-	.set_ringparam = nv_set_ringparam,
-	.get_pauseparam = nv_get_pauseparam,
-	.set_pauseparam = nv_set_pauseparam,
-	.get_rx_csum = nv_get_rx_csum,
-	.set_rx_csum = nv_set_rx_csum,
-	.get_tx_csum = ethtool_op_get_tx_csum,
-	.set_tx_csum = nv_set_tx_csum,
-	.get_sg = ethtool_op_get_sg,
-	.set_sg = nv_set_sg,
-	.get_strings = nv_get_strings,
-	.get_stats_count = nv_get_stats_count,
-	.get_ethtool_stats = nv_get_ethtool_stats,
-	.self_test_count = nv_self_test_count,
-	.self_test = nv_self_test,
-};
-
-static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	spin_lock_irq(&np->lock);
-
-	/* save vlan group */
-	np->vlangrp = grp;
-
-	if (grp) {
-		/* enable vlan on MAC */
-		np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS;
-	} else {
-		/* disable vlan on MAC */
-		np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP;
-		np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS;
-	}
-
-	writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-
-	spin_unlock_irq(&np->lock);
-};
-
-static void nv_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
-{
-	/* nothing to do */
-};
-
-static int nv_open(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int ret = 1;
-	int oom, i;
-
-	dprintk(KERN_DEBUG "nv_open: begin\n");
-
-	/* erase previous misconfiguration */
-	if (np->driver_data & DEV_HAS_POWER_CNTRL)
-		nv_mac_reset(dev);
-	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
-	writel(0, base + NvRegMulticastAddrB);
-	writel(0, base + NvRegMulticastMaskA);
-	writel(0, base + NvRegMulticastMaskB);
-	writel(0, base + NvRegPacketFilterFlags);
-
-	writel(0, base + NvRegTransmitterControl);
-	writel(0, base + NvRegReceiverControl);
-
-	writel(0, base + NvRegAdapterControl);
-
-	if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE)
-		writel(NVREG_TX_PAUSEFRAME_DISABLE,  base + NvRegTxPauseFrame);
-
-	/* initialize descriptor rings */
-	set_bufsize(dev);
-	oom = nv_init_ring(dev);
-
-	writel(0, base + NvRegLinkSpeed);
-	writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
-	nv_txrx_reset(dev);
-	writel(0, base + NvRegUnknownSetupReg6);
-
-	np->in_shutdown = 0;
-
-	/* give hw rings */
-	setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-	writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
-		base + NvRegRingSizes);
-
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	if (np->desc_ver == DESC_VER_1)
-		writel(NVREG_TX_WM_DESC1_DEFAULT, base + NvRegTxWatermark);
-	else
-		writel(NVREG_TX_WM_DESC2_3_DEFAULT, base + NvRegTxWatermark);
-	writel(np->txrxctl_bits, base + NvRegTxRxControl);
-	writel(np->vlanctl_bits, base + NvRegVlanControl);
-	pci_push(base);
-	writel(NVREG_TXRXCTL_BIT1|np->txrxctl_bits, base + NvRegTxRxControl);
-	reg_delay(dev, NvRegUnknownSetupReg5, NVREG_UNKSETUP5_BIT31, NVREG_UNKSETUP5_BIT31,
-			NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX,
-			KERN_INFO "open: SetupReg5, Bit 31 remained off\n");
-
-	writel(0, base + NvRegUnknownSetupReg4);
-	writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-	writel(NVREG_MIISTAT_MASK2, base + NvRegMIIStatus);
-
-	writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1);
-	writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus);
-	writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags);
-	writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-
-	writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);
-	get_random_bytes(&i, sizeof(i));
-	writel(NVREG_RNDSEED_FORCE | (i&NVREG_RNDSEED_MASK), base + NvRegRandomSeed);
-	writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral);
-	writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral);
-	if (poll_interval == -1) {
-		if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT)
-			writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval);
-		else
-			writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
-	}
-	else
-		writel(poll_interval & 0xFFFF, base + NvRegPollingInterval);
-	writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
-	writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING,
-			base + NvRegAdapterControl);
-	writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed);
-	writel(NVREG_UNKSETUP4_VAL, base + NvRegUnknownSetupReg4);
-	if (np->wolenabled)
-		writel(NVREG_WAKEUPFLAGS_ENABLE , base + NvRegWakeUpFlags);
-
-	i = readl(base + NvRegPowerState);
-	if ( (i & NVREG_POWERSTATE_POWEREDUP) == 0)
-		writel(NVREG_POWERSTATE_POWEREDUP|i, base + NvRegPowerState);
-
-	pci_push(base);
-	udelay(10);
-	writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID, base + NvRegPowerState);
-
-	nv_disable_hw_interrupts(dev, np->irqmask);
-	pci_push(base);
-	writel(NVREG_MIISTAT_MASK2, base + NvRegMIIStatus);
-	writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-	pci_push(base);
-
-	if (!np->ecdev) {
-		if (nv_request_irq(dev, 0)) {
-			goto out_drain;
-		}
-
-		/* ask for interrupts */
-		nv_enable_hw_interrupts(dev, np->irqmask);
-
-		spin_lock_irq(&np->lock);
-	}
-
-	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
-	writel(0, base + NvRegMulticastAddrB);
-	writel(0, base + NvRegMulticastMaskA);
-	writel(0, base + NvRegMulticastMaskB);
-	writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);
-	/* One manual link speed update: Interrupts are enabled, future link
-	 * speed changes cause interrupts and are handled by nv_link_irq().
-	 */
-	{
-		u32 miistat;
-		miistat = readl(base + NvRegMIIStatus);
-		writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-		dprintk(KERN_INFO "startup: got 0x%08x.\n", miistat);
-	}
-	/* set linkspeed to invalid value, thus force nv_update_linkspeed
-	 * to init hw */
-	np->linkspeed = 0;
-	ret = nv_update_linkspeed(dev);
-	nv_start_rx(dev);
-	nv_start_tx(dev);
-
-	if (np->ecdev) {
-		ecdev_set_link(np->ecdev, ret);
-	}
-	else {
-		netif_start_queue(dev);
-		netif_poll_enable(dev);
-
-		if (ret) {
-			netif_carrier_on(dev);
-		} else {
-			printk("%s: no link during initialization.\n", dev->name);
-			netif_carrier_off(dev);
-		}
-		if (oom)
-			mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-
-		/* start statistics timer */
-		if (np->driver_data & DEV_HAS_STATISTICS)
-			mod_timer(&np->stats_poll, jiffies + STATS_INTERVAL);
-
-		spin_unlock_irq(&np->lock);
-	}
-
-	return 0;
-out_drain:
-	drain_ring(dev);
-	return ret;
-}
-
-static int nv_close(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base;
-
-	if (!np->ecdev) {
-		spin_lock_irq(&np->lock);
-		np->in_shutdown = 1;
-		spin_unlock_irq(&np->lock);
-		netif_poll_disable(dev);
-		synchronize_irq(dev->irq);
-
-		del_timer_sync(&np->oom_kick);
-		del_timer_sync(&np->nic_poll);
-		del_timer_sync(&np->stats_poll);
-
-		netif_stop_queue(dev);
-		spin_lock_irq(&np->lock);
-	}
-
-	nv_stop_tx(dev);
-	nv_stop_rx(dev);
-	nv_txrx_reset(dev);
-
-	/* disable interrupts on the nic or we will lock up */
-	if (!np->ecdev) {
-		base = get_hwbase(dev);
-		nv_disable_hw_interrupts(dev, np->irqmask);
-		pci_push(base);
-		dprintk(KERN_INFO "%s: Irqmask is zero again\n", dev->name);
-
-		spin_unlock_irq(&np->lock);
-
-		nv_free_irq(dev);
-	}
-
-	drain_ring(dev);
-
-	if (np->wolenabled)
-		nv_start_rx(dev);
-
-	/* FIXME: power down nic */
-
-	return 0;
-}
-
-static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
-{
-	struct net_device *dev;
-	struct fe_priv *np;
-	unsigned long addr;
-	u8 __iomem *base;
-	int err, i;
-	u32 powerstate, txreg;
-
-    board_idx++;
-
-	dev = alloc_etherdev(sizeof(struct fe_priv));
-	err = -ENOMEM;
-	if (!dev)
-		goto out;
-
-	np = netdev_priv(dev);
-	np->pci_dev = pci_dev;
-	spin_lock_init(&np->lock);
-	SET_MODULE_OWNER(dev);
-	SET_NETDEV_DEV(dev, &pci_dev->dev);
-
-	init_timer(&np->oom_kick);
-	np->oom_kick.data = (unsigned long) dev;
-	np->oom_kick.function = &nv_do_rx_refill;	/* timer handler */
-	init_timer(&np->nic_poll);
-	np->nic_poll.data = (unsigned long) dev;
-	np->nic_poll.function = &nv_do_nic_poll;	/* timer handler */
-	init_timer(&np->stats_poll);
-	np->stats_poll.data = (unsigned long) dev;
-	np->stats_poll.function = &nv_do_stats_poll;	/* timer handler */
-
-	err = pci_enable_device(pci_dev);
-	if (err) {
-		printk(KERN_INFO "forcedeth: pci_enable_dev failed (%d) for device %s\n",
-				err, pci_name(pci_dev));
-		goto out_free;
-	}
-
-	pci_set_master(pci_dev);
-
-	err = pci_request_regions(pci_dev, DRV_NAME);
-	if (err < 0)
-		goto out_disable;
-
-	if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS))
-		np->register_size = NV_PCI_REGSZ_VER2;
-	else
-		np->register_size = NV_PCI_REGSZ_VER1;
-
-	err = -EINVAL;
-	addr = 0;
-	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
-		dprintk(KERN_DEBUG "%s: resource %d start %p len %ld flags 0x%08lx.\n",
-				pci_name(pci_dev), i, (void*)pci_resource_start(pci_dev, i),
-				pci_resource_len(pci_dev, i),
-				pci_resource_flags(pci_dev, i));
-		if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM &&
-				pci_resource_len(pci_dev, i) >= np->register_size) {
-			addr = pci_resource_start(pci_dev, i);
-			break;
-		}
-	}
-	if (i == DEVICE_COUNT_RESOURCE) {
-		printk(KERN_INFO "forcedeth: Couldn't find register window for device %s.\n",
-					pci_name(pci_dev));
-		goto out_relreg;
-	}
-
-	/* copy of driver data */
-	np->driver_data = id->driver_data;
-
-	/* handle different descriptor versions */
-	if (id->driver_data & DEV_HAS_HIGH_DMA) {
-		/* packet format 3: supports 40-bit addressing */
-		np->desc_ver = DESC_VER_3;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_3;
-		if (dma_64bit) {
-			if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) {
-				printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n",
-				       pci_name(pci_dev));
-			} else {
-				dev->features |= NETIF_F_HIGHDMA;
-				printk(KERN_INFO "forcedeth: using HIGHDMA\n");
-			}
-			if (pci_set_consistent_dma_mask(pci_dev, DMA_39BIT_MASK)) {
-				printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed, using 32-bit ring buffers for device %s.\n",
-				       pci_name(pci_dev));
-			}
-		}
-	} else if (id->driver_data & DEV_HAS_LARGEDESC) {
-		/* packet format 2: supports jumbo frames */
-		np->desc_ver = DESC_VER_2;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_2;
-	} else {
-		/* original packet format */
-		np->desc_ver = DESC_VER_1;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_1;
-	}
-
-	np->pkt_limit = NV_PKTLIMIT_1;
-	if (id->driver_data & DEV_HAS_LARGEDESC)
-		np->pkt_limit = NV_PKTLIMIT_2;
-
-	if (id->driver_data & DEV_HAS_CHECKSUM) {
-		np->rx_csum = 1;
-		np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK;
-		dev->features |= NETIF_F_HW_CSUM | NETIF_F_SG;
-#ifdef NETIF_F_TSO
-		dev->features |= NETIF_F_TSO;
-#endif
- 	}
-
-	np->vlanctl_bits = 0;
-	if (id->driver_data & DEV_HAS_VLAN) {
-		np->vlanctl_bits = NVREG_VLANCONTROL_ENABLE;
-		dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX;
-		dev->vlan_rx_register = nv_vlan_rx_register;
-		dev->vlan_rx_kill_vid = nv_vlan_rx_kill_vid;
-	}
-
-	np->msi_flags = 0;
-	if ((id->driver_data & DEV_HAS_MSI) && msi) {
-		np->msi_flags |= NV_MSI_CAPABLE;
-	}
-	if ((id->driver_data & DEV_HAS_MSI_X) && msix) {
-		np->msi_flags |= NV_MSI_X_CAPABLE;
-	}
-
-	np->pause_flags = NV_PAUSEFRAME_RX_CAPABLE | NV_PAUSEFRAME_RX_REQ | NV_PAUSEFRAME_AUTONEG;
-	if (id->driver_data & DEV_HAS_PAUSEFRAME_TX) {
-		np->pause_flags |= NV_PAUSEFRAME_TX_CAPABLE | NV_PAUSEFRAME_TX_REQ;
-	}
-
-
-	err = -ENOMEM;
-	np->base = ioremap(addr, np->register_size);
-	if (!np->base)
-		goto out_relreg;
-	dev->base_addr = (unsigned long)np->base;
-
-	dev->irq = pci_dev->irq;
-
-	np->rx_ring_size = RX_RING_DEFAULT;
-	np->tx_ring_size = TX_RING_DEFAULT;
-	np->tx_limit_stop = np->tx_ring_size - TX_LIMIT_DIFFERENCE;
-	np->tx_limit_start = np->tx_ring_size - TX_LIMIT_DIFFERENCE - 1;
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->rx_ring.orig = pci_alloc_consistent(pci_dev,
-					sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size),
-					&np->ring_addr);
-		if (!np->rx_ring.orig)
-			goto out_unmap;
-		np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size];
-	} else {
-		np->rx_ring.ex = pci_alloc_consistent(pci_dev,
-					sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size),
-					&np->ring_addr);
-		if (!np->rx_ring.ex)
-			goto out_unmap;
-		np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size];
-	}
-	np->rx_skbuff = kmalloc(sizeof(struct sk_buff*) * np->rx_ring_size, GFP_KERNEL);
-	np->rx_dma = kmalloc(sizeof(dma_addr_t) * np->rx_ring_size, GFP_KERNEL);
-	np->tx_skbuff = kmalloc(sizeof(struct sk_buff*) * np->tx_ring_size, GFP_KERNEL);
-	np->tx_dma = kmalloc(sizeof(dma_addr_t) * np->tx_ring_size, GFP_KERNEL);
-	np->tx_dma_len = kmalloc(sizeof(unsigned int) * np->tx_ring_size, GFP_KERNEL);
-	if (!np->rx_skbuff || !np->rx_dma || !np->tx_skbuff || !np->tx_dma || !np->tx_dma_len)
-		goto out_freering;
-	memset(np->rx_skbuff, 0, sizeof(struct sk_buff*) * np->rx_ring_size);
-	memset(np->rx_dma, 0, sizeof(dma_addr_t) * np->rx_ring_size);
-	memset(np->tx_skbuff, 0, sizeof(struct sk_buff*) * np->tx_ring_size);
-	memset(np->tx_dma, 0, sizeof(dma_addr_t) * np->tx_ring_size);
-	memset(np->tx_dma_len, 0, sizeof(unsigned int) * np->tx_ring_size);
-
-	dev->open = nv_open;
-	dev->stop = nv_close;
-	dev->hard_start_xmit = nv_start_xmit;
-	dev->get_stats = nv_get_stats;
-	dev->change_mtu = nv_change_mtu;
-	dev->set_mac_address = nv_set_mac_address;
-	dev->set_multicast_list = nv_set_multicast;
-#ifdef CONFIG_NET_POLL_CONTROLLER
-	dev->poll_controller = nv_poll_controller;
-#endif
-	dev->weight = 64;
-#ifdef CONFIG_FORCEDETH_NAPI
-	dev->poll = nv_napi_poll;
-#endif
-	SET_ETHTOOL_OPS(dev, &ops);
-	dev->tx_timeout = nv_tx_timeout;
-	dev->watchdog_timeo = NV_WATCHDOG_TIMEO;
-
-	pci_set_drvdata(pci_dev, dev);
-
-	/* read the mac address */
-	base = get_hwbase(dev);
-	np->orig_mac[0] = readl(base + NvRegMacAddrA);
-	np->orig_mac[1] = readl(base + NvRegMacAddrB);
-
-	/* check the workaround bit for correct mac address order */
-	txreg = readl(base + NvRegTransmitPoll);
-	if (txreg & NVREG_TRANSMITPOLL_MAC_ADDR_REV) {
-		/* mac address is already in correct order */
-		dev->dev_addr[0] = (np->orig_mac[0] >>  0) & 0xff;
-		dev->dev_addr[1] = (np->orig_mac[0] >>  8) & 0xff;
-		dev->dev_addr[2] = (np->orig_mac[0] >> 16) & 0xff;
-		dev->dev_addr[3] = (np->orig_mac[0] >> 24) & 0xff;
-		dev->dev_addr[4] = (np->orig_mac[1] >>  0) & 0xff;
-		dev->dev_addr[5] = (np->orig_mac[1] >>  8) & 0xff;
-	} else {
-		/* need to reverse mac address to correct order */
-		dev->dev_addr[0] = (np->orig_mac[1] >>  8) & 0xff;
-		dev->dev_addr[1] = (np->orig_mac[1] >>  0) & 0xff;
-		dev->dev_addr[2] = (np->orig_mac[0] >> 24) & 0xff;
-		dev->dev_addr[3] = (np->orig_mac[0] >> 16) & 0xff;
-		dev->dev_addr[4] = (np->orig_mac[0] >>  8) & 0xff;
-		dev->dev_addr[5] = (np->orig_mac[0] >>  0) & 0xff;
-		/* set permanent address to be correct aswell */
-		np->orig_mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) +
-			(dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24);
-		np->orig_mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8);
-		writel(txreg|NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
-	}
-	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
-
-	if (!is_valid_ether_addr(dev->perm_addr)) {
-		/*
-		 * Bad mac address. At least one bios sets the mac address
-		 * to 01:23:45:67:89:ab
-		 */
-		printk(KERN_ERR "%s: Invalid Mac address detected: %02x:%02x:%02x:%02x:%02x:%02x\n",
-			pci_name(pci_dev),
-			dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
-			dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
-		printk(KERN_ERR "Please complain to your hardware vendor. Switching to a random MAC.\n");
-		dev->dev_addr[0] = 0x00;
-		dev->dev_addr[1] = 0x00;
-		dev->dev_addr[2] = 0x6c;
-		get_random_bytes(&dev->dev_addr[3], 3);
-	}
-
-	dprintk(KERN_DEBUG "%s: MAC Address %02x:%02x:%02x:%02x:%02x:%02x\n", pci_name(pci_dev),
-			dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
-			dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
-
-	/* set mac address */
-	nv_copy_mac_to_hw(dev);
-
-	/* disable WOL */
-	writel(0, base + NvRegWakeUpFlags);
-	np->wolenabled = 0;
-
-	if (id->driver_data & DEV_HAS_POWER_CNTRL) {
-		u8 revision_id;
-		pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id);
-
-		/* take phy and nic out of low power mode */
-		powerstate = readl(base + NvRegPowerState2);
-		powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK;
-		if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 ||
-		     id->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) &&
-		    revision_id >= 0xA3)
-			powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3;
-		writel(powerstate, base + NvRegPowerState2);
-	}
-
-	if (np->desc_ver == DESC_VER_1) {
-		np->tx_flags = NV_TX_VALID;
-	} else {
-		np->tx_flags = NV_TX2_VALID;
-	}
-	if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) {
-		np->irqmask = NVREG_IRQMASK_THROUGHPUT;
-		if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
-			np->msi_flags |= 0x0003;
-	} else {
-		np->irqmask = NVREG_IRQMASK_CPU;
-		if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
-			np->msi_flags |= 0x0001;
-	}
-
-	if (id->driver_data & DEV_NEED_TIMERIRQ)
-		np->irqmask |= NVREG_IRQ_TIMER;
-	if (id->driver_data & DEV_NEED_LINKTIMER) {
-		dprintk(KERN_INFO "%s: link timer on.\n", pci_name(pci_dev));
-		np->need_linktimer = 1;
-		np->link_timeout = jiffies + LINK_TIMEOUT;
-	} else {
-		dprintk(KERN_INFO "%s: link timer off.\n", pci_name(pci_dev));
-		np->need_linktimer = 0;
-	}
-
-	/* find a suitable phy */
-	for (i = 1; i <= 32; i++) {
-		int id1, id2;
-		int phyaddr = i & 0x1F;
-
-		spin_lock_irq(&np->lock);
-		id1 = mii_rw(dev, phyaddr, MII_PHYSID1, MII_READ);
-		spin_unlock_irq(&np->lock);
-		if (id1 < 0 || id1 == 0xffff)
-			continue;
-		spin_lock_irq(&np->lock);
-		id2 = mii_rw(dev, phyaddr, MII_PHYSID2, MII_READ);
-		spin_unlock_irq(&np->lock);
-		if (id2 < 0 || id2 == 0xffff)
-			continue;
-
-		np->phy_model = id2 & PHYID2_MODEL_MASK;
-		id1 = (id1 & PHYID1_OUI_MASK) << PHYID1_OUI_SHFT;
-		id2 = (id2 & PHYID2_OUI_MASK) >> PHYID2_OUI_SHFT;
-		dprintk(KERN_DEBUG "%s: open: Found PHY %04x:%04x at address %d.\n",
-			pci_name(pci_dev), id1, id2, phyaddr);
-		np->phyaddr = phyaddr;
-		np->phy_oui = id1 | id2;
-		break;
-	}
-	if (i == 33) {
-		printk(KERN_INFO "%s: open: Could not find a valid PHY.\n",
-		       pci_name(pci_dev));
-		goto out_error;
-	}
-
-	/* reset it */
-	phy_init(dev);
-
-	/* set default link speed settings */
-	np->linkspeed = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-	np->duplex = 0;
-	np->autoneg = 1;
-
-	// offer device to EtherCAT master module
-	if (ecdev_offer(dev, ec_poll, THIS_MODULE, &np->ecdev)) {
-		printk(KERN_ERR "forcedeth: Failed to offer device.\n");
-		goto out_error;
-	}
-
-	if (np->ecdev) {
-		if (ecdev_open(np->ecdev)) {
-			ecdev_withdraw(np->ecdev);
-			goto out_error;
-		}
-	}
-	else {
-		err = register_netdev(dev);
-		if (err) {
-			printk(KERN_INFO "forcedeth: unable to register netdev: %d\n", err);
-			goto out_freering;
-		}
-	}
-	printk(KERN_INFO "%s: forcedeth.c: subsystem: %05x:%04x bound to %s\n",
-			dev->name, pci_dev->subsystem_vendor, pci_dev->subsystem_device,
-			pci_name(pci_dev));
-
-	return 0;
-
-out_error:
-	pci_set_drvdata(pci_dev, NULL);
-out_freering:
-	free_rings(dev);
-out_unmap:
-	iounmap(get_hwbase(dev));
-out_relreg:
-	pci_release_regions(pci_dev);
-out_disable:
-	pci_disable_device(pci_dev);
-out_free:
-	free_netdev(dev);
-out:
-	return err;
-}
-
-static void __devexit nv_remove(struct pci_dev *pci_dev)
-{
-	struct net_device *dev = pci_get_drvdata(pci_dev);
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	if (np->ecdev) {
-		ecdev_close(np->ecdev);
-		ecdev_withdraw(np->ecdev);
-	}
-	else {
-		unregister_netdev(dev);
-	}
-
-	/* special op: write back the misordered MAC address - otherwise
-	 * the next nv_probe would see a wrong address.
-	 */
-	writel(np->orig_mac[0], base + NvRegMacAddrA);
-	writel(np->orig_mac[1], base + NvRegMacAddrB);
-
-	/* free all structures */
-	free_rings(dev);
-	iounmap(get_hwbase(dev));
-	pci_release_regions(pci_dev);
-	pci_disable_device(pci_dev);
-	free_netdev(dev);
-	pci_set_drvdata(pci_dev, NULL);
-}
-
-static struct pci_device_id pci_tbl[] = {
-	{	/* nForce Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_1),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce2 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_2),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_3),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_4),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_5),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_6),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_7),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* CK804 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_8),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* CK804 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_9),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP04 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_10),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP04 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_11),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP51 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL,
-	},
-	{	/* MCP51 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL,
-	},
-	{	/* MCP55 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP55 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP61 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_16),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP61 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_17),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP61 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_18),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP61 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_19),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP65 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_20),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP65 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_21),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP65 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_22),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP65 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_23),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{0,},
-};
-
-static struct pci_driver driver = {
-	.name = "forcedeth",
-	.id_table = pci_tbl,
-	.probe = nv_probe,
-	.remove = __devexit_p(nv_remove),
-};
-
-
-static int __init init_nic(void)
-{
-	printk(KERN_INFO "forcedeth: EtherCAT-capable nForce ethernet driver."
-			" Version %s, master %s.\n",
-            FORCEDETH_VERSION, EC_MASTER_VERSION);
-	return pci_register_driver(&driver);
-}
-
-static void __exit exit_nic(void)
-{
-	pci_unregister_driver(&driver);
-}
-
-module_param(max_interrupt_work, int, 0);
-MODULE_PARM_DESC(max_interrupt_work, "forcedeth maximum events handled per interrupt");
-module_param(optimization_mode, int, 0);
-MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer.");
-module_param(poll_interval, int, 0);
-MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535.");
-module_param(msi, int, 0);
-MODULE_PARM_DESC(msi, "MSI interrupts are enabled by setting to 1 and disabled by setting to 0.");
-module_param(msix, int, 0);
-MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0.");
-module_param(dma_64bit, int, 0);
-MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0.");
-
-MODULE_AUTHOR("Dipl.-Ing. (FH) Florian Pose <fp@igh-essen.com>");
-MODULE_DESCRIPTION("EtherCAT-capable nForce ethernet driver");
-MODULE_LICENSE("GPL");
-
-//MODULE_DEVICE_TABLE(pci, pci_tbl); // prevent auto-loading
-
-module_init(init_nic);
-module_exit(exit_nic);
--- a/devices/forcedeth-2.6.19-orig.c	Mon Jul 28 08:30:44 2008 +0000
+++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
@@ -1,4744 +0,0 @@
-/*
- * forcedeth: Ethernet driver for NVIDIA nForce media access controllers.
- *
- * Note: This driver is a cleanroom reimplementation based on reverse
- *      engineered documentation written by Carl-Daniel Hailfinger
- *      and Andrew de Quincey. It's neither supported nor endorsed
- *      by NVIDIA Corp. Use at your own risk.
- *
- * NVIDIA, nForce and other NVIDIA marks are trademarks or registered
- * trademarks of NVIDIA Corporation in the United States and other
- * countries.
- *
- * Copyright (C) 2003,4,5 Manfred Spraul
- * Copyright (C) 2004 Andrew de Quincey (wol support)
- * Copyright (C) 2004 Carl-Daniel Hailfinger (invalid MAC handling, insane
- *		IRQ rate fixes, bigendian fixes, cleanups, verification)
- * Copyright (c) 2004 NVIDIA Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- * Changelog:
- * 	0.01: 05 Oct 2003: First release that compiles without warnings.
- * 	0.02: 05 Oct 2003: Fix bug for nv_drain_tx: do not try to free NULL skbs.
- * 			   Check all PCI BARs for the register window.
- * 			   udelay added to mii_rw.
- * 	0.03: 06 Oct 2003: Initialize dev->irq.
- * 	0.04: 07 Oct 2003: Initialize np->lock, reduce handled irqs, add printks.
- * 	0.05: 09 Oct 2003: printk removed again, irq status print tx_timeout.
- * 	0.06: 10 Oct 2003: MAC Address read updated, pff flag generation updated,
- * 			   irq mask updated
- * 	0.07: 14 Oct 2003: Further irq mask updates.
- * 	0.08: 20 Oct 2003: rx_desc.Length initialization added, nv_alloc_rx refill
- * 			   added into irq handler, NULL check for drain_ring.
- * 	0.09: 20 Oct 2003: Basic link speed irq implementation. Only handle the
- * 			   requested interrupt sources.
- * 	0.10: 20 Oct 2003: First cleanup for release.
- * 	0.11: 21 Oct 2003: hexdump for tx added, rx buffer sizes increased.
- * 			   MAC Address init fix, set_multicast cleanup.
- * 	0.12: 23 Oct 2003: Cleanups for release.
- * 	0.13: 25 Oct 2003: Limit for concurrent tx packets increased to 10.
- * 			   Set link speed correctly. start rx before starting
- * 			   tx (nv_start_rx sets the link speed).
- * 	0.14: 25 Oct 2003: Nic dependant irq mask.
- * 	0.15: 08 Nov 2003: fix smp deadlock with set_multicast_list during
- * 			   open.
- * 	0.16: 15 Nov 2003: include file cleanup for ppc64, rx buffer size
- * 			   increased to 1628 bytes.
- * 	0.17: 16 Nov 2003: undo rx buffer size increase. Substract 1 from
- * 			   the tx length.
- * 	0.18: 17 Nov 2003: fix oops due to late initialization of dev_stats
- * 	0.19: 29 Nov 2003: Handle RxNoBuf, detect & handle invalid mac
- * 			   addresses, really stop rx if already running
- * 			   in nv_start_rx, clean up a bit.
- * 	0.20: 07 Dec 2003: alloc fixes
- * 	0.21: 12 Jan 2004: additional alloc fix, nic polling fix.
- *	0.22: 19 Jan 2004: reprogram timer to a sane rate, avoid lockup
- *			   on close.
- *	0.23: 26 Jan 2004: various small cleanups
- *	0.24: 27 Feb 2004: make driver even less anonymous in backtraces
- *	0.25: 09 Mar 2004: wol support
- *	0.26: 03 Jun 2004: netdriver specific annotation, sparse-related fixes
- *	0.27: 19 Jun 2004: Gigabit support, new descriptor rings,
- *			   added CK804/MCP04 device IDs, code fixes
- *			   for registers, link status and other minor fixes.
- *	0.28: 21 Jun 2004: Big cleanup, making driver mostly endian safe
- *	0.29: 31 Aug 2004: Add backup timer for link change notification.
- *	0.30: 25 Sep 2004: rx checksum support for nf 250 Gb. Add rx reset
- *			   into nv_close, otherwise reenabling for wol can
- *			   cause DMA to kfree'd memory.
- *	0.31: 14 Nov 2004: ethtool support for getting/setting link
- *			   capabilities.
- *	0.32: 16 Apr 2005: RX_ERROR4 handling added.
- *	0.33: 16 May 2005: Support for MCP51 added.
- *	0.34: 18 Jun 2005: Add DEV_NEED_LINKTIMER to all nForce nics.
- *	0.35: 26 Jun 2005: Support for MCP55 added.
- *	0.36: 28 Jun 2005: Add jumbo frame support.
- *	0.37: 10 Jul 2005: Additional ethtool support, cleanup of pci id list
- *	0.38: 16 Jul 2005: tx irq rewrite: Use global flags instead of
- *			   per-packet flags.
- *	0.39: 18 Jul 2005: Add 64bit descriptor support.
- *	0.40: 19 Jul 2005: Add support for mac address change.
- *	0.41: 30 Jul 2005: Write back original MAC in nv_close instead
- *			   of nv_remove
- *	0.42: 06 Aug 2005: Fix lack of link speed initialization
- *			   in the second (and later) nv_open call
- *	0.43: 10 Aug 2005: Add support for tx checksum.
- *	0.44: 20 Aug 2005: Add support for scatter gather and segmentation.
- *	0.45: 18 Sep 2005: Remove nv_stop/start_rx from every link check
- *	0.46: 20 Oct 2005: Add irq optimization modes.
- *	0.47: 26 Oct 2005: Add phyaddr 0 in phy scan.
- *	0.48: 24 Dec 2005: Disable TSO, bugfix for pci_map_single
- *	0.49: 10 Dec 2005: Fix tso for large buffers.
- *	0.50: 20 Jan 2006: Add 8021pq tagging support.
- *	0.51: 20 Jan 2006: Add 64bit consistent memory allocation for rings.
- *	0.52: 20 Jan 2006: Add MSI/MSIX support.
- *	0.53: 19 Mar 2006: Fix init from low power mode and add hw reset.
- *	0.54: 21 Mar 2006: Fix spin locks for multi irqs and cleanup.
- *	0.55: 22 Mar 2006: Add flow control (pause frame).
- *	0.56: 22 Mar 2006: Additional ethtool config and moduleparam support.
- *	0.57: 14 May 2006: Mac address set in probe/remove and order corrections.
- *
- * Known bugs:
- * We suspect that on some hardware no TX done interrupts are generated.
- * This means recovery from netif_stop_queue only happens if the hw timer
- * interrupt fires (100 times/second, configurable with NVREG_POLL_DEFAULT)
- * and the timer is active in the IRQMask, or if a rx packet arrives by chance.
- * If your hardware reliably generates tx done interrupts, then you can remove
- * DEV_NEED_TIMERIRQ from the driver_data flags.
- * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few
- * superfluous timer interrupts from the nic.
- */
-#ifdef CONFIG_FORCEDETH_NAPI
-#define DRIVERNAPI "-NAPI"
-#else
-#define DRIVERNAPI
-#endif
-#define FORCEDETH_VERSION		"0.57"
-#define DRV_NAME			"forcedeth"
-
-#include <linux/module.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/delay.h>
-#include <linux/spinlock.h>
-#include <linux/ethtool.h>
-#include <linux/timer.h>
-#include <linux/skbuff.h>
-#include <linux/mii.h>
-#include <linux/random.h>
-#include <linux/init.h>
-#include <linux/if_vlan.h>
-#include <linux/dma-mapping.h>
-
-#include <asm/irq.h>
-#include <asm/io.h>
-#include <asm/uaccess.h>
-#include <asm/system.h>
-
-#if 0
-#define dprintk			printk
-#else
-#define dprintk(x...)		do { } while (0)
-#endif
-
-
-/*
- * Hardware access:
- */
-
-#define DEV_NEED_TIMERIRQ	0x0001  /* set the timer irq flag in the irq mask */
-#define DEV_NEED_LINKTIMER	0x0002	/* poll link settings. Relies on the timer irq */
-#define DEV_HAS_LARGEDESC	0x0004	/* device supports jumbo frames and needs packet format 2 */
-#define DEV_HAS_HIGH_DMA        0x0008  /* device supports 64bit dma */
-#define DEV_HAS_CHECKSUM        0x0010  /* device supports tx and rx checksum offloads */
-#define DEV_HAS_VLAN            0x0020  /* device supports vlan tagging and striping */
-#define DEV_HAS_MSI             0x0040  /* device supports MSI */
-#define DEV_HAS_MSI_X           0x0080  /* device supports MSI-X */
-#define DEV_HAS_POWER_CNTRL     0x0100  /* device supports power savings */
-#define DEV_HAS_PAUSEFRAME_TX   0x0200  /* device supports tx pause frames */
-#define DEV_HAS_STATISTICS      0x0400  /* device supports hw statistics */
-#define DEV_HAS_TEST_EXTENDED   0x0800  /* device supports extended diagnostic test */
-
-enum {
-	NvRegIrqStatus = 0x000,
-#define NVREG_IRQSTAT_MIIEVENT	0x040
-#define NVREG_IRQSTAT_MASK		0x1ff
-	NvRegIrqMask = 0x004,
-#define NVREG_IRQ_RX_ERROR		0x0001
-#define NVREG_IRQ_RX			0x0002
-#define NVREG_IRQ_RX_NOBUF		0x0004
-#define NVREG_IRQ_TX_ERR		0x0008
-#define NVREG_IRQ_TX_OK			0x0010
-#define NVREG_IRQ_TIMER			0x0020
-#define NVREG_IRQ_LINK			0x0040
-#define NVREG_IRQ_RX_FORCED		0x0080
-#define NVREG_IRQ_TX_FORCED		0x0100
-#define NVREG_IRQMASK_THROUGHPUT	0x00df
-#define NVREG_IRQMASK_CPU		0x0040
-#define NVREG_IRQ_TX_ALL		(NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
-#define NVREG_IRQ_RX_ALL		(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED)
-#define NVREG_IRQ_OTHER			(NVREG_IRQ_TIMER|NVREG_IRQ_LINK)
-
-#define NVREG_IRQ_UNKNOWN	(~(NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_TX_ERR| \
-					NVREG_IRQ_TX_OK|NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RX_FORCED| \
-					NVREG_IRQ_TX_FORCED))
-
-	NvRegUnknownSetupReg6 = 0x008,
-#define NVREG_UNKSETUP6_VAL		3
-
-/*
- * NVREG_POLL_DEFAULT is the interval length of the timer source on the nic
- * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms
- */
-	NvRegPollingInterval = 0x00c,
-#define NVREG_POLL_DEFAULT_THROUGHPUT	970
-#define NVREG_POLL_DEFAULT_CPU	13
-	NvRegMSIMap0 = 0x020,
-	NvRegMSIMap1 = 0x024,
-	NvRegMSIIrqMask = 0x030,
-#define NVREG_MSI_VECTOR_0_ENABLED 0x01
-	NvRegMisc1 = 0x080,
-#define NVREG_MISC1_PAUSE_TX	0x01
-#define NVREG_MISC1_HD		0x02
-#define NVREG_MISC1_FORCE	0x3b0f3c
-
-	NvRegMacReset = 0x3c,
-#define NVREG_MAC_RESET_ASSERT	0x0F3
-	NvRegTransmitterControl = 0x084,
-#define NVREG_XMITCTL_START	0x01
-	NvRegTransmitterStatus = 0x088,
-#define NVREG_XMITSTAT_BUSY	0x01
-
-	NvRegPacketFilterFlags = 0x8c,
-#define NVREG_PFF_PAUSE_RX	0x08
-#define NVREG_PFF_ALWAYS	0x7F0000
-#define NVREG_PFF_PROMISC	0x80
-#define NVREG_PFF_MYADDR	0x20
-#define NVREG_PFF_LOOPBACK	0x10
-
-	NvRegOffloadConfig = 0x90,
-#define NVREG_OFFLOAD_HOMEPHY	0x601
-#define NVREG_OFFLOAD_NORMAL	RX_NIC_BUFSIZE
-	NvRegReceiverControl = 0x094,
-#define NVREG_RCVCTL_START	0x01
-	NvRegReceiverStatus = 0x98,
-#define NVREG_RCVSTAT_BUSY	0x01
-
-	NvRegRandomSeed = 0x9c,
-#define NVREG_RNDSEED_MASK	0x00ff
-#define NVREG_RNDSEED_FORCE	0x7f00
-#define NVREG_RNDSEED_FORCE2	0x2d00
-#define NVREG_RNDSEED_FORCE3	0x7400
-
-	NvRegTxDeferral = 0xA0,
-#define NVREG_TX_DEFERRAL_DEFAULT	0x15050f
-#define NVREG_TX_DEFERRAL_RGMII_10_100	0x16070f
-#define NVREG_TX_DEFERRAL_RGMII_1000	0x14050f
-	NvRegRxDeferral = 0xA4,
-#define NVREG_RX_DEFERRAL_DEFAULT	0x16
-	NvRegMacAddrA = 0xA8,
-	NvRegMacAddrB = 0xAC,
-	NvRegMulticastAddrA = 0xB0,
-#define NVREG_MCASTADDRA_FORCE	0x01
-	NvRegMulticastAddrB = 0xB4,
-	NvRegMulticastMaskA = 0xB8,
-	NvRegMulticastMaskB = 0xBC,
-
-	NvRegPhyInterface = 0xC0,
-#define PHY_RGMII		0x10000000
-
-	NvRegTxRingPhysAddr = 0x100,
-	NvRegRxRingPhysAddr = 0x104,
-	NvRegRingSizes = 0x108,
-#define NVREG_RINGSZ_TXSHIFT 0
-#define NVREG_RINGSZ_RXSHIFT 16
-	NvRegTransmitPoll = 0x10c,
-#define NVREG_TRANSMITPOLL_MAC_ADDR_REV	0x00008000
-	NvRegLinkSpeed = 0x110,
-#define NVREG_LINKSPEED_FORCE 0x10000
-#define NVREG_LINKSPEED_10	1000
-#define NVREG_LINKSPEED_100	100
-#define NVREG_LINKSPEED_1000	50
-#define NVREG_LINKSPEED_MASK	(0xFFF)
-	NvRegUnknownSetupReg5 = 0x130,
-#define NVREG_UNKSETUP5_BIT31	(1<<31)
-	NvRegTxWatermark = 0x13c,
-#define NVREG_TX_WM_DESC1_DEFAULT	0x0200010
-#define NVREG_TX_WM_DESC2_3_DEFAULT	0x1e08000
-#define NVREG_TX_WM_DESC2_3_1000	0xfe08000
-	NvRegTxRxControl = 0x144,
-#define NVREG_TXRXCTL_KICK	0x0001
-#define NVREG_TXRXCTL_BIT1	0x0002
-#define NVREG_TXRXCTL_BIT2	0x0004
-#define NVREG_TXRXCTL_IDLE	0x0008
-#define NVREG_TXRXCTL_RESET	0x0010
-#define NVREG_TXRXCTL_RXCHECK	0x0400
-#define NVREG_TXRXCTL_DESC_1	0
-#define NVREG_TXRXCTL_DESC_2	0x02100
-#define NVREG_TXRXCTL_DESC_3	0x02200
-#define NVREG_TXRXCTL_VLANSTRIP 0x00040
-#define NVREG_TXRXCTL_VLANINS	0x00080
-	NvRegTxRingPhysAddrHigh = 0x148,
-	NvRegRxRingPhysAddrHigh = 0x14C,
-	NvRegTxPauseFrame = 0x170,
-#define NVREG_TX_PAUSEFRAME_DISABLE	0x1ff0080
-#define NVREG_TX_PAUSEFRAME_ENABLE	0x0c00030
-	NvRegMIIStatus = 0x180,
-#define NVREG_MIISTAT_ERROR		0x0001
-#define NVREG_MIISTAT_LINKCHANGE	0x0008
-#define NVREG_MIISTAT_MASK		0x000f
-#define NVREG_MIISTAT_MASK2		0x000f
-	NvRegUnknownSetupReg4 = 0x184,
-#define NVREG_UNKSETUP4_VAL	8
-
-	NvRegAdapterControl = 0x188,
-#define NVREG_ADAPTCTL_START	0x02
-#define NVREG_ADAPTCTL_LINKUP	0x04
-#define NVREG_ADAPTCTL_PHYVALID	0x40000
-#define NVREG_ADAPTCTL_RUNNING	0x100000
-#define NVREG_ADAPTCTL_PHYSHIFT	24
-	NvRegMIISpeed = 0x18c,
-#define NVREG_MIISPEED_BIT8	(1<<8)
-#define NVREG_MIIDELAY	5
-	NvRegMIIControl = 0x190,
-#define NVREG_MIICTL_INUSE	0x08000
-#define NVREG_MIICTL_WRITE	0x00400
-#define NVREG_MIICTL_ADDRSHIFT	5
-	NvRegMIIData = 0x194,
-	NvRegWakeUpFlags = 0x200,
-#define NVREG_WAKEUPFLAGS_VAL		0x7770
-#define NVREG_WAKEUPFLAGS_BUSYSHIFT	24
-#define NVREG_WAKEUPFLAGS_ENABLESHIFT	16
-#define NVREG_WAKEUPFLAGS_D3SHIFT	12
-#define NVREG_WAKEUPFLAGS_D2SHIFT	8
-#define NVREG_WAKEUPFLAGS_D1SHIFT	4
-#define NVREG_WAKEUPFLAGS_D0SHIFT	0
-#define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT		0x01
-#define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT	0x02
-#define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE	0x04
-#define NVREG_WAKEUPFLAGS_ENABLE	0x1111
-
-	NvRegPatternCRC = 0x204,
-	NvRegPatternMask = 0x208,
-	NvRegPowerCap = 0x268,
-#define NVREG_POWERCAP_D3SUPP	(1<<30)
-#define NVREG_POWERCAP_D2SUPP	(1<<26)
-#define NVREG_POWERCAP_D1SUPP	(1<<25)
-	NvRegPowerState = 0x26c,
-#define NVREG_POWERSTATE_POWEREDUP	0x8000
-#define NVREG_POWERSTATE_VALID		0x0100
-#define NVREG_POWERSTATE_MASK		0x0003
-#define NVREG_POWERSTATE_D0		0x0000
-#define NVREG_POWERSTATE_D1		0x0001
-#define NVREG_POWERSTATE_D2		0x0002
-#define NVREG_POWERSTATE_D3		0x0003
-	NvRegTxCnt = 0x280,
-	NvRegTxZeroReXmt = 0x284,
-	NvRegTxOneReXmt = 0x288,
-	NvRegTxManyReXmt = 0x28c,
-	NvRegTxLateCol = 0x290,
-	NvRegTxUnderflow = 0x294,
-	NvRegTxLossCarrier = 0x298,
-	NvRegTxExcessDef = 0x29c,
-	NvRegTxRetryErr = 0x2a0,
-	NvRegRxFrameErr = 0x2a4,
-	NvRegRxExtraByte = 0x2a8,
-	NvRegRxLateCol = 0x2ac,
-	NvRegRxRunt = 0x2b0,
-	NvRegRxFrameTooLong = 0x2b4,
-	NvRegRxOverflow = 0x2b8,
-	NvRegRxFCSErr = 0x2bc,
-	NvRegRxFrameAlignErr = 0x2c0,
-	NvRegRxLenErr = 0x2c4,
-	NvRegRxUnicast = 0x2c8,
-	NvRegRxMulticast = 0x2cc,
-	NvRegRxBroadcast = 0x2d0,
-	NvRegTxDef = 0x2d4,
-	NvRegTxFrame = 0x2d8,
-	NvRegRxCnt = 0x2dc,
-	NvRegTxPause = 0x2e0,
-	NvRegRxPause = 0x2e4,
-	NvRegRxDropFrame = 0x2e8,
-	NvRegVlanControl = 0x300,
-#define NVREG_VLANCONTROL_ENABLE	0x2000
-	NvRegMSIXMap0 = 0x3e0,
-	NvRegMSIXMap1 = 0x3e4,
-	NvRegMSIXIrqStatus = 0x3f0,
-
-	NvRegPowerState2 = 0x600,
-#define NVREG_POWERSTATE2_POWERUP_MASK		0x0F11
-#define NVREG_POWERSTATE2_POWERUP_REV_A3	0x0001
-};
-
-/* Big endian: should work, but is untested */
-struct ring_desc {
-	__le32 buf;
-	__le32 flaglen;
-};
-
-struct ring_desc_ex {
-	__le32 bufhigh;
-	__le32 buflow;
-	__le32 txvlan;
-	__le32 flaglen;
-};
-
-union ring_type {
-	struct ring_desc* orig;
-	struct ring_desc_ex* ex;
-};
-
-#define FLAG_MASK_V1 0xffff0000
-#define FLAG_MASK_V2 0xffffc000
-#define LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1)
-#define LEN_MASK_V2 (0xffffffff ^ FLAG_MASK_V2)
-
-#define NV_TX_LASTPACKET	(1<<16)
-#define NV_TX_RETRYERROR	(1<<19)
-#define NV_TX_FORCED_INTERRUPT	(1<<24)
-#define NV_TX_DEFERRED		(1<<26)
-#define NV_TX_CARRIERLOST	(1<<27)
-#define NV_TX_LATECOLLISION	(1<<28)
-#define NV_TX_UNDERFLOW		(1<<29)
-#define NV_TX_ERROR		(1<<30)
-#define NV_TX_VALID		(1<<31)
-
-#define NV_TX2_LASTPACKET	(1<<29)
-#define NV_TX2_RETRYERROR	(1<<18)
-#define NV_TX2_FORCED_INTERRUPT	(1<<30)
-#define NV_TX2_DEFERRED		(1<<25)
-#define NV_TX2_CARRIERLOST	(1<<26)
-#define NV_TX2_LATECOLLISION	(1<<27)
-#define NV_TX2_UNDERFLOW	(1<<28)
-/* error and valid are the same for both */
-#define NV_TX2_ERROR		(1<<30)
-#define NV_TX2_VALID		(1<<31)
-#define NV_TX2_TSO		(1<<28)
-#define NV_TX2_TSO_SHIFT	14
-#define NV_TX2_TSO_MAX_SHIFT	14
-#define NV_TX2_TSO_MAX_SIZE	(1<<NV_TX2_TSO_MAX_SHIFT)
-#define NV_TX2_CHECKSUM_L3	(1<<27)
-#define NV_TX2_CHECKSUM_L4	(1<<26)
-
-#define NV_TX3_VLAN_TAG_PRESENT (1<<18)
-
-#define NV_RX_DESCRIPTORVALID	(1<<16)
-#define NV_RX_MISSEDFRAME	(1<<17)
-#define NV_RX_SUBSTRACT1	(1<<18)
-#define NV_RX_ERROR1		(1<<23)
-#define NV_RX_ERROR2		(1<<24)
-#define NV_RX_ERROR3		(1<<25)
-#define NV_RX_ERROR4		(1<<26)
-#define NV_RX_CRCERR		(1<<27)
-#define NV_RX_OVERFLOW		(1<<28)
-#define NV_RX_FRAMINGERR	(1<<29)
-#define NV_RX_ERROR		(1<<30)
-#define NV_RX_AVAIL		(1<<31)
-
-#define NV_RX2_CHECKSUMMASK	(0x1C000000)
-#define NV_RX2_CHECKSUMOK1	(0x10000000)
-#define NV_RX2_CHECKSUMOK2	(0x14000000)
-#define NV_RX2_CHECKSUMOK3	(0x18000000)
-#define NV_RX2_DESCRIPTORVALID	(1<<29)
-#define NV_RX2_SUBSTRACT1	(1<<25)
-#define NV_RX2_ERROR1		(1<<18)
-#define NV_RX2_ERROR2		(1<<19)
-#define NV_RX2_ERROR3		(1<<20)
-#define NV_RX2_ERROR4		(1<<21)
-#define NV_RX2_CRCERR		(1<<22)
-#define NV_RX2_OVERFLOW		(1<<23)
-#define NV_RX2_FRAMINGERR	(1<<24)
-/* error and avail are the same for both */
-#define NV_RX2_ERROR		(1<<30)
-#define NV_RX2_AVAIL		(1<<31)
-
-#define NV_RX3_VLAN_TAG_PRESENT (1<<16)
-#define NV_RX3_VLAN_TAG_MASK	(0x0000FFFF)
-
-/* Miscelaneous hardware related defines: */
-#define NV_PCI_REGSZ_VER1      	0x270
-#define NV_PCI_REGSZ_VER2      	0x604
-
-/* various timeout delays: all in usec */
-#define NV_TXRX_RESET_DELAY	4
-#define NV_TXSTOP_DELAY1	10
-#define NV_TXSTOP_DELAY1MAX	500000
-#define NV_TXSTOP_DELAY2	100
-#define NV_RXSTOP_DELAY1	10
-#define NV_RXSTOP_DELAY1MAX	500000
-#define NV_RXSTOP_DELAY2	100
-#define NV_SETUP5_DELAY		5
-#define NV_SETUP5_DELAYMAX	50000
-#define NV_POWERUP_DELAY	5
-#define NV_POWERUP_DELAYMAX	5000
-#define NV_MIIBUSY_DELAY	50
-#define NV_MIIPHY_DELAY	10
-#define NV_MIIPHY_DELAYMAX	10000
-#define NV_MAC_RESET_DELAY	64
-
-#define NV_WAKEUPPATTERNS	5
-#define NV_WAKEUPMASKENTRIES	4
-
-/* General driver defaults */
-#define NV_WATCHDOG_TIMEO	(5*HZ)
-
-#define RX_RING_DEFAULT		128
-#define TX_RING_DEFAULT		256
-#define RX_RING_MIN		128
-#define TX_RING_MIN		64
-#define RING_MAX_DESC_VER_1	1024
-#define RING_MAX_DESC_VER_2_3	16384
-/*
- * Difference between the get and put pointers for the tx ring.
- * This is used to throttle the amount of data outstanding in the
- * tx ring.
- */
-#define TX_LIMIT_DIFFERENCE	1
-
-/* rx/tx mac addr + type + vlan + align + slack*/
-#define NV_RX_HEADERS		(64)
-/* even more slack. */
-#define NV_RX_ALLOC_PAD		(64)
-
-/* maximum mtu size */
-#define NV_PKTLIMIT_1	ETH_DATA_LEN	/* hard limit not known */
-#define NV_PKTLIMIT_2	9100	/* Actual limit according to NVidia: 9202 */
-
-#define OOM_REFILL	(1+HZ/20)
-#define POLL_WAIT	(1+HZ/100)
-#define LINK_TIMEOUT	(3*HZ)
-#define STATS_INTERVAL	(10*HZ)
-
-/*
- * desc_ver values:
- * The nic supports three different descriptor types:
- * - DESC_VER_1: Original
- * - DESC_VER_2: support for jumbo frames.
- * - DESC_VER_3: 64-bit format.
- */
-#define DESC_VER_1	1
-#define DESC_VER_2	2
-#define DESC_VER_3	3
-
-/* PHY defines */
-#define PHY_OUI_MARVELL	0x5043
-#define PHY_OUI_CICADA	0x03f1
-#define PHYID1_OUI_MASK	0x03ff
-#define PHYID1_OUI_SHFT	6
-#define PHYID2_OUI_MASK	0xfc00
-#define PHYID2_OUI_SHFT	10
-#define PHYID2_MODEL_MASK		0x03f0
-#define PHY_MODEL_MARVELL_E3016		0x220
-#define PHY_MARVELL_E3016_INITMASK	0x0300
-#define PHY_INIT1	0x0f000
-#define PHY_INIT2	0x0e00
-#define PHY_INIT3	0x01000
-#define PHY_INIT4	0x0200
-#define PHY_INIT5	0x0004
-#define PHY_INIT6	0x02000
-#define PHY_GIGABIT	0x0100
-
-#define PHY_TIMEOUT	0x1
-#define PHY_ERROR	0x2
-
-#define PHY_100	0x1
-#define PHY_1000	0x2
-#define PHY_HALF	0x100
-
-#define NV_PAUSEFRAME_RX_CAPABLE 0x0001
-#define NV_PAUSEFRAME_TX_CAPABLE 0x0002
-#define NV_PAUSEFRAME_RX_ENABLE  0x0004
-#define NV_PAUSEFRAME_TX_ENABLE  0x0008
-#define NV_PAUSEFRAME_RX_REQ     0x0010
-#define NV_PAUSEFRAME_TX_REQ     0x0020
-#define NV_PAUSEFRAME_AUTONEG    0x0040
-
-/* MSI/MSI-X defines */
-#define NV_MSI_X_MAX_VECTORS  8
-#define NV_MSI_X_VECTORS_MASK 0x000f
-#define NV_MSI_CAPABLE        0x0010
-#define NV_MSI_X_CAPABLE      0x0020
-#define NV_MSI_ENABLED        0x0040
-#define NV_MSI_X_ENABLED      0x0080
-
-#define NV_MSI_X_VECTOR_ALL   0x0
-#define NV_MSI_X_VECTOR_RX    0x0
-#define NV_MSI_X_VECTOR_TX    0x1
-#define NV_MSI_X_VECTOR_OTHER 0x2
-
-/* statistics */
-struct nv_ethtool_str {
-	char name[ETH_GSTRING_LEN];
-};
-
-static const struct nv_ethtool_str nv_estats_str[] = {
-	{ "tx_bytes" },
-	{ "tx_zero_rexmt" },
-	{ "tx_one_rexmt" },
-	{ "tx_many_rexmt" },
-	{ "tx_late_collision" },
-	{ "tx_fifo_errors" },
-	{ "tx_carrier_errors" },
-	{ "tx_excess_deferral" },
-	{ "tx_retry_error" },
-	{ "tx_deferral" },
-	{ "tx_packets" },
-	{ "tx_pause" },
-	{ "rx_frame_error" },
-	{ "rx_extra_byte" },
-	{ "rx_late_collision" },
-	{ "rx_runt" },
-	{ "rx_frame_too_long" },
-	{ "rx_over_errors" },
-	{ "rx_crc_errors" },
-	{ "rx_frame_align_error" },
-	{ "rx_length_error" },
-	{ "rx_unicast" },
-	{ "rx_multicast" },
-	{ "rx_broadcast" },
-	{ "rx_bytes" },
-	{ "rx_pause" },
-	{ "rx_drop_frame" },
-	{ "rx_packets" },
-	{ "rx_errors_total" }
-};
-
-struct nv_ethtool_stats {
-	u64 tx_bytes;
-	u64 tx_zero_rexmt;
-	u64 tx_one_rexmt;
-	u64 tx_many_rexmt;
-	u64 tx_late_collision;
-	u64 tx_fifo_errors;
-	u64 tx_carrier_errors;
-	u64 tx_excess_deferral;
-	u64 tx_retry_error;
-	u64 tx_deferral;
-	u64 tx_packets;
-	u64 tx_pause;
-	u64 rx_frame_error;
-	u64 rx_extra_byte;
-	u64 rx_late_collision;
-	u64 rx_runt;
-	u64 rx_frame_too_long;
-	u64 rx_over_errors;
-	u64 rx_crc_errors;
-	u64 rx_frame_align_error;
-	u64 rx_length_error;
-	u64 rx_unicast;
-	u64 rx_multicast;
-	u64 rx_broadcast;
-	u64 rx_bytes;
-	u64 rx_pause;
-	u64 rx_drop_frame;
-	u64 rx_packets;
-	u64 rx_errors_total;
-};
-
-/* diagnostics */
-#define NV_TEST_COUNT_BASE 3
-#define NV_TEST_COUNT_EXTENDED 4
-
-static const struct nv_ethtool_str nv_etests_str[] = {
-	{ "link      (online/offline)" },
-	{ "register  (offline)       " },
-	{ "interrupt (offline)       " },
-	{ "loopback  (offline)       " }
-};
-
-struct register_test {
-	__le32 reg;
-	__le32 mask;
-};
-
-static const struct register_test nv_registers_test[] = {
-	{ NvRegUnknownSetupReg6, 0x01 },
-	{ NvRegMisc1, 0x03c },
-	{ NvRegOffloadConfig, 0x03ff },
-	{ NvRegMulticastAddrA, 0xffffffff },
-	{ NvRegTxWatermark, 0x0ff },
-	{ NvRegWakeUpFlags, 0x07777 },
-	{ 0,0 }
-};
-
-/*
- * SMP locking:
- * All hardware access under dev->priv->lock, except the performance
- * critical parts:
- * - rx is (pseudo-) lockless: it relies on the single-threading provided
- *	by the arch code for interrupts.
- * - tx setup is lockless: it relies on netif_tx_lock. Actual submission
- *	needs dev->priv->lock :-(
- * - set_multicast_list: preparation lockless, relies on netif_tx_lock.
- */
-
-/* in dev: base, irq */
-struct fe_priv {
-	spinlock_t lock;
-
-	/* General data:
-	 * Locking: spin_lock(&np->lock); */
-	struct net_device_stats stats;
-	struct nv_ethtool_stats estats;
-	int in_shutdown;
-	u32 linkspeed;
-	int duplex;
-	int autoneg;
-	int fixed_mode;
-	int phyaddr;
-	int wolenabled;
-	unsigned int phy_oui;
-	unsigned int phy_model;
-	u16 gigabit;
-	int intr_test;
-
-	/* General data: RO fields */
-	dma_addr_t ring_addr;
-	struct pci_dev *pci_dev;
-	u32 orig_mac[2];
-	u32 irqmask;
-	u32 desc_ver;
-	u32 txrxctl_bits;
-	u32 vlanctl_bits;
-	u32 driver_data;
-	u32 register_size;
-	int rx_csum;
-
-	void __iomem *base;
-
-	/* rx specific fields.
-	 * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
-	 */
-	union ring_type rx_ring;
-	unsigned int cur_rx, refill_rx;
-	struct sk_buff **rx_skbuff;
-	dma_addr_t *rx_dma;
-	unsigned int rx_buf_sz;
-	unsigned int pkt_limit;
-	struct timer_list oom_kick;
-	struct timer_list nic_poll;
-	struct timer_list stats_poll;
-	u32 nic_poll_irq;
-	int rx_ring_size;
-
-	/* media detection workaround.
-	 * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
-	 */
-	int need_linktimer;
-	unsigned long link_timeout;
-	/*
-	 * tx specific fields.
-	 */
-	union ring_type tx_ring;
-	unsigned int next_tx, nic_tx;
-	struct sk_buff **tx_skbuff;
-	dma_addr_t *tx_dma;
-	unsigned int *tx_dma_len;
-	u32 tx_flags;
-	int tx_ring_size;
-	int tx_limit_start;
-	int tx_limit_stop;
-
-	/* vlan fields */
-	struct vlan_group *vlangrp;
-
-	/* msi/msi-x fields */
-	u32 msi_flags;
-	struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS];
-
-	/* flow control */
-	u32 pause_flags;
-};
-
-/*
- * Maximum number of loops until we assume that a bit in the irq mask
- * is stuck. Overridable with module param.
- */
-static int max_interrupt_work = 5;
-
-/*
- * Optimization can be either throuput mode or cpu mode
- *
- * Throughput Mode: Every tx and rx packet will generate an interrupt.
- * CPU Mode: Interrupts are controlled by a timer.
- */
-enum {
-	NV_OPTIMIZATION_MODE_THROUGHPUT,
-	NV_OPTIMIZATION_MODE_CPU
-};
-static int optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT;
-
-/*
- * Poll interval for timer irq
- *
- * This interval determines how frequent an interrupt is generated.
- * The is value is determined by [(time_in_micro_secs * 100) / (2^10)]
- * Min = 0, and Max = 65535
- */
-static int poll_interval = -1;
-
-/*
- * MSI interrupts
- */
-enum {
-	NV_MSI_INT_DISABLED,
-	NV_MSI_INT_ENABLED
-};
-static int msi = NV_MSI_INT_ENABLED;
-
-/*
- * MSIX interrupts
- */
-enum {
-	NV_MSIX_INT_DISABLED,
-	NV_MSIX_INT_ENABLED
-};
-static int msix = NV_MSIX_INT_ENABLED;
-
-/*
- * DMA 64bit
- */
-enum {
-	NV_DMA_64BIT_DISABLED,
-	NV_DMA_64BIT_ENABLED
-};
-static int dma_64bit = NV_DMA_64BIT_ENABLED;
-
-static inline struct fe_priv *get_nvpriv(struct net_device *dev)
-{
-	return netdev_priv(dev);
-}
-
-static inline u8 __iomem *get_hwbase(struct net_device *dev)
-{
-	return ((struct fe_priv *)netdev_priv(dev))->base;
-}
-
-static inline void pci_push(u8 __iomem *base)
-{
-	/* force out pending posted writes */
-	readl(base);
-}
-
-static inline u32 nv_descr_getlength(struct ring_desc *prd, u32 v)
-{
-	return le32_to_cpu(prd->flaglen)
-		& ((v == DESC_VER_1) ? LEN_MASK_V1 : LEN_MASK_V2);
-}
-
-static inline u32 nv_descr_getlength_ex(struct ring_desc_ex *prd, u32 v)
-{
-	return le32_to_cpu(prd->flaglen) & LEN_MASK_V2;
-}
-
-static int reg_delay(struct net_device *dev, int offset, u32 mask, u32 target,
-				int delay, int delaymax, const char *msg)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	pci_push(base);
-	do {
-		udelay(delay);
-		delaymax -= delay;
-		if (delaymax < 0) {
-			if (msg)
-				printk(msg);
-			return 1;
-		}
-	} while ((readl(base + offset) & mask) != target);
-	return 0;
-}
-
-#define NV_SETUP_RX_RING 0x01
-#define NV_SETUP_TX_RING 0x02
-
-static void setup_hw_rings(struct net_device *dev, int rxtx_flags)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		if (rxtx_flags & NV_SETUP_RX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr);
-		}
-		if (rxtx_flags & NV_SETUP_TX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
-		}
-	} else {
-		if (rxtx_flags & NV_SETUP_RX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr), base + NvRegRxRingPhysAddr);
-			writel((u32) (cpu_to_le64(np->ring_addr) >> 32), base + NvRegRxRingPhysAddrHigh);
-		}
-		if (rxtx_flags & NV_SETUP_TX_RING) {
-			writel((u32) cpu_to_le64(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
-			writel((u32) (cpu_to_le64(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)) >> 32), base + NvRegTxRingPhysAddrHigh);
-		}
-	}
-}
-
-static void free_rings(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		if (np->rx_ring.orig)
-			pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size),
-					    np->rx_ring.orig, np->ring_addr);
-	} else {
-		if (np->rx_ring.ex)
-			pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size),
-					    np->rx_ring.ex, np->ring_addr);
-	}
-	if (np->rx_skbuff)
-		kfree(np->rx_skbuff);
-	if (np->rx_dma)
-		kfree(np->rx_dma);
-	if (np->tx_skbuff)
-		kfree(np->tx_skbuff);
-	if (np->tx_dma)
-		kfree(np->tx_dma);
-	if (np->tx_dma_len)
-		kfree(np->tx_dma_len);
-}
-
-static int using_multi_irqs(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
-	    ((np->msi_flags & NV_MSI_X_ENABLED) &&
-	     ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1)))
-		return 0;
-	else
-		return 1;
-}
-
-static void nv_enable_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq(dev->irq);
-	} else {
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-	}
-}
-
-static void nv_disable_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq(dev->irq);
-	} else {
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-	}
-}
-
-/* In MSIX mode, a write to irqmask behaves as XOR */
-static void nv_enable_hw_interrupts(struct net_device *dev, u32 mask)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	writel(mask, base + NvRegIrqMask);
-}
-
-static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	if (np->msi_flags & NV_MSI_X_ENABLED) {
-		writel(mask, base + NvRegIrqMask);
-	} else {
-		if (np->msi_flags & NV_MSI_ENABLED)
-			writel(0, base + NvRegMSIIrqMask);
-		writel(0, base + NvRegIrqMask);
-	}
-}
-
-#define MII_READ	(-1)
-/* mii_rw: read/write a register on the PHY.
- *
- * Caller must guarantee serialization
- */
-static int mii_rw(struct net_device *dev, int addr, int miireg, int value)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 reg;
-	int retval;
-
-	writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-
-	reg = readl(base + NvRegMIIControl);
-	if (reg & NVREG_MIICTL_INUSE) {
-		writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl);
-		udelay(NV_MIIBUSY_DELAY);
-	}
-
-	reg = (addr << NVREG_MIICTL_ADDRSHIFT) | miireg;
-	if (value != MII_READ) {
-		writel(value, base + NvRegMIIData);
-		reg |= NVREG_MIICTL_WRITE;
-	}
-	writel(reg, base + NvRegMIIControl);
-
-	if (reg_delay(dev, NvRegMIIControl, NVREG_MIICTL_INUSE, 0,
-			NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX, NULL)) {
-		dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d timed out.\n",
-				dev->name, miireg, addr);
-		retval = -1;
-	} else if (value != MII_READ) {
-		/* it was a write operation - fewer failures are detectable */
-		dprintk(KERN_DEBUG "%s: mii_rw wrote 0x%x to reg %d at PHY %d\n",
-				dev->name, value, miireg, addr);
-		retval = 0;
-	} else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) {
-		dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d failed.\n",
-				dev->name, miireg, addr);
-		retval = -1;
-	} else {
-		retval = readl(base + NvRegMIIData);
-		dprintk(KERN_DEBUG "%s: mii_rw read from reg %d at PHY %d: 0x%x.\n",
-				dev->name, miireg, addr, retval);
-	}
-
-	return retval;
-}
-
-static int phy_reset(struct net_device *dev, u32 bmcr_setup)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 miicontrol;
-	unsigned int tries = 0;
-
-	miicontrol = BMCR_RESET | bmcr_setup;
-	if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol)) {
-		return -1;
-	}
-
-	/* wait for 500ms */
-	msleep(500);
-
-	/* must wait till reset is deasserted */
-	while (miicontrol & BMCR_RESET) {
-		msleep(10);
-		miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		/* FIXME: 100 tries seem excessive */
-		if (tries++ > 100)
-			return -1;
-	}
-	return 0;
-}
-
-static int phy_init(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 phyinterface, phy_reserved, mii_status, mii_control, mii_control_1000,reg;
-
-	/* phy errata for E3016 phy */
-	if (np->phy_model == PHY_MODEL_MARVELL_E3016) {
-		reg = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ);
-		reg &= ~PHY_MARVELL_E3016_INITMASK;
-		if (mii_rw(dev, np->phyaddr, MII_NCONFIG, reg)) {
-			printk(KERN_INFO "%s: phy write to errata reg failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-
-	/* set advertise register */
-	reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-	reg |= (ADVERTISE_10HALF|ADVERTISE_10FULL|ADVERTISE_100HALF|ADVERTISE_100FULL|ADVERTISE_PAUSE_ASYM|ADVERTISE_PAUSE_CAP);
-	if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) {
-		printk(KERN_INFO "%s: phy write to advertise failed.\n", pci_name(np->pci_dev));
-		return PHY_ERROR;
-	}
-
-	/* get phy interface type */
-	phyinterface = readl(base + NvRegPhyInterface);
-
-	/* see if gigabit phy */
-	mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-	if (mii_status & PHY_GIGABIT) {
-		np->gigabit = PHY_GIGABIT;
-		mii_control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
-		mii_control_1000 &= ~ADVERTISE_1000HALF;
-		if (phyinterface & PHY_RGMII)
-			mii_control_1000 |= ADVERTISE_1000FULL;
-		else
-			mii_control_1000 &= ~ADVERTISE_1000FULL;
-
-		if (mii_rw(dev, np->phyaddr, MII_CTRL1000, mii_control_1000)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-	else
-		np->gigabit = 0;
-
-	mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-	mii_control |= BMCR_ANENABLE;
-
-	/* reset the phy
-	 * (certain phys need bmcr to be setup with reset)
-	 */
-	if (phy_reset(dev, mii_control)) {
-		printk(KERN_INFO "%s: phy reset failed\n", pci_name(np->pci_dev));
-		return PHY_ERROR;
-	}
-
-	/* phy vendor specific configuration */
-	if ((np->phy_oui == PHY_OUI_CICADA) && (phyinterface & PHY_RGMII) ) {
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_RESV1, MII_READ);
-		phy_reserved &= ~(PHY_INIT1 | PHY_INIT2);
-		phy_reserved |= (PHY_INIT3 | PHY_INIT4);
-		if (mii_rw(dev, np->phyaddr, MII_RESV1, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ);
-		phy_reserved |= PHY_INIT5;
-		if (mii_rw(dev, np->phyaddr, MII_NCONFIG, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-	if (np->phy_oui == PHY_OUI_CICADA) {
-		phy_reserved = mii_rw(dev, np->phyaddr, MII_SREVISION, MII_READ);
-		phy_reserved |= PHY_INIT6;
-		if (mii_rw(dev, np->phyaddr, MII_SREVISION, phy_reserved)) {
-			printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
-			return PHY_ERROR;
-		}
-	}
-	/* some phys clear out pause advertisment on reset, set it back */
-	mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg);
-
-	/* restart auto negotiation */
-	mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-	mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
-	if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {
-		return PHY_ERROR;
-	}
-
-	return 0;
-}
-
-static void nv_start_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_start_rx\n", dev->name);
-	/* Already running? Stop it. */
-	if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) {
-		writel(0, base + NvRegReceiverControl);
-		pci_push(base);
-	}
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	pci_push(base);
-	writel(NVREG_RCVCTL_START, base + NvRegReceiverControl);
-	dprintk(KERN_DEBUG "%s: nv_start_rx to duplex %d, speed 0x%08x.\n",
-				dev->name, np->duplex, np->linkspeed);
-	pci_push(base);
-}
-
-static void nv_stop_rx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_stop_rx\n", dev->name);
-	writel(0, base + NvRegReceiverControl);
-	reg_delay(dev, NvRegReceiverStatus, NVREG_RCVSTAT_BUSY, 0,
-			NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX,
-			KERN_INFO "nv_stop_rx: ReceiverStatus remained busy");
-
-	udelay(NV_RXSTOP_DELAY2);
-	writel(0, base + NvRegLinkSpeed);
-}
-
-static void nv_start_tx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_start_tx\n", dev->name);
-	writel(NVREG_XMITCTL_START, base + NvRegTransmitterControl);
-	pci_push(base);
-}
-
-static void nv_stop_tx(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_stop_tx\n", dev->name);
-	writel(0, base + NvRegTransmitterControl);
-	reg_delay(dev, NvRegTransmitterStatus, NVREG_XMITSTAT_BUSY, 0,
-			NV_TXSTOP_DELAY1, NV_TXSTOP_DELAY1MAX,
-			KERN_INFO "nv_stop_tx: TransmitterStatus remained busy");
-
-	udelay(NV_TXSTOP_DELAY2);
-	writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
-}
-
-static void nv_txrx_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_txrx_reset\n", dev->name);
-	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-	udelay(NV_TXRX_RESET_DELAY);
-	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-}
-
-static void nv_mac_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name);
-	writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-	writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset);
-	pci_push(base);
-	udelay(NV_MAC_RESET_DELAY);
-	writel(0, base + NvRegMacReset);
-	pci_push(base);
-	udelay(NV_MAC_RESET_DELAY);
-	writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
-	pci_push(base);
-}
-
-/*
- * nv_get_stats: dev->get_stats function
- * Get latest stats value from the nic.
- * Called with read_lock(&dev_base_lock) held for read -
- * only synchronized against unregister_netdevice.
- */
-static struct net_device_stats *nv_get_stats(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	/* It seems that the nic always generates interrupts and doesn't
-	 * accumulate errors internally. Thus the current values in np->stats
-	 * are already up to date.
-	 */
-	return &np->stats;
-}
-
-/*
- * nv_alloc_rx: fill rx ring entries.
- * Return 1 if the allocations for the skbs failed and the
- * rx engine is without Available descriptors
- */
-static int nv_alloc_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	unsigned int refill_rx = np->refill_rx;
-	int nr;
-
-	while (np->cur_rx != refill_rx) {
-		struct sk_buff *skb;
-
-		nr = refill_rx % np->rx_ring_size;
-		if (np->rx_skbuff[nr] == NULL) {
-
-			skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD);
-			if (!skb)
-				break;
-
-			skb->dev = dev;
-			np->rx_skbuff[nr] = skb;
-		} else {
-			skb = np->rx_skbuff[nr];
-		}
-		np->rx_dma[nr] = pci_map_single(np->pci_dev, skb->data,
-					skb->end-skb->data, PCI_DMA_FROMDEVICE);
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			np->rx_ring.orig[nr].buf = cpu_to_le32(np->rx_dma[nr]);
-			wmb();
-			np->rx_ring.orig[nr].flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX_AVAIL);
-		} else {
-			np->rx_ring.ex[nr].bufhigh = cpu_to_le64(np->rx_dma[nr]) >> 32;
-			np->rx_ring.ex[nr].buflow = cpu_to_le64(np->rx_dma[nr]) & 0x0FFFFFFFF;
-			wmb();
-			np->rx_ring.ex[nr].flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX2_AVAIL);
-		}
-		dprintk(KERN_DEBUG "%s: nv_alloc_rx: Packet %d marked as Available\n",
-					dev->name, refill_rx);
-		refill_rx++;
-	}
-	np->refill_rx = refill_rx;
-	if (np->cur_rx - refill_rx == np->rx_ring_size)
-		return 1;
-	return 0;
-}
-
-/* If rx bufs are exhausted called after 50ms to attempt to refresh */
-#ifdef CONFIG_FORCEDETH_NAPI
-static void nv_do_rx_refill(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-
-	/* Just reschedule NAPI rx processing */
-	netif_rx_schedule(dev);
-}
-#else
-static void nv_do_rx_refill(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq(dev->irq);
-	} else {
-		disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-	}
-	if (nv_alloc_rx(dev)) {
-		spin_lock_irq(&np->lock);
-		if (!np->in_shutdown)
-			mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		spin_unlock_irq(&np->lock);
-	}
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq(dev->irq);
-	} else {
-		enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-	}
-}
-#endif
-
-static void nv_init_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-
-	np->cur_rx = np->rx_ring_size;
-	np->refill_rx = 0;
-	for (i = 0; i < np->rx_ring_size; i++)
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->rx_ring.orig[i].flaglen = 0;
-	        else
-			np->rx_ring.ex[i].flaglen = 0;
-}
-
-static void nv_init_tx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-
-	np->next_tx = np->nic_tx = 0;
-	for (i = 0; i < np->tx_ring_size; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->tx_ring.orig[i].flaglen = 0;
-	        else
-			np->tx_ring.ex[i].flaglen = 0;
-		np->tx_skbuff[i] = NULL;
-		np->tx_dma[i] = 0;
-	}
-}
-
-static int nv_init_ring(struct net_device *dev)
-{
-	nv_init_tx(dev);
-	nv_init_rx(dev);
-	return nv_alloc_rx(dev);
-}
-
-static int nv_release_txskb(struct net_device *dev, unsigned int skbnr)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	dprintk(KERN_INFO "%s: nv_release_txskb for skbnr %d\n",
-		dev->name, skbnr);
-
-	if (np->tx_dma[skbnr]) {
-		pci_unmap_page(np->pci_dev, np->tx_dma[skbnr],
-			       np->tx_dma_len[skbnr],
-			       PCI_DMA_TODEVICE);
-		np->tx_dma[skbnr] = 0;
-	}
-
-	if (np->tx_skbuff[skbnr]) {
-		dev_kfree_skb_any(np->tx_skbuff[skbnr]);
-		np->tx_skbuff[skbnr] = NULL;
-		return 1;
-	} else {
-		return 0;
-	}
-}
-
-static void nv_drain_tx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	unsigned int i;
-
-	for (i = 0; i < np->tx_ring_size; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->tx_ring.orig[i].flaglen = 0;
-		else
-			np->tx_ring.ex[i].flaglen = 0;
-		if (nv_release_txskb(dev, i))
-			np->stats.tx_dropped++;
-	}
-}
-
-static void nv_drain_rx(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int i;
-	for (i = 0; i < np->rx_ring_size; i++) {
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			np->rx_ring.orig[i].flaglen = 0;
-		else
-			np->rx_ring.ex[i].flaglen = 0;
-		wmb();
-		if (np->rx_skbuff[i]) {
-			pci_unmap_single(np->pci_dev, np->rx_dma[i],
-						np->rx_skbuff[i]->end-np->rx_skbuff[i]->data,
-						PCI_DMA_FROMDEVICE);
-			dev_kfree_skb(np->rx_skbuff[i]);
-			np->rx_skbuff[i] = NULL;
-		}
-	}
-}
-
-static void drain_ring(struct net_device *dev)
-{
-	nv_drain_tx(dev);
-	nv_drain_rx(dev);
-}
-
-/*
- * nv_start_xmit: dev->hard_start_xmit function
- * Called with netif_tx_lock held.
- */
-static int nv_start_xmit(struct sk_buff *skb, struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 tx_flags = 0;
-	u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET);
-	unsigned int fragments = skb_shinfo(skb)->nr_frags;
-	unsigned int nr = (np->next_tx - 1) % np->tx_ring_size;
-	unsigned int start_nr = np->next_tx % np->tx_ring_size;
-	unsigned int i;
-	u32 offset = 0;
-	u32 bcnt;
-	u32 size = skb->len-skb->data_len;
-	u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
-	u32 tx_flags_vlan = 0;
-
-	/* add fragments to entries count */
-	for (i = 0; i < fragments; i++) {
-		entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) +
-			   ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
-	}
-
-	spin_lock_irq(&np->lock);
-
-	if ((np->next_tx - np->nic_tx + entries - 1) > np->tx_limit_stop) {
-		spin_unlock_irq(&np->lock);
-		netif_stop_queue(dev);
-		return NETDEV_TX_BUSY;
-	}
-
-	/* setup the header buffer */
-	do {
-		bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
-		nr = (nr + 1) % np->tx_ring_size;
-
-		np->tx_dma[nr] = pci_map_single(np->pci_dev, skb->data + offset, bcnt,
-						PCI_DMA_TODEVICE);
-		np->tx_dma_len[nr] = bcnt;
-
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			np->tx_ring.orig[nr].buf = cpu_to_le32(np->tx_dma[nr]);
-			np->tx_ring.orig[nr].flaglen = cpu_to_le32((bcnt-1) | tx_flags);
-		} else {
-			np->tx_ring.ex[nr].bufhigh = cpu_to_le64(np->tx_dma[nr]) >> 32;
-			np->tx_ring.ex[nr].buflow = cpu_to_le64(np->tx_dma[nr]) & 0x0FFFFFFFF;
-			np->tx_ring.ex[nr].flaglen = cpu_to_le32((bcnt-1) | tx_flags);
-		}
-		tx_flags = np->tx_flags;
-		offset += bcnt;
-		size -= bcnt;
-	} while (size);
-
-	/* setup the fragments */
-	for (i = 0; i < fragments; i++) {
-		skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
-		u32 size = frag->size;
-		offset = 0;
-
-		do {
-			bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
-			nr = (nr + 1) % np->tx_ring_size;
-
-			np->tx_dma[nr] = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt,
-						      PCI_DMA_TODEVICE);
-			np->tx_dma_len[nr] = bcnt;
-
-			if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-				np->tx_ring.orig[nr].buf = cpu_to_le32(np->tx_dma[nr]);
-				np->tx_ring.orig[nr].flaglen = cpu_to_le32((bcnt-1) | tx_flags);
-			} else {
-				np->tx_ring.ex[nr].bufhigh = cpu_to_le64(np->tx_dma[nr]) >> 32;
-				np->tx_ring.ex[nr].buflow = cpu_to_le64(np->tx_dma[nr]) & 0x0FFFFFFFF;
-				np->tx_ring.ex[nr].flaglen = cpu_to_le32((bcnt-1) | tx_flags);
-			}
-			offset += bcnt;
-			size -= bcnt;
-		} while (size);
-	}
-
-	/* set last fragment flag  */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->tx_ring.orig[nr].flaglen |= cpu_to_le32(tx_flags_extra);
-	} else {
-		np->tx_ring.ex[nr].flaglen |= cpu_to_le32(tx_flags_extra);
-	}
-
-	np->tx_skbuff[nr] = skb;
-
-#ifdef NETIF_F_TSO
-	if (skb_is_gso(skb))
-		tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT);
-	else
-#endif
-	tx_flags_extra = skb->ip_summed == CHECKSUM_PARTIAL ?
-			 NV_TX2_CHECKSUM_L3 | NV_TX2_CHECKSUM_L4 : 0;
-
-	/* vlan tag */
-	if (np->vlangrp && vlan_tx_tag_present(skb)) {
-		tx_flags_vlan = NV_TX3_VLAN_TAG_PRESENT | vlan_tx_tag_get(skb);
-	}
-
-	/* set tx flags */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->tx_ring.orig[start_nr].flaglen |= cpu_to_le32(tx_flags | tx_flags_extra);
-	} else {
-		np->tx_ring.ex[start_nr].txvlan = cpu_to_le32(tx_flags_vlan);
-		np->tx_ring.ex[start_nr].flaglen |= cpu_to_le32(tx_flags | tx_flags_extra);
-	}
-
-	dprintk(KERN_DEBUG "%s: nv_start_xmit: packet %d (entries %d) queued for transmission. tx_flags_extra: %x\n",
-		dev->name, np->next_tx, entries, tx_flags_extra);
-	{
-		int j;
-		for (j=0; j<64; j++) {
-			if ((j%16) == 0)
-				dprintk("\n%03x:", j);
-			dprintk(" %02x", ((unsigned char*)skb->data)[j]);
-		}
-		dprintk("\n");
-	}
-
-	np->next_tx += entries;
-
-	dev->trans_start = jiffies;
-	spin_unlock_irq(&np->lock);
-	writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-	pci_push(get_hwbase(dev));
-	return NETDEV_TX_OK;
-}
-
-/*
- * nv_tx_done: check for completed packets, release the skbs.
- *
- * Caller must own np->lock.
- */
-static void nv_tx_done(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 flags;
-	unsigned int i;
-	struct sk_buff *skb;
-
-	while (np->nic_tx != np->next_tx) {
-		i = np->nic_tx % np->tx_ring_size;
-
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
-			flags = le32_to_cpu(np->tx_ring.orig[i].flaglen);
-		else
-			flags = le32_to_cpu(np->tx_ring.ex[i].flaglen);
-
-		dprintk(KERN_DEBUG "%s: nv_tx_done: looking at packet %d, flags 0x%x.\n",
-					dev->name, np->nic_tx, flags);
-		if (flags & NV_TX_VALID)
-			break;
-		if (np->desc_ver == DESC_VER_1) {
-			if (flags & NV_TX_LASTPACKET) {
-				skb = np->tx_skbuff[i];
-				if (flags & (NV_TX_RETRYERROR|NV_TX_CARRIERLOST|NV_TX_LATECOLLISION|
-					     NV_TX_UNDERFLOW|NV_TX_ERROR)) {
-					if (flags & NV_TX_UNDERFLOW)
-						np->stats.tx_fifo_errors++;
-					if (flags & NV_TX_CARRIERLOST)
-						np->stats.tx_carrier_errors++;
-					np->stats.tx_errors++;
-				} else {
-					np->stats.tx_packets++;
-					np->stats.tx_bytes += skb->len;
-				}
-			}
-		} else {
-			if (flags & NV_TX2_LASTPACKET) {
-				skb = np->tx_skbuff[i];
-				if (flags & (NV_TX2_RETRYERROR|NV_TX2_CARRIERLOST|NV_TX2_LATECOLLISION|
-					     NV_TX2_UNDERFLOW|NV_TX2_ERROR)) {
-					if (flags & NV_TX2_UNDERFLOW)
-						np->stats.tx_fifo_errors++;
-					if (flags & NV_TX2_CARRIERLOST)
-						np->stats.tx_carrier_errors++;
-					np->stats.tx_errors++;
-				} else {
-					np->stats.tx_packets++;
-					np->stats.tx_bytes += skb->len;
-				}
-			}
-		}
-		nv_release_txskb(dev, i);
-		np->nic_tx++;
-	}
-	if (np->next_tx - np->nic_tx < np->tx_limit_start)
-		netif_wake_queue(dev);
-}
-
-/*
- * nv_tx_timeout: dev->tx_timeout function
- * Called with netif_tx_lock held.
- */
-static void nv_tx_timeout(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 status;
-
-	if (np->msi_flags & NV_MSI_X_ENABLED)
-		status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
-	else
-		status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
-
-	printk(KERN_INFO "%s: Got tx_timeout. irq: %08x\n", dev->name, status);
-
-	{
-		int i;
-
-		printk(KERN_INFO "%s: Ring at %lx: next %d nic %d\n",
-				dev->name, (unsigned long)np->ring_addr,
-				np->next_tx, np->nic_tx);
-		printk(KERN_INFO "%s: Dumping tx registers\n", dev->name);
-		for (i=0;i<=np->register_size;i+= 32) {
-			printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
-					i,
-					readl(base + i + 0), readl(base + i + 4),
-					readl(base + i + 8), readl(base + i + 12),
-					readl(base + i + 16), readl(base + i + 20),
-					readl(base + i + 24), readl(base + i + 28));
-		}
-		printk(KERN_INFO "%s: Dumping tx ring\n", dev->name);
-		for (i=0;i<np->tx_ring_size;i+= 4) {
-			if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-				printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n",
-				       i,
-				       le32_to_cpu(np->tx_ring.orig[i].buf),
-				       le32_to_cpu(np->tx_ring.orig[i].flaglen),
-				       le32_to_cpu(np->tx_ring.orig[i+1].buf),
-				       le32_to_cpu(np->tx_ring.orig[i+1].flaglen),
-				       le32_to_cpu(np->tx_ring.orig[i+2].buf),
-				       le32_to_cpu(np->tx_ring.orig[i+2].flaglen),
-				       le32_to_cpu(np->tx_ring.orig[i+3].buf),
-				       le32_to_cpu(np->tx_ring.orig[i+3].flaglen));
-			} else {
-				printk(KERN_INFO "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n",
-				       i,
-				       le32_to_cpu(np->tx_ring.ex[i].bufhigh),
-				       le32_to_cpu(np->tx_ring.ex[i].buflow),
-				       le32_to_cpu(np->tx_ring.ex[i].flaglen),
-				       le32_to_cpu(np->tx_ring.ex[i+1].bufhigh),
-				       le32_to_cpu(np->tx_ring.ex[i+1].buflow),
-				       le32_to_cpu(np->tx_ring.ex[i+1].flaglen),
-				       le32_to_cpu(np->tx_ring.ex[i+2].bufhigh),
-				       le32_to_cpu(np->tx_ring.ex[i+2].buflow),
-				       le32_to_cpu(np->tx_ring.ex[i+2].flaglen),
-				       le32_to_cpu(np->tx_ring.ex[i+3].bufhigh),
-				       le32_to_cpu(np->tx_ring.ex[i+3].buflow),
-				       le32_to_cpu(np->tx_ring.ex[i+3].flaglen));
-			}
-		}
-	}
-
-	spin_lock_irq(&np->lock);
-
-	/* 1) stop tx engine */
-	nv_stop_tx(dev);
-
-	/* 2) check that the packets were not sent already: */
-	nv_tx_done(dev);
-
-	/* 3) if there are dead entries: clear everything */
-	if (np->next_tx != np->nic_tx) {
-		printk(KERN_DEBUG "%s: tx_timeout: dead entries!\n", dev->name);
-		nv_drain_tx(dev);
-		np->next_tx = np->nic_tx = 0;
-		setup_hw_rings(dev, NV_SETUP_TX_RING);
-		netif_wake_queue(dev);
-	}
-
-	/* 4) restart tx engine */
-	nv_start_tx(dev);
-	spin_unlock_irq(&np->lock);
-}
-
-/*
- * Called when the nic notices a mismatch between the actual data len on the
- * wire and the len indicated in the 802 header
- */
-static int nv_getlen(struct net_device *dev, void *packet, int datalen)
-{
-	int hdrlen;	/* length of the 802 header */
-	int protolen;	/* length as stored in the proto field */
-
-	/* 1) calculate len according to header */
-	if ( ((struct vlan_ethhdr *)packet)->h_vlan_proto == htons(ETH_P_8021Q)) {
-		protolen = ntohs( ((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto );
-		hdrlen = VLAN_HLEN;
-	} else {
-		protolen = ntohs( ((struct ethhdr *)packet)->h_proto);
-		hdrlen = ETH_HLEN;
-	}
-	dprintk(KERN_DEBUG "%s: nv_getlen: datalen %d, protolen %d, hdrlen %d\n",
-				dev->name, datalen, protolen, hdrlen);
-	if (protolen > ETH_DATA_LEN)
-		return datalen; /* Value in proto field not a len, no checks possible */
-
-	protolen += hdrlen;
-	/* consistency checks: */
-	if (datalen > ETH_ZLEN) {
-		if (datalen >= protolen) {
-			/* more data on wire than in 802 header, trim of
-			 * additional data.
-			 */
-			dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
-					dev->name, protolen);
-			return protolen;
-		} else {
-			/* less data on wire than mentioned in header.
-			 * Discard the packet.
-			 */
-			dprintk(KERN_DEBUG "%s: nv_getlen: discarding long packet.\n",
-					dev->name);
-			return -1;
-		}
-	} else {
-		/* short packet. Accept only if 802 values are also short */
-		if (protolen > ETH_ZLEN) {
-			dprintk(KERN_DEBUG "%s: nv_getlen: discarding short packet.\n",
-					dev->name);
-			return -1;
-		}
-		dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
-				dev->name, datalen);
-		return datalen;
-	}
-}
-
-static int nv_rx_process(struct net_device *dev, int limit)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u32 flags;
-	u32 vlanflags = 0;
-	int count;
-
- 	for (count = 0; count < limit; ++count) {
-		struct sk_buff *skb;
-		int len;
-		int i;
-		if (np->cur_rx - np->refill_rx >= np->rx_ring_size)
-			break;	/* we scanned the whole ring - do not continue */
-
-		i = np->cur_rx % np->rx_ring_size;
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			flags = le32_to_cpu(np->rx_ring.orig[i].flaglen);
-			len = nv_descr_getlength(&np->rx_ring.orig[i], np->desc_ver);
-		} else {
-			flags = le32_to_cpu(np->rx_ring.ex[i].flaglen);
-			len = nv_descr_getlength_ex(&np->rx_ring.ex[i], np->desc_ver);
-			vlanflags = le32_to_cpu(np->rx_ring.ex[i].buflow);
-		}
-
-		dprintk(KERN_DEBUG "%s: nv_rx_process: looking at packet %d, flags 0x%x.\n",
-					dev->name, np->cur_rx, flags);
-
-		if (flags & NV_RX_AVAIL)
-			break;	/* still owned by hardware, */
-
-		/*
-		 * the packet is for us - immediately tear down the pci mapping.
-		 * TODO: check if a prefetch of the first cacheline improves
-		 * the performance.
-		 */
-		pci_unmap_single(np->pci_dev, np->rx_dma[i],
-				np->rx_skbuff[i]->end-np->rx_skbuff[i]->data,
-				PCI_DMA_FROMDEVICE);
-
-		{
-			int j;
-			dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).",flags);
-			for (j=0; j<64; j++) {
-				if ((j%16) == 0)
-					dprintk("\n%03x:", j);
-				dprintk(" %02x", ((unsigned char*)np->rx_skbuff[i]->data)[j]);
-			}
-			dprintk("\n");
-		}
-		/* look at what we actually got: */
-		if (np->desc_ver == DESC_VER_1) {
-			if (!(flags & NV_RX_DESCRIPTORVALID))
-				goto next_pkt;
-
-			if (flags & NV_RX_ERROR) {
-				if (flags & NV_RX_MISSEDFRAME) {
-					np->stats.rx_missed_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3)) {
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX_CRCERR) {
-					np->stats.rx_crc_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX_OVERFLOW) {
-					np->stats.rx_over_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX_ERROR4) {
-					len = nv_getlen(dev, np->rx_skbuff[i]->data, len);
-					if (len < 0) {
-						np->stats.rx_errors++;
-						goto next_pkt;
-					}
-				}
-				/* framing errors are soft errors. */
-				if (flags & NV_RX_FRAMINGERR) {
-					if (flags & NV_RX_SUBSTRACT1) {
-						len--;
-					}
-				}
-			}
-		} else {
-			if (!(flags & NV_RX2_DESCRIPTORVALID))
-				goto next_pkt;
-
-			if (flags & NV_RX2_ERROR) {
-				if (flags & (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3)) {
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX2_CRCERR) {
-					np->stats.rx_crc_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX2_OVERFLOW) {
-					np->stats.rx_over_errors++;
-					np->stats.rx_errors++;
-					goto next_pkt;
-				}
-				if (flags & NV_RX2_ERROR4) {
-					len = nv_getlen(dev, np->rx_skbuff[i]->data, len);
-					if (len < 0) {
-						np->stats.rx_errors++;
-						goto next_pkt;
-					}
-				}
-				/* framing errors are soft errors */
-				if (flags & NV_RX2_FRAMINGERR) {
-					if (flags & NV_RX2_SUBSTRACT1) {
-						len--;
-					}
-				}
-			}
-			if (np->rx_csum) {
-				flags &= NV_RX2_CHECKSUMMASK;
-				if (flags == NV_RX2_CHECKSUMOK1 ||
-				    flags == NV_RX2_CHECKSUMOK2 ||
-				    flags == NV_RX2_CHECKSUMOK3) {
-					dprintk(KERN_DEBUG "%s: hw checksum hit!.\n", dev->name);
-					np->rx_skbuff[i]->ip_summed = CHECKSUM_UNNECESSARY;
-				} else {
-					dprintk(KERN_DEBUG "%s: hwchecksum miss!.\n", dev->name);
-				}
-			}
-		}
-		/* got a valid packet - forward it to the network core */
-		skb = np->rx_skbuff[i];
-		np->rx_skbuff[i] = NULL;
-
-		skb_put(skb, len);
-		skb->protocol = eth_type_trans(skb, dev);
-		dprintk(KERN_DEBUG "%s: nv_rx_process: packet %d with %d bytes, proto %d accepted.\n",
-					dev->name, np->cur_rx, len, skb->protocol);
-#ifdef CONFIG_FORCEDETH_NAPI
-		if (np->vlangrp && (vlanflags & NV_RX3_VLAN_TAG_PRESENT))
-			vlan_hwaccel_receive_skb(skb, np->vlangrp,
-						 vlanflags & NV_RX3_VLAN_TAG_MASK);
-		else
-			netif_receive_skb(skb);
-#else
-		if (np->vlangrp && (vlanflags & NV_RX3_VLAN_TAG_PRESENT))
-			vlan_hwaccel_rx(skb, np->vlangrp,
-					vlanflags & NV_RX3_VLAN_TAG_MASK);
-		else
-			netif_rx(skb);
-#endif
-		dev->last_rx = jiffies;
-		np->stats.rx_packets++;
-		np->stats.rx_bytes += len;
-next_pkt:
-		np->cur_rx++;
-	}
-
-	return count;
-}
-
-static void set_bufsize(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (dev->mtu <= ETH_DATA_LEN)
-		np->rx_buf_sz = ETH_DATA_LEN + NV_RX_HEADERS;
-	else
-		np->rx_buf_sz = dev->mtu + NV_RX_HEADERS;
-}
-
-/*
- * nv_change_mtu: dev->change_mtu function
- * Called with dev_base_lock held for read.
- */
-static int nv_change_mtu(struct net_device *dev, int new_mtu)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int old_mtu;
-
-	if (new_mtu < 64 || new_mtu > np->pkt_limit)
-		return -EINVAL;
-
-	old_mtu = dev->mtu;
-	dev->mtu = new_mtu;
-
-	/* return early if the buffer sizes will not change */
-	if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN)
-		return 0;
-	if (old_mtu == new_mtu)
-		return 0;
-
-	/* synchronized against open : rtnl_lock() held by caller */
-	if (netif_running(dev)) {
-		u8 __iomem *base = get_hwbase(dev);
-		/*
-		 * It seems that the nic preloads valid ring entries into an
-		 * internal buffer. The procedure for flushing everything is
-		 * guessed, there is probably a simpler approach.
-		 * Changing the MTU is a rare event, it shouldn't matter.
-		 */
-		nv_disable_irq(dev);
-		netif_tx_lock_bh(dev);
-		spin_lock(&np->lock);
-		/* stop engines */
-		nv_stop_rx(dev);
-		nv_stop_tx(dev);
-		nv_txrx_reset(dev);
-		/* drain rx queue */
-		nv_drain_rx(dev);
-		nv_drain_tx(dev);
-		/* reinit driver view of the rx queue */
-		set_bufsize(dev);
-		if (nv_init_ring(dev)) {
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		}
-		/* reinit nic view of the rx queue */
-		writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-		setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-		writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
-			base + NvRegRingSizes);
-		pci_push(base);
-		writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-		pci_push(base);
-
-		/* restart rx engine */
-		nv_start_rx(dev);
-		nv_start_tx(dev);
-		spin_unlock(&np->lock);
-		netif_tx_unlock_bh(dev);
-		nv_enable_irq(dev);
-	}
-	return 0;
-}
-
-static void nv_copy_mac_to_hw(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 mac[2];
-
-	mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) +
-			(dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24);
-	mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8);
-
-	writel(mac[0], base + NvRegMacAddrA);
-	writel(mac[1], base + NvRegMacAddrB);
-}
-
-/*
- * nv_set_mac_address: dev->set_mac_address function
- * Called with rtnl_lock() held.
- */
-static int nv_set_mac_address(struct net_device *dev, void *addr)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	struct sockaddr *macaddr = (struct sockaddr*)addr;
-
-	if (!is_valid_ether_addr(macaddr->sa_data))
-		return -EADDRNOTAVAIL;
-
-	/* synchronized against open : rtnl_lock() held by caller */
-	memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN);
-
-	if (netif_running(dev)) {
-		netif_tx_lock_bh(dev);
-		spin_lock_irq(&np->lock);
-
-		/* stop rx engine */
-		nv_stop_rx(dev);
-
-		/* set mac address */
-		nv_copy_mac_to_hw(dev);
-
-		/* restart rx engine */
-		nv_start_rx(dev);
-		spin_unlock_irq(&np->lock);
-		netif_tx_unlock_bh(dev);
-	} else {
-		nv_copy_mac_to_hw(dev);
-	}
-	return 0;
-}
-
-/*
- * nv_set_multicast: dev->set_multicast function
- * Called with netif_tx_lock held.
- */
-static void nv_set_multicast(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 addr[2];
-	u32 mask[2];
-	u32 pff = readl(base + NvRegPacketFilterFlags) & NVREG_PFF_PAUSE_RX;
-
-	memset(addr, 0, sizeof(addr));
-	memset(mask, 0, sizeof(mask));
-
-	if (dev->flags & IFF_PROMISC) {
-		pff |= NVREG_PFF_PROMISC;
-	} else {
-		pff |= NVREG_PFF_MYADDR;
-
-		if (dev->flags & IFF_ALLMULTI || dev->mc_list) {
-			u32 alwaysOff[2];
-			u32 alwaysOn[2];
-
-			alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0xffffffff;
-			if (dev->flags & IFF_ALLMULTI) {
-				alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0;
-			} else {
-				struct dev_mc_list *walk;
-
-				walk = dev->mc_list;
-				while (walk != NULL) {
-					u32 a, b;
-					a = le32_to_cpu(*(u32 *) walk->dmi_addr);
-					b = le16_to_cpu(*(u16 *) (&walk->dmi_addr[4]));
-					alwaysOn[0] &= a;
-					alwaysOff[0] &= ~a;
-					alwaysOn[1] &= b;
-					alwaysOff[1] &= ~b;
-					walk = walk->next;
-				}
-			}
-			addr[0] = alwaysOn[0];
-			addr[1] = alwaysOn[1];
-			mask[0] = alwaysOn[0] | alwaysOff[0];
-			mask[1] = alwaysOn[1] | alwaysOff[1];
-		}
-	}
-	addr[0] |= NVREG_MCASTADDRA_FORCE;
-	pff |= NVREG_PFF_ALWAYS;
-	spin_lock_irq(&np->lock);
-	nv_stop_rx(dev);
-	writel(addr[0], base + NvRegMulticastAddrA);
-	writel(addr[1], base + NvRegMulticastAddrB);
-	writel(mask[0], base + NvRegMulticastMaskA);
-	writel(mask[1], base + NvRegMulticastMaskB);
-	writel(pff, base + NvRegPacketFilterFlags);
-	dprintk(KERN_INFO "%s: reconfiguration for multicast lists.\n",
-		dev->name);
-	nv_start_rx(dev);
-	spin_unlock_irq(&np->lock);
-}
-
-static void nv_update_pause(struct net_device *dev, u32 pause_flags)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	np->pause_flags &= ~(NV_PAUSEFRAME_TX_ENABLE | NV_PAUSEFRAME_RX_ENABLE);
-
-	if (np->pause_flags & NV_PAUSEFRAME_RX_CAPABLE) {
-		u32 pff = readl(base + NvRegPacketFilterFlags) & ~NVREG_PFF_PAUSE_RX;
-		if (pause_flags & NV_PAUSEFRAME_RX_ENABLE) {
-			writel(pff|NVREG_PFF_PAUSE_RX, base + NvRegPacketFilterFlags);
-			np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
-		} else {
-			writel(pff, base + NvRegPacketFilterFlags);
-		}
-	}
-	if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) {
-		u32 regmisc = readl(base + NvRegMisc1) & ~NVREG_MISC1_PAUSE_TX;
-		if (pause_flags & NV_PAUSEFRAME_TX_ENABLE) {
-			writel(NVREG_TX_PAUSEFRAME_ENABLE,  base + NvRegTxPauseFrame);
-			writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1);
-			np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-		} else {
-			writel(NVREG_TX_PAUSEFRAME_DISABLE,  base + NvRegTxPauseFrame);
-			writel(regmisc, base + NvRegMisc1);
-		}
-	}
-}
-
-/**
- * nv_update_linkspeed: Setup the MAC according to the link partner
- * @dev: Network device to be configured
- *
- * The function queries the PHY and checks if there is a link partner.
- * If yes, then it sets up the MAC accordingly. Otherwise, the MAC is
- * set to 10 MBit HD.
- *
- * The function returns 0 if there is no link partner and 1 if there is
- * a good link partner.
- */
-static int nv_update_linkspeed(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int adv = 0;
-	int lpa = 0;
-	int adv_lpa, adv_pause, lpa_pause;
-	int newls = np->linkspeed;
-	int newdup = np->duplex;
-	int mii_status;
-	int retval = 0;
-	u32 control_1000, status_1000, phyreg, pause_flags, txreg;
-
-	/* BMSR_LSTATUS is latched, read it twice:
-	 * we want the current value.
-	 */
-	mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-	mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-
-	if (!(mii_status & BMSR_LSTATUS)) {
-		dprintk(KERN_DEBUG "%s: no link detected by phy - falling back to 10HD.\n",
-				dev->name);
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-		retval = 0;
-		goto set_speed;
-	}
-
-	if (np->autoneg == 0) {
-		dprintk(KERN_DEBUG "%s: nv_update_linkspeed: autoneg off, PHY set to 0x%04x.\n",
-				dev->name, np->fixed_mode);
-		if (np->fixed_mode & LPA_100FULL) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-			newdup = 1;
-		} else if (np->fixed_mode & LPA_100HALF) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-			newdup = 0;
-		} else if (np->fixed_mode & LPA_10FULL) {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-			newdup = 1;
-		} else {
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-			newdup = 0;
-		}
-		retval = 1;
-		goto set_speed;
-	}
-	/* check auto negotiation is complete */
-	if (!(mii_status & BMSR_ANEGCOMPLETE)) {
-		/* still in autonegotiation - configure nic for 10 MBit HD and wait. */
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-		retval = 0;
-		dprintk(KERN_DEBUG "%s: autoneg not completed - falling back to 10HD.\n", dev->name);
-		goto set_speed;
-	}
-
-	adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-	lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ);
-	dprintk(KERN_DEBUG "%s: nv_update_linkspeed: PHY advertises 0x%04x, lpa 0x%04x.\n",
-				dev->name, adv, lpa);
-
-	retval = 1;
-	if (np->gigabit == PHY_GIGABIT) {
-		control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
-		status_1000 = mii_rw(dev, np->phyaddr, MII_STAT1000, MII_READ);
-
-		if ((control_1000 & ADVERTISE_1000FULL) &&
-			(status_1000 & LPA_1000FULL)) {
-			dprintk(KERN_DEBUG "%s: nv_update_linkspeed: GBit ethernet detected.\n",
-				dev->name);
-			newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_1000;
-			newdup = 1;
-			goto set_speed;
-		}
-	}
-
-	/* FIXME: handle parallel detection properly */
-	adv_lpa = lpa & adv;
-	if (adv_lpa & LPA_100FULL) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-		newdup = 1;
-	} else if (adv_lpa & LPA_100HALF) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
-		newdup = 0;
-	} else if (adv_lpa & LPA_10FULL) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 1;
-	} else if (adv_lpa & LPA_10HALF) {
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-	} else {
-		dprintk(KERN_DEBUG "%s: bad ability %04x - falling back to 10HD.\n", dev->name, adv_lpa);
-		newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-		newdup = 0;
-	}
-
-set_speed:
-	if (np->duplex == newdup && np->linkspeed == newls)
-		return retval;
-
-	dprintk(KERN_INFO "%s: changing link setting from %d/%d to %d/%d.\n",
-			dev->name, np->linkspeed, np->duplex, newls, newdup);
-
-	np->duplex = newdup;
-	np->linkspeed = newls;
-
-	if (np->gigabit == PHY_GIGABIT) {
-		phyreg = readl(base + NvRegRandomSeed);
-		phyreg &= ~(0x3FF00);
-		if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_10)
-			phyreg |= NVREG_RNDSEED_FORCE3;
-		else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_100)
-			phyreg |= NVREG_RNDSEED_FORCE2;
-		else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_1000)
-			phyreg |= NVREG_RNDSEED_FORCE;
-		writel(phyreg, base + NvRegRandomSeed);
-	}
-
-	phyreg = readl(base + NvRegPhyInterface);
-	phyreg &= ~(PHY_HALF|PHY_100|PHY_1000);
-	if (np->duplex == 0)
-		phyreg |= PHY_HALF;
-	if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_100)
-		phyreg |= PHY_100;
-	else if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
-		phyreg |= PHY_1000;
-	writel(phyreg, base + NvRegPhyInterface);
-
-	if (phyreg & PHY_RGMII) {
-		if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
-			txreg = NVREG_TX_DEFERRAL_RGMII_1000;
-		else
-			txreg = NVREG_TX_DEFERRAL_RGMII_10_100;
-	} else {
-		txreg = NVREG_TX_DEFERRAL_DEFAULT;
-	}
-	writel(txreg, base + NvRegTxDeferral);
-
-	if (np->desc_ver == DESC_VER_1) {
-		txreg = NVREG_TX_WM_DESC1_DEFAULT;
-	} else {
-		if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
-			txreg = NVREG_TX_WM_DESC2_3_1000;
-		else
-			txreg = NVREG_TX_WM_DESC2_3_DEFAULT;
-	}
-	writel(txreg, base + NvRegTxWatermark);
-
-	writel(NVREG_MISC1_FORCE | ( np->duplex ? 0 : NVREG_MISC1_HD),
-		base + NvRegMisc1);
-	pci_push(base);
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	pci_push(base);
-
-	pause_flags = 0;
-	/* setup pause frame */
-	if (np->duplex != 0) {
-		if (np->autoneg && np->pause_flags & NV_PAUSEFRAME_AUTONEG) {
-			adv_pause = adv & (ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM);
-			lpa_pause = lpa & (LPA_PAUSE_CAP| LPA_PAUSE_ASYM);
-
-			switch (adv_pause) {
-			case ADVERTISE_PAUSE_CAP:
-				if (lpa_pause & LPA_PAUSE_CAP) {
-					pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
-					if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
-						pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-				}
-				break;
-			case ADVERTISE_PAUSE_ASYM:
-				if (lpa_pause == (LPA_PAUSE_CAP| LPA_PAUSE_ASYM))
-				{
-					pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-				}
-				break;
-			case ADVERTISE_PAUSE_CAP| ADVERTISE_PAUSE_ASYM:
-				if (lpa_pause & LPA_PAUSE_CAP)
-				{
-					pause_flags |=  NV_PAUSEFRAME_RX_ENABLE;
-					if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
-						pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-				}
-				if (lpa_pause == LPA_PAUSE_ASYM)
-				{
-					pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
-				}
-				break;
-			}
-		} else {
-			pause_flags = np->pause_flags;
-		}
-	}
-	nv_update_pause(dev, pause_flags);
-
-	return retval;
-}
-
-static void nv_linkchange(struct net_device *dev)
-{
-	if (nv_update_linkspeed(dev)) {
-		if (!netif_carrier_ok(dev)) {
-			netif_carrier_on(dev);
-			printk(KERN_INFO "%s: link up.\n", dev->name);
-			nv_start_rx(dev);
-		}
-	} else {
-		if (netif_carrier_ok(dev)) {
-			netif_carrier_off(dev);
-			printk(KERN_INFO "%s: link down.\n", dev->name);
-			nv_stop_rx(dev);
-		}
-	}
-}
-
-static void nv_link_irq(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	u32 miistat;
-
-	miistat = readl(base + NvRegMIIStatus);
-	writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-	dprintk(KERN_INFO "%s: link change irq, status 0x%x.\n", dev->name, miistat);
-
-	if (miistat & (NVREG_MIISTAT_LINKCHANGE))
-		nv_linkchange(dev);
-	dprintk(KERN_DEBUG "%s: link change notification done.\n", dev->name);
-}
-
-static irqreturn_t nv_nic_irq(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq\n", dev->name);
-
-	for (i=0; ; i++) {
-		if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
-			events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
-			writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-		} else {
-			events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
-			writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
-		}
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		spin_lock(&np->lock);
-		nv_tx_done(dev);
-		spin_unlock(&np->lock);
-
-		if (events & NVREG_IRQ_LINK) {
-			spin_lock(&np->lock);
-			nv_link_irq(dev);
-			spin_unlock(&np->lock);
-		}
-		if (np->need_linktimer && time_after(jiffies, np->link_timeout)) {
-			spin_lock(&np->lock);
-			nv_linkchange(dev);
-			spin_unlock(&np->lock);
-			np->link_timeout = jiffies + LINK_TIMEOUT;
-		}
-		if (events & (NVREG_IRQ_TX_ERR)) {
-			dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n",
-						dev->name, events);
-		}
-		if (events & (NVREG_IRQ_UNKNOWN)) {
-			printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
-						dev->name, events);
-		}
-#ifdef CONFIG_FORCEDETH_NAPI
-		if (events & NVREG_IRQ_RX_ALL) {
-			netif_rx_schedule(dev);
-
-			/* Disable furthur receive irq's */
-			spin_lock(&np->lock);
-			np->irqmask &= ~NVREG_IRQ_RX_ALL;
-
-			if (np->msi_flags & NV_MSI_X_ENABLED)
-				writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
-			else
-				writel(np->irqmask, base + NvRegIrqMask);
-			spin_unlock(&np->lock);
-		}
-#else
-		nv_rx_process(dev, dev->weight);
-		if (nv_alloc_rx(dev)) {
-			spin_lock(&np->lock);
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-			spin_unlock(&np->lock);
-		}
-#endif
-		if (i > max_interrupt_work) {
-			spin_lock(&np->lock);
-			/* disable interrupts on the nic */
-			if (!(np->msi_flags & NV_MSI_X_ENABLED))
-				writel(0, base + NvRegIrqMask);
-			else
-				writel(np->irqmask, base + NvRegIrqMask);
-			pci_push(base);
-
-			if (!np->in_shutdown) {
-				np->nic_poll_irq = np->irqmask;
-				mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq.\n", dev->name, i);
-			spin_unlock(&np->lock);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static irqreturn_t nv_nic_irq_tx(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-	unsigned long flags;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL;
-		writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: tx irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		spin_lock_irqsave(&np->lock, flags);
-		nv_tx_done(dev);
-		spin_unlock_irqrestore(&np->lock, flags);
-
-		if (events & (NVREG_IRQ_TX_ERR)) {
-			dprintk(KERN_DEBUG "%s: received irq with events 0x%x. Probably TX fail.\n",
-						dev->name, events);
-		}
-		if (i > max_interrupt_work) {
-			spin_lock_irqsave(&np->lock, flags);
-			/* disable interrupts on the nic */
-			writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask);
-			pci_push(base);
-
-			if (!np->in_shutdown) {
-				np->nic_poll_irq |= NVREG_IRQ_TX_ALL;
-				mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_tx.\n", dev->name, i);
-			spin_unlock_irqrestore(&np->lock, flags);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_tx completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-#ifdef CONFIG_FORCEDETH_NAPI
-static int nv_napi_poll(struct net_device *dev, int *budget)
-{
-	int pkts, limit = min(*budget, dev->quota);
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	pkts = nv_rx_process(dev, limit);
-
-	if (nv_alloc_rx(dev)) {
-		spin_lock_irq(&np->lock);
-		if (!np->in_shutdown)
-			mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		spin_unlock_irq(&np->lock);
-	}
-
-	if (pkts < limit) {
-		/* all done, no more packets present */
-		netif_rx_complete(dev);
-
-		/* re-enable receive interrupts */
-		spin_lock_irq(&np->lock);
-		np->irqmask |= NVREG_IRQ_RX_ALL;
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
-		else
-			writel(np->irqmask, base + NvRegIrqMask);
-		spin_unlock_irq(&np->lock);
-		return 0;
-	} else {
-		/* used up our quantum, so reschedule */
-		dev->quota -= pkts;
-		*budget -= pkts;
-		return 1;
-	}
-}
-#endif
-
-#ifdef CONFIG_FORCEDETH_NAPI
-static irqreturn_t nv_nic_irq_rx(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-
-	events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL;
-	writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus);
-
-	if (events) {
-		netif_rx_schedule(dev);
-		/* disable receive interrupts on the nic */
-		writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
-		pci_push(base);
-	}
-	return IRQ_HANDLED;
-}
-#else
-static irqreturn_t nv_nic_irq_rx(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-	unsigned long flags;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL;
-		writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		nv_rx_process(dev, dev->weight);
-		if (nv_alloc_rx(dev)) {
-			spin_lock_irqsave(&np->lock, flags);
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-			spin_unlock_irqrestore(&np->lock, flags);
-		}
-
-		if (i > max_interrupt_work) {
-			spin_lock_irqsave(&np->lock, flags);
-			/* disable interrupts on the nic */
-			writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
-			pci_push(base);
-
-			if (!np->in_shutdown) {
-				np->nic_poll_irq |= NVREG_IRQ_RX_ALL;
-				mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_rx.\n", dev->name, i);
-			spin_unlock_irqrestore(&np->lock, flags);
-			break;
-		}
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_rx completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-#endif
-
-static irqreturn_t nv_nic_irq_other(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-	int i;
-	unsigned long flags;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name);
-
-	for (i=0; ; i++) {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER;
-		writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus);
-		pci_push(base);
-		dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
-		if (!(events & np->irqmask))
-			break;
-
-		if (events & NVREG_IRQ_LINK) {
-			spin_lock_irqsave(&np->lock, flags);
-			nv_link_irq(dev);
-			spin_unlock_irqrestore(&np->lock, flags);
-		}
-		if (np->need_linktimer && time_after(jiffies, np->link_timeout)) {
-			spin_lock_irqsave(&np->lock, flags);
-			nv_linkchange(dev);
-			spin_unlock_irqrestore(&np->lock, flags);
-			np->link_timeout = jiffies + LINK_TIMEOUT;
-		}
-		if (events & (NVREG_IRQ_UNKNOWN)) {
-			printk(KERN_DEBUG "%s: received irq with unknown events 0x%x. Please report\n",
-						dev->name, events);
-		}
-		if (i > max_interrupt_work) {
-			spin_lock_irqsave(&np->lock, flags);
-			/* disable interrupts on the nic */
-			writel(NVREG_IRQ_OTHER, base + NvRegIrqMask);
-			pci_push(base);
-
-			if (!np->in_shutdown) {
-				np->nic_poll_irq |= NVREG_IRQ_OTHER;
-				mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
-			}
-			printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_other.\n", dev->name, i);
-			spin_unlock_irqrestore(&np->lock, flags);
-			break;
-		}
-
-	}
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_other completed\n", dev->name);
-
-	return IRQ_RETVAL(i);
-}
-
-static irqreturn_t nv_nic_irq_test(int foo, void *data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 events;
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_test\n", dev->name);
-
-	if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
-		events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
-		writel(NVREG_IRQ_TIMER, base + NvRegIrqStatus);
-	} else {
-		events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
-		writel(NVREG_IRQ_TIMER, base + NvRegMSIXIrqStatus);
-	}
-	pci_push(base);
-	dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
-	if (!(events & NVREG_IRQ_TIMER))
-		return IRQ_RETVAL(0);
-
-	spin_lock(&np->lock);
-	np->intr_test = 1;
-	spin_unlock(&np->lock);
-
-	dprintk(KERN_DEBUG "%s: nv_nic_irq_test completed\n", dev->name);
-
-	return IRQ_RETVAL(1);
-}
-
-static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	int i;
-	u32 msixmap = 0;
-
-	/* Each interrupt bit can be mapped to a MSIX vector (4 bits).
-	 * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents
-	 * the remaining 8 interrupts.
-	 */
-	for (i = 0; i < 8; i++) {
-		if ((irqmask >> i) & 0x1) {
-			msixmap |= vector << (i << 2);
-		}
-	}
-	writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0);
-
-	msixmap = 0;
-	for (i = 0; i < 8; i++) {
-		if ((irqmask >> (i + 8)) & 0x1) {
-			msixmap |= vector << (i << 2);
-		}
-	}
-	writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1);
-}
-
-static int nv_request_irq(struct net_device *dev, int intr_test)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int ret = 1;
-	int i;
-
-	if (np->msi_flags & NV_MSI_X_CAPABLE) {
-		for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
-			np->msi_x_entry[i].entry = i;
-		}
-		if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) {
-			np->msi_flags |= NV_MSI_X_ENABLED;
-			if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT && !intr_test) {
-				/* Request irq for rx handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, &nv_nic_irq_rx, IRQF_SHARED, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for rx %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_err;
-				}
-				/* Request irq for tx handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, &nv_nic_irq_tx, IRQF_SHARED, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for tx %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_free_rx;
-				}
-				/* Request irq for link and timer handling */
-				if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector, &nv_nic_irq_other, IRQF_SHARED, dev->name, dev) != 0) {
-					printk(KERN_INFO "forcedeth: request_irq failed for link %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_free_tx;
-				}
-				/* map interrupts to their respective vector */
-				writel(0, base + NvRegMSIXMap0);
-				writel(0, base + NvRegMSIXMap1);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL);
-				set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER);
-			} else {
-				/* Request irq for all interrupts */
-				if ((!intr_test &&
-				     request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, &nv_nic_irq, IRQF_SHARED, dev->name, dev) != 0) ||
-				    (intr_test &&
-				     request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, &nv_nic_irq_test, IRQF_SHARED, dev->name, dev) != 0)) {
-					printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
-					pci_disable_msix(np->pci_dev);
-					np->msi_flags &= ~NV_MSI_X_ENABLED;
-					goto out_err;
-				}
-
-				/* map interrupts to vector 0 */
-				writel(0, base + NvRegMSIXMap0);
-				writel(0, base + NvRegMSIXMap1);
-			}
-		}
-	}
-	if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) {
-		if ((ret = pci_enable_msi(np->pci_dev)) == 0) {
-			pci_intx(np->pci_dev, 0);
-			np->msi_flags |= NV_MSI_ENABLED;
-			if ((!intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq, IRQF_SHARED, dev->name, dev) != 0) ||
-			    (intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq_test, IRQF_SHARED, dev->name, dev) != 0)) {
-				printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
-				pci_disable_msi(np->pci_dev);
-				pci_intx(np->pci_dev, 1);
-				np->msi_flags &= ~NV_MSI_ENABLED;
-				goto out_err;
-			}
-
-			/* map interrupts to vector 0 */
-			writel(0, base + NvRegMSIMap0);
-			writel(0, base + NvRegMSIMap1);
-			/* enable msi vector 0 */
-			writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask);
-		}
-	}
-	if (ret != 0) {
-		if ((!intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq, IRQF_SHARED, dev->name, dev) != 0) ||
-		    (intr_test && request_irq(np->pci_dev->irq, &nv_nic_irq_test, IRQF_SHARED, dev->name, dev) != 0))
-			goto out_err;
-
-	}
-
-	return 0;
-out_free_tx:
-	free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, dev);
-out_free_rx:
-	free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, dev);
-out_err:
-	return 1;
-}
-
-static void nv_free_irq(struct net_device *dev)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-	int i;
-
-	if (np->msi_flags & NV_MSI_X_ENABLED) {
-		for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++) {
-			free_irq(np->msi_x_entry[i].vector, dev);
-		}
-		pci_disable_msix(np->pci_dev);
-		np->msi_flags &= ~NV_MSI_X_ENABLED;
-	} else {
-		free_irq(np->pci_dev->irq, dev);
-		if (np->msi_flags & NV_MSI_ENABLED) {
-			pci_disable_msi(np->pci_dev);
-			pci_intx(np->pci_dev, 1);
-			np->msi_flags &= ~NV_MSI_ENABLED;
-		}
-	}
-}
-
-static void nv_do_nic_poll(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 mask = 0;
-
-	/*
-	 * First disable irq(s) and then
-	 * reenable interrupts on the nic, we have to do this before calling
-	 * nv_nic_irq because that may decide to do otherwise
-	 */
-
-	if (!using_multi_irqs(dev)) {
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			disable_irq_lockdep(dev->irq);
-		mask = np->irqmask;
-	} else {
-		if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
-			disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-			mask |= NVREG_IRQ_RX_ALL;
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
-			disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-			mask |= NVREG_IRQ_TX_ALL;
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
-			disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-			mask |= NVREG_IRQ_OTHER;
-		}
-	}
-	np->nic_poll_irq = 0;
-
-	/* FIXME: Do we need synchronize_irq(dev->irq) here? */
-
-	writel(mask, base + NvRegIrqMask);
-	pci_push(base);
-
-	if (!using_multi_irqs(dev)) {
-		nv_nic_irq(0, dev);
-		if (np->msi_flags & NV_MSI_X_ENABLED)
-			enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
-		else
-			enable_irq_lockdep(dev->irq);
-	} else {
-		if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
-			nv_nic_irq_rx(0, dev);
-			enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
-			nv_nic_irq_tx(0, dev);
-			enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
-		}
-		if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
-			nv_nic_irq_other(0, dev);
-			enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
-		}
-	}
-}
-
-#ifdef CONFIG_NET_POLL_CONTROLLER
-static void nv_poll_controller(struct net_device *dev)
-{
-	nv_do_nic_poll((unsigned long) dev);
-}
-#endif
-
-static void nv_do_stats_poll(unsigned long data)
-{
-	struct net_device *dev = (struct net_device *) data;
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	np->estats.tx_bytes += readl(base + NvRegTxCnt);
-	np->estats.tx_zero_rexmt += readl(base + NvRegTxZeroReXmt);
-	np->estats.tx_one_rexmt += readl(base + NvRegTxOneReXmt);
-	np->estats.tx_many_rexmt += readl(base + NvRegTxManyReXmt);
-	np->estats.tx_late_collision += readl(base + NvRegTxLateCol);
-	np->estats.tx_fifo_errors += readl(base + NvRegTxUnderflow);
-	np->estats.tx_carrier_errors += readl(base + NvRegTxLossCarrier);
-	np->estats.tx_excess_deferral += readl(base + NvRegTxExcessDef);
-	np->estats.tx_retry_error += readl(base + NvRegTxRetryErr);
-	np->estats.tx_deferral += readl(base + NvRegTxDef);
-	np->estats.tx_packets += readl(base + NvRegTxFrame);
-	np->estats.tx_pause += readl(base + NvRegTxPause);
-	np->estats.rx_frame_error += readl(base + NvRegRxFrameErr);
-	np->estats.rx_extra_byte += readl(base + NvRegRxExtraByte);
-	np->estats.rx_late_collision += readl(base + NvRegRxLateCol);
-	np->estats.rx_runt += readl(base + NvRegRxRunt);
-	np->estats.rx_frame_too_long += readl(base + NvRegRxFrameTooLong);
-	np->estats.rx_over_errors += readl(base + NvRegRxOverflow);
-	np->estats.rx_crc_errors += readl(base + NvRegRxFCSErr);
-	np->estats.rx_frame_align_error += readl(base + NvRegRxFrameAlignErr);
-	np->estats.rx_length_error += readl(base + NvRegRxLenErr);
-	np->estats.rx_unicast += readl(base + NvRegRxUnicast);
-	np->estats.rx_multicast += readl(base + NvRegRxMulticast);
-	np->estats.rx_broadcast += readl(base + NvRegRxBroadcast);
-	np->estats.rx_bytes += readl(base + NvRegRxCnt);
-	np->estats.rx_pause += readl(base + NvRegRxPause);
-	np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame);
-	np->estats.rx_packets =
-		np->estats.rx_unicast +
-		np->estats.rx_multicast +
-		np->estats.rx_broadcast;
-	np->estats.rx_errors_total =
-		np->estats.rx_crc_errors +
-		np->estats.rx_over_errors +
-		np->estats.rx_frame_error +
-		(np->estats.rx_frame_align_error - np->estats.rx_extra_byte) +
-		np->estats.rx_late_collision +
-		np->estats.rx_runt +
-		np->estats.rx_frame_too_long;
-
-	if (!np->in_shutdown)
-		mod_timer(&np->stats_poll, jiffies + STATS_INTERVAL);
-}
-
-static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	strcpy(info->driver, "forcedeth");
-	strcpy(info->version, FORCEDETH_VERSION);
-	strcpy(info->bus_info, pci_name(np->pci_dev));
-}
-
-static void nv_get_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	wolinfo->supported = WAKE_MAGIC;
-
-	spin_lock_irq(&np->lock);
-	if (np->wolenabled)
-		wolinfo->wolopts = WAKE_MAGIC;
-	spin_unlock_irq(&np->lock);
-}
-
-static int nv_set_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 flags = 0;
-
-	if (wolinfo->wolopts == 0) {
-		np->wolenabled = 0;
-	} else if (wolinfo->wolopts & WAKE_MAGIC) {
-		np->wolenabled = 1;
-		flags = NVREG_WAKEUPFLAGS_ENABLE;
-	}
-	if (netif_running(dev)) {
-		spin_lock_irq(&np->lock);
-		writel(flags, base + NvRegWakeUpFlags);
-		spin_unlock_irq(&np->lock);
-	}
-	return 0;
-}
-
-static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int adv;
-
-	spin_lock_irq(&np->lock);
-	ecmd->port = PORT_MII;
-	if (!netif_running(dev)) {
-		/* We do not track link speed / duplex setting if the
-		 * interface is disabled. Force a link check */
-		if (nv_update_linkspeed(dev)) {
-			if (!netif_carrier_ok(dev))
-				netif_carrier_on(dev);
-		} else {
-			if (netif_carrier_ok(dev))
-				netif_carrier_off(dev);
-		}
-	}
-
-	if (netif_carrier_ok(dev)) {
-		switch(np->linkspeed & (NVREG_LINKSPEED_MASK)) {
-		case NVREG_LINKSPEED_10:
-			ecmd->speed = SPEED_10;
-			break;
-		case NVREG_LINKSPEED_100:
-			ecmd->speed = SPEED_100;
-			break;
-		case NVREG_LINKSPEED_1000:
-			ecmd->speed = SPEED_1000;
-			break;
-		}
-		ecmd->duplex = DUPLEX_HALF;
-		if (np->duplex)
-			ecmd->duplex = DUPLEX_FULL;
-	} else {
-		ecmd->speed = -1;
-		ecmd->duplex = -1;
-	}
-
-	ecmd->autoneg = np->autoneg;
-
-	ecmd->advertising = ADVERTISED_MII;
-	if (np->autoneg) {
-		ecmd->advertising |= ADVERTISED_Autoneg;
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		if (adv & ADVERTISE_10HALF)
-			ecmd->advertising |= ADVERTISED_10baseT_Half;
-		if (adv & ADVERTISE_10FULL)
-			ecmd->advertising |= ADVERTISED_10baseT_Full;
-		if (adv & ADVERTISE_100HALF)
-			ecmd->advertising |= ADVERTISED_100baseT_Half;
-		if (adv & ADVERTISE_100FULL)
-			ecmd->advertising |= ADVERTISED_100baseT_Full;
-		if (np->gigabit == PHY_GIGABIT) {
-			adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
-			if (adv & ADVERTISE_1000FULL)
-				ecmd->advertising |= ADVERTISED_1000baseT_Full;
-		}
-	}
-	ecmd->supported = (SUPPORTED_Autoneg |
-		SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
-		SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
-		SUPPORTED_MII);
-	if (np->gigabit == PHY_GIGABIT)
-		ecmd->supported |= SUPPORTED_1000baseT_Full;
-
-	ecmd->phy_address = np->phyaddr;
-	ecmd->transceiver = XCVR_EXTERNAL;
-
-	/* ignore maxtxpkt, maxrxpkt for now */
-	spin_unlock_irq(&np->lock);
-	return 0;
-}
-
-static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (ecmd->port != PORT_MII)
-		return -EINVAL;
-	if (ecmd->transceiver != XCVR_EXTERNAL)
-		return -EINVAL;
-	if (ecmd->phy_address != np->phyaddr) {
-		/* TODO: support switching between multiple phys. Should be
-		 * trivial, but not enabled due to lack of test hardware. */
-		return -EINVAL;
-	}
-	if (ecmd->autoneg == AUTONEG_ENABLE) {
-		u32 mask;
-
-		mask = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
-			  ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
-		if (np->gigabit == PHY_GIGABIT)
-			mask |= ADVERTISED_1000baseT_Full;
-
-		if ((ecmd->advertising & mask) == 0)
-			return -EINVAL;
-
-	} else if (ecmd->autoneg == AUTONEG_DISABLE) {
-		/* Note: autonegotiation disable, speed 1000 intentionally
-		 * forbidden - noone should need that. */
-
-		if (ecmd->speed != SPEED_10 && ecmd->speed != SPEED_100)
-			return -EINVAL;
-		if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
-			return -EINVAL;
-	} else {
-		return -EINVAL;
-	}
-
-	netif_carrier_off(dev);
-	if (netif_running(dev)) {
-		nv_disable_irq(dev);
-		netif_tx_lock_bh(dev);
-		spin_lock(&np->lock);
-		/* stop engines */
-		nv_stop_rx(dev);
-		nv_stop_tx(dev);
-		spin_unlock(&np->lock);
-		netif_tx_unlock_bh(dev);
-	}
-
-	if (ecmd->autoneg == AUTONEG_ENABLE) {
-		int adv, bmcr;
-
-		np->autoneg = 1;
-
-		/* advertise only what has been requested */
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
-		if (ecmd->advertising & ADVERTISED_10baseT_Half)
-			adv |= ADVERTISE_10HALF;
-		if (ecmd->advertising & ADVERTISED_10baseT_Full)
-			adv |= ADVERTISE_10FULL;
-		if (ecmd->advertising & ADVERTISED_100baseT_Half)
-			adv |= ADVERTISE_100HALF;
-		if (ecmd->advertising & ADVERTISED_100baseT_Full)
-			adv |= ADVERTISE_100FULL;
-		if (np->pause_flags & NV_PAUSEFRAME_RX_REQ)  /* for rx we set both advertisments but disable tx pause */
-			adv |=  ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
-		if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
-			adv |=  ADVERTISE_PAUSE_ASYM;
-		mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
-
-		if (np->gigabit == PHY_GIGABIT) {
-			adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
-			adv &= ~ADVERTISE_1000FULL;
-			if (ecmd->advertising & ADVERTISED_1000baseT_Full)
-				adv |= ADVERTISE_1000FULL;
-			mii_rw(dev, np->phyaddr, MII_CTRL1000, adv);
-		}
-
-		if (netif_running(dev))
-			printk(KERN_INFO "%s: link down.\n", dev->name);
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		if (np->phy_model == PHY_MODEL_MARVELL_E3016) {
-			bmcr |= BMCR_ANENABLE;
-			/* reset the phy in order for settings to stick,
-			 * and cause autoneg to start */
-			if (phy_reset(dev, bmcr)) {
-				printk(KERN_INFO "%s: phy reset failed\n", dev->name);
-				return -EINVAL;
-			}
-		} else {
-			bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-			mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-		}
-	} else {
-		int adv, bmcr;
-
-		np->autoneg = 0;
-
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
-		if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_HALF)
-			adv |= ADVERTISE_10HALF;
-		if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_FULL)
-			adv |= ADVERTISE_10FULL;
-		if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_HALF)
-			adv |= ADVERTISE_100HALF;
-		if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_FULL)
-			adv |= ADVERTISE_100FULL;
-		np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE);
-		if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) {/* for rx we set both advertisments but disable tx pause */
-			adv |=  ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
-			np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
-		}
-		if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) {
-			adv |=  ADVERTISE_PAUSE_ASYM;
-			np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-		}
-		mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
-		np->fixed_mode = adv;
-
-		if (np->gigabit == PHY_GIGABIT) {
-			adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
-			adv &= ~ADVERTISE_1000FULL;
-			mii_rw(dev, np->phyaddr, MII_CTRL1000, adv);
-		}
-
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		bmcr &= ~(BMCR_ANENABLE|BMCR_SPEED100|BMCR_SPEED1000|BMCR_FULLDPLX);
-		if (np->fixed_mode & (ADVERTISE_10FULL|ADVERTISE_100FULL))
-			bmcr |= BMCR_FULLDPLX;
-		if (np->fixed_mode & (ADVERTISE_100HALF|ADVERTISE_100FULL))
-			bmcr |= BMCR_SPEED100;
-		if (np->phy_oui == PHY_OUI_MARVELL) {
-			/* reset the phy in order for forced mode settings to stick */
-			if (phy_reset(dev, bmcr)) {
-				printk(KERN_INFO "%s: phy reset failed\n", dev->name);
-				return -EINVAL;
-			}
-		} else {
-			mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-			if (netif_running(dev)) {
-				/* Wait a bit and then reconfigure the nic. */
-				udelay(10);
-				nv_linkchange(dev);
-			}
-		}
-	}
-
-	if (netif_running(dev)) {
-		nv_start_rx(dev);
-		nv_start_tx(dev);
-		nv_enable_irq(dev);
-	}
-
-	return 0;
-}
-
-#define FORCEDETH_REGS_VER	1
-
-static int nv_get_regs_len(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	return np->register_size;
-}
-
-static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u32 *rbuf = buf;
-	int i;
-
-	regs->version = FORCEDETH_REGS_VER;
-	spin_lock_irq(&np->lock);
-	for (i = 0;i <= np->register_size/sizeof(u32); i++)
-		rbuf[i] = readl(base + i*sizeof(u32));
-	spin_unlock_irq(&np->lock);
-}
-
-static int nv_nway_reset(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int ret;
-
-	if (np->autoneg) {
-		int bmcr;
-
-		netif_carrier_off(dev);
-		if (netif_running(dev)) {
-			nv_disable_irq(dev);
-			netif_tx_lock_bh(dev);
-			spin_lock(&np->lock);
-			/* stop engines */
-			nv_stop_rx(dev);
-			nv_stop_tx(dev);
-			spin_unlock(&np->lock);
-			netif_tx_unlock_bh(dev);
-			printk(KERN_INFO "%s: link down.\n", dev->name);
-		}
-
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		if (np->phy_model == PHY_MODEL_MARVELL_E3016) {
-			bmcr |= BMCR_ANENABLE;
-			/* reset the phy in order for settings to stick*/
-			if (phy_reset(dev, bmcr)) {
-				printk(KERN_INFO "%s: phy reset failed\n", dev->name);
-				return -EINVAL;
-			}
-		} else {
-			bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-			mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-		}
-
-		if (netif_running(dev)) {
-			nv_start_rx(dev);
-			nv_start_tx(dev);
-			nv_enable_irq(dev);
-		}
-		ret = 0;
-	} else {
-		ret = -EINVAL;
-	}
-
-	return ret;
-}
-
-static int nv_set_tso(struct net_device *dev, u32 value)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if ((np->driver_data & DEV_HAS_CHECKSUM))
-		return ethtool_op_set_tso(dev, value);
-	else
-		return -EOPNOTSUPP;
-}
-
-static void nv_get_ringparam(struct net_device *dev, struct ethtool_ringparam* ring)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	ring->rx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3;
-	ring->rx_mini_max_pending = 0;
-	ring->rx_jumbo_max_pending = 0;
-	ring->tx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3;
-
-	ring->rx_pending = np->rx_ring_size;
-	ring->rx_mini_pending = 0;
-	ring->rx_jumbo_pending = 0;
-	ring->tx_pending = np->tx_ring_size;
-}
-
-static int nv_set_ringparam(struct net_device *dev, struct ethtool_ringparam* ring)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	u8 *rxtx_ring, *rx_skbuff, *tx_skbuff, *rx_dma, *tx_dma, *tx_dma_len;
-	dma_addr_t ring_addr;
-
-	if (ring->rx_pending < RX_RING_MIN ||
-	    ring->tx_pending < TX_RING_MIN ||
-	    ring->rx_mini_pending != 0 ||
-	    ring->rx_jumbo_pending != 0 ||
-	    (np->desc_ver == DESC_VER_1 &&
-	     (ring->rx_pending > RING_MAX_DESC_VER_1 ||
-	      ring->tx_pending > RING_MAX_DESC_VER_1)) ||
-	    (np->desc_ver != DESC_VER_1 &&
-	     (ring->rx_pending > RING_MAX_DESC_VER_2_3 ||
-	      ring->tx_pending > RING_MAX_DESC_VER_2_3))) {
-		return -EINVAL;
-	}
-
-	/* allocate new rings */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		rxtx_ring = pci_alloc_consistent(np->pci_dev,
-					    sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending),
-					    &ring_addr);
-	} else {
-		rxtx_ring = pci_alloc_consistent(np->pci_dev,
-					    sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending),
-					    &ring_addr);
-	}
-	rx_skbuff = kmalloc(sizeof(struct sk_buff*) * ring->rx_pending, GFP_KERNEL);
-	rx_dma = kmalloc(sizeof(dma_addr_t) * ring->rx_pending, GFP_KERNEL);
-	tx_skbuff = kmalloc(sizeof(struct sk_buff*) * ring->tx_pending, GFP_KERNEL);
-	tx_dma = kmalloc(sizeof(dma_addr_t) * ring->tx_pending, GFP_KERNEL);
-	tx_dma_len = kmalloc(sizeof(unsigned int) * ring->tx_pending, GFP_KERNEL);
-	if (!rxtx_ring || !rx_skbuff || !rx_dma || !tx_skbuff || !tx_dma || !tx_dma_len) {
-		/* fall back to old rings */
-		if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-			if (rxtx_ring)
-				pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending),
-						    rxtx_ring, ring_addr);
-		} else {
-			if (rxtx_ring)
-				pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending),
-						    rxtx_ring, ring_addr);
-		}
-		if (rx_skbuff)
-			kfree(rx_skbuff);
-		if (rx_dma)
-			kfree(rx_dma);
-		if (tx_skbuff)
-			kfree(tx_skbuff);
-		if (tx_dma)
-			kfree(tx_dma);
-		if (tx_dma_len)
-			kfree(tx_dma_len);
-		goto exit;
-	}
-
-	if (netif_running(dev)) {
-		nv_disable_irq(dev);
-		netif_tx_lock_bh(dev);
-		spin_lock(&np->lock);
-		/* stop engines */
-		nv_stop_rx(dev);
-		nv_stop_tx(dev);
-		nv_txrx_reset(dev);
-		/* drain queues */
-		nv_drain_rx(dev);
-		nv_drain_tx(dev);
-		/* delete queues */
-		free_rings(dev);
-	}
-
-	/* set new values */
-	np->rx_ring_size = ring->rx_pending;
-	np->tx_ring_size = ring->tx_pending;
-	np->tx_limit_stop = ring->tx_pending - TX_LIMIT_DIFFERENCE;
-	np->tx_limit_start = ring->tx_pending - TX_LIMIT_DIFFERENCE - 1;
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->rx_ring.orig = (struct ring_desc*)rxtx_ring;
-		np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size];
-	} else {
-		np->rx_ring.ex = (struct ring_desc_ex*)rxtx_ring;
-		np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size];
-	}
-	np->rx_skbuff = (struct sk_buff**)rx_skbuff;
-	np->rx_dma = (dma_addr_t*)rx_dma;
-	np->tx_skbuff = (struct sk_buff**)tx_skbuff;
-	np->tx_dma = (dma_addr_t*)tx_dma;
-	np->tx_dma_len = (unsigned int*)tx_dma_len;
-	np->ring_addr = ring_addr;
-
-	memset(np->rx_skbuff, 0, sizeof(struct sk_buff*) * np->rx_ring_size);
-	memset(np->rx_dma, 0, sizeof(dma_addr_t) * np->rx_ring_size);
-	memset(np->tx_skbuff, 0, sizeof(struct sk_buff*) * np->tx_ring_size);
-	memset(np->tx_dma, 0, sizeof(dma_addr_t) * np->tx_ring_size);
-	memset(np->tx_dma_len, 0, sizeof(unsigned int) * np->tx_ring_size);
-
-	if (netif_running(dev)) {
-		/* reinit driver view of the queues */
-		set_bufsize(dev);
-		if (nv_init_ring(dev)) {
-			if (!np->in_shutdown)
-				mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-		}
-
-		/* reinit nic view of the queues */
-		writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-		setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-		writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
-			base + NvRegRingSizes);
-		pci_push(base);
-		writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-		pci_push(base);
-
-		/* restart engines */
-		nv_start_rx(dev);
-		nv_start_tx(dev);
-		spin_unlock(&np->lock);
-		netif_tx_unlock_bh(dev);
-		nv_enable_irq(dev);
-	}
-	return 0;
-exit:
-	return -ENOMEM;
-}
-
-static void nv_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	pause->autoneg = (np->pause_flags & NV_PAUSEFRAME_AUTONEG) != 0;
-	pause->rx_pause = (np->pause_flags & NV_PAUSEFRAME_RX_ENABLE) != 0;
-	pause->tx_pause = (np->pause_flags & NV_PAUSEFRAME_TX_ENABLE) != 0;
-}
-
-static int nv_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int adv, bmcr;
-
-	if ((!np->autoneg && np->duplex == 0) ||
-	    (np->autoneg && !pause->autoneg && np->duplex == 0)) {
-		printk(KERN_INFO "%s: can not set pause settings when forced link is in half duplex.\n",
-		       dev->name);
-		return -EINVAL;
-	}
-	if (pause->tx_pause && !(np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE)) {
-		printk(KERN_INFO "%s: hardware does not support tx pause frames.\n", dev->name);
-		return -EINVAL;
-	}
-
-	netif_carrier_off(dev);
-	if (netif_running(dev)) {
-		nv_disable_irq(dev);
-		netif_tx_lock_bh(dev);
-		spin_lock(&np->lock);
-		/* stop engines */
-		nv_stop_rx(dev);
-		nv_stop_tx(dev);
-		spin_unlock(&np->lock);
-		netif_tx_unlock_bh(dev);
-	}
-
-	np->pause_flags &= ~(NV_PAUSEFRAME_RX_REQ|NV_PAUSEFRAME_TX_REQ);
-	if (pause->rx_pause)
-		np->pause_flags |= NV_PAUSEFRAME_RX_REQ;
-	if (pause->tx_pause)
-		np->pause_flags |= NV_PAUSEFRAME_TX_REQ;
-
-	if (np->autoneg && pause->autoneg) {
-		np->pause_flags |= NV_PAUSEFRAME_AUTONEG;
-
-		adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
-		adv &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
-		if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisments but disable tx pause */
-			adv |=  ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
-		if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
-			adv |=  ADVERTISE_PAUSE_ASYM;
-		mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
-
-		if (netif_running(dev))
-			printk(KERN_INFO "%s: link down.\n", dev->name);
-		bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
-		bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-		mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
-	} else {
-		np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE);
-		if (pause->rx_pause)
-			np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
-		if (pause->tx_pause)
-			np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
-
-		if (!netif_running(dev))
-			nv_update_linkspeed(dev);
-		else
-			nv_update_pause(dev, np->pause_flags);
-	}
-
-	if (netif_running(dev)) {
-		nv_start_rx(dev);
-		nv_start_tx(dev);
-		nv_enable_irq(dev);
-	}
-	return 0;
-}
-
-static u32 nv_get_rx_csum(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	return (np->rx_csum) != 0;
-}
-
-static int nv_set_rx_csum(struct net_device *dev, u32 data)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int retcode = 0;
-
-	if (np->driver_data & DEV_HAS_CHECKSUM) {
-		if (data) {
-			np->rx_csum = 1;
-			np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK;
-		} else {
-			np->rx_csum = 0;
-			/* vlan is dependent on rx checksum offload */
-			if (!(np->vlanctl_bits & NVREG_VLANCONTROL_ENABLE))
-				np->txrxctl_bits &= ~NVREG_TXRXCTL_RXCHECK;
-		}
-		if (netif_running(dev)) {
-			spin_lock_irq(&np->lock);
-			writel(np->txrxctl_bits, base + NvRegTxRxControl);
-			spin_unlock_irq(&np->lock);
-		}
-	} else {
-		return -EINVAL;
-	}
-
-	return retcode;
-}
-
-static int nv_set_tx_csum(struct net_device *dev, u32 data)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (np->driver_data & DEV_HAS_CHECKSUM)
-		return ethtool_op_set_tx_hw_csum(dev, data);
-	else
-		return -EOPNOTSUPP;
-}
-
-static int nv_set_sg(struct net_device *dev, u32 data)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (np->driver_data & DEV_HAS_CHECKSUM)
-		return ethtool_op_set_sg(dev, data);
-	else
-		return -EOPNOTSUPP;
-}
-
-static int nv_get_stats_count(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (np->driver_data & DEV_HAS_STATISTICS)
-		return sizeof(struct nv_ethtool_stats)/sizeof(u64);
-	else
-		return 0;
-}
-
-static void nv_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *estats, u64 *buffer)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	/* update stats */
-	nv_do_stats_poll((unsigned long)dev);
-
-	memcpy(buffer, &np->estats, nv_get_stats_count(dev)*sizeof(u64));
-}
-
-static int nv_self_test_count(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-
-	if (np->driver_data & DEV_HAS_TEST_EXTENDED)
-		return NV_TEST_COUNT_EXTENDED;
-	else
-		return NV_TEST_COUNT_BASE;
-}
-
-static int nv_link_test(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	int mii_status;
-
-	mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-	mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
-
-	/* check phy link status */
-	if (!(mii_status & BMSR_LSTATUS))
-		return 0;
-	else
-		return 1;
-}
-
-static int nv_register_test(struct net_device *dev)
-{
-	u8 __iomem *base = get_hwbase(dev);
-	int i = 0;
-	u32 orig_read, new_read;
-
-	do {
-		orig_read = readl(base + nv_registers_test[i].reg);
-
-		/* xor with mask to toggle bits */
-		orig_read ^= nv_registers_test[i].mask;
-
-		writel(orig_read, base + nv_registers_test[i].reg);
-
-		new_read = readl(base + nv_registers_test[i].reg);
-
-		if ((new_read & nv_registers_test[i].mask) != (orig_read & nv_registers_test[i].mask))
-			return 0;
-
-		/* restore original value */
-		orig_read ^= nv_registers_test[i].mask;
-		writel(orig_read, base + nv_registers_test[i].reg);
-
-	} while (nv_registers_test[++i].reg != 0);
-
-	return 1;
-}
-
-static int nv_interrupt_test(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int ret = 1;
-	int testcnt;
-	u32 save_msi_flags, save_poll_interval = 0;
-
-	if (netif_running(dev)) {
-		/* free current irq */
-		nv_free_irq(dev);
-		save_poll_interval = readl(base+NvRegPollingInterval);
-	}
-
-	/* flag to test interrupt handler */
-	np->intr_test = 0;
-
-	/* setup test irq */
-	save_msi_flags = np->msi_flags;
-	np->msi_flags &= ~NV_MSI_X_VECTORS_MASK;
-	np->msi_flags |= 0x001; /* setup 1 vector */
-	if (nv_request_irq(dev, 1))
-		return 0;
-
-	/* setup timer interrupt */
-	writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
-	writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
-
-	nv_enable_hw_interrupts(dev, NVREG_IRQ_TIMER);
-
-	/* wait for at least one interrupt */
-	msleep(100);
-
-	spin_lock_irq(&np->lock);
-
-	/* flag should be set within ISR */
-	testcnt = np->intr_test;
-	if (!testcnt)
-		ret = 2;
-
-	nv_disable_hw_interrupts(dev, NVREG_IRQ_TIMER);
-	if (!(np->msi_flags & NV_MSI_X_ENABLED))
-		writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-	else
-		writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
-
-	spin_unlock_irq(&np->lock);
-
-	nv_free_irq(dev);
-
-	np->msi_flags = save_msi_flags;
-
-	if (netif_running(dev)) {
-		writel(save_poll_interval, base + NvRegPollingInterval);
-		writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
-		/* restore original irq */
-		if (nv_request_irq(dev, 0))
-			return 0;
-	}
-
-	return ret;
-}
-
-static int nv_loopback_test(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	struct sk_buff *tx_skb, *rx_skb;
-	dma_addr_t test_dma_addr;
-	u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET);
-	u32 flags;
-	int len, i, pkt_len;
-	u8 *pkt_data;
-	u32 filter_flags = 0;
-	u32 misc1_flags = 0;
-	int ret = 1;
-
-	if (netif_running(dev)) {
-		nv_disable_irq(dev);
-		filter_flags = readl(base + NvRegPacketFilterFlags);
-		misc1_flags = readl(base + NvRegMisc1);
-	} else {
-		nv_txrx_reset(dev);
-	}
-
-	/* reinit driver view of the rx queue */
-	set_bufsize(dev);
-	nv_init_ring(dev);
-
-	/* setup hardware for loopback */
-	writel(NVREG_MISC1_FORCE, base + NvRegMisc1);
-	writel(NVREG_PFF_ALWAYS | NVREG_PFF_LOOPBACK, base + NvRegPacketFilterFlags);
-
-	/* reinit nic view of the rx queue */
-	writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-	setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-	writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
-		base + NvRegRingSizes);
-	pci_push(base);
-
-	/* restart rx engine */
-	nv_start_rx(dev);
-	nv_start_tx(dev);
-
-	/* setup packet for tx */
-	pkt_len = ETH_DATA_LEN;
-	tx_skb = dev_alloc_skb(pkt_len);
-	if (!tx_skb) {
-		printk(KERN_ERR "dev_alloc_skb() failed during loopback test"
-			 " of %s\n", dev->name);
-		ret = 0;
-		goto out;
-	}
-	pkt_data = skb_put(tx_skb, pkt_len);
-	for (i = 0; i < pkt_len; i++)
-		pkt_data[i] = (u8)(i & 0xff);
-	test_dma_addr = pci_map_single(np->pci_dev, tx_skb->data,
-				       tx_skb->end-tx_skb->data, PCI_DMA_FROMDEVICE);
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->tx_ring.orig[0].buf = cpu_to_le32(test_dma_addr);
-		np->tx_ring.orig[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra);
-	} else {
-		np->tx_ring.ex[0].bufhigh = cpu_to_le64(test_dma_addr) >> 32;
-		np->tx_ring.ex[0].buflow = cpu_to_le64(test_dma_addr) & 0x0FFFFFFFF;
-		np->tx_ring.ex[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra);
-	}
-	writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-	pci_push(get_hwbase(dev));
-
-	msleep(500);
-
-	/* check for rx of the packet */
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		flags = le32_to_cpu(np->rx_ring.orig[0].flaglen);
-		len = nv_descr_getlength(&np->rx_ring.orig[0], np->desc_ver);
-
-	} else {
-		flags = le32_to_cpu(np->rx_ring.ex[0].flaglen);
-		len = nv_descr_getlength_ex(&np->rx_ring.ex[0], np->desc_ver);
-	}
-
-	if (flags & NV_RX_AVAIL) {
-		ret = 0;
-	} else if (np->desc_ver == DESC_VER_1) {
-		if (flags & NV_RX_ERROR)
-			ret = 0;
-	} else {
-		if (flags & NV_RX2_ERROR) {
-			ret = 0;
-		}
-	}
-
-	if (ret) {
-		if (len != pkt_len) {
-			ret = 0;
-			dprintk(KERN_DEBUG "%s: loopback len mismatch %d vs %d\n",
-				dev->name, len, pkt_len);
-		} else {
-			rx_skb = np->rx_skbuff[0];
-			for (i = 0; i < pkt_len; i++) {
-				if (rx_skb->data[i] != (u8)(i & 0xff)) {
-					ret = 0;
-					dprintk(KERN_DEBUG "%s: loopback pattern check failed on byte %d\n",
-						dev->name, i);
-					break;
-				}
-			}
-		}
-	} else {
-		dprintk(KERN_DEBUG "%s: loopback - did not receive test packet\n", dev->name);
-	}
-
-	pci_unmap_page(np->pci_dev, test_dma_addr,
-		       tx_skb->end-tx_skb->data,
-		       PCI_DMA_TODEVICE);
-	dev_kfree_skb_any(tx_skb);
- out:
-	/* stop engines */
-	nv_stop_rx(dev);
-	nv_stop_tx(dev);
-	nv_txrx_reset(dev);
-	/* drain rx queue */
-	nv_drain_rx(dev);
-	nv_drain_tx(dev);
-
-	if (netif_running(dev)) {
-		writel(misc1_flags, base + NvRegMisc1);
-		writel(filter_flags, base + NvRegPacketFilterFlags);
-		nv_enable_irq(dev);
-	}
-
-	return ret;
-}
-
-static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64 *buffer)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int result;
-	memset(buffer, 0, nv_self_test_count(dev)*sizeof(u64));
-
-	if (!nv_link_test(dev)) {
-		test->flags |= ETH_TEST_FL_FAILED;
-		buffer[0] = 1;
-	}
-
-	if (test->flags & ETH_TEST_FL_OFFLINE) {
-		if (netif_running(dev)) {
-			netif_stop_queue(dev);
-			netif_poll_disable(dev);
-			netif_tx_lock_bh(dev);
-			spin_lock_irq(&np->lock);
-			nv_disable_hw_interrupts(dev, np->irqmask);
-			if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
-				writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-			} else {
-				writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
-			}
-			/* stop engines */
-			nv_stop_rx(dev);
-			nv_stop_tx(dev);
-			nv_txrx_reset(dev);
-			/* drain rx queue */
-			nv_drain_rx(dev);
-			nv_drain_tx(dev);
-			spin_unlock_irq(&np->lock);
-			netif_tx_unlock_bh(dev);
-		}
-
-		if (!nv_register_test(dev)) {
-			test->flags |= ETH_TEST_FL_FAILED;
-			buffer[1] = 1;
-		}
-
-		result = nv_interrupt_test(dev);
-		if (result != 1) {
-			test->flags |= ETH_TEST_FL_FAILED;
-			buffer[2] = 1;
-		}
-		if (result == 0) {
-			/* bail out */
-			return;
-		}
-
-		if (!nv_loopback_test(dev)) {
-			test->flags |= ETH_TEST_FL_FAILED;
-			buffer[3] = 1;
-		}
-
-		if (netif_running(dev)) {
-			/* reinit driver view of the rx queue */
-			set_bufsize(dev);
-			if (nv_init_ring(dev)) {
-				if (!np->in_shutdown)
-					mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-			}
-			/* reinit nic view of the rx queue */
-			writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-			setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-			writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
-				base + NvRegRingSizes);
-			pci_push(base);
-			writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-			pci_push(base);
-			/* restart rx engine */
-			nv_start_rx(dev);
-			nv_start_tx(dev);
-			netif_start_queue(dev);
-			netif_poll_enable(dev);
-			nv_enable_hw_interrupts(dev, np->irqmask);
-		}
-	}
-}
-
-static void nv_get_strings(struct net_device *dev, u32 stringset, u8 *buffer)
-{
-	switch (stringset) {
-	case ETH_SS_STATS:
-		memcpy(buffer, &nv_estats_str, nv_get_stats_count(dev)*sizeof(struct nv_ethtool_str));
-		break;
-	case ETH_SS_TEST:
-		memcpy(buffer, &nv_etests_str, nv_self_test_count(dev)*sizeof(struct nv_ethtool_str));
-		break;
-	}
-}
-
-static const struct ethtool_ops ops = {
-	.get_drvinfo = nv_get_drvinfo,
-	.get_link = ethtool_op_get_link,
-	.get_wol = nv_get_wol,
-	.set_wol = nv_set_wol,
-	.get_settings = nv_get_settings,
-	.set_settings = nv_set_settings,
-	.get_regs_len = nv_get_regs_len,
-	.get_regs = nv_get_regs,
-	.nway_reset = nv_nway_reset,
-	.get_perm_addr = ethtool_op_get_perm_addr,
-	.get_tso = ethtool_op_get_tso,
-	.set_tso = nv_set_tso,
-	.get_ringparam = nv_get_ringparam,
-	.set_ringparam = nv_set_ringparam,
-	.get_pauseparam = nv_get_pauseparam,
-	.set_pauseparam = nv_set_pauseparam,
-	.get_rx_csum = nv_get_rx_csum,
-	.set_rx_csum = nv_set_rx_csum,
-	.get_tx_csum = ethtool_op_get_tx_csum,
-	.set_tx_csum = nv_set_tx_csum,
-	.get_sg = ethtool_op_get_sg,
-	.set_sg = nv_set_sg,
-	.get_strings = nv_get_strings,
-	.get_stats_count = nv_get_stats_count,
-	.get_ethtool_stats = nv_get_ethtool_stats,
-	.self_test_count = nv_self_test_count,
-	.self_test = nv_self_test,
-};
-
-static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
-{
-	struct fe_priv *np = get_nvpriv(dev);
-
-	spin_lock_irq(&np->lock);
-
-	/* save vlan group */
-	np->vlangrp = grp;
-
-	if (grp) {
-		/* enable vlan on MAC */
-		np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS;
-	} else {
-		/* disable vlan on MAC */
-		np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP;
-		np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS;
-	}
-
-	writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
-
-	spin_unlock_irq(&np->lock);
-};
-
-static void nv_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
-{
-	/* nothing to do */
-};
-
-static int nv_open(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-	int ret = 1;
-	int oom, i;
-
-	dprintk(KERN_DEBUG "nv_open: begin\n");
-
-	/* erase previous misconfiguration */
-	if (np->driver_data & DEV_HAS_POWER_CNTRL)
-		nv_mac_reset(dev);
-	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
-	writel(0, base + NvRegMulticastAddrB);
-	writel(0, base + NvRegMulticastMaskA);
-	writel(0, base + NvRegMulticastMaskB);
-	writel(0, base + NvRegPacketFilterFlags);
-
-	writel(0, base + NvRegTransmitterControl);
-	writel(0, base + NvRegReceiverControl);
-
-	writel(0, base + NvRegAdapterControl);
-
-	if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE)
-		writel(NVREG_TX_PAUSEFRAME_DISABLE,  base + NvRegTxPauseFrame);
-
-	/* initialize descriptor rings */
-	set_bufsize(dev);
-	oom = nv_init_ring(dev);
-
-	writel(0, base + NvRegLinkSpeed);
-	writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
-	nv_txrx_reset(dev);
-	writel(0, base + NvRegUnknownSetupReg6);
-
-	np->in_shutdown = 0;
-
-	/* give hw rings */
-	setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
-	writel( ((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
-		base + NvRegRingSizes);
-
-	writel(np->linkspeed, base + NvRegLinkSpeed);
-	if (np->desc_ver == DESC_VER_1)
-		writel(NVREG_TX_WM_DESC1_DEFAULT, base + NvRegTxWatermark);
-	else
-		writel(NVREG_TX_WM_DESC2_3_DEFAULT, base + NvRegTxWatermark);
-	writel(np->txrxctl_bits, base + NvRegTxRxControl);
-	writel(np->vlanctl_bits, base + NvRegVlanControl);
-	pci_push(base);
-	writel(NVREG_TXRXCTL_BIT1|np->txrxctl_bits, base + NvRegTxRxControl);
-	reg_delay(dev, NvRegUnknownSetupReg5, NVREG_UNKSETUP5_BIT31, NVREG_UNKSETUP5_BIT31,
-			NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX,
-			KERN_INFO "open: SetupReg5, Bit 31 remained off\n");
-
-	writel(0, base + NvRegUnknownSetupReg4);
-	writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-	writel(NVREG_MIISTAT_MASK2, base + NvRegMIIStatus);
-
-	writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1);
-	writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus);
-	writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags);
-	writel(np->rx_buf_sz, base + NvRegOffloadConfig);
-
-	writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);
-	get_random_bytes(&i, sizeof(i));
-	writel(NVREG_RNDSEED_FORCE | (i&NVREG_RNDSEED_MASK), base + NvRegRandomSeed);
-	writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral);
-	writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral);
-	if (poll_interval == -1) {
-		if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT)
-			writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval);
-		else
-			writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
-	}
-	else
-		writel(poll_interval & 0xFFFF, base + NvRegPollingInterval);
-	writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
-	writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING,
-			base + NvRegAdapterControl);
-	writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed);
-	writel(NVREG_UNKSETUP4_VAL, base + NvRegUnknownSetupReg4);
-	if (np->wolenabled)
-		writel(NVREG_WAKEUPFLAGS_ENABLE , base + NvRegWakeUpFlags);
-
-	i = readl(base + NvRegPowerState);
-	if ( (i & NVREG_POWERSTATE_POWEREDUP) == 0)
-		writel(NVREG_POWERSTATE_POWEREDUP|i, base + NvRegPowerState);
-
-	pci_push(base);
-	udelay(10);
-	writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID, base + NvRegPowerState);
-
-	nv_disable_hw_interrupts(dev, np->irqmask);
-	pci_push(base);
-	writel(NVREG_MIISTAT_MASK2, base + NvRegMIIStatus);
-	writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
-	pci_push(base);
-
-	if (nv_request_irq(dev, 0)) {
-		goto out_drain;
-	}
-
-	/* ask for interrupts */
-	nv_enable_hw_interrupts(dev, np->irqmask);
-
-	spin_lock_irq(&np->lock);
-	writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
-	writel(0, base + NvRegMulticastAddrB);
-	writel(0, base + NvRegMulticastMaskA);
-	writel(0, base + NvRegMulticastMaskB);
-	writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);
-	/* One manual link speed update: Interrupts are enabled, future link
-	 * speed changes cause interrupts and are handled by nv_link_irq().
-	 */
-	{
-		u32 miistat;
-		miistat = readl(base + NvRegMIIStatus);
-		writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
-		dprintk(KERN_INFO "startup: got 0x%08x.\n", miistat);
-	}
-	/* set linkspeed to invalid value, thus force nv_update_linkspeed
-	 * to init hw */
-	np->linkspeed = 0;
-	ret = nv_update_linkspeed(dev);
-	nv_start_rx(dev);
-	nv_start_tx(dev);
-	netif_start_queue(dev);
-	netif_poll_enable(dev);
-
-	if (ret) {
-		netif_carrier_on(dev);
-	} else {
-		printk("%s: no link during initialization.\n", dev->name);
-		netif_carrier_off(dev);
-	}
-	if (oom)
-		mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
-
-	/* start statistics timer */
-	if (np->driver_data & DEV_HAS_STATISTICS)
-		mod_timer(&np->stats_poll, jiffies + STATS_INTERVAL);
-
-	spin_unlock_irq(&np->lock);
-
-	return 0;
-out_drain:
-	drain_ring(dev);
-	return ret;
-}
-
-static int nv_close(struct net_device *dev)
-{
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base;
-
-	spin_lock_irq(&np->lock);
-	np->in_shutdown = 1;
-	spin_unlock_irq(&np->lock);
-	netif_poll_disable(dev);
-	synchronize_irq(dev->irq);
-
-	del_timer_sync(&np->oom_kick);
-	del_timer_sync(&np->nic_poll);
-	del_timer_sync(&np->stats_poll);
-
-	netif_stop_queue(dev);
-	spin_lock_irq(&np->lock);
-	nv_stop_tx(dev);
-	nv_stop_rx(dev);
-	nv_txrx_reset(dev);
-
-	/* disable interrupts on the nic or we will lock up */
-	base = get_hwbase(dev);
-	nv_disable_hw_interrupts(dev, np->irqmask);
-	pci_push(base);
-	dprintk(KERN_INFO "%s: Irqmask is zero again\n", dev->name);
-
-	spin_unlock_irq(&np->lock);
-
-	nv_free_irq(dev);
-
-	drain_ring(dev);
-
-	if (np->wolenabled)
-		nv_start_rx(dev);
-
-	/* FIXME: power down nic */
-
-	return 0;
-}
-
-static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
-{
-	struct net_device *dev;
-	struct fe_priv *np;
-	unsigned long addr;
-	u8 __iomem *base;
-	int err, i;
-	u32 powerstate, txreg;
-
-	dev = alloc_etherdev(sizeof(struct fe_priv));
-	err = -ENOMEM;
-	if (!dev)
-		goto out;
-
-	np = netdev_priv(dev);
-	np->pci_dev = pci_dev;
-	spin_lock_init(&np->lock);
-	SET_MODULE_OWNER(dev);
-	SET_NETDEV_DEV(dev, &pci_dev->dev);
-
-	init_timer(&np->oom_kick);
-	np->oom_kick.data = (unsigned long) dev;
-	np->oom_kick.function = &nv_do_rx_refill;	/* timer handler */
-	init_timer(&np->nic_poll);
-	np->nic_poll.data = (unsigned long) dev;
-	np->nic_poll.function = &nv_do_nic_poll;	/* timer handler */
-	init_timer(&np->stats_poll);
-	np->stats_poll.data = (unsigned long) dev;
-	np->stats_poll.function = &nv_do_stats_poll;	/* timer handler */
-
-	err = pci_enable_device(pci_dev);
-	if (err) {
-		printk(KERN_INFO "forcedeth: pci_enable_dev failed (%d) for device %s\n",
-				err, pci_name(pci_dev));
-		goto out_free;
-	}
-
-	pci_set_master(pci_dev);
-
-	err = pci_request_regions(pci_dev, DRV_NAME);
-	if (err < 0)
-		goto out_disable;
-
-	if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS))
-		np->register_size = NV_PCI_REGSZ_VER2;
-	else
-		np->register_size = NV_PCI_REGSZ_VER1;
-
-	err = -EINVAL;
-	addr = 0;
-	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
-		dprintk(KERN_DEBUG "%s: resource %d start %p len %ld flags 0x%08lx.\n",
-				pci_name(pci_dev), i, (void*)pci_resource_start(pci_dev, i),
-				pci_resource_len(pci_dev, i),
-				pci_resource_flags(pci_dev, i));
-		if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM &&
-				pci_resource_len(pci_dev, i) >= np->register_size) {
-			addr = pci_resource_start(pci_dev, i);
-			break;
-		}
-	}
-	if (i == DEVICE_COUNT_RESOURCE) {
-		printk(KERN_INFO "forcedeth: Couldn't find register window for device %s.\n",
-					pci_name(pci_dev));
-		goto out_relreg;
-	}
-
-	/* copy of driver data */
-	np->driver_data = id->driver_data;
-
-	/* handle different descriptor versions */
-	if (id->driver_data & DEV_HAS_HIGH_DMA) {
-		/* packet format 3: supports 40-bit addressing */
-		np->desc_ver = DESC_VER_3;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_3;
-		if (dma_64bit) {
-			if (pci_set_dma_mask(pci_dev, DMA_39BIT_MASK)) {
-				printk(KERN_INFO "forcedeth: 64-bit DMA failed, using 32-bit addressing for device %s.\n",
-				       pci_name(pci_dev));
-			} else {
-				dev->features |= NETIF_F_HIGHDMA;
-				printk(KERN_INFO "forcedeth: using HIGHDMA\n");
-			}
-			if (pci_set_consistent_dma_mask(pci_dev, DMA_39BIT_MASK)) {
-				printk(KERN_INFO "forcedeth: 64-bit DMA (consistent) failed, using 32-bit ring buffers for device %s.\n",
-				       pci_name(pci_dev));
-			}
-		}
-	} else if (id->driver_data & DEV_HAS_LARGEDESC) {
-		/* packet format 2: supports jumbo frames */
-		np->desc_ver = DESC_VER_2;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_2;
-	} else {
-		/* original packet format */
-		np->desc_ver = DESC_VER_1;
-		np->txrxctl_bits = NVREG_TXRXCTL_DESC_1;
-	}
-
-	np->pkt_limit = NV_PKTLIMIT_1;
-	if (id->driver_data & DEV_HAS_LARGEDESC)
-		np->pkt_limit = NV_PKTLIMIT_2;
-
-	if (id->driver_data & DEV_HAS_CHECKSUM) {
-		np->rx_csum = 1;
-		np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK;
-		dev->features |= NETIF_F_HW_CSUM | NETIF_F_SG;
-#ifdef NETIF_F_TSO
-		dev->features |= NETIF_F_TSO;
-#endif
- 	}
-
-	np->vlanctl_bits = 0;
-	if (id->driver_data & DEV_HAS_VLAN) {
-		np->vlanctl_bits = NVREG_VLANCONTROL_ENABLE;
-		dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX;
-		dev->vlan_rx_register = nv_vlan_rx_register;
-		dev->vlan_rx_kill_vid = nv_vlan_rx_kill_vid;
-	}
-
-	np->msi_flags = 0;
-	if ((id->driver_data & DEV_HAS_MSI) && msi) {
-		np->msi_flags |= NV_MSI_CAPABLE;
-	}
-	if ((id->driver_data & DEV_HAS_MSI_X) && msix) {
-		np->msi_flags |= NV_MSI_X_CAPABLE;
-	}
-
-	np->pause_flags = NV_PAUSEFRAME_RX_CAPABLE | NV_PAUSEFRAME_RX_REQ | NV_PAUSEFRAME_AUTONEG;
-	if (id->driver_data & DEV_HAS_PAUSEFRAME_TX) {
-		np->pause_flags |= NV_PAUSEFRAME_TX_CAPABLE | NV_PAUSEFRAME_TX_REQ;
-	}
-
-
-	err = -ENOMEM;
-	np->base = ioremap(addr, np->register_size);
-	if (!np->base)
-		goto out_relreg;
-	dev->base_addr = (unsigned long)np->base;
-
-	dev->irq = pci_dev->irq;
-
-	np->rx_ring_size = RX_RING_DEFAULT;
-	np->tx_ring_size = TX_RING_DEFAULT;
-	np->tx_limit_stop = np->tx_ring_size - TX_LIMIT_DIFFERENCE;
-	np->tx_limit_start = np->tx_ring_size - TX_LIMIT_DIFFERENCE - 1;
-
-	if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2) {
-		np->rx_ring.orig = pci_alloc_consistent(pci_dev,
-					sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size),
-					&np->ring_addr);
-		if (!np->rx_ring.orig)
-			goto out_unmap;
-		np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size];
-	} else {
-		np->rx_ring.ex = pci_alloc_consistent(pci_dev,
-					sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size),
-					&np->ring_addr);
-		if (!np->rx_ring.ex)
-			goto out_unmap;
-		np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size];
-	}
-	np->rx_skbuff = kmalloc(sizeof(struct sk_buff*) * np->rx_ring_size, GFP_KERNEL);
-	np->rx_dma = kmalloc(sizeof(dma_addr_t) * np->rx_ring_size, GFP_KERNEL);
-	np->tx_skbuff = kmalloc(sizeof(struct sk_buff*) * np->tx_ring_size, GFP_KERNEL);
-	np->tx_dma = kmalloc(sizeof(dma_addr_t) * np->tx_ring_size, GFP_KERNEL);
-	np->tx_dma_len = kmalloc(sizeof(unsigned int) * np->tx_ring_size, GFP_KERNEL);
-	if (!np->rx_skbuff || !np->rx_dma || !np->tx_skbuff || !np->tx_dma || !np->tx_dma_len)
-		goto out_freering;
-	memset(np->rx_skbuff, 0, sizeof(struct sk_buff*) * np->rx_ring_size);
-	memset(np->rx_dma, 0, sizeof(dma_addr_t) * np->rx_ring_size);
-	memset(np->tx_skbuff, 0, sizeof(struct sk_buff*) * np->tx_ring_size);
-	memset(np->tx_dma, 0, sizeof(dma_addr_t) * np->tx_ring_size);
-	memset(np->tx_dma_len, 0, sizeof(unsigned int) * np->tx_ring_size);
-
-	dev->open = nv_open;
-	dev->stop = nv_close;
-	dev->hard_start_xmit = nv_start_xmit;
-	dev->get_stats = nv_get_stats;
-	dev->change_mtu = nv_change_mtu;
-	dev->set_mac_address = nv_set_mac_address;
-	dev->set_multicast_list = nv_set_multicast;
-#ifdef CONFIG_NET_POLL_CONTROLLER
-	dev->poll_controller = nv_poll_controller;
-#endif
-	dev->weight = 64;
-#ifdef CONFIG_FORCEDETH_NAPI
-	dev->poll = nv_napi_poll;
-#endif
-	SET_ETHTOOL_OPS(dev, &ops);
-	dev->tx_timeout = nv_tx_timeout;
-	dev->watchdog_timeo = NV_WATCHDOG_TIMEO;
-
-	pci_set_drvdata(pci_dev, dev);
-
-	/* read the mac address */
-	base = get_hwbase(dev);
-	np->orig_mac[0] = readl(base + NvRegMacAddrA);
-	np->orig_mac[1] = readl(base + NvRegMacAddrB);
-
-	/* check the workaround bit for correct mac address order */
-	txreg = readl(base + NvRegTransmitPoll);
-	if (txreg & NVREG_TRANSMITPOLL_MAC_ADDR_REV) {
-		/* mac address is already in correct order */
-		dev->dev_addr[0] = (np->orig_mac[0] >>  0) & 0xff;
-		dev->dev_addr[1] = (np->orig_mac[0] >>  8) & 0xff;
-		dev->dev_addr[2] = (np->orig_mac[0] >> 16) & 0xff;
-		dev->dev_addr[3] = (np->orig_mac[0] >> 24) & 0xff;
-		dev->dev_addr[4] = (np->orig_mac[1] >>  0) & 0xff;
-		dev->dev_addr[5] = (np->orig_mac[1] >>  8) & 0xff;
-	} else {
-		/* need to reverse mac address to correct order */
-		dev->dev_addr[0] = (np->orig_mac[1] >>  8) & 0xff;
-		dev->dev_addr[1] = (np->orig_mac[1] >>  0) & 0xff;
-		dev->dev_addr[2] = (np->orig_mac[0] >> 24) & 0xff;
-		dev->dev_addr[3] = (np->orig_mac[0] >> 16) & 0xff;
-		dev->dev_addr[4] = (np->orig_mac[0] >>  8) & 0xff;
-		dev->dev_addr[5] = (np->orig_mac[0] >>  0) & 0xff;
-		/* set permanent address to be correct aswell */
-		np->orig_mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) +
-			(dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24);
-		np->orig_mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8);
-		writel(txreg|NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
-	}
-	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
-
-	if (!is_valid_ether_addr(dev->perm_addr)) {
-		/*
-		 * Bad mac address. At least one bios sets the mac address
-		 * to 01:23:45:67:89:ab
-		 */
-		printk(KERN_ERR "%s: Invalid Mac address detected: %02x:%02x:%02x:%02x:%02x:%02x\n",
-			pci_name(pci_dev),
-			dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
-			dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
-		printk(KERN_ERR "Please complain to your hardware vendor. Switching to a random MAC.\n");
-		dev->dev_addr[0] = 0x00;
-		dev->dev_addr[1] = 0x00;
-		dev->dev_addr[2] = 0x6c;
-		get_random_bytes(&dev->dev_addr[3], 3);
-	}
-
-	dprintk(KERN_DEBUG "%s: MAC Address %02x:%02x:%02x:%02x:%02x:%02x\n", pci_name(pci_dev),
-			dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
-			dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
-
-	/* set mac address */
-	nv_copy_mac_to_hw(dev);
-
-	/* disable WOL */
-	writel(0, base + NvRegWakeUpFlags);
-	np->wolenabled = 0;
-
-	if (id->driver_data & DEV_HAS_POWER_CNTRL) {
-		u8 revision_id;
-		pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id);
-
-		/* take phy and nic out of low power mode */
-		powerstate = readl(base + NvRegPowerState2);
-		powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK;
-		if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 ||
-		     id->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) &&
-		    revision_id >= 0xA3)
-			powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3;
-		writel(powerstate, base + NvRegPowerState2);
-	}
-
-	if (np->desc_ver == DESC_VER_1) {
-		np->tx_flags = NV_TX_VALID;
-	} else {
-		np->tx_flags = NV_TX2_VALID;
-	}
-	if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT) {
-		np->irqmask = NVREG_IRQMASK_THROUGHPUT;
-		if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
-			np->msi_flags |= 0x0003;
-	} else {
-		np->irqmask = NVREG_IRQMASK_CPU;
-		if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
-			np->msi_flags |= 0x0001;
-	}
-
-	if (id->driver_data & DEV_NEED_TIMERIRQ)
-		np->irqmask |= NVREG_IRQ_TIMER;
-	if (id->driver_data & DEV_NEED_LINKTIMER) {
-		dprintk(KERN_INFO "%s: link timer on.\n", pci_name(pci_dev));
-		np->need_linktimer = 1;
-		np->link_timeout = jiffies + LINK_TIMEOUT;
-	} else {
-		dprintk(KERN_INFO "%s: link timer off.\n", pci_name(pci_dev));
-		np->need_linktimer = 0;
-	}
-
-	/* find a suitable phy */
-	for (i = 1; i <= 32; i++) {
-		int id1, id2;
-		int phyaddr = i & 0x1F;
-
-		spin_lock_irq(&np->lock);
-		id1 = mii_rw(dev, phyaddr, MII_PHYSID1, MII_READ);
-		spin_unlock_irq(&np->lock);
-		if (id1 < 0 || id1 == 0xffff)
-			continue;
-		spin_lock_irq(&np->lock);
-		id2 = mii_rw(dev, phyaddr, MII_PHYSID2, MII_READ);
-		spin_unlock_irq(&np->lock);
-		if (id2 < 0 || id2 == 0xffff)
-			continue;
-
-		np->phy_model = id2 & PHYID2_MODEL_MASK;
-		id1 = (id1 & PHYID1_OUI_MASK) << PHYID1_OUI_SHFT;
-		id2 = (id2 & PHYID2_OUI_MASK) >> PHYID2_OUI_SHFT;
-		dprintk(KERN_DEBUG "%s: open: Found PHY %04x:%04x at address %d.\n",
-			pci_name(pci_dev), id1, id2, phyaddr);
-		np->phyaddr = phyaddr;
-		np->phy_oui = id1 | id2;
-		break;
-	}
-	if (i == 33) {
-		printk(KERN_INFO "%s: open: Could not find a valid PHY.\n",
-		       pci_name(pci_dev));
-		goto out_error;
-	}
-
-	/* reset it */
-	phy_init(dev);
-
-	/* set default link speed settings */
-	np->linkspeed = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
-	np->duplex = 0;
-	np->autoneg = 1;
-
-	err = register_netdev(dev);
-	if (err) {
-		printk(KERN_INFO "forcedeth: unable to register netdev: %d\n", err);
-		goto out_error;
-	}
-	printk(KERN_INFO "%s: forcedeth.c: subsystem: %05x:%04x bound to %s\n",
-			dev->name, pci_dev->subsystem_vendor, pci_dev->subsystem_device,
-			pci_name(pci_dev));
-
-	return 0;
-
-out_error:
-	pci_set_drvdata(pci_dev, NULL);
-out_freering:
-	free_rings(dev);
-out_unmap:
-	iounmap(get_hwbase(dev));
-out_relreg:
-	pci_release_regions(pci_dev);
-out_disable:
-	pci_disable_device(pci_dev);
-out_free:
-	free_netdev(dev);
-out:
-	return err;
-}
-
-static void __devexit nv_remove(struct pci_dev *pci_dev)
-{
-	struct net_device *dev = pci_get_drvdata(pci_dev);
-	struct fe_priv *np = netdev_priv(dev);
-	u8 __iomem *base = get_hwbase(dev);
-
-	unregister_netdev(dev);
-
-	/* special op: write back the misordered MAC address - otherwise
-	 * the next nv_probe would see a wrong address.
-	 */
-	writel(np->orig_mac[0], base + NvRegMacAddrA);
-	writel(np->orig_mac[1], base + NvRegMacAddrB);
-
-	/* free all structures */
-	free_rings(dev);
-	iounmap(get_hwbase(dev));
-	pci_release_regions(pci_dev);
-	pci_disable_device(pci_dev);
-	free_netdev(dev);
-	pci_set_drvdata(pci_dev, NULL);
-}
-
-static struct pci_device_id pci_tbl[] = {
-	{	/* nForce Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_1),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce2 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_2),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_3),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_4),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_5),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_6),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* nForce3 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_7),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
-	},
-	{	/* CK804 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_8),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* CK804 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_9),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP04 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_10),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP04 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_11),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA,
-	},
-	{	/* MCP51 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL,
-	},
-	{	/* MCP51 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL,
-	},
-	{	/* MCP55 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP55 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP61 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_16),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP61 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_17),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP61 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_18),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP61 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_19),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP65 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_20),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP65 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_21),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP65 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_22),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{	/* MCP65 Ethernet Controller */
-		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_23),
-		.driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX|DEV_HAS_STATISTICS|DEV_HAS_TEST_EXTENDED,
-	},
-	{0,},
-};
-
-static struct pci_driver driver = {
-	.name = "forcedeth",
-	.id_table = pci_tbl,
-	.probe = nv_probe,
-	.remove = __devexit_p(nv_remove),
-};
-
-
-static int __init init_nic(void)
-{
-	printk(KERN_INFO "forcedeth.c: Reverse Engineered nForce ethernet driver. Version %s.\n", FORCEDETH_VERSION);
-	return pci_register_driver(&driver);
-}
-
-static void __exit exit_nic(void)
-{
-	pci_unregister_driver(&driver);
-}
-
-module_param(max_interrupt_work, int, 0);
-MODULE_PARM_DESC(max_interrupt_work, "forcedeth maximum events handled per interrupt");
-module_param(optimization_mode, int, 0);
-MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer.");
-module_param(poll_interval, int, 0);
-MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535.");
-module_param(msi, int, 0);
-MODULE_PARM_DESC(msi, "MSI interrupts are enabled by setting to 1 and disabled by setting to 0.");
-module_param(msix, int, 0);
-MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0.");
-module_param(dma_64bit, int, 0);
-MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0.");
-
-MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>");
-MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver");
-MODULE_LICENSE("GPL");
-
-MODULE_DEVICE_TABLE(pci, pci_tbl);
-
-module_init(init_nic);
-module_exit(exit_nic);
--- a/script/sysconfig/ethercat	Mon Jul 28 08:30:44 2008 +0000
+++ b/script/sysconfig/ethercat	Thu Oct 02 08:00:18 2008 +0000
@@ -38,11 +38,11 @@
 # and replace them with the EtherCAT-capable ones, respectively. If a certain
 # (EtherCAT-capable) driver is not found, a warning will appear.
 #
-# Possible values are "8139too", "e100", "e1000", and "forcedeth".
+# Possible values: 8139too, e100, e1000.
 # Separate multiple drivers with spaces.
 #
-# Note: The e100, e1000 and forcedeth drivers are not built by default. Enable
-# them with the --enable-<driver> configure switches.
+# Note: The e100 and e1000 drivers are not built by default. Enable them with
+# the --enable-<driver> configure switches.
 # 
 DEVICE_MODULES=""