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/******************************************************************************

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 *

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 *  $Id$

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 *

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 *  Copyright (C) 2006  Florian Pose, Ingenieurgemeinschaft IgH

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 *

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 *  This file is part of the IgH EtherCAT Master.

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 *

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 *  The IgH EtherCAT Master is free software; you can redistribute it

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 *  and/or modify it under the terms of the GNU General Public License

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 *  as published by the Free Software Foundation; either version 2 of the

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 *  License, or (at your option) any later version.

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 *

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 *  The IgH EtherCAT Master is distributed in the hope that it will be

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 *  useful, but WITHOUT ANY WARRANTY; without even the implied warranty of

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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

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 *  GNU General Public License for more details.

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 *

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 *  You should have received a copy of the GNU General Public License

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 *  along with the IgH EtherCAT Master; if not, write to the Free Software

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 *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

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 *

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 *  The right to use EtherCAT Technology is granted and comes free of

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 *  charge under condition of compatibility of product made by

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 *  Licensee. People intending to distribute/sell products based on the

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 *  code, have to sign an agreement to guarantee that products using

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 *  software based on IgH EtherCAT master stay compatible with the actual

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 *  EtherCAT specification (which are released themselves as an open

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 *  standard) as the (only) precondition to have the right to use EtherCAT

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 *  Technology, IP and trade marks.

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 *

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 *****************************************************************************/

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#include <linux/module.h>

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#include <linux/timer.h>

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#include <linux/spinlock.h>

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#include <linux/interrupt.h>

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#include "../../include/ecrt.h" // EtherCAT realtime interface

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#include "../../include/ecdb.h" // EtherCAT slave database

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#define PFX "ec_mini: "

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#define FREQUENCY 100

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#define CONFIGURE_MAPPING

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#define EXTERNAL_MEMORY

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/*****************************************************************************/

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static struct timer_list timer;

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// EtherCAT

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static ec_master_t *master = NULL;

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static ec_master_state_t master_state = {};

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spinlock_t master_lock = SPIN_LOCK_UNLOCKED;

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static ec_domain_t *domain1 = NULL;

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static ec_domain_state_t domain1_state = {};

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#ifdef CONFIGURE_MAPPING

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const ec_pdo_entry_info_t el3162_channel1[] = {

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    {0x3101, 1,  8}, // status

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    {0x3101, 2, 16}  // value

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};

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const ec_pdo_entry_info_t el3162_channel2[] = {

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    {0x3102, 1,  8}, // status

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    {0x3102, 2, 16}  // value

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};

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const ec_pdo_info_t el3162_mapping[] = {

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    {EC_DIR_INPUT, 0x1A00, 2, el3162_channel1},

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    {EC_DIR_INPUT, 0x1A01, 2, el3162_channel2},

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};

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const ec_pdo_entry_info_t el2004_channels[] = {

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    {0x3001, 1, 1}, // Value 1

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    {0x3001, 2, 1}, // Value 2

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    {0x3001, 3, 1}, // Value 3

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    {0x3001, 4, 1}  // Value 4

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};

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const ec_pdo_info_t el2004_mapping[] = {

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    {EC_DIR_OUTPUT, 0x1600, 1, &el2004_channels[0]},

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    {EC_DIR_OUTPUT, 0x1601, 1, &el2004_channels[1]},

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    {EC_DIR_OUTPUT, 0x1602, 1, &el2004_channels[2]},

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    {EC_DIR_OUTPUT, 0x1603, 1, &el2004_channels[3]},

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};

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#endif

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static uint8_t *pd; /**< Process data. */

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static unsigned int off_ana_in;

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static unsigned int off_dig_out;

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const static ec_pdo_entry_reg_t domain1_regs[] = {

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    {0, 1, Beckhoff_EL3162, 0x3101, 2, &off_ana_in},

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    {0, 3, Beckhoff_EL2004, 0x3001, 1, &off_dig_out},

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    {}

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};

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/*****************************************************************************/

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void check_domain1_state(void)

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{

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    ec_domain_state_t ds;

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    ecrt_domain_state(domain1, &ds);

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    if (ds.working_counter != domain1_state.working_counter)

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        printk(KERN_INFO PFX "domain1 working_counter changed to %u.\n",

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                ds.working_counter);

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    if (ds.wc_state != domain1_state.wc_state)

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        printk(KERN_INFO PFX "domain1 wc_state changed to %u.\n",

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                ds.wc_state);

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    domain1_state = ds;

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}

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/*****************************************************************************/

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void check_master_state(void)

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{

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    ec_master_state_t ms;

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    spin_lock(&master_lock);

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    ecrt_master_state(master, &ms);

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    spin_unlock(&master_lock);

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    if (ms.bus_state != master_state.bus_state) {

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        printk(KERN_INFO PFX "bus state changed to %i.\n", ms.bus_state);

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    }

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    if (ms.bus_tainted != master_state.bus_tainted) {

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        printk(KERN_INFO PFX "tainted flag changed to %u.\n",

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                ms.bus_tainted);

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    }

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    if (ms.slaves_responding != master_state.slaves_responding) {

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        printk(KERN_INFO PFX "slaves_responding changed to %u.\n",

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                ms.slaves_responding);

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    }

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    master_state = ms;

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}

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/*****************************************************************************/

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void run(unsigned long data)

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{

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    static unsigned int counter = 0;

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    static unsigned int blink = 0;

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    // receive process data

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    spin_lock(&master_lock);

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    ecrt_master_receive(master);

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    ecrt_domain_process(domain1);

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    spin_unlock(&master_lock);

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    // check process data state (optional)

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    check_domain1_state();

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    if (counter) {

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        counter--;

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    } else { // do this at FREQUENCY

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        counter = FREQUENCY;

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        // calculate new process data

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        blink = !blink;

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        // check for master state (optional)

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        check_master_state();

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    }

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    // write process data

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    EC_WRITE_U8(pd + off_dig_out, blink ? 0x0F : 0x00);

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    // send process data

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    spin_lock(&master_lock);

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    ecrt_domain_queue(domain1);

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    ecrt_master_send(master);

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    spin_unlock(&master_lock);

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    // restart timer

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    timer.expires += HZ / FREQUENCY;

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    add_timer(&timer);

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}

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/*****************************************************************************/

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int request_lock(void *data)

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{

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    spin_lock(&master_lock);

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    return 0; // access allowed

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}

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/*****************************************************************************/

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void release_lock(void *data)

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{

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    spin_unlock(&master_lock);

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}

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/*****************************************************************************/

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int __init init_mini_module(void)

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{

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#ifdef CONFIGURE_MAPPING

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    ec_slave_config_t *sc;

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#endif

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#ifdef EXTERNAL_MEMORY

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    unsigned int size;

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#endif

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    printk(KERN_INFO PFX "Starting...\n");

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    if (!(master = ecrt_request_master(0))) {

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        printk(KERN_ERR PFX "Requesting master 0 failed!\n");

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        goto out_return;

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    }

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    ecrt_master_callbacks(master, request_lock, release_lock, NULL);

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    printk(KERN_INFO PFX "Registering domain...\n");

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    if (!(domain1 = ecrt_master_create_domain(master))) {

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        printk(KERN_ERR PFX "Domain creation failed!\n");

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        goto out_release_master;

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    }

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#ifdef CONFIGURE_MAPPING

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    printk(KERN_INFO PFX "Configuring Pdo mapping...\n");

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    if (!(sc = ecrt_master_slave_config(master, 0, 1, Beckhoff_EL3162))) {

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        printk(KERN_ERR PFX "Failed to get slave configuration.\n");

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        goto out_release_master;

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    }

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    if (ecrt_slave_config_mapping(sc, 2, el3162_mapping)) {

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        printk(KERN_ERR PFX "Failed to configure Pdo mapping.\n");

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        goto out_release_master;

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    }

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    if (!(sc = ecrt_master_slave_config(master, 0, 3, Beckhoff_EL2004))) {

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        printk(KERN_ERR PFX "Failed to get slave configuration.\n");

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        goto out_release_master;

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    }

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    if (ecrt_slave_config_mapping(sc, 4, el2004_mapping)) {

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        printk(KERN_ERR PFX "Failed to configure Pdo mapping.\n");

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        goto out_release_master;

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    }

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#endif

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    printk(KERN_INFO PFX "Registering Pdo entries...\n");

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    if (ecrt_domain_reg_pdo_entry_list(domain1, domain1_regs)) {

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        printk(KERN_ERR PFX "Pdo entry registration failed!\n");

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        goto out_release_master;

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    }

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#ifdef EXTERNAL_MEMORY

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    if ((size = ecrt_domain_size(domain1))) {

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        if (!(pd = (uint8_t *) kmalloc(size, GFP_KERNEL))) {

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            printk(KERN_ERR PFX "Failed to allocate %u bytes of process data"

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                    " memory!\n", size);

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            goto out_release_master;

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        }

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        ecrt_domain_external_memory(domain1, pd);

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    }

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#endif

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    printk(KERN_INFO PFX "Activating master...\n");

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    if (ecrt_master_activate(master)) {

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        printk(KERN_ERR PFX "Failed to activate master!\n");

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#ifdef EXTERNAL_MEMORY

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        goto out_free_process_data;

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#else

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        goto out_release_master;

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#endif

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    }

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#ifndef EXTERNAL_MEMORY

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    // Get internal process data for domain

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    pd = ecrt_domain_data(domain1);

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#endif

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    printk(KERN_INFO PFX "Starting cyclic sample thread.\n");

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    init_timer(&timer);

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    timer.function = run;

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    timer.expires = jiffies + 10;

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    add_timer(&timer);

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    printk(KERN_INFO PFX "Started.\n");

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    return 0;

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#ifdef EXTERNAL_MEMORY

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out_free_process_data:

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    kfree(pd);

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#endif

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out_release_master:

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    printk(KERN_ERR PFX "Releasing master...\n");

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    ecrt_release_master(master);

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out_return:

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    printk(KERN_ERR PFX "Failed to load. Aborting.\n");

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    return -1;

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}

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/*****************************************************************************/

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void __exit cleanup_mini_module(void)

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{

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    printk(KERN_INFO PFX "Stopping...\n");

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    del_timer_sync(&timer);

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#ifdef EXTERNAL_MEMORY

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    kfree(pd);

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#endif

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    printk(KERN_INFO PFX "Releasing master...\n");

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    ecrt_release_master(master);

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    printk(KERN_INFO PFX "Unloading.\n");

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}

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/*****************************************************************************/

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MODULE_LICENSE("GPL");

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MODULE_AUTHOR("Florian Pose <fp@igh-essen.com>");

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MODULE_DESCRIPTION("EtherCAT minimal test environment");

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module_init(init_mini_module);

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module_exit(cleanup_mini_module);

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/*****************************************************************************/