1

/**

     2

    Network Driver for Beckhoff CCAT communication controller

     3

    Copyright (C) 2014  Beckhoff Automation GmbH

     4

    Author: Patrick Bruenn <p.bruenn@beckhoff.com>

     5

     6

    This program is free software; you can redistribute it and/or modify

     7

    it under the terms of the GNU General Public License as published by

     8

    the Free Software Foundation; either version 2 of the License, or

     9

    (at your option) any later version.

    10

    11

    This program is distributed in the hope that it will be useful,

    12

    but WITHOUT ANY WARRANTY; without even the implied warranty of

    13

    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    14

    GNU General Public License for more details.

    15

    16

    You should have received a copy of the GNU General Public License along

    17

    with this program; if not, write to the Free Software Foundation, Inc.,

    18

    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.

    19

*/

    20

    21

#include <linux/fs.h>

    22

#include <linux/kernel.h>

    23

#include <linux/module.h>

    24

#include <linux/sched.h>

    25

#include <linux/uaccess.h>

    26

#include "compat.h"

    27

#include "module.h"

    28

#include "update.h"

    29

    30

#define CCAT_DATA_IN_4 0x038

    31

#define CCAT_DATA_IN_N 0x7F0

    32

#define CCAT_DATA_OUT_4 0x030

    33

#define CCAT_DATA_BLOCK_SIZE (size_t)((CCAT_DATA_IN_N - CCAT_DATA_IN_4)/8)

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#define CCAT_WRITE_BLOCK_SIZE 128

    35

#define CCAT_FLASH_SIZE (size_t)0xE0000

    36

    37

/**     FUNCTION_NAME            CMD,  CLOCKS          */

    38

#define CCAT_BULK_ERASE          0xE3, 8

    39

#define CCAT_GET_PROM_ID         0xD5, 40

    40

#define CCAT_READ_FLASH          0xC0, 32

    41

#define CCAT_READ_STATUS         0xA0, 16

    42

#define CCAT_WRITE_ENABLE        0x60, 8

    43

#define CCAT_WRITE_FLASH         0x40, 32

    44

    45

/* from http://graphics.stanford.edu/~seander/bithacks.html#ReverseByteWith32Bits */

    46

#define SWAP_BITS(B) \

    47

	((((B) * 0x0802LU & 0x22110LU) | ((B) * 0x8020LU & 0x88440LU)) * 0x10101LU >> 16)

    48

    49

/**

    50

 * struct update_buffer - keep track of a CCAT FPGA update

    51

 * @update: pointer to a valid ccat_update object

    52

 * @data: buffer used for write operations

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 * @size: number of bytes written to the data buffer, if 0 on ccat_update_release() no data will be written to FPGA

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 */

    55

struct update_buffer {

    56

	struct ccat_update *update;

    57

	char data[CCAT_FLASH_SIZE];

    58

	size_t size;

    59

};

    60

    61

static void ccat_wait_status_cleared(void __iomem * const ioaddr);

    62

static int ccat_read_flash(void __iomem * const ioaddr, char __user * buf,

    63

			   u32 len, loff_t * off);

    64

static void ccat_write_flash(const struct update_buffer *const buf);

    65

static void ccat_update_cmd(void __iomem * const ioaddr, u8 cmd, u16 clocks);

    66

static void ccat_update_destroy(struct kref *ref);

    67

    68

/**

    69

 * wait_until_busy_reset() - wait until the busy flag was reset

    70

 * @ioaddr: address of the CCAT Update function in PCI config space

    71

 */

    72

static inline void wait_until_busy_reset(void __iomem * const ioaddr)

    73

{

    74

	wmb();

    75

	while (ioread8(ioaddr + 1)) {

    76

		schedule();

    77

	}

    78

}

    79

    80

static int ccat_update_open(struct inode *const i, struct file *const f)

    81

{

    82

	struct ccat_update *update =

    83

	    container_of(i->i_cdev, struct ccat_update, cdev);

    84

	struct update_buffer *buf;

    85

    86

	kref_get(&update->refcount);

    87

	if (atomic_read(&update->refcount.refcount) > 2) {

    88

		kref_put(&update->refcount, ccat_update_destroy);

    89

		return -EBUSY;

    90

	}

    91

    92

	buf = kzalloc(sizeof(*buf), GFP_KERNEL);

    93

	if (!buf) {

    94

		kref_put(&update->refcount, ccat_update_destroy);

    95

		return -ENOMEM;

    96

	}

    97

    98

	buf->update = update;

    99

	f->private_data = buf;

   100

	return 0;

   101

}

   102

   103

static int ccat_update_release(struct inode *const i, struct file *const f)

   104

{

   105

	const struct update_buffer *const buf = f->private_data;

   106

	struct ccat_update *const update = buf->update;

   107

   108

	if (buf->size > 0) {

   109

		ccat_update_cmd(update->ioaddr, CCAT_WRITE_ENABLE);

   110

		ccat_update_cmd(update->ioaddr, CCAT_BULK_ERASE);

   111

		ccat_wait_status_cleared(update->ioaddr);

   112

		ccat_write_flash(buf);

   113

	}

   114

	kfree(f->private_data);

   115

	kref_put(&update->refcount, ccat_update_destroy);

   116

	return 0;

   117

}

   118

   119

/**

   120

 * ccat_update_read() - Read CCAT configuration data from flash

   121

 * @f: file handle previously initialized with ccat_update_open()

   122

 * @buf: buffer in user space provided for our data

   123

 * @len: length of the user space buffer

   124

 * @off: current offset of our file operation

   125

 *

   126

 * Copies data from the CCAT FPGA's configuration flash to user space.

   127

 * Note that the size of the FPGA's firmware is not known exactly so it

   128

 * is very possible that the overall buffer ends with a lot of 0xff.

   129

 *

   130

 * Return: the number of bytes written, or 0 if EOF reached

   131

 */

   132

static ssize_t ccat_update_read(struct file *const f, char __user * buf,

   133

				size_t len, loff_t * off)

   134

{

   135

	struct update_buffer *update = f->private_data;

   136

   137

	if (!buf || !off) {

   138

		return -EINVAL;

   139

	}

   140

	if (*off >= CCAT_FLASH_SIZE) {

   141

		return 0;

   142

	}

   143

	if (*off + len >= CCAT_FLASH_SIZE) {

   144

		len = CCAT_FLASH_SIZE - *off;

   145

	}

   146

	return ccat_read_flash(update->update->ioaddr, buf, len, off);

   147

}

   148

   149

/**

   150

 * ccat_update_write() - Write data to the CCAT FPGA's configuration flash

   151

 * @f: file handle previously initialized with ccat_update_open()

   152

 * @buf: buffer in user space providing the new configuration data (from *.rbf)

   153

 * @len: length of the user space buffer

   154

 * @off: current offset in the configuration data

   155

 *

   156

 * Copies data from user space (possibly a *.rbf) to the CCAT FPGA's

   157

 * configuration flash to user space.

   158

 *

   159

 * Return: the number of bytes written, or 0 if flash end is reached

   160

 */

   161

   162

static ssize_t ccat_update_write(struct file *const f, const char __user * buf,

   163

				 size_t len, loff_t * off)

   164

{

   165

	struct update_buffer *const update = f->private_data;

   166

   167

	if (*off + len > sizeof(update->data))

   168

		return 0;

   169

   170

	if (copy_from_user(update->data + *off, buf, len)) {

   171

		return -EFAULT;

   172

	}

   173

   174

	*off += len;

   175

	update->size = *off;

   176

	return len;

   177

}

   178

   179

static struct file_operations update_ops = {

   180

	.owner = THIS_MODULE,

   181

	.open = ccat_update_open,

   182

	.release = ccat_update_release,

   183

	.read = ccat_update_read,

   184

	.write = ccat_update_write,

   185

};

   186

   187

/**

   188

 * __ccat_update_cmd() - Helper to issue a FPGA flash command

   189

 * @ioaddr: address of the CCAT Update function in PCI config space

   190

 * @cmd: the command identifier

   191

 * @clocks: the number of clocks associated with the specified command

   192

 *

   193

 * no write memory barrier is called and the busy flag is not evaluated

   194

 */

   195

static inline void __ccat_update_cmd(void __iomem * const ioaddr, u8 cmd,

   196

				     u16 clocks)

   197

{

   198

	iowrite8((0xff00 & clocks) >> 8, ioaddr);

   199

	iowrite8(0x00ff & clocks, ioaddr + 0x8);

   200

	iowrite8(cmd, ioaddr + 0x10);

   201

}

   202

   203

/**

   204

 * ccat_update_cmd() - Helper to issue a FPGA flash command

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 * @ioaddr: address of the CCAT Update function in PCI config space

   206

 * @cmd: the command identifier

   207

 * @clocks: the number of clocks associated with the specified command

   208

 *

   209

 * Triggers a full flash command cycle with write memory barrier and

   210

 * command activate. This call blocks until the busy flag is reset.

   211

 */

   212

static inline void ccat_update_cmd(void __iomem * const ioaddr, u8 cmd,

   213

				   u16 clocks)

   214

{

   215

	__ccat_update_cmd(ioaddr, cmd, clocks);

   216

	wmb();

   217

	iowrite8(0xff, ioaddr + 0x7f8);

   218

	wait_until_busy_reset(ioaddr);

   219

}

   220

   221

/**

   222

 * ccat_update_cmd_addr() - Helper to issue a FPGA flash command with address parameter

   223

 * @ioaddr: address of the CCAT Update function in PCI config space

   224

 * @cmd: the command identifier

   225

 * @clocks: the number of clocks associated with the specified command

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 * @addr: 24 bit address associated with the specified command

   227

 *

   228

 * Triggers a full flash command cycle with write memory barrier and

   229

 * command activate. This call blocks until the busy flag is reset.

   230

 */

   231

static inline void ccat_update_cmd_addr(void __iomem * const ioaddr,

   232

					u8 cmd, u16 clocks, u32 addr)

   233

{

   234

	const u8 addr_0 = SWAP_BITS(addr & 0xff);

   235

	const u8 addr_1 = SWAP_BITS((addr & 0xff00) >> 8);

   236

	const u8 addr_2 = SWAP_BITS((addr & 0xff0000) >> 16);

   237

   238

	__ccat_update_cmd(ioaddr, cmd, clocks);

   239

	iowrite8(addr_2, ioaddr + 0x18);

   240

	iowrite8(addr_1, ioaddr + 0x20);

   241

	iowrite8(addr_0, ioaddr + 0x28);

   242

	wmb();

   243

	iowrite8(0xff, ioaddr + 0x7f8);

   244

	wait_until_busy_reset(ioaddr);

   245

}

   246

   247

/**

   248

 * ccat_get_prom_id() - Read CCAT PROM ID

   249

 * @ioaddr: address of the CCAT Update function in PCI config space

   250

 *

   251

 * Return: the CCAT FPGA's PROM identifier

   252

 */

   253

u8 ccat_get_prom_id(void __iomem * const ioaddr)

   254

{

   255

	ccat_update_cmd(ioaddr, CCAT_GET_PROM_ID);

   256

	return ioread8(ioaddr + 0x38);

   257

}

   258

   259

/**

   260

 * ccat_get_status() - Read CCAT Update status

   261

 * @ioaddr: address of the CCAT Update function in PCI config space

   262

 *

   263

 * Return: the current status of the CCAT Update function

   264

 */

   265

static u8 ccat_get_status(void __iomem * const ioaddr)

   266

{

   267

	ccat_update_cmd(ioaddr, CCAT_READ_STATUS);

   268

	return ioread8(ioaddr + 0x20);

   269

}

   270

   271

/**

   272

 * ccat_wait_status_cleared() - wait until CCAT status is cleared

   273

 * @ioaddr: address of the CCAT Update function in PCI config space

   274

 *

   275

 * Blocks until bit 7 of the CCAT Update status is reset

   276

 */

   277

static void ccat_wait_status_cleared(void __iomem * const ioaddr)

   278

{

   279

	u8 status;

   280

   281

	do {

   282

		status = ccat_get_status(ioaddr);

   283

	} while (status & (1 << 7));

   284

}

   285

   286

/**

   287

 * ccat_read_flash_block() - Read a block of CCAT configuration data from flash

   288

 * @ioaddr: address of the CCAT Update function in PCI config space

   289

 * @addr: 24 bit address of the block to read

   290

 * @len: number of bytes to read from this block, len <= CCAT_DATA_BLOCK_SIZE

   291

 * @buf: output buffer in user space

   292

 *

   293

 * Copies one block of configuration data from the CCAT FPGA's flash to

   294

 * the user space buffer.

   295

 * Note that the size of the FPGA's firmware is not known exactly so it

   296

 * is very possible that the overall buffer ends with a lot of 0xff.

   297

 *

   298

 * Return: the number of bytes copied

   299

 */

   300

static int ccat_read_flash_block(void __iomem * const ioaddr,

   301

				 const u32 addr, const u16 len,

   302

				 char __user * const buf)

   303

{

   304

	u16 i;

   305

	const u16 clocks = 8 * len;

   306

   307

	ccat_update_cmd_addr(ioaddr, CCAT_READ_FLASH + clocks, addr);

   308

	for (i = 0; i < len; i++) {

   309

		put_user(ioread8(ioaddr + CCAT_DATA_IN_4 + 8 * i), buf + i);

   310

	}

   311

	return len;

   312

}

   313

   314

/**

   315

 * ccat_read_flash() - Read a chunk of CCAT configuration data from flash

   316

 * @ioaddr: address of the CCAT Update function in PCI config space

   317

 * @buf: output buffer in user space

   318

 * @len: number of bytes to read

   319

 * @off: offset in the configuration data

   320

 *

   321

 * Copies multiple blocks of configuration data from the CCAT FPGA's

   322

 * flash to the user space buffer.

   323

 *

   324

 * Return: the number of bytes copied

   325

 */

   326

static int ccat_read_flash(void __iomem * const ioaddr, char __user * buf,

   327

			   u32 len, loff_t * off)

   328

{

   329

	const loff_t start = *off;

   330

   331

	while (len > CCAT_DATA_BLOCK_SIZE) {

   332

		*off +=

   333

		    ccat_read_flash_block(ioaddr, *off, CCAT_DATA_BLOCK_SIZE,

   334

					  buf);

   335

		buf += CCAT_DATA_BLOCK_SIZE;

   336

		len -= CCAT_DATA_BLOCK_SIZE;

   337

	}

   338

	*off += ccat_read_flash_block(ioaddr, *off, len, buf);

   339

	return *off - start;

   340

}

   341

   342

/**

   343

 * ccat_write_flash_block() - Write a block of CCAT configuration data to flash

   344

 * @ioaddr: address of the CCAT Update function in PCI config space

   345

 * @addr: 24 bit start address in the CCAT FPGA's flash

   346

 * @len: number of bytes to write in this block, len <= CCAT_WRITE_BLOCK_SIZE

   347

 * @buf: input buffer

   348

 *

   349

 * Copies one block of configuration data to the CCAT FPGA's flash

   350

 *

   351

 * Return: the number of bytes copied

   352

 */

   353

static int ccat_write_flash_block(void __iomem * const ioaddr,

   354

				  const u32 addr, const u16 len,

   355

				  const char *const buf)

   356

{

   357

	const u16 clocks = 8 * len;

   358

	u16 i;

   359

   360

	ccat_update_cmd(ioaddr, CCAT_WRITE_ENABLE);

   361

	for (i = 0; i < len; i++) {

   362

		iowrite8(buf[i], ioaddr + CCAT_DATA_OUT_4 + 8 * i);

   363

	}

   364

	ccat_update_cmd_addr(ioaddr, CCAT_WRITE_FLASH + clocks, addr);

   365

	ccat_wait_status_cleared(ioaddr);

   366

	return len;

   367

}

   368

   369

/**

   370

 * ccat_write_flash() - Write a new CCAT configuration to FPGA's flash

   371

 * @update: a CCAT Update buffer containing the new FPGA configuration

   372

 */

   373

static void ccat_write_flash(const struct update_buffer *const update)

   374

{

   375

	const char *buf = update->data;

   376

	u32 off = 0;

   377

	size_t len = update->size;

   378

   379

	while (len > CCAT_WRITE_BLOCK_SIZE) {

   380

		ccat_write_flash_block(update->update->ioaddr, off,

   381

				       (u16) CCAT_WRITE_BLOCK_SIZE, buf);

   382

		off += CCAT_WRITE_BLOCK_SIZE;

   383

		buf += CCAT_WRITE_BLOCK_SIZE;

   384

		len -= CCAT_WRITE_BLOCK_SIZE;

   385

	}

   386

	ccat_write_flash_block(update->update->ioaddr, off, (u16) len, buf);

   387

}

   388

   389

/**

   390

 * ccat_update_init() - Initialize the CCAT Update function

   391

 */

   392

struct ccat_update *ccat_update_init(const struct ccat_device *const ccatdev,

   393

				     void __iomem * const addr)

   394

{

   395

	struct ccat_update *const update = kzalloc(sizeof(*update), GFP_KERNEL);

   396

   397

	if (!update) {

   398

		return NULL;

   399

	}

   400

	kref_init(&update->refcount);

   401

	update->ioaddr = ccatdev->bar[0].ioaddr + ioread32(addr + 0x8);

   402

	memcpy_fromio(&update->info, addr, sizeof(update->info));

   406

		goto cleanup;

   407

	}

   408

   409

	if (alloc_chrdev_region(&update->dev, 0, 1, KBUILD_MODNAME)) {

   410

		pr_warn("alloc_chrdev_region() failed\n");

   411

		goto cleanup;

   412

	}

   413

   414

	update->class = class_create(THIS_MODULE, "ccat_update");

   415

	if (NULL == update->class) {

   416

		pr_warn("Create device class failed\n");

   417

		goto cleanup;

   418

	}

   419

   420

	if (NULL ==

   421

	    device_create(update->class, NULL, update->dev, NULL,

   422

			  "ccat_update")) {

   423

		pr_warn("device_create() failed\n");

   424

		goto cleanup;

   425

	}

   426

   427

	cdev_init(&update->cdev, &update_ops);

   428

	update->cdev.owner = THIS_MODULE;

   429

	update->cdev.ops = &update_ops;

   430

	if (cdev_add(&update->cdev, update->dev, 1)) {

   431

		pr_warn("add update device failed\n");

   432

		goto cleanup;

   433

	}

   434

	return update;

   435

cleanup:

   436

	kref_put(&update->refcount, ccat_update_destroy);

   437

	return NULL;

   438

}

   439

   440

/**

   441

 * ccat_update_destroy() - Cleanup the CCAT Update function

   442

 * @ref: pointer to a struct kref embedded into a struct ccat_update, which we intend to destroy

   443

 *

   444

 * Retrieves the parent struct ccat_update and destroys it.

   445

 */

   446

static void ccat_update_destroy(struct kref *ref)

   447

{

   448

	struct ccat_update *update =

   449

	    container_of(ref, struct ccat_update, refcount);

   450

   451

	cdev_del(&update->cdev);

   452

	device_destroy(update->class, update->dev);

   453

	class_destroy(update->class);

   454

	unregister_chrdev_region(update->dev, 1);

   455

	kfree(update);

   456

	pr_debug("%s(): done\n", __FUNCTION__);

   457

}

   458

   459

/**

   460

 * ccat_update_remove() - Prepare the CCAT Update function for removal

   461

 */

   462

void ccat_update_remove(struct ccat_update *update)

   463

{

   464

	kref_put(&update->refcount, ccat_update_destroy);

   465

	pr_debug("%s(): done\n", __FUNCTION__);

   466

}