1

/**

     2

    Network Driver for Beckhoff CCAT communication controller

     3

    Copyright (C) 2014  Beckhoff Automation GmbH

     4

    Author: Patrick Bruenn <p.bruenn@beckhoff.com>

     5

     6

    This program is free software; you can redistribute it and/or modify

     7

    it under the terms of the GNU General Public License as published by

     8

    the Free Software Foundation; either version 2 of the License, or

     9

    (at your option) any later version.

    10

    11

    This program is distributed in the hope that it will be useful,

    12

    but WITHOUT ANY WARRANTY; without even the implied warranty of

    13

    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    14

    GNU General Public License for more details.

    15

    16

    You should have received a copy of the GNU General Public License along

    17

    with this program; if not, write to the Free Software Foundation, Inc.,

    18

    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.

    19

*/

    20

    21

#include <linux/fs.h>

    22

#include <linux/kernel.h>

    23

#include <linux/module.h>

    24

#include <linux/sched.h>

    25

#include <linux/uaccess.h>

    26

#include "module.h"

    27

#include "update.h"

    28

    29

#define CCAT_DATA_IN_4 0x038

    30

#define CCAT_DATA_IN_N 0x7F0

    31

#define CCAT_DATA_OUT_4 0x030

    32

#define CCAT_DATA_BLOCK_SIZE (size_t)((CCAT_DATA_IN_N - CCAT_DATA_IN_4)/8)

    33

#define CCAT_WRITE_BLOCK_SIZE 128

    34

#define CCAT_FLASH_SIZE (size_t)0xE0000

    35

    36

/**     FUNCTION_NAME            CMD,  CLOCKS          */

    37

#define CCAT_BULK_ERASE          0xE3, 8

    38

#define CCAT_GET_PROM_ID         0xD5, 40

    39

#define CCAT_READ_FLASH          0xC0, 32

    40

#define CCAT_READ_STATUS         0xA0, 16

    41

#define CCAT_WRITE_ENABLE        0x60, 8

    42

#define CCAT_WRITE_FLASH         0x40, 32

    43

    44

/* from http://graphics.stanford.edu/~seander/bithacks.html#ReverseByteWith32Bits */

    45

#define SWAP_BITS(B) \

    46

	((((B) * 0x0802LU & 0x22110LU) | ((B) * 0x8020LU & 0x88440LU)) * 0x10101LU >> 16)

    47

    48

/**

    49

 * struct update_buffer - keep track of a CCAT FPGA update

    50

 * @update: pointer to a valid ccat_update object

    51

 * @data: buffer used for write operations

    52

 * @size: number of bytes written to the data buffer, if 0 on ccat_update_release() no data will be written to FPGA

    53

 */

    54

struct update_buffer {

    55

	struct ccat_update *update;

    56

	char data[CCAT_FLASH_SIZE];

    57

	size_t size;

    58

};

    59

    60

static void ccat_wait_status_cleared(void __iomem * const ioaddr);

    61

static int ccat_read_flash(void __iomem * const ioaddr, char __user * buf,

    62

			   u32 len, loff_t * off);

    63

static void ccat_write_flash(const struct update_buffer *const buf);

    64

static void ccat_update_cmd(void __iomem * const ioaddr, u8 cmd, u16 clocks);

    65

static void ccat_update_destroy(struct kref *ref);

    66

    67

/**

    68

 * wait_until_busy_reset() - wait until the busy flag was reset

    69

 * @ioaddr: address of the CCAT Update function in PCI config space

    70

 */

    71

static inline void wait_until_busy_reset(void __iomem * const ioaddr)

    72

{

    73

	wmb();

    74

	while (ioread8(ioaddr + 1)) {

    75

		schedule();

    76

	}

    77

}

    78

    79

static int ccat_update_open(struct inode *const i, struct file *const f)

    80

{

    81

	struct ccat_update *update =

    82

	    container_of(i->i_cdev, struct ccat_update, cdev);

    83

	struct update_buffer *buf;

    84

    85

	kref_get(&update->refcount);

    86

	if (atomic_read(&update->refcount.refcount) > 2) {

    87

		kref_put(&update->refcount, ccat_update_destroy);

    88

		return -EBUSY;

    89

	}

    90

    91

	buf = kzalloc(sizeof(*buf), GFP_KERNEL);

    92

	if (!buf) {

    93

		kref_put(&update->refcount, ccat_update_destroy);

    94

		return -ENOMEM;

    95

	}

    96

    97

	buf->update = update;

    98

	f->private_data = buf;

    99

	return 0;

   100

}

   101

   102

static int ccat_update_release(struct inode *const i, struct file *const f)

   103

{

   104

	const struct update_buffer *const buf = f->private_data;

   105

	struct ccat_update *const update = buf->update;

   106

   107

	if (buf->size > 0) {

   108

		ccat_update_cmd(update->ioaddr, CCAT_WRITE_ENABLE);

   109

		ccat_update_cmd(update->ioaddr, CCAT_BULK_ERASE);

   110

		ccat_wait_status_cleared(update->ioaddr);

   111

		ccat_write_flash(buf);

   112

	}

   113

	kfree(f->private_data);

   114

	kref_put(&update->refcount, ccat_update_destroy);

   115

	return 0;

   116

}

   117

   118

/**

   119

 * ccat_update_read() - Read CCAT configuration data from flash

   120

 * @f: file handle previously initialized with ccat_update_open()

   121

 * @buf: buffer in user space provided for our data

   122

 * @len: length of the user space buffer

   123

 * @off: current offset of our file operation

   124

 *

   125

 * Copies data from the CCAT FPGA's configuration flash to user space.

   126

 * Note that the size of the FPGA's firmware is not known exactly so it

   127

 * is very possible that the overall buffer ends with a lot of 0xff.

   128

 *

   129

 * Return: the number of bytes written, or 0 if EOF reached

   130

 */

   131

static ssize_t ccat_update_read(struct file *const f, char __user * buf,

   132

				size_t len, loff_t * off)

   133

{

   134

	struct update_buffer *update = f->private_data;

   135

   136

	if (!buf || !off) {

   137

		return -EINVAL;

   138

	}

   139

	if (*off >= CCAT_FLASH_SIZE) {

   140

		return 0;

   141

	}

   142

	if (*off + len >= CCAT_FLASH_SIZE) {

   143

		len = CCAT_FLASH_SIZE - *off;

   144

	}

   145

	return ccat_read_flash(update->update->ioaddr, buf, len, off);

   146

}

   147

   148

/**

   149

 * ccat_update_write() - Write data to the CCAT FPGA's configuration flash

   150

 * @f: file handle previously initialized with ccat_update_open()

   151

 * @buf: buffer in user space providing the new configuration data (from *.rbf)

   152

 * @len: length of the user space buffer

   153

 * @off: current offset in the configuration data

   154

 *

   155

 * Copies data from user space (possibly a *.rbf) to the CCAT FPGA's

   156

 * configuration flash to user space.

   157

 *

   158

 * Return: the number of bytes written, or 0 if flash end is reached

   159

 */

   160

   161

static ssize_t ccat_update_write(struct file *const f, const char __user * buf,

   162

				 size_t len, loff_t * off)

   163

{

   164

	struct update_buffer *const update = f->private_data;

   165

   166

	if (*off + len > sizeof(update->data))

   167

		return 0;

   168

   169

	if (copy_from_user(update->data + *off, buf, len)) {

   170

		return -EFAULT;

   171

	}

   172

   173

	*off += len;

   174

	update->size = *off;

   175

	return len;

   176

}

   177

   178

static struct file_operations update_ops = {

   179

	.owner = THIS_MODULE,

   180

	.open = ccat_update_open,

   181

	.release = ccat_update_release,

   182

	.read = ccat_update_read,

   183

	.write = ccat_update_write,

   184

};

   185

   186

/**

   187

 * __ccat_update_cmd() - Helper to issue a FPGA flash command

   188

 * @ioaddr: address of the CCAT Update function in PCI config space

   189

 * @cmd: the command identifier

   190

 * @clocks: the number of clocks associated with the specified command

   191

 *

   192

 * no write memory barrier is called and the busy flag is not evaluated

   193

 */

   194

static inline void __ccat_update_cmd(void __iomem * const ioaddr, u8 cmd,

   195

				     u16 clocks)

   196

{

   197

	iowrite8((0xff00 & clocks) >> 8, ioaddr);

   198

	iowrite8(0x00ff & clocks, ioaddr + 0x8);

   199

	iowrite8(cmd, ioaddr + 0x10);

   200

}

   201

   202

/**

   203

 * ccat_update_cmd() - Helper to issue a FPGA flash command

   204

 * @ioaddr: address of the CCAT Update function in PCI config space

   205

 * @cmd: the command identifier

   206

 * @clocks: the number of clocks associated with the specified command

   207

 *

   208

 * Triggers a full flash command cycle with write memory barrier and

   209

 * command activate. This call blocks until the busy flag is reset.

   210

 */

   211

static inline void ccat_update_cmd(void __iomem * const ioaddr, u8 cmd,

   212

				   u16 clocks)

   213

{

   214

	__ccat_update_cmd(ioaddr, cmd, clocks);

   215

	wmb();

   216

	iowrite8(0xff, ioaddr + 0x7f8);

   217

	wait_until_busy_reset(ioaddr);

   218

}

   219

   220

/**

   221

 * ccat_update_cmd_addr() - Helper to issue a FPGA flash command with address parameter

   222

 * @ioaddr: address of the CCAT Update function in PCI config space

   223

 * @cmd: the command identifier

   224

 * @clocks: the number of clocks associated with the specified command

   225

 * @addr: 24 bit address associated with the specified command

   226

 *

   227

 * Triggers a full flash command cycle with write memory barrier and

   228

 * command activate. This call blocks until the busy flag is reset.

   229

 */

   230

static inline void ccat_update_cmd_addr(void __iomem * const ioaddr,

   231

					u8 cmd, u16 clocks, u32 addr)

   232

{

   233

	const u8 addr_0 = SWAP_BITS(addr & 0xff);

   234

	const u8 addr_1 = SWAP_BITS((addr & 0xff00) >> 8);

   235

	const u8 addr_2 = SWAP_BITS((addr & 0xff0000) >> 16);

   236

   237

	__ccat_update_cmd(ioaddr, cmd, clocks);

   238

	iowrite8(addr_2, ioaddr + 0x18);

   239

	iowrite8(addr_1, ioaddr + 0x20);

   240

	iowrite8(addr_0, ioaddr + 0x28);

   241

	wmb();

   242

	iowrite8(0xff, ioaddr + 0x7f8);

   243

	wait_until_busy_reset(ioaddr);

   244

}

   245

   246

/**

   247

 * ccat_get_prom_id() - Read CCAT PROM ID

   248

 * @ioaddr: address of the CCAT Update function in PCI config space

   249

 *

   250

 * Return: the CCAT FPGA's PROM identifier

   251

 */

   252

u8 ccat_get_prom_id(void __iomem * const ioaddr)

   253

{

   254

	ccat_update_cmd(ioaddr, CCAT_GET_PROM_ID);

   255

	return ioread8(ioaddr + 0x38);

   256

}

   257

   258

/**

   259

 * ccat_get_status() - Read CCAT Update status

   260

 * @ioaddr: address of the CCAT Update function in PCI config space

   261

 *

   262

 * Return: the current status of the CCAT Update function

   263

 */

   264

static u8 ccat_get_status(void __iomem * const ioaddr)

   265

{

   266

	ccat_update_cmd(ioaddr, CCAT_READ_STATUS);

   267

	return ioread8(ioaddr + 0x20);

   268

}

   269

   270

/**

   271

 * ccat_wait_status_cleared() - wait until CCAT status is cleared

   272

 * @ioaddr: address of the CCAT Update function in PCI config space

   273

 *

   274

 * Blocks until bit 7 of the CCAT Update status is reset

   275

 */

   276

static void ccat_wait_status_cleared(void __iomem * const ioaddr)

   277

{

   278

	u8 status;

   279

   280

	do {

   281

		status = ccat_get_status(ioaddr);

   282

	} while (status & (1 << 7));

   283

}

   284

   285

/**

   286

 * ccat_read_flash_block() - Read a block of CCAT configuration data from flash

   287

 * @ioaddr: address of the CCAT Update function in PCI config space

   288

 * @addr: 24 bit address of the block to read

   289

 * @len: number of bytes to read from this block, len <= CCAT_DATA_BLOCK_SIZE

   290

 * @buf: output buffer in user space

   291

 *

   292

 * Copies one block of configuration data from the CCAT FPGA's flash to

   293

 * the user space buffer.

   294

 * Note that the size of the FPGA's firmware is not known exactly so it

   295

 * is very possible that the overall buffer ends with a lot of 0xff.

   296

 *

   297

 * Return: the number of bytes copied

   298

 */

   299

static int ccat_read_flash_block(void __iomem * const ioaddr,

   300

				 const u32 addr, const u16 len,

   301

				 char __user * const buf)

   302

{

   303

	u16 i;

   304

	const u16 clocks = 8 * len;

   305

   306

	ccat_update_cmd_addr(ioaddr, CCAT_READ_FLASH + clocks, addr);

   307

	for (i = 0; i < len; i++) {

   308

		put_user(ioread8(ioaddr + CCAT_DATA_IN_4 + 8 * i), buf + i);

   309

	}

   310

	return len;

   311

}

   312

   313

/**

   314

 * ccat_read_flash() - Read a chunk of CCAT configuration data from flash

   315

 * @ioaddr: address of the CCAT Update function in PCI config space

   316

 * @buf: output buffer in user space

   317

 * @len: number of bytes to read

   318

 * @off: offset in the configuration data

   319

 *

   320

 * Copies multiple blocks of configuration data from the CCAT FPGA's

   321

 * flash to the user space buffer.

   322

 *

   323

 * Return: the number of bytes copied

   324

 */

   325

static int ccat_read_flash(void __iomem * const ioaddr, char __user * buf,

   326

			   u32 len, loff_t * off)

   327

{

   328

	const loff_t start = *off;

   329

   330

	while (len > CCAT_DATA_BLOCK_SIZE) {

   331

		*off +=

   332

		    ccat_read_flash_block(ioaddr, *off, CCAT_DATA_BLOCK_SIZE,

   333

					  buf);

   334

		buf += CCAT_DATA_BLOCK_SIZE;

   335

		len -= CCAT_DATA_BLOCK_SIZE;

   336

	}

   337

	*off += ccat_read_flash_block(ioaddr, *off, len, buf);

   338

	return *off - start;

   339

}

   340

   341

/**

   342

 * ccat_write_flash_block() - Write a block of CCAT configuration data to flash

   343

 * @ioaddr: address of the CCAT Update function in PCI config space

   344

 * @addr: 24 bit start address in the CCAT FPGA's flash

   345

 * @len: number of bytes to write in this block, len <= CCAT_WRITE_BLOCK_SIZE

   346

 * @buf: input buffer

   347

 *

   348

 * Copies one block of configuration data to the CCAT FPGA's flash

   349

 *

   350

 * Return: the number of bytes copied

   351

 */

   352

static int ccat_write_flash_block(void __iomem * const ioaddr,

   353

				  const u32 addr, const u16 len,

   354

				  const char *const buf)

   355

{

   356

	const u16 clocks = 8 * len;

   357

	u16 i;

   358

   359

	ccat_update_cmd(ioaddr, CCAT_WRITE_ENABLE);

   360

	for (i = 0; i < len; i++) {

   361

		iowrite8(buf[i], ioaddr + CCAT_DATA_OUT_4 + 8 * i);

   362

	}

   363

	ccat_update_cmd_addr(ioaddr, CCAT_WRITE_FLASH + clocks, addr);

   364

	ccat_wait_status_cleared(ioaddr);

   365

	return len;

   366

}

   367

   368

/**

   369

 * ccat_write_flash() - Write a new CCAT configuration to FPGA's flash

   370

 * @update: a CCAT Update buffer containing the new FPGA configuration

   371

 */

   372

static void ccat_write_flash(const struct update_buffer *const update)

   373

{

   374

	const char *buf = update->data;

   375

	u32 off = 0;

   376

	size_t len = update->size;

   377

   378

	while (len > CCAT_WRITE_BLOCK_SIZE) {

   379

		ccat_write_flash_block(update->update->ioaddr, off,

   380

				       (u16) CCAT_WRITE_BLOCK_SIZE, buf);

   381

		off += CCAT_WRITE_BLOCK_SIZE;

   382

		buf += CCAT_WRITE_BLOCK_SIZE;

   383

		len -= CCAT_WRITE_BLOCK_SIZE;

   384

	}

   385

	ccat_write_flash_block(update->update->ioaddr, off, (u16) len, buf);

   386

}

   387

   388

/**

   389

 * ccat_update_init() - Initialize the CCAT Update function

   390

 */

   391

struct ccat_update *ccat_update_init(const struct ccat_device *const ccatdev,

   392

				     void __iomem * const addr)

   393

{

   394

	struct ccat_update *const update = kzalloc(sizeof(*update), GFP_KERNEL);

   395

   396

	if (!update) {

   397

		return NULL;

   398

	}

   399

	kref_init(&update->refcount);

   400

	update->ioaddr = ccatdev->bar[0].ioaddr + ioread32(addr + 0x8);

   401

	memcpy_fromio(&update->info, addr, sizeof(update->info));

   402

   403

	if (0x00 != update->info.rev) {

   404

		pr_warn("CCAT Update rev. %d not supported\n", update->info.rev);

   405

		goto cleanup;

   406

	}

   407

   408

	if (alloc_chrdev_region(&update->dev, 0, 1, KBUILD_MODNAME)) {

   409

		pr_warn("alloc_chrdev_region() failed\n");

   410

		goto cleanup;

   411

	}

   412

   413

	update->class = class_create(THIS_MODULE, "ccat_update");

   414

	if (NULL == update->class) {

   415

		pr_warn("Create device class failed\n");

   416

		goto cleanup;

   417

	}

   418

   419

	if (NULL ==

   420

	    device_create(update->class, NULL, update->dev, NULL,

   421

			  "ccat_update")) {

   422

		pr_warn("device_create() failed\n");

   423

		goto cleanup;

   424

	}

   425

   426

	cdev_init(&update->cdev, &update_ops);

   427

	update->cdev.owner = THIS_MODULE;

   428

	update->cdev.ops = &update_ops;

   429

	if (cdev_add(&update->cdev, update->dev, 1)) {

   430

		pr_warn("add update device failed\n");

   431

		goto cleanup;

   432

	}

   433

	return update;

   434

cleanup:

   435

	kref_put(&update->refcount, ccat_update_destroy);

   436

	return NULL;

   437

}

   438

   439

/**

   440

 * ccat_update_destroy() - Cleanup the CCAT Update function

   441

 * @ref: pointer to a struct kref embedded into a struct ccat_update, which we intend to destroy

   442

 *

   443

 * Retrieves the parent struct ccat_update and destroys it.

   444

 */

   445

static void ccat_update_destroy(struct kref *ref)

   446

{

   447

	struct ccat_update *update =

   448

	    container_of(ref, struct ccat_update, refcount);

   449

   450

	cdev_del(&update->cdev);

   451

	device_destroy(update->class, update->dev);

   452

	class_destroy(update->class);

   453

	unregister_chrdev_region(update->dev, 1);

   454

	kfree(update);

   455

	pr_debug("%s(): done\n", __FUNCTION__);

   456

}

   457

   458

/**

   459

 * ccat_update_remove() - Prepare the CCAT Update function for removal

   460

 */

   461

void ccat_update_remove(struct ccat_update *update)

   462

{

   463

	kref_put(&update->refcount, ccat_update_destroy);

   464

	pr_debug("%s(): done\n", __FUNCTION__);

   465

}