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/******************************************************************************

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 *

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 *  Distributed clocks sample for the IgH EtherCAT master.

     4

 *

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 *  $Id$

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 *

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 *  Copyright (C) 2006-2008  Florian Pose, Ingenieurgemeinschaft IgH

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 *

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 *  This file is part of the IgH EtherCAT Master.

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 *

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 *  The IgH EtherCAT Master is free software; you can redistribute it and/or

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 *  modify it under the terms of the GNU General Public License version 2, as

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 *  published by the Free Software Foundation.

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 *

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 *  The IgH EtherCAT Master is distributed in the hope that it will be useful,

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 *  but WITHOUT ANY WARRANTY; without even the implied warranty of

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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General

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 *  Public License for more details.

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 *

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 *  You should have received a copy of the GNU General Public License along

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 *  with the IgH EtherCAT Master; if not, write to the Free Software

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 *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

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 *

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 *  ---

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 *

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 *  The license mentioned above concerns the source code only. Using the

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 *  EtherCAT technology and brand is only permitted in compliance with the

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 *  industrial property and similar rights of Beckhoff Automation GmbH.

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 *

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 *****************************************************************************/

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// Linux

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#include <linux/module.h>

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#include <linux/err.h>

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// RTAI

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#include <rtai_sched.h>

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#include <rtai_sem.h>

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// EtherCAT

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#include "../../include/ecrt.h"

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/*****************************************************************************/

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// Module parameters

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#define FREQUENCY 1000 // task frequency in Hz

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#define INHIBIT_TIME 20

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#define TIMERTICKS (1000000000 / FREQUENCY)

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#define NUM_DIG_OUT 1

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#define PFX "ec_dc_sample: "

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/*****************************************************************************/

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    58

// EtherCAT

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static ec_master_t *master = NULL;

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static ec_master_state_t master_state = {};

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spinlock_t master_lock = SPIN_LOCK_UNLOCKED;

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static ec_domain_t *domain1 = NULL;

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static ec_domain_state_t domain1_state = {};

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// RTAI

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static RT_TASK task;

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static SEM master_sem;

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static cycles_t t_last_cycle = 0, t_critical;

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/*****************************************************************************/

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// process data

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static uint8_t *domain1_pd; // process data memory

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#define DigOutSlavePos(X) 0, (1 + (X))

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#define CounterSlavePos   0, 2

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#define Beckhoff_EK1100 0x00000002, 0x044c2c52

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#define Beckhoff_EL2008 0x00000002, 0x07d83052

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#define IDS_Counter     0x000012ad, 0x05de3052

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static int off_dig_out[NUM_DIG_OUT];

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static int off_counter_in;

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static int off_counter_out;

    86

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static unsigned int counter = 0;

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static unsigned int blink_counter = 0;

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static unsigned int blink = 0;

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static u32 counter_value = 0U;

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    92

/*****************************************************************************/

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static ec_pdo_entry_info_t el2008_channels[] = {

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    {0x7000, 1, 1},

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    {0x7010, 1, 1},

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    {0x7020, 1, 1},

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    {0x7030, 1, 1},

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    {0x7040, 1, 1},

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    {0x7050, 1, 1},

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    {0x7060, 1, 1},

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    {0x7070, 1, 1}

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};

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static ec_pdo_info_t el2008_pdos[] = {

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    {0x1600, 1, &el2008_channels[0]},

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    {0x1601, 1, &el2008_channels[1]},

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    {0x1602, 1, &el2008_channels[2]},

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    {0x1603, 1, &el2008_channels[3]},

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    {0x1604, 1, &el2008_channels[4]},

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    {0x1605, 1, &el2008_channels[5]},

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    {0x1606, 1, &el2008_channels[6]},

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    {0x1607, 1, &el2008_channels[7]}

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};

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static ec_sync_info_t el2008_syncs[] = {

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    {0, EC_DIR_OUTPUT, 8, el2008_pdos},

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    {1, EC_DIR_INPUT},

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    {0xff}

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};

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/*****************************************************************************/

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   124

void check_domain1_state(void)

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{

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    ec_domain_state_t ds;

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    spin_lock(&master_lock);

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    ecrt_domain_state(domain1, &ds);

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    spin_unlock(&master_lock);

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    if (ds.working_counter != domain1_state.working_counter)

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        printk(KERN_INFO PFX "Domain1: WC %u.\n", ds.working_counter);

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    if (ds.wc_state != domain1_state.wc_state)

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        printk(KERN_INFO PFX "Domain1: State %u.\n", ds.wc_state);

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    domain1_state = ds;

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}

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/*****************************************************************************/

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void check_master_state(void)

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{

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    ec_master_state_t ms;

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    spin_lock(&master_lock);

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    ecrt_master_state(master, &ms);

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    spin_unlock(&master_lock);

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    if (ms.slaves_responding != master_state.slaves_responding)

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        printk(KERN_INFO PFX "%u slave(s).\n", ms.slaves_responding);

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    if (ms.al_states != master_state.al_states)

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        printk(KERN_INFO PFX "AL states: 0x%02X.\n", ms.al_states);

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    if (ms.link_up != master_state.link_up)

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        printk(KERN_INFO PFX "Link is %s.\n", ms.link_up ? "up" : "down");

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    master_state = ms;

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}

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/*****************************************************************************/

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void run(long data)

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{

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    int i;

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	struct timeval tv;

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    unsigned int sync_ref_counter = 0;

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    count2timeval(nano2count(rt_get_real_time_ns()), &tv);

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    while (1) {

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        t_last_cycle = get_cycles();

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        // receive process data

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        rt_sem_wait(&master_sem);

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        ecrt_master_receive(master);

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        ecrt_domain_process(domain1);

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        rt_sem_signal(&master_sem);

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        // check process data state (optional)

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        check_domain1_state();

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        if (counter) {

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            counter--;

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        } else {

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			u32 c;

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            counter = FREQUENCY;

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            // check for master state (optional)

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            check_master_state();

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			c = EC_READ_U32(domain1_pd + off_counter_in);

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			if (counter_value != c) {

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				counter_value = c;

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				printk(KERN_INFO PFX "counter=%u\n", counter_value);

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			}

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        }

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        if (blink_counter) {

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            blink_counter--;

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        } else {

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            blink_counter = 9;

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            // calculate new process data

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            blink = !blink;

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        }

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        // write process data

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        for (i = 0; i < NUM_DIG_OUT; i++) {

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            EC_WRITE_U8(domain1_pd + off_dig_out[i], blink ? 0x66 : 0x99);

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        }

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		EC_WRITE_U8(domain1_pd + off_counter_out, blink ? 0x00 : 0x02);

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        rt_sem_wait(&master_sem);

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        tv.tv_usec += 1000;

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        if (tv.tv_usec >= 1000000)  {

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            tv.tv_usec -= 1000000;

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            tv.tv_sec++;

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        }

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        if (sync_ref_counter) {

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            sync_ref_counter--;

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        } else {

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            sync_ref_counter = 9;

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        }

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		ecrt_master_sync_slave_clocks(master);

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        ecrt_domain_queue(domain1);

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        ecrt_master_send(master);

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        rt_sem_signal(&master_sem);

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   239

        rt_task_wait_period();

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    }

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}

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/*****************************************************************************/

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int request_lock(void *data)

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{

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    // too close to the next real time cycle: deny access...

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    if (get_cycles() - t_last_cycle > t_critical) return -1;

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    // allow access

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    rt_sem_wait(&master_sem);

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    return 0;

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}

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/*****************************************************************************/

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   257

void release_lock(void *data)

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{

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    rt_sem_signal(&master_sem);

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}

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/*****************************************************************************/

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int __init init_mod(void)

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{

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    int ret = -1, i;

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    RTIME tick_period, requested_ticks, now;

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    ec_slave_config_t *sc;

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    printk(KERN_INFO PFX "Starting...\n");

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   272

    rt_sem_init(&master_sem, 1);

   273

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    t_critical = cpu_khz * 1000 / FREQUENCY - cpu_khz * INHIBIT_TIME / 1000;

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    master = ecrt_request_master(0);

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    if (!master) {

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        ret = -EBUSY; 

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        printk(KERN_ERR PFX "Requesting master 0 failed!\n");

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        goto out_return;

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    }

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    ecrt_master_callbacks(master, request_lock, release_lock, NULL);

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    printk(KERN_INFO PFX "Registering domain...\n");

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    if (!(domain1 = ecrt_master_create_domain(master))) {

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        printk(KERN_ERR PFX "Domain creation failed!\n");

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        goto out_release_master;

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    }

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    printk(KERN_INFO PFX "Configuring PDOs...\n");

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    // create configuration for reference clock FIXME

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	if (!(sc = ecrt_master_slave_config(master, 0, 0, Beckhoff_EK1100))) {

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		printk(KERN_ERR PFX "Failed to get slave configuration.\n");

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		goto out_release_master;

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	}

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    for (i = 0; i < NUM_DIG_OUT; i++) {

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        if (!(sc = ecrt_master_slave_config(master,

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                        DigOutSlavePos(i), Beckhoff_EL2008))) {

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            printk(KERN_ERR PFX "Failed to get slave configuration.\n");

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            goto out_release_master;

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        }

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        if (ecrt_slave_config_pdos(sc, EC_END, el2008_syncs)) {

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            printk(KERN_ERR PFX "Failed to configure PDOs.\n");

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            goto out_release_master;

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        }

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        off_dig_out[i] = ecrt_slave_config_reg_pdo_entry(sc,

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                0x7000, 1, domain1, NULL);

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        if (off_dig_out[i] < 0)

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            goto out_release_master;

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    }

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	if (!(sc = ecrt_master_slave_config(master,

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					CounterSlavePos, IDS_Counter))) {

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		printk(KERN_ERR PFX "Failed to get slave configuration.\n");

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		goto out_release_master;

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	}

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	off_counter_in = ecrt_slave_config_reg_pdo_entry(sc,

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			0x6020, 0x11, domain1, NULL);

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	if (off_counter_in < 0)

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		goto out_release_master;

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	off_counter_out = ecrt_slave_config_reg_pdo_entry(sc,

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			0x7020, 1, domain1, NULL);

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	if (off_counter_out < 0)

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		goto out_release_master;

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#if 1

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    // configure SYNC signals for this slave

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	ecrt_slave_config_dc_assign_activate(sc, 0x0700);

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	ecrt_slave_config_dc_sync_cycle_times(sc, 1000000, 0);

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	ecrt_slave_config_dc_sync_shift_times(sc,  440000, 0);

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#endif

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    printk(KERN_INFO PFX "Activating master...\n");

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    if (ecrt_master_activate(master)) {

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        printk(KERN_ERR PFX "Failed to activate master!\n");

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        goto out_release_master;

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    }

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    // Get internal process data for domain

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    domain1_pd = ecrt_domain_data(domain1);

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    printk(KERN_INFO PFX "Starting cyclic sample thread...\n");

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    requested_ticks = nano2count(TIMERTICKS);

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    tick_period = start_rt_timer(requested_ticks);

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    printk(KERN_INFO PFX "RT timer started with %i/%i ticks.\n",

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           (int) tick_period, (int) requested_ticks);

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    if (rt_task_init(&task, run, 0, 2000, 0, 1, NULL)) {

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        printk(KERN_ERR PFX "Failed to init RTAI task!\n");

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        goto out_stop_timer;

   357

    }

   358

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    now = rt_get_time();

   360

    if (rt_task_make_periodic(&task, now + tick_period, tick_period)) {

   361

        printk(KERN_ERR PFX "Failed to run RTAI task!\n");

   362

        goto out_stop_task;

   363

    }

   364

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    printk(KERN_INFO PFX "Initialized.\n");

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    return 0;

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   368

 out_stop_task:

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    rt_task_delete(&task);

   370

 out_stop_timer:

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    stop_rt_timer();

   372

 out_release_master:

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    printk(KERN_ERR PFX "Releasing master...\n");

   374

    ecrt_release_master(master);

   375

 out_return:

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    rt_sem_delete(&master_sem);

   377

    printk(KERN_ERR PFX "Failed to load. Aborting.\n");

   378

    return ret;

   379

}

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/*****************************************************************************/

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void __exit cleanup_mod(void)

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{

   385

    printk(KERN_INFO PFX "Stopping...\n");

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   387

    rt_task_delete(&task);

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    stop_rt_timer();

   389

    ecrt_release_master(master);

   390

    rt_sem_delete(&master_sem);

   391

   392

    printk(KERN_INFO PFX "Unloading.\n");

   393

}

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/*****************************************************************************/

   396

   397

MODULE_LICENSE("GPL");

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MODULE_AUTHOR("Florian Pose <fp@igh-essen.com>");

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MODULE_DESCRIPTION("EtherCAT distributed clocks sample module");

   400

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module_init(init_mod);

   402

module_exit(cleanup_mod);

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   404

/*****************************************************************************/