DC example applications.
authorFlorian Pose <fp@igh-essen.com>
Thu, 23 Apr 2009 14:50:23 +0000
changeset 1414 0037a63d3cc5
parent 1413 44c2b7c0ae1a
child 1415 9d1cdbf41247
DC example applications.
configure.ac
examples/Makefile.am
examples/dc_rtai/Kbuild.in
examples/dc_rtai/Makefile.am
examples/dc_rtai/dc_rtai_sample.c
examples/dc_user/Makefile.am
examples/dc_user/main.c
--- a/configure.ac	Thu Apr 23 14:45:07 2009 +0000
+++ b/configure.ac	Thu Apr 23 14:50:23 2009 +0000
@@ -506,6 +506,9 @@
         devices/e1000/Makefile
         examples/Kbuild
         examples/Makefile
+        examples/dc_rtai/Kbuild
+        examples/dc_rtai/Makefile
+        examples/dc_user/Makefile
         examples/mini/Kbuild
         examples/mini/Makefile
         examples/rtai/Kbuild
--- a/examples/Makefile.am	Thu Apr 23 14:45:07 2009 +0000
+++ b/examples/Makefile.am	Thu Apr 23 14:50:23 2009 +0000
@@ -28,10 +28,14 @@
 #------------------------------------------------------------------------------
 
 if ENABLE_USERLIB
-SUBDIRS = user
+SUBDIRS = \
+	dc_user \
+	user
 endif
 
 DIST_SUBDIRS = \
+	dc_rtai \
+	dc_user \
 	mini \
 	rtai \
 	user
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/examples/dc_rtai/Kbuild.in	Thu Apr 23 14:50:23 2009 +0000
@@ -0,0 +1,40 @@
+#------------------------------------------------------------------------------
+#
+#  $Id: Kbuild.in 1667 2009-02-24 12:51:39Z fp $
+#
+#  Copyright (C) 2006-2008  Florian Pose, Ingenieurgemeinschaft IgH
+#
+#  This file is part of the IgH EtherCAT Master.
+#
+#  The IgH EtherCAT Master is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU General Public License version 2, as
+#  published by the Free Software Foundation.
+#
+#  The IgH EtherCAT Master is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General
+#  Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License along
+#  with the IgH EtherCAT Master; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+#  ---
+#  
+#  The license mentioned above concerns the source code only. Using the
+#  EtherCAT technology and brand is only permitted in compliance with the
+#  industrial property and similar rights of Beckhoff Automation GmbH.
+#
+#  ---
+#
+#  vi: syntax=make
+#
+#------------------------------------------------------------------------------
+
+obj-m := ec_dc_rtai_sample.o
+
+ec_dc_rtai_sample-objs := dc_rtai_sample.o
+
+EXTRA_CFLAGS := -I@RTAI_DIR@/include
+
+#------------------------------------------------------------------------------
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/examples/dc_rtai/Makefile.am	Thu Apr 23 14:50:23 2009 +0000
@@ -0,0 +1,49 @@
+#------------------------------------------------------------------------------
+#
+#  IgH EtherCAT master module
+#
+#  $Id$
+#
+#  Copyright (C) 2006-2008  Florian Pose, Ingenieurgemeinschaft IgH
+#
+#  This file is part of the IgH EtherCAT Master.
+#
+#  The IgH EtherCAT Master is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU General Public License version 2, as
+#  published by the Free Software Foundation.
+#
+#  The IgH EtherCAT Master is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General
+#  Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License along
+#  with the IgH EtherCAT Master; if not, write to the Free Software
+#  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+#  ---
+#  
+#  The license mentioned above concerns the source code only. Using the
+#  EtherCAT technology and brand is only permitted in compliance with the
+#  industrial property and similar rights of Beckhoff Automation GmbH.
+#
+#------------------------------------------------------------------------------
+
+EXTRA_DIST = \
+	Kbuild.in \
+	dc_rtai_sample.c
+
+BUILT_SOURCES = \
+	Kbuild
+
+modules:
+	$(MAKE) -C "$(LINUX_SOURCE_DIR)" M="@abs_srcdir@" modules
+
+modules_install:
+	mkdir -p $(DESTDIR)$(LINUX_MOD_PATH)
+	cp $(srcdir)/ec_dc_rtai_sample.ko $(DESTDIR)$(LINUX_MOD_PATH)
+
+clean-local:
+	$(MAKE) -C "$(LINUX_SOURCE_DIR)" M="@abs_srcdir@" clean
+
+#------------------------------------------------------------------------------
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/examples/dc_rtai/dc_rtai_sample.c	Thu Apr 23 14:50:23 2009 +0000
@@ -0,0 +1,401 @@
+/******************************************************************************
+ *
+ *  Distributed clocks sample for the IgH EtherCAT master.
+ *
+ *  $Id$
+ *
+ *  Copyright (C) 2006-2008  Florian Pose, Ingenieurgemeinschaft IgH
+ *
+ *  This file is part of the IgH EtherCAT Master.
+ *
+ *  The IgH EtherCAT Master is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License version 2, as
+ *  published by the Free Software Foundation.
+ *
+ *  The IgH EtherCAT Master is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General
+ *  Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with the IgH EtherCAT Master; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ *
+ *  ---
+ *
+ *  The license mentioned above concerns the source code only. Using the
+ *  EtherCAT technology and brand is only permitted in compliance with the
+ *  industrial property and similar rights of Beckhoff Automation GmbH.
+ *
+ *****************************************************************************/
+
+// Linux
+#include <linux/module.h>
+#include <linux/err.h>
+
+// RTAI
+#include <rtai_sched.h>
+#include <rtai_sem.h>
+
+// EtherCAT
+#include "../../include/ecrt.h"
+
+/*****************************************************************************/
+
+// Module parameters
+
+#define FREQUENCY 1000 // task frequency in Hz
+#define INHIBIT_TIME 20
+
+#define TIMERTICKS (1000000000 / FREQUENCY)
+
+#define NUM_DIG_OUT 1
+
+#define PFX "ec_dc_sample: "
+
+/*****************************************************************************/
+
+// EtherCAT
+static ec_master_t *master = NULL;
+static ec_master_state_t master_state = {};
+spinlock_t master_lock = SPIN_LOCK_UNLOCKED;
+
+static ec_domain_t *domain1 = NULL;
+static ec_domain_state_t domain1_state = {};
+
+// RTAI
+static RT_TASK task;
+static SEM master_sem;
+static cycles_t t_last_cycle = 0, t_critical;
+
+/*****************************************************************************/
+
+// process data
+static uint8_t *domain1_pd; // process data memory
+
+#define DigOutSlavePos(X) 0, (1 + (X))
+#define CounterSlavePos   0, 2
+
+#define Beckhoff_EK1100 0x00000002, 0x044c2c52
+#define Beckhoff_EL2008 0x00000002, 0x07d83052
+#define IDS_Counter     0x000012ad, 0x05de3052
+
+static int off_dig_out[NUM_DIG_OUT];
+static int off_counter_in;
+static int off_counter_out;
+
+static unsigned int counter = 0;
+static unsigned int blink_counter = 0;
+static unsigned int blink = 0;
+static u32 counter_value = 0U;
+
+/*****************************************************************************/
+
+static ec_pdo_entry_info_t el2008_channels[] = {
+    {0x7000, 1, 1},
+    {0x7010, 1, 1},
+    {0x7020, 1, 1},
+    {0x7030, 1, 1},
+    {0x7040, 1, 1},
+    {0x7050, 1, 1},
+    {0x7060, 1, 1},
+    {0x7070, 1, 1}
+};
+
+static ec_pdo_info_t el2008_pdos[] = {
+    {0x1600, 1, &el2008_channels[0]},
+    {0x1601, 1, &el2008_channels[1]},
+    {0x1602, 1, &el2008_channels[2]},
+    {0x1603, 1, &el2008_channels[3]},
+    {0x1604, 1, &el2008_channels[4]},
+    {0x1605, 1, &el2008_channels[5]},
+    {0x1606, 1, &el2008_channels[6]},
+    {0x1607, 1, &el2008_channels[7]}
+};
+
+static ec_sync_info_t el2008_syncs[] = {
+    {0, EC_DIR_OUTPUT, 8, el2008_pdos},
+    {1, EC_DIR_INPUT},
+    {0xff}
+};
+
+/*****************************************************************************/
+
+void check_domain1_state(void)
+{
+    ec_domain_state_t ds;
+
+    spin_lock(&master_lock);
+    ecrt_domain_state(domain1, &ds);
+    spin_unlock(&master_lock);
+
+    if (ds.working_counter != domain1_state.working_counter)
+        printk(KERN_INFO PFX "Domain1: WC %u.\n", ds.working_counter);
+    if (ds.wc_state != domain1_state.wc_state)
+        printk(KERN_INFO PFX "Domain1: State %u.\n", ds.wc_state);
+
+    domain1_state = ds;
+}
+
+/*****************************************************************************/
+
+void check_master_state(void)
+{
+    ec_master_state_t ms;
+
+    spin_lock(&master_lock);
+    ecrt_master_state(master, &ms);
+    spin_unlock(&master_lock);
+
+    if (ms.slaves_responding != master_state.slaves_responding)
+        printk(KERN_INFO PFX "%u slave(s).\n", ms.slaves_responding);
+    if (ms.al_states != master_state.al_states)
+        printk(KERN_INFO PFX "AL states: 0x%02X.\n", ms.al_states);
+    if (ms.link_up != master_state.link_up)
+        printk(KERN_INFO PFX "Link is %s.\n", ms.link_up ? "up" : "down");
+
+    master_state = ms;
+}
+
+/*****************************************************************************/
+
+void run(long data)
+{
+    int i;
+	struct timeval tv;
+    unsigned int sync_ref_counter = 0;
+
+    count2timeval(nano2count(rt_get_real_time_ns()), &tv);
+
+    while (1) {
+        t_last_cycle = get_cycles();
+
+        // receive process data
+        rt_sem_wait(&master_sem);
+        ecrt_master_receive(master);
+        ecrt_domain_process(domain1);
+        rt_sem_signal(&master_sem);
+
+        // check process data state (optional)
+        check_domain1_state();
+
+        if (counter) {
+            counter--;
+        } else {
+			u32 c;
+			
+            counter = FREQUENCY;
+
+            // check for master state (optional)
+            check_master_state();
+
+			c = EC_READ_U32(domain1_pd + off_counter_in);
+			if (counter_value != c) {
+				counter_value = c;
+				printk(KERN_INFO PFX "counter=%u\n", counter_value);
+			}
+
+        }
+
+        if (blink_counter) {
+            blink_counter--;
+        } else {
+            blink_counter = 9;
+
+            // calculate new process data
+            blink = !blink;
+        }
+
+        // write process data
+        for (i = 0; i < NUM_DIG_OUT; i++) {
+            EC_WRITE_U8(domain1_pd + off_dig_out[i], blink ? 0x66 : 0x99);
+        }
+
+		EC_WRITE_U8(domain1_pd + off_counter_out, blink ? 0x00 : 0x02);
+
+        rt_sem_wait(&master_sem);
+		
+        tv.tv_usec += 1000;
+        if (tv.tv_usec >= 1000000)  {
+            tv.tv_usec -= 1000000;
+            tv.tv_sec++;
+        }
+        //printk(KERN_INFO PFX "tv=%u.%06u\n", (u32) tv.tv_sec, (u32) tv.tv_usec);
+            
+        if (sync_ref_counter) {
+            sync_ref_counter--;
+        } else {
+            sync_ref_counter = 9;
+            ecrt_master_sync_reference_clock(master, &tv);
+        }
+		ecrt_master_sync_slave_clocks(master);
+        ecrt_domain_queue(domain1);
+        ecrt_master_send(master);
+        rt_sem_signal(&master_sem);
+		
+        rt_task_wait_period();
+    }
+}
+
+/*****************************************************************************/
+
+int request_lock(void *data)
+{
+    // too close to the next real time cycle: deny access...
+    if (get_cycles() - t_last_cycle > t_critical) return -1;
+
+    // allow access
+    rt_sem_wait(&master_sem);
+    return 0;
+}
+
+/*****************************************************************************/
+
+void release_lock(void *data)
+{
+    rt_sem_signal(&master_sem);
+}
+
+/*****************************************************************************/
+
+int __init init_mod(void)
+{
+    int ret = -1, i;
+    RTIME tick_period, requested_ticks, now;
+    ec_slave_config_t *sc;
+
+    printk(KERN_INFO PFX "Starting...\n");
+
+    rt_sem_init(&master_sem, 1);
+
+    t_critical = cpu_khz * 1000 / FREQUENCY - cpu_khz * INHIBIT_TIME / 1000;
+
+    master = ecrt_request_master(0);
+    if (!master) {
+        ret = -EBUSY; 
+        printk(KERN_ERR PFX "Requesting master 0 failed!\n");
+        goto out_return;
+    }
+
+    ecrt_master_callbacks(master, request_lock, release_lock, NULL);
+
+    printk(KERN_INFO PFX "Registering domain...\n");
+    if (!(domain1 = ecrt_master_create_domain(master))) {
+        printk(KERN_ERR PFX "Domain creation failed!\n");
+        goto out_release_master;
+    }
+
+    printk(KERN_INFO PFX "Configuring PDOs...\n");
+
+    // create configuration for reference clock FIXME
+	if (!(sc = ecrt_master_slave_config(master, 0, 0, Beckhoff_EK1100))) {
+		printk(KERN_ERR PFX "Failed to get slave configuration.\n");
+		goto out_release_master;
+	}
+
+    for (i = 0; i < NUM_DIG_OUT; i++) {
+        if (!(sc = ecrt_master_slave_config(master,
+                        DigOutSlavePos(i), Beckhoff_EL2008))) {
+            printk(KERN_ERR PFX "Failed to get slave configuration.\n");
+            goto out_release_master;
+        }
+
+        if (ecrt_slave_config_pdos(sc, EC_END, el2008_syncs)) {
+            printk(KERN_ERR PFX "Failed to configure PDOs.\n");
+            goto out_release_master;
+        }
+
+        off_dig_out[i] = ecrt_slave_config_reg_pdo_entry(sc,
+                0x7000, 1, domain1, NULL);
+
+        if (off_dig_out[i] < 0)
+            goto out_release_master;
+    }
+
+	if (!(sc = ecrt_master_slave_config(master,
+					CounterSlavePos, IDS_Counter))) {
+		printk(KERN_ERR PFX "Failed to get slave configuration.\n");
+		goto out_release_master;
+	}
+	off_counter_in = ecrt_slave_config_reg_pdo_entry(sc,
+			0x6020, 0x11, domain1, NULL);
+	if (off_counter_in < 0)
+		goto out_release_master;
+	off_counter_out = ecrt_slave_config_reg_pdo_entry(sc,
+			0x7020, 1, domain1, NULL);
+	if (off_counter_out < 0)
+		goto out_release_master;
+
+#if 1
+    // configure SYNC signals for this slave
+	ecrt_slave_config_dc_assign_activate(sc, 0x0700);
+	ecrt_slave_config_dc_sync_cycle_times(sc, 1000000, 0);
+	ecrt_slave_config_dc_sync_shift_times(sc,  440000, 0);
+#endif
+
+    printk(KERN_INFO PFX "Activating master...\n");
+    if (ecrt_master_activate(master)) {
+        printk(KERN_ERR PFX "Failed to activate master!\n");
+        goto out_release_master;
+    }
+
+    // Get internal process data for domain
+    domain1_pd = ecrt_domain_data(domain1);
+
+    printk(KERN_INFO PFX "Starting cyclic sample thread...\n");
+    requested_ticks = nano2count(TIMERTICKS);
+    tick_period = start_rt_timer(requested_ticks);
+    printk(KERN_INFO PFX "RT timer started with %i/%i ticks.\n",
+           (int) tick_period, (int) requested_ticks);
+
+    if (rt_task_init(&task, run, 0, 2000, 0, 1, NULL)) {
+        printk(KERN_ERR PFX "Failed to init RTAI task!\n");
+        goto out_stop_timer;
+    }
+
+    now = rt_get_time();
+    if (rt_task_make_periodic(&task, now + tick_period, tick_period)) {
+        printk(KERN_ERR PFX "Failed to run RTAI task!\n");
+        goto out_stop_task;
+    }
+
+    printk(KERN_INFO PFX "Initialized.\n");
+    return 0;
+
+ out_stop_task:
+    rt_task_delete(&task);
+ out_stop_timer:
+    stop_rt_timer();
+ out_release_master:
+    printk(KERN_ERR PFX "Releasing master...\n");
+    ecrt_release_master(master);
+ out_return:
+    rt_sem_delete(&master_sem);
+    printk(KERN_ERR PFX "Failed to load. Aborting.\n");
+    return ret;
+}
+
+/*****************************************************************************/
+
+void __exit cleanup_mod(void)
+{
+    printk(KERN_INFO PFX "Stopping...\n");
+
+    rt_task_delete(&task);
+    stop_rt_timer();
+    ecrt_release_master(master);
+    rt_sem_delete(&master_sem);
+
+    printk(KERN_INFO PFX "Unloading.\n");
+}
+
+/*****************************************************************************/
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Florian Pose <fp@igh-essen.com>");
+MODULE_DESCRIPTION("EtherCAT distributed clocks sample module");
+
+module_init(init_mod);
+module_exit(cleanup_mod);
+
+/*****************************************************************************/
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/examples/dc_user/Makefile.am	Thu Apr 23 14:50:23 2009 +0000
@@ -0,0 +1,38 @@
+#------------------------------------------------------------------------------
+#
+#  $Id$
+#
+#  Copyright (C) 2006-2008  Florian Pose, Ingenieurgemeinschaft IgH
+#
+#  This file is part of the IgH EtherCAT Master.
+#
+#  The IgH EtherCAT Master is free software; you can redistribute it and/or
+#  modify it under the terms of the GNU General Public License version 2, as
+#  published by the Free Software Foundation.
+#
+#  The IgH EtherCAT Master is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General
+#  Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License along with
+#  the IgH EtherCAT Master; if not, write to the Free Software Foundation,
+#  Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+#
+#  ---
+#  
+#  The license mentioned above concerns the source code only. Using the
+#  EtherCAT technology and brand is only permitted in compliance with the
+#  industrial property and similar rights of Beckhoff Automation GmbH.
+#
+#------------------------------------------------------------------------------
+
+AM_CFLAGS = -Wall
+
+noinst_PROGRAMS = ec_dc_user_example
+
+ec_dc_user_example_SOURCES = main.c
+ec_dc_user_example_CFLAGS = -I$(top_srcdir)/include
+ec_dc_user_example_LDFLAGS = -L$(top_builddir)/lib/.libs -lethercat
+
+#------------------------------------------------------------------------------
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/examples/dc_user/main.c	Thu Apr 23 14:50:23 2009 +0000
@@ -0,0 +1,300 @@
+/*****************************************************************************
+ *
+ *  $Id$
+ *
+ *  Copyright (C) 2007-2009  Florian Pose, Ingenieurgemeinschaft IgH
+ *
+ *  This file is part of the IgH EtherCAT Master.
+ *
+ *  The IgH EtherCAT Master is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License version 2, as
+ *  published by the Free Software Foundation.
+ *
+ *  The IgH EtherCAT Master is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General
+ *  Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with the IgH EtherCAT Master; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ *
+ *  ---
+ *
+ *  The license mentioned above concerns the source code only. Using the
+ *  EtherCAT technology and brand is only permitted in compliance with the
+ *  industrial property and similar rights of Beckhoff Automation GmbH.
+ *
+ ****************************************************************************/
+
+#include <errno.h>
+#include <signal.h>
+#include <stdio.h>
+#include <string.h>
+#include <sys/resource.h>
+#include <sys/time.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+/****************************************************************************/
+
+#include "ecrt.h"
+
+/****************************************************************************/
+
+// Application parameters
+#define FREQUENCY 100
+#define PRIORITY 1
+
+// Optional features
+#define CONFIGURE_PDOS  1
+
+/****************************************************************************/
+
+// EtherCAT
+static ec_master_t *master = NULL;
+static ec_master_state_t master_state = {};
+
+static ec_domain_t *domain1 = NULL;
+static ec_domain_state_t domain1_state = {};
+
+// Timer
+static unsigned int sig_alarms = 0;
+static unsigned int user_alarms = 0;
+
+/****************************************************************************/
+
+// process data
+static uint8_t *domain1_pd = NULL;
+
+#define BusCouplerPos    0, 0
+#define DigOutSlavePos   0, 1
+#define CounterSlavePos  0, 2
+
+#define Beckhoff_EK1100 0x00000002, 0x044c2c52
+#define Beckhoff_EL2008 0x00000002, 0x07d83052
+#define IDS_Counter     0x000012ad, 0x05de3052
+
+// offsets for PDO entries
+static int off_dig_out;
+static int off_counter_in;
+static int off_counter_out;
+
+static unsigned int counter = 0;
+static unsigned int blink_counter = 0;
+static unsigned int blink = 0;
+static unsigned int sync_ref_counter = 0;
+struct timeval app_time;
+
+/*****************************************************************************/
+
+void check_domain1_state(void)
+{
+    ec_domain_state_t ds;
+
+    ecrt_domain_state(domain1, &ds);
+
+    if (ds.working_counter != domain1_state.working_counter)
+        printf("Domain1: WC %u.\n", ds.working_counter);
+    if (ds.wc_state != domain1_state.wc_state)
+        printf("Domain1: State %u.\n", ds.wc_state);
+
+    domain1_state = ds;
+}
+
+/*****************************************************************************/
+
+void check_master_state(void)
+{
+    ec_master_state_t ms;
+
+    ecrt_master_state(master, &ms);
+
+    if (ms.slaves_responding != master_state.slaves_responding)
+        printf("%u slave(s).\n", ms.slaves_responding);
+    if (ms.al_states != master_state.al_states)
+        printf("AL states: 0x%02X.\n", ms.al_states);
+    if (ms.link_up != master_state.link_up)
+        printf("Link is %s.\n", ms.link_up ? "up" : "down");
+
+    master_state = ms;
+}
+
+/****************************************************************************/
+
+void cyclic_task()
+{
+    int i;
+
+    // receive process data
+    ecrt_master_receive(master);
+    ecrt_domain_process(domain1);
+
+    // check process data state (optional)
+    check_domain1_state();
+
+    if (counter) {
+        counter--;
+    } else { // do this at 1 Hz
+        counter = FREQUENCY;
+
+        // calculate new process data
+        blink = !blink;
+
+        // check for master state (optional)
+        check_master_state();
+
+    }
+
+    if (blink_counter) {
+        blink_counter--;
+    } else {
+        blink_counter = 9;
+
+        // calculate new process data
+        blink = !blink;
+    }
+
+    // write process data
+    EC_WRITE_U8(domain1_pd + off_dig_out, blink ? 0x66 : 0x99);
+    EC_WRITE_U8(domain1_pd + off_counter_out, blink ? 0x00 : 0x02);
+
+    app_time.tv_usec += 1000000 / FREQUENCY;
+    if (app_time.tv_usec >= 1000000)  {
+        app_time.tv_usec -= 1000000;
+        app_time.tv_sec++;
+    }
+
+    if (sync_ref_counter) {
+        sync_ref_counter--;
+    } else {
+        sync_ref_counter = 9;
+        ecrt_master_sync_reference_clock(master, &app_time);
+    }
+    ecrt_master_sync_slave_clocks(master);
+
+    // send process data
+    ecrt_domain_queue(domain1);
+    ecrt_master_send(master);
+}
+
+/****************************************************************************/
+
+void signal_handler(int signum) {
+    switch (signum) {
+        case SIGALRM:
+            sig_alarms++;
+            break;
+    }
+}
+
+/****************************************************************************/
+
+int main(int argc, char **argv)
+{
+	ec_slave_config_t *sc;
+    struct sigaction sa;
+    struct itimerval tv;
+    
+    master = ecrt_request_master(0);
+	if (!master)
+		return -1;
+
+    domain1 = ecrt_master_create_domain(master);
+    if (!domain1)
+        return -1;
+
+    // Create configuration for bus coupler
+    sc = ecrt_master_slave_config(master, BusCouplerPos, Beckhoff_EK1100);
+    if (!sc)
+        return -1;
+
+    if (!(sc = ecrt_master_slave_config(master,
+                    DigOutSlavePos, Beckhoff_EL2008))) {
+        fprintf(stderr, "Failed to get slave configuration.\n");
+        return -1;
+    }
+
+    off_dig_out = ecrt_slave_config_reg_pdo_entry(sc,
+            0x7000, 1, domain1, NULL);
+    if (off_dig_out < 0)
+        return -1;
+
+	if (!(sc = ecrt_master_slave_config(master,
+					CounterSlavePos, IDS_Counter))) {
+        fprintf(stderr, "Failed to get slave configuration.\n");
+        return -1;
+	}
+
+	off_counter_in = ecrt_slave_config_reg_pdo_entry(sc,
+			0x6020, 0x11, domain1, NULL);
+	if (off_counter_in < 0)
+        return -1;
+
+	off_counter_out = ecrt_slave_config_reg_pdo_entry(sc,
+			0x7020, 1, domain1, NULL);
+	if (off_counter_out < 0)
+        return -1;
+
+#if 1
+    // configure SYNC signals for this slave
+	ecrt_slave_config_dc_assign_activate(sc, 0x0700);
+	ecrt_slave_config_dc_sync_cycle_times(sc, 10000000, 0);
+	ecrt_slave_config_dc_sync_shift_times(sc,  4400000, 0);
+#endif
+
+    printf("Activating master...\n");
+    if (ecrt_master_activate(master))
+        return -1;
+
+    if (!(domain1_pd = ecrt_domain_data(domain1))) {
+        return -1;
+    }
+
+#if PRIORITY
+    pid_t pid = getpid();
+    if (setpriority(PRIO_PROCESS, pid, -19))
+        fprintf(stderr, "Warning: Failed to set priority: %s\n",
+                strerror(errno));
+#endif
+
+    sa.sa_handler = signal_handler;
+    sigemptyset(&sa.sa_mask);
+    sa.sa_flags = 0;
+    if (sigaction(SIGALRM, &sa, 0)) {
+        fprintf(stderr, "Failed to install signal handler!\n");
+        return -1;
+    }
+
+    printf("Starting timer...\n");
+    tv.it_interval.tv_sec = 0;
+    tv.it_interval.tv_usec = 1000000 / FREQUENCY;
+    tv.it_value.tv_sec = 0;
+    tv.it_value.tv_usec = 1000;
+    if (setitimer(ITIMER_REAL, &tv, NULL)) {
+        fprintf(stderr, "Failed to start timer: %s\n", strerror(errno));
+        return 1;
+    }
+
+    gettimeofday(&app_time, NULL);
+
+    printf("Started.\n");
+	while (1) {
+        pause();
+
+#if 0
+        struct timeval t;
+        gettimeofday(&t, NULL);
+        printf("%u.%06u\n", t.tv_sec, t.tv_usec);
+#endif
+
+        while (sig_alarms != user_alarms) {
+            cyclic_task();
+            user_alarms++;
+        }
+	}
+
+	return 0;
+}
+
+/****************************************************************************/