1

/******************************************************************************

     2

 *

     3

 *  $Id$

     4

 *

     5

 *  Copyright (C) 2006  Florian Pose, Ingenieurgemeinschaft IgH

     6

 *

     7

 *  This file is part of the IgH EtherCAT Master.

     8

 *

     9

 *  The IgH EtherCAT Master is free software; you can redistribute it

    10

 *  and/or modify it under the terms of the GNU General Public License

    11

 *  as published by the Free Software Foundation; either version 2 of the

    12

 *  License, or (at your option) any later version.

    13

 *

    14

 *  The IgH EtherCAT Master is distributed in the hope that it will be

    15

 *  useful, but WITHOUT ANY WARRANTY; without even the implied warranty of

    16

 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

    17

 *  GNU General Public License for more details.

    18

 *

    19

 *  You should have received a copy of the GNU General Public License

    20

 *  along with the IgH EtherCAT Master; if not, write to the Free Software

    21

 *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA

    22

 *

    23

 *  The right to use EtherCAT Technology is granted and comes free of

    24

 *  charge under condition of compatibility of product made by

    25

 *  Licensee. People intending to distribute/sell products based on the

    26

 *  code, have to sign an agreement to guarantee that products using

    27

 *  software based on IgH EtherCAT master stay compatible with the actual

    28

 *  EtherCAT specification (which are released themselves as an open

    29

 *  standard) as the (only) precondition to have the right to use EtherCAT

    30

 *  Technology, IP and trade marks.

    31

 *

    32

 *****************************************************************************/

    33

    34

/**

    35

   \file

    36

   EtherCAT finite state machines.

    37

*/

    38

    39

/*****************************************************************************/

    40

    41

#ifndef __EC_STATES__

    42

#define __EC_STATES__

    43

    44

#include "../include/ecrt.h"

    45

#include "command.h"

    46

#include "slave.h"

    47

    48

/*****************************************************************************/

    49

    50

typedef struct ec_fsm ec_fsm_t;

    51

    52

/*****************************************************************************/

    53

    54

/**

    55

   Finite state machine of an EtherCAT master.

    56

*/

    57

    58

struct ec_fsm

    59

{

    60

    ec_master_t *master; /**< master the FSM runs on */

    61

    ec_slave_t *slave; /**< slave the FSM runs on */

    62

    ec_command_t command; /**< command used in the state machine */

    63

    64

    void (*master_state)(ec_fsm_t *); /**< master state function */

    65

    unsigned int master_slaves_responding; /**< number of responding slaves */

    66

    ec_slave_state_t master_slave_states; /**< states of responding slaves */

    67

    unsigned int master_validation; /**< non-zero, if validation to do */

    68

    69

    void (*slave_state)(ec_fsm_t *); /**< slave state function */

    70

    uint8_t slave_sii_num; /**< SII value iteration counter */

    71

    uint8_t *slave_cat_data; /**< temporary memory for category data */

    72

    uint16_t slave_cat_offset; /**< current category word offset in EEPROM */

    73

    uint16_t slave_cat_data_offset; /**< current offset in category data */

    74

    uint16_t slave_cat_type; /**< type of current category */

    75

    uint16_t slave_cat_words; /**< number of words of current category */

    76

    77

    void (*sii_state)(ec_fsm_t *); /**< SII state function */

    78

    uint16_t sii_offset; /**< input: offset in SII */

    79

    unsigned int sii_mode; /**< SII reading done by APRD (0) or NPRD (1) */

    80

    uint32_t sii_result; /**< output: read SII value (32bit) */

    81

    cycles_t sii_start; /**< sii start */

    82

    83

    void (*change_state)(ec_fsm_t *); /**< slave state change state function */

    84

    uint8_t change_new; /**< input: new state */

    85

    cycles_t change_start; /**< change start */

    86

};

    87

    88

/*****************************************************************************/

    89

    90

int ec_fsm_init(ec_fsm_t *, ec_master_t *);

    91

void ec_fsm_clear(ec_fsm_t *);

    92

void ec_fsm_reset(ec_fsm_t *);

    93

void ec_fsm_execute(ec_fsm_t *);

    94

    95

/*****************************************************************************/

    96

    97

#endif