author | Florian Pose <fp@igh-essen.com> |
Tue, 25 Jul 2006 10:05:04 +0000 | |
changeset 315 | 119f967aead8 |
parent 293 | 14aeb79aa992 |
child 325 | 7833cf70c4f2 |
permissions | -rw-r--r-- |
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/****************************************************************************** |
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* |
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* $Id$ |
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* |
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* Copyright (C) 2006 Florian Pose, Ingenieurgemeinschaft IgH |
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* |
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* This file is part of the IgH EtherCAT Master. |
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* |
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* The IgH EtherCAT Master is free software; you can redistribute it |
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* and/or modify it under the terms of the GNU General Public License |
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* as published by the Free Software Foundation; either version 2 of the |
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* License, or (at your option) any later version. |
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* |
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* The IgH EtherCAT Master is distributed in the hope that it will be |
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* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with the IgH EtherCAT Master; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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* |
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* The right to use EtherCAT Technology is granted and comes free of |
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* charge under condition of compatibility of product made by |
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* Licensee. People intending to distribute/sell products based on the |
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* code, have to sign an agreement to guarantee that products using |
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* software based on IgH EtherCAT master stay compatible with the actual |
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* EtherCAT specification (which are released themselves as an open |
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* standard) as the (only) precondition to have the right to use EtherCAT |
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* Technology, IP and trade marks. |
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* |
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*****************************************************************************/ |
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/** |
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\file |
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EtherCAT finite state machines. |
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*/ |
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/*****************************************************************************/ |
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#ifndef __EC_STATES__ |
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#define __EC_STATES__ |
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#include "../include/ecrt.h" |
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#include "datagram.h" |
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#include "slave.h" |
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/*****************************************************************************/ |
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typedef struct ec_fsm ec_fsm_t; /**< \see ec_fsm */ |
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/** |
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Finite state machine of an EtherCAT master. |
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*/ |
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struct ec_fsm |
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{ |
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ec_master_t *master; /**< master the FSM runs on */ |
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ec_slave_t *slave; /**< slave the FSM runs on */ |
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ec_datagram_t datagram; /**< datagram used in the state machine */ |
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void (*master_state)(ec_fsm_t *); /**< master state function */ |
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unsigned int master_slaves_responding; /**< number of responding slaves */ |
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ec_slave_state_t master_slave_states; /**< states of responding slaves */ |
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unsigned int master_validation; /**< non-zero, if validation to do */ |
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void (*slave_state)(ec_fsm_t *); /**< slave state function */ |
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void (*sii_state)(ec_fsm_t *); /**< SII state function */ |
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uint16_t sii_offset; /**< input: offset in SII */ |
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unsigned int sii_mode; /**< SII reading done by APRD (0) or NPRD (1) */ |
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uint8_t sii_value[4]; /**< raw SII value (32bit) */ |
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cycles_t sii_start; /**< sii start */ |
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void (*change_state)(ec_fsm_t *); /**< slave state change state function */ |
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uint8_t change_new; /**< input: new state */ |
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cycles_t change_start; /**< change start */ |
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}; |
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/*****************************************************************************/ |
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int ec_fsm_init(ec_fsm_t *, ec_master_t *); |
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void ec_fsm_clear(ec_fsm_t *); |
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void ec_fsm_reset(ec_fsm_t *); |
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void ec_fsm_execute(ec_fsm_t *); |
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/*****************************************************************************/ |
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#endif |