Fixed ISR.
authorFlorian Pose <fp@igh-essen.com>
Mon, 09 Jan 2012 10:52:46 +0100
changeset 2211 2a009dc7bd1c
parent 2210 353c285b5ff7
child 2213 be3291de22e3
Fixed ISR.
devices/e1000/e1000_main-2.6.31-ethercat.c
--- a/devices/e1000/e1000_main-2.6.31-ethercat.c	Mon Jan 09 10:34:33 2012 +0100
+++ b/devices/e1000/e1000_main-2.6.31-ethercat.c	Mon Jan 09 10:52:46 2012 +0100
@@ -3812,7 +3812,7 @@
 	} else {
 		/* in NAPI mode read ICR disables interrupts using IAM */
 
-		if ( !adapter->ecdev && (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) ) {
+		if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
 			hw->get_link_status = 1;
 			/* 80003ES2LAN workaround-- For packet buffer work-around on
 			 * link down event; disable receives here in the ISR and reset
@@ -3866,7 +3866,7 @@
 	/* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
 	 * need for the IMC write */
 
-	if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
+	if (!adapter->ecdev && unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
 		hw->get_link_status = 1;
 		/* 80003ES2LAN workaround--
 		 * For packet buffer work-around on link down event;
@@ -3884,22 +3884,33 @@
 			mod_timer(&adapter->watchdog_timer, jiffies + 1);
 	}
 
-	if (unlikely(hw->mac_type < e1000_82571)) {
-		/* disable interrupts, without the synchronize_irq bit */
-		ew32(IMC, ~0);
-		E1000_WRITE_FLUSH();
-	}
-	if (likely(napi_schedule_prep(&adapter->napi))) {
-		adapter->total_tx_bytes = 0;
-		adapter->total_tx_packets = 0;
-		adapter->total_rx_bytes = 0;
-		adapter->total_rx_packets = 0;
-		__napi_schedule(&adapter->napi);
+	if (adapter->ecdev) {
+		int i, ec_work_done = 0;
+		for (i = 0; i < E1000_MAX_INTR; i++) {
+			if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring,
+							&ec_work_done, 100) &&
+						!e1000_clean_tx_irq(adapter, adapter->tx_ring))) {
+				break;
+			}
+		}
 	} else {
-		/* this really should not happen! if it does it is basically a
-		 * bug, but not a hard error, so enable ints and continue */
-		if (!test_bit(__E1000_DOWN, &adapter->flags))
-			e1000_irq_enable(adapter);
+		if (unlikely(hw->mac_type < e1000_82571)) {
+			/* disable interrupts, without the synchronize_irq bit */
+			ew32(IMC, ~0);
+			E1000_WRITE_FLUSH();
+		}
+		if (likely(napi_schedule_prep(&adapter->napi))) {
+			adapter->total_tx_bytes = 0;
+			adapter->total_tx_packets = 0;
+			adapter->total_rx_bytes = 0;
+			adapter->total_rx_packets = 0;
+			__napi_schedule(&adapter->napi);
+		} else {
+			/* this really should not happen! if it does it is basically a
+			 * bug, but not a hard error, so enable ints and continue */
+			if (!test_bit(__E1000_DOWN, &adapter->flags))
+				e1000_irq_enable(adapter);
+		}
 	}
 
 	return IRQ_HANDLED;