3810 } |
3810 } |
3811 } |
3811 } |
3812 } else { |
3812 } else { |
3813 /* in NAPI mode read ICR disables interrupts using IAM */ |
3813 /* in NAPI mode read ICR disables interrupts using IAM */ |
3814 |
3814 |
3815 if ( !adapter->ecdev && (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) ) { |
3815 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { |
3816 hw->get_link_status = 1; |
3816 hw->get_link_status = 1; |
3817 /* 80003ES2LAN workaround-- For packet buffer work-around on |
3817 /* 80003ES2LAN workaround-- For packet buffer work-around on |
3818 * link down event; disable receives here in the ISR and reset |
3818 * link down event; disable receives here in the ISR and reset |
3819 * adapter in watchdog */ |
3819 * adapter in watchdog */ |
3820 if (netif_carrier_ok(netdev) && |
3820 if (netif_carrier_ok(netdev) && |
3864 return IRQ_NONE; |
3864 return IRQ_NONE; |
3865 |
3865 |
3866 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No |
3866 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No |
3867 * need for the IMC write */ |
3867 * need for the IMC write */ |
3868 |
3868 |
3869 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
3869 if (!adapter->ecdev && unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) { |
3870 hw->get_link_status = 1; |
3870 hw->get_link_status = 1; |
3871 /* 80003ES2LAN workaround-- |
3871 /* 80003ES2LAN workaround-- |
3872 * For packet buffer work-around on link down event; |
3872 * For packet buffer work-around on link down event; |
3873 * disable receives here in the ISR and |
3873 * disable receives here in the ISR and |
3874 * reset adapter in watchdog |
3874 * reset adapter in watchdog |
3882 /* guard against interrupt when we're going down */ |
3882 /* guard against interrupt when we're going down */ |
3883 if (!test_bit(__E1000_DOWN, &adapter->flags)) |
3883 if (!test_bit(__E1000_DOWN, &adapter->flags)) |
3884 mod_timer(&adapter->watchdog_timer, jiffies + 1); |
3884 mod_timer(&adapter->watchdog_timer, jiffies + 1); |
3885 } |
3885 } |
3886 |
3886 |
3887 if (unlikely(hw->mac_type < e1000_82571)) { |
3887 if (adapter->ecdev) { |
3888 /* disable interrupts, without the synchronize_irq bit */ |
3888 int i, ec_work_done = 0; |
3889 ew32(IMC, ~0); |
3889 for (i = 0; i < E1000_MAX_INTR; i++) { |
3890 E1000_WRITE_FLUSH(); |
3890 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring, |
3891 } |
3891 &ec_work_done, 100) && |
3892 if (likely(napi_schedule_prep(&adapter->napi))) { |
3892 !e1000_clean_tx_irq(adapter, adapter->tx_ring))) { |
3893 adapter->total_tx_bytes = 0; |
3893 break; |
3894 adapter->total_tx_packets = 0; |
3894 } |
3895 adapter->total_rx_bytes = 0; |
3895 } |
3896 adapter->total_rx_packets = 0; |
|
3897 __napi_schedule(&adapter->napi); |
|
3898 } else { |
3896 } else { |
3899 /* this really should not happen! if it does it is basically a |
3897 if (unlikely(hw->mac_type < e1000_82571)) { |
3900 * bug, but not a hard error, so enable ints and continue */ |
3898 /* disable interrupts, without the synchronize_irq bit */ |
3901 if (!test_bit(__E1000_DOWN, &adapter->flags)) |
3899 ew32(IMC, ~0); |
3902 e1000_irq_enable(adapter); |
3900 E1000_WRITE_FLUSH(); |
|
3901 } |
|
3902 if (likely(napi_schedule_prep(&adapter->napi))) { |
|
3903 adapter->total_tx_bytes = 0; |
|
3904 adapter->total_tx_packets = 0; |
|
3905 adapter->total_rx_bytes = 0; |
|
3906 adapter->total_rx_packets = 0; |
|
3907 __napi_schedule(&adapter->napi); |
|
3908 } else { |
|
3909 /* this really should not happen! if it does it is basically a |
|
3910 * bug, but not a hard error, so enable ints and continue */ |
|
3911 if (!test_bit(__E1000_DOWN, &adapter->flags)) |
|
3912 e1000_irq_enable(adapter); |
|
3913 } |
3903 } |
3914 } |
3904 |
3915 |
3905 return IRQ_HANDLED; |
3916 return IRQ_HANDLED; |
3906 } |
3917 } |
3907 |
3918 |