master/fsm_sii.c
changeset 872 d4e0380d63b3
parent 815 002fe9ec778f
child 979 405cc2d033e0
equal deleted inserted replaced
871:5a8959f77854 872:d4e0380d63b3
    44 #include "fsm_sii.h"
    44 #include "fsm_sii.h"
    45 
    45 
    46 /**
    46 /**
    47  * Read/Write timeout. [ms]
    47  * Read/Write timeout. [ms]
    48  */
    48  */
    49 #define EEPROM_TIMEOUT 10
    49 #define SII_TIMEOUT 10
    50 
    50 
    51 /**
    51 /**
    52  * Time before evaluating answer at writing. [ms]
    52  * Time before evaluating answer at writing. [ms]
    53  */
    53  */
    54 #define EEPROM_INHIBIT  5
    54 #define SII_INHIBIT  5
    55 
    55 
    56 //#define SII_DEBUG
    56 //#define SII_DEBUG
    57 
    57 
    58 /*****************************************************************************/
    58 /*****************************************************************************/
    59 
    59 
   288     // check "busy bit"
   288     // check "busy bit"
   289     if (EC_READ_U8(datagram->data + 1) & 0x81) { // busy bit or
   289     if (EC_READ_U8(datagram->data + 1) & 0x81) { // busy bit or
   290 												 // read operation busy
   290 												 // read operation busy
   291         // still busy... timeout?
   291         // still busy... timeout?
   292         if (datagram->cycles_received
   292         if (datagram->cycles_received
   293             - fsm->cycles_start >= (cycles_t) EEPROM_TIMEOUT * cpu_khz) {
   293             - fsm->cycles_start >= (cycles_t) SII_TIMEOUT * cpu_khz) {
   294             if (fsm->check_once_more) {
   294             if (fsm->check_once_more) {
   295 				fsm->check_once_more = 0;
   295 				fsm->check_once_more = 0;
   296 			} else {
   296 			} else {
   297                 EC_ERR("SII: Read timeout.\n");
   297                 EC_ERR("SII: Read timeout.\n");
   298                 fsm->state = ec_fsm_sii_state_error;
   298                 fsm->state = ec_fsm_sii_state_error;
   424     }
   424     }
   425 
   425 
   426 	/* FIXME: some slaves never answer with the busy flag set...
   426 	/* FIXME: some slaves never answer with the busy flag set...
   427 	 * wait a few ms for the write operation to complete. */
   427 	 * wait a few ms for the write operation to complete. */
   428 	if (datagram->cycles_received - fsm->cycles_start
   428 	if (datagram->cycles_received - fsm->cycles_start
   429 			< (cycles_t) EEPROM_INHIBIT * cpu_khz) {
   429 			< (cycles_t) SII_INHIBIT * cpu_khz) {
   430 #ifdef SII_DEBUG
   430 #ifdef SII_DEBUG
   431 		EC_DBG("too early.\n");
   431 		EC_DBG("too early.\n");
   432 #endif
   432 #endif
   433         // issue check datagram again
   433         // issue check datagram again
   434         fsm->retries = EC_FSM_RETRIES;
   434         fsm->retries = EC_FSM_RETRIES;
   437 
   437 
   438     if (EC_READ_U8(datagram->data + 1) & 0x82) { // busy bit or
   438     if (EC_READ_U8(datagram->data + 1) & 0x82) { // busy bit or
   439 												 // write operation busy bit
   439 												 // write operation busy bit
   440         // still busy... timeout?
   440         // still busy... timeout?
   441         if (datagram->cycles_received
   441         if (datagram->cycles_received
   442             - fsm->cycles_start >= (cycles_t) EEPROM_TIMEOUT * cpu_khz) {
   442             - fsm->cycles_start >= (cycles_t) SII_TIMEOUT * cpu_khz) {
   443             if (fsm->check_once_more) {
   443             if (fsm->check_once_more) {
   444 				fsm->check_once_more = 0;
   444 				fsm->check_once_more = 0;
   445 			} else {
   445 			} else {
   446                 EC_ERR("SII: Write timeout.\n");
   446                 EC_ERR("SII: Write timeout.\n");
   447                 fsm->state = ec_fsm_sii_state_error;
   447                 fsm->state = ec_fsm_sii_state_error;