devices/8139too-2.6.35-ethercat.c
changeset 2066 b544025bd696
parent 2054 3417bbc4ad2f
child 2421 bc2d4bf9cbe5
child 2589 2b9c78543663
equal deleted inserted replaced
2065:4d8c9a441ef6 2066:b544025bd696
       
     1 /******************************************************************************
       
     2  *
       
     3  *  $Id$
       
     4  *
       
     5  *  Copyright (C) 2006-2009  Florian Pose, Ingenieurgemeinschaft IgH
       
     6  *
       
     7  *  This file is part of the IgH EtherCAT Master.
       
     8  *
       
     9  *  The IgH EtherCAT Master is free software; you can redistribute it and/or
       
    10  *  modify it under the terms of the GNU General Public License version 2, as
       
    11  *  published by the Free Software Foundation.
       
    12  *
       
    13  *  The IgH EtherCAT Master is distributed in the hope that it will be useful,
       
    14  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
       
    15  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General
       
    16  *  Public License for more details.
       
    17  *
       
    18  *  You should have received a copy of the GNU General Public License along
       
    19  *  with the IgH EtherCAT Master; if not, write to the Free Software
       
    20  *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
       
    21  *
       
    22  *  ---
       
    23  *
       
    24  *  The license mentioned above concerns the source code only. Using the
       
    25  *  EtherCAT technology and brand is only permitted in compliance with the
       
    26  *  industrial property and similar rights of Beckhoff Automation GmbH.
       
    27  *
       
    28  *****************************************************************************/
       
    29 
       
    30 /**
       
    31    \file
       
    32    EtherCAT driver for RTL8139-compatible NICs.
       
    33 */
       
    34 
       
    35 /*****************************************************************************/
       
    36 
       
    37 /*
       
    38   Former documentation:
       
    39 
       
    40 	8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
       
    41 
       
    42 	Maintained by Jeff Garzik <jgarzik@pobox.com>
       
    43 	Copyright 2000-2002 Jeff Garzik
       
    44 
       
    45 	Much code comes from Donald Becker's rtl8139.c driver,
       
    46 	versions 1.13 and older.  This driver was originally based
       
    47 	on rtl8139.c version 1.07.  Header of rtl8139.c version 1.13:
       
    48 
       
    49 	-----<snip>-----
       
    50 
       
    51         	Written 1997-2001 by Donald Becker.
       
    52 		This software may be used and distributed according to the
       
    53 		terms of the GNU General Public License (GPL), incorporated
       
    54 		herein by reference.  Drivers based on or derived from this
       
    55 		code fall under the GPL and must retain the authorship,
       
    56 		copyright and license notice.  This file is not a complete
       
    57 		program and may only be used when the entire operating
       
    58 		system is licensed under the GPL.
       
    59 
       
    60 		This driver is for boards based on the RTL8129 and RTL8139
       
    61 		PCI ethernet chips.
       
    62 
       
    63 		The author may be reached as becker@scyld.com, or C/O Scyld
       
    64 		Computing Corporation 410 Severn Ave., Suite 210 Annapolis
       
    65 		MD 21403
       
    66 
       
    67 		Support and updates available at
       
    68 		http://www.scyld.com/network/rtl8139.html
       
    69 
       
    70 		Twister-tuning table provided by Kinston
       
    71 		<shangh@realtek.com.tw>.
       
    72 
       
    73 	-----<snip>-----
       
    74 
       
    75 	This software may be used and distributed according to the terms
       
    76 	of the GNU General Public License, incorporated herein by reference.
       
    77 
       
    78 	Contributors:
       
    79 
       
    80 		Donald Becker - he wrote the original driver, kudos to him!
       
    81 		(but please don't e-mail him for support, this isn't his driver)
       
    82 
       
    83 		Tigran Aivazian - bug fixes, skbuff free cleanup
       
    84 
       
    85 		Martin Mares - suggestions for PCI cleanup
       
    86 
       
    87 		David S. Miller - PCI DMA and softnet updates
       
    88 
       
    89 		Ernst Gill - fixes ported from BSD driver
       
    90 
       
    91 		Daniel Kobras - identified specific locations of
       
    92 			posted MMIO write bugginess
       
    93 
       
    94 		Gerard Sharp - bug fix, testing and feedback
       
    95 
       
    96 		David Ford - Rx ring wrap fix
       
    97 
       
    98 		Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
       
    99 		to find and fix a crucial bug on older chipsets.
       
   100 
       
   101 		Donald Becker/Chris Butterworth/Marcus Westergren -
       
   102 		Noticed various Rx packet size-related buglets.
       
   103 
       
   104 		Santiago Garcia Mantinan - testing and feedback
       
   105 
       
   106 		Jens David - 2.2.x kernel backports
       
   107 
       
   108 		Martin Dennett - incredibly helpful insight on undocumented
       
   109 		features of the 8139 chips
       
   110 
       
   111 		Jean-Jacques Michel - bug fix
       
   112 
       
   113 		Tobias Ringström - Rx interrupt status checking suggestion
       
   114 
       
   115 		Andrew Morton - Clear blocked signals, avoid
       
   116 		buffer overrun setting current->comm.
       
   117 
       
   118 		Kalle Olavi Niemitalo - Wake-on-LAN ioctls
       
   119 
       
   120 		Robert Kuebel - Save kernel thread from dying on any signal.
       
   121 
       
   122 	Submitting bug reports:
       
   123 
       
   124 		"rtl8139-diag -mmmaaavvveefN" output
       
   125 		enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
       
   126 
       
   127 */
       
   128 
       
   129 #define DRV_NAME	"ec_8139too"
       
   130 #define DRV_VERSION	"0.9.28"
       
   131 
       
   132 
       
   133 #include <linux/module.h>
       
   134 #include <linux/kernel.h>
       
   135 #include <linux/compiler.h>
       
   136 #include <linux/pci.h>
       
   137 #include <linux/init.h>
       
   138 #include <linux/netdevice.h>
       
   139 #include <linux/etherdevice.h>
       
   140 #include <linux/rtnetlink.h>
       
   141 #include <linux/delay.h>
       
   142 #include <linux/ethtool.h>
       
   143 #include <linux/mii.h>
       
   144 #include <linux/completion.h>
       
   145 #include <linux/crc32.h>
       
   146 #include <linux/io.h>
       
   147 #include <linux/uaccess.h>
       
   148 #include <linux/gfp.h>
       
   149 #include <asm/irq.h>
       
   150 
       
   151 #include "../globals.h"
       
   152 #include "ecdev.h"
       
   153 
       
   154 #define RTL8139_DRIVER_NAME DRV_NAME \
       
   155                             " EtherCAT-capable Fast Ethernet driver " \
       
   156                             DRV_VERSION ", master " EC_MASTER_VERSION
       
   157 
       
   158 #define PFX DRV_NAME ": "
       
   159 
       
   160 /* Default Message level */
       
   161 #define RTL8139_DEF_MSG_ENABLE   (NETIF_MSG_DRV   | \
       
   162                                  NETIF_MSG_PROBE  | \
       
   163                                  NETIF_MSG_LINK)
       
   164 
       
   165 
       
   166 /* define to 1, 2 or 3 to enable copious debugging info */
       
   167 #define RTL8139_DEBUG 0
       
   168 
       
   169 /* define to 1 to disable lightweight runtime debugging checks */
       
   170 #undef RTL8139_NDEBUG
       
   171 
       
   172 
       
   173 #ifdef RTL8139_NDEBUG
       
   174 #  define assert(expr) do {} while (0)
       
   175 #else
       
   176 #  define assert(expr) \
       
   177         if(unlikely(!(expr))) {				        \
       
   178         pr_err("Assertion failed! %s,%s,%s,line=%d\n",	\
       
   179 	#expr, __FILE__, __func__, __LINE__);			\
       
   180         }
       
   181 #endif
       
   182 
       
   183 
       
   184 /* A few user-configurable values. */
       
   185 /* media options */
       
   186 #define MAX_UNITS 8
       
   187 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   188 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   189 
       
   190 /* Whether to use MMIO or PIO. Default to MMIO. */
       
   191 #ifdef CONFIG_8139TOO_PIO
       
   192 static int use_io = 1;
       
   193 #else
       
   194 static int use_io = 0;
       
   195 #endif
       
   196 
       
   197 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
       
   198    The RTL chips use a 64 element hash table based on the Ethernet CRC.  */
       
   199 static int multicast_filter_limit = 32;
       
   200 
       
   201 /* bitmapped message enable number */
       
   202 static int debug = -1;
       
   203 
       
   204 /*
       
   205  * Receive ring size
       
   206  * Warning: 64K ring has hardware issues and may lock up.
       
   207  */
       
   208 #if defined(CONFIG_SH_DREAMCAST)
       
   209 #define RX_BUF_IDX 0	/* 8K ring */
       
   210 #else
       
   211 #define RX_BUF_IDX	2	/* 32K ring */
       
   212 #endif
       
   213 #define RX_BUF_LEN	(8192 << RX_BUF_IDX)
       
   214 #define RX_BUF_PAD	16
       
   215 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
       
   216 
       
   217 #if RX_BUF_LEN == 65536
       
   218 #define RX_BUF_TOT_LEN	RX_BUF_LEN
       
   219 #else
       
   220 #define RX_BUF_TOT_LEN	(RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
       
   221 #endif
       
   222 
       
   223 /* Number of Tx descriptor registers. */
       
   224 #define NUM_TX_DESC	4
       
   225 
       
   226 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
       
   227 #define MAX_ETH_FRAME_SIZE	1536
       
   228 
       
   229 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
       
   230 #define TX_BUF_SIZE	MAX_ETH_FRAME_SIZE
       
   231 #define TX_BUF_TOT_LEN	(TX_BUF_SIZE * NUM_TX_DESC)
       
   232 
       
   233 /* PCI Tuning Parameters
       
   234    Threshold is bytes transferred to chip before transmission starts. */
       
   235 #define TX_FIFO_THRESH 256	/* In bytes, rounded down to 32 byte units. */
       
   236 
       
   237 /* The following settings are log_2(bytes)-4:  0 == 16 bytes .. 6==1024, 7==end of packet. */
       
   238 #define RX_FIFO_THRESH	7	/* Rx buffer level before first PCI xfer.  */
       
   239 #define RX_DMA_BURST	7	/* Maximum PCI burst, '6' is 1024 */
       
   240 #define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
       
   241 #define TX_RETRY	8	/* 0-15.  retries = 16 + (TX_RETRY * 16) */
       
   242 
       
   243 /* Operational parameters that usually are not changed. */
       
   244 /* Time in jiffies before concluding the transmitter is hung. */
       
   245 #define TX_TIMEOUT  (6*HZ)
       
   246 
       
   247 
       
   248 enum {
       
   249 	HAS_MII_XCVR = 0x010000,
       
   250 	HAS_CHIP_XCVR = 0x020000,
       
   251 	HAS_LNK_CHNG = 0x040000,
       
   252 };
       
   253 
       
   254 #define RTL_NUM_STATS 4		/* number of ETHTOOL_GSTATS u64's */
       
   255 #define RTL_REGS_VER 1		/* version of reg. data in ETHTOOL_GREGS */
       
   256 #define RTL_MIN_IO_SIZE 0x80
       
   257 #define RTL8139B_IO_SIZE 256
       
   258 
       
   259 #define RTL8129_CAPS	HAS_MII_XCVR
       
   260 #define RTL8139_CAPS	(HAS_CHIP_XCVR|HAS_LNK_CHNG)
       
   261 
       
   262 typedef enum {
       
   263 	RTL8139 = 0,
       
   264 	RTL8129,
       
   265 } board_t;
       
   266 
       
   267 
       
   268 /* indexed by board_t, above */
       
   269 static const struct {
       
   270 	const char *name;
       
   271 	u32 hw_flags;
       
   272 } board_info[] __devinitdata = {
       
   273 	{ "RealTek RTL8139", RTL8139_CAPS },
       
   274 	{ "RealTek RTL8129", RTL8129_CAPS },
       
   275 };
       
   276 
       
   277 
       
   278 static DEFINE_PCI_DEVICE_TABLE(rtl8139_pci_tbl) = {
       
   279 	{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   280 	{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   281 	{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   282 	{0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   283 	{0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   284 	{0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   285 	{0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   286 	{0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   287 	{0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   288 	{0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   289 	{0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   290 	{0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   291 	{0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   292 	{0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   293 	{0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   294 	{0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   295 	{0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   296 	{0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   297 	{0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   298 
       
   299 #ifdef CONFIG_SH_SECUREEDGE5410
       
   300 	/* Bogus 8139 silicon reports 8129 without external PROM :-( */
       
   301 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   302 #endif
       
   303 #ifdef CONFIG_8139TOO_8129
       
   304 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
       
   305 #endif
       
   306 
       
   307 	/* some crazy cards report invalid vendor ids like
       
   308 	 * 0x0001 here.  The other ids are valid and constant,
       
   309 	 * so we simply don't match on the main vendor id.
       
   310 	 */
       
   311 	{PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
       
   312 	{PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
       
   313 	{PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
       
   314 
       
   315 	{0,}
       
   316 };
       
   317 
       
   318 /* prevent driver from being loaded automatically */
       
   319 //MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
       
   320 
       
   321 static struct {
       
   322 	const char str[ETH_GSTRING_LEN];
       
   323 } ethtool_stats_keys[] = {
       
   324 	{ "early_rx" },
       
   325 	{ "tx_buf_mapped" },
       
   326 	{ "tx_timeouts" },
       
   327 	{ "rx_lost_in_ring" },
       
   328 };
       
   329 
       
   330 /* The rest of these values should never change. */
       
   331 
       
   332 /* Symbolic offsets to registers. */
       
   333 enum RTL8139_registers {
       
   334 	MAC0		= 0,	 /* Ethernet hardware address. */
       
   335 	MAR0		= 8,	 /* Multicast filter. */
       
   336 	TxStatus0	= 0x10,	 /* Transmit status (Four 32bit registers). */
       
   337 	TxAddr0		= 0x20,	 /* Tx descriptors (also four 32bit). */
       
   338 	RxBuf		= 0x30,
       
   339 	ChipCmd		= 0x37,
       
   340 	RxBufPtr	= 0x38,
       
   341 	RxBufAddr	= 0x3A,
       
   342 	IntrMask	= 0x3C,
       
   343 	IntrStatus	= 0x3E,
       
   344 	TxConfig	= 0x40,
       
   345 	RxConfig	= 0x44,
       
   346 	Timer		= 0x48,	 /* A general-purpose counter. */
       
   347 	RxMissed	= 0x4C,  /* 24 bits valid, write clears. */
       
   348 	Cfg9346		= 0x50,
       
   349 	Config0		= 0x51,
       
   350 	Config1		= 0x52,
       
   351 	TimerInt	= 0x54,
       
   352 	MediaStatus	= 0x58,
       
   353 	Config3		= 0x59,
       
   354 	Config4		= 0x5A,	 /* absent on RTL-8139A */
       
   355 	HltClk		= 0x5B,
       
   356 	MultiIntr	= 0x5C,
       
   357 	TxSummary	= 0x60,
       
   358 	BasicModeCtrl	= 0x62,
       
   359 	BasicModeStatus	= 0x64,
       
   360 	NWayAdvert	= 0x66,
       
   361 	NWayLPAR	= 0x68,
       
   362 	NWayExpansion	= 0x6A,
       
   363 	/* Undocumented registers, but required for proper operation. */
       
   364 	FIFOTMS		= 0x70,	 /* FIFO Control and test. */
       
   365 	CSCR		= 0x74,	 /* Chip Status and Configuration Register. */
       
   366 	PARA78		= 0x78,
       
   367 	FlashReg	= 0xD4,	/* Communication with Flash ROM, four bytes. */
       
   368 	PARA7c		= 0x7c,	 /* Magic transceiver parameter register. */
       
   369 	Config5		= 0xD8,	 /* absent on RTL-8139A */
       
   370 };
       
   371 
       
   372 enum ClearBitMasks {
       
   373 	MultiIntrClear	= 0xF000,
       
   374 	ChipCmdClear	= 0xE2,
       
   375 	Config1Clear	= (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
       
   376 };
       
   377 
       
   378 enum ChipCmdBits {
       
   379 	CmdReset	= 0x10,
       
   380 	CmdRxEnb	= 0x08,
       
   381 	CmdTxEnb	= 0x04,
       
   382 	RxBufEmpty	= 0x01,
       
   383 };
       
   384 
       
   385 /* Interrupt register bits, using my own meaningful names. */
       
   386 enum IntrStatusBits {
       
   387 	PCIErr		= 0x8000,
       
   388 	PCSTimeout	= 0x4000,
       
   389 	RxFIFOOver	= 0x40,
       
   390 	RxUnderrun	= 0x20,
       
   391 	RxOverflow	= 0x10,
       
   392 	TxErr		= 0x08,
       
   393 	TxOK		= 0x04,
       
   394 	RxErr		= 0x02,
       
   395 	RxOK		= 0x01,
       
   396 
       
   397 	RxAckBits	= RxFIFOOver | RxOverflow | RxOK,
       
   398 };
       
   399 
       
   400 enum TxStatusBits {
       
   401 	TxHostOwns	= 0x2000,
       
   402 	TxUnderrun	= 0x4000,
       
   403 	TxStatOK	= 0x8000,
       
   404 	TxOutOfWindow	= 0x20000000,
       
   405 	TxAborted	= 0x40000000,
       
   406 	TxCarrierLost	= 0x80000000,
       
   407 };
       
   408 enum RxStatusBits {
       
   409 	RxMulticast	= 0x8000,
       
   410 	RxPhysical	= 0x4000,
       
   411 	RxBroadcast	= 0x2000,
       
   412 	RxBadSymbol	= 0x0020,
       
   413 	RxRunt		= 0x0010,
       
   414 	RxTooLong	= 0x0008,
       
   415 	RxCRCErr	= 0x0004,
       
   416 	RxBadAlign	= 0x0002,
       
   417 	RxStatusOK	= 0x0001,
       
   418 };
       
   419 
       
   420 /* Bits in RxConfig. */
       
   421 enum rx_mode_bits {
       
   422 	AcceptErr	= 0x20,
       
   423 	AcceptRunt	= 0x10,
       
   424 	AcceptBroadcast	= 0x08,
       
   425 	AcceptMulticast	= 0x04,
       
   426 	AcceptMyPhys	= 0x02,
       
   427 	AcceptAllPhys	= 0x01,
       
   428 };
       
   429 
       
   430 /* Bits in TxConfig. */
       
   431 enum tx_config_bits {
       
   432         /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */
       
   433         TxIFGShift	= 24,
       
   434         TxIFG84		= (0 << TxIFGShift), /* 8.4us / 840ns (10 / 100Mbps) */
       
   435         TxIFG88		= (1 << TxIFGShift), /* 8.8us / 880ns (10 / 100Mbps) */
       
   436         TxIFG92		= (2 << TxIFGShift), /* 9.2us / 920ns (10 / 100Mbps) */
       
   437         TxIFG96		= (3 << TxIFGShift), /* 9.6us / 960ns (10 / 100Mbps) */
       
   438 
       
   439 	TxLoopBack	= (1 << 18) | (1 << 17), /* enable loopback test mode */
       
   440 	TxCRC		= (1 << 16),	/* DISABLE Tx pkt CRC append */
       
   441 	TxClearAbt	= (1 << 0),	/* Clear abort (WO) */
       
   442 	TxDMAShift	= 8, /* DMA burst value (0-7) is shifted X many bits */
       
   443 	TxRetryShift	= 4, /* TXRR value (0-15) is shifted X many bits */
       
   444 
       
   445 	TxVersionMask	= 0x7C800000, /* mask out version bits 30-26, 23 */
       
   446 };
       
   447 
       
   448 /* Bits in Config1 */
       
   449 enum Config1Bits {
       
   450 	Cfg1_PM_Enable	= 0x01,
       
   451 	Cfg1_VPD_Enable	= 0x02,
       
   452 	Cfg1_PIO	= 0x04,
       
   453 	Cfg1_MMIO	= 0x08,
       
   454 	LWAKE		= 0x10,		/* not on 8139, 8139A */
       
   455 	Cfg1_Driver_Load = 0x20,
       
   456 	Cfg1_LED0	= 0x40,
       
   457 	Cfg1_LED1	= 0x80,
       
   458 	SLEEP		= (1 << 1),	/* only on 8139, 8139A */
       
   459 	PWRDN		= (1 << 0),	/* only on 8139, 8139A */
       
   460 };
       
   461 
       
   462 /* Bits in Config3 */
       
   463 enum Config3Bits {
       
   464 	Cfg3_FBtBEn   	= (1 << 0), /* 1	= Fast Back to Back */
       
   465 	Cfg3_FuncRegEn	= (1 << 1), /* 1	= enable CardBus Function registers */
       
   466 	Cfg3_CLKRUN_En	= (1 << 2), /* 1	= enable CLKRUN */
       
   467 	Cfg3_CardB_En 	= (1 << 3), /* 1	= enable CardBus registers */
       
   468 	Cfg3_LinkUp   	= (1 << 4), /* 1	= wake up on link up */
       
   469 	Cfg3_Magic    	= (1 << 5), /* 1	= wake up on Magic Packet (tm) */
       
   470 	Cfg3_PARM_En  	= (1 << 6), /* 0	= software can set twister parameters */
       
   471 	Cfg3_GNTSel   	= (1 << 7), /* 1	= delay 1 clock from PCI GNT signal */
       
   472 };
       
   473 
       
   474 /* Bits in Config4 */
       
   475 enum Config4Bits {
       
   476 	LWPTN	= (1 << 2),	/* not on 8139, 8139A */
       
   477 };
       
   478 
       
   479 /* Bits in Config5 */
       
   480 enum Config5Bits {
       
   481 	Cfg5_PME_STS   	= (1 << 0), /* 1	= PCI reset resets PME_Status */
       
   482 	Cfg5_LANWake   	= (1 << 1), /* 1	= enable LANWake signal */
       
   483 	Cfg5_LDPS      	= (1 << 2), /* 0	= save power when link is down */
       
   484 	Cfg5_FIFOAddrPtr= (1 << 3), /* Realtek internal SRAM testing */
       
   485 	Cfg5_UWF        = (1 << 4), /* 1 = accept unicast wakeup frame */
       
   486 	Cfg5_MWF        = (1 << 5), /* 1 = accept multicast wakeup frame */
       
   487 	Cfg5_BWF        = (1 << 6), /* 1 = accept broadcast wakeup frame */
       
   488 };
       
   489 
       
   490 enum RxConfigBits {
       
   491 	/* rx fifo threshold */
       
   492 	RxCfgFIFOShift	= 13,
       
   493 	RxCfgFIFONone	= (7 << RxCfgFIFOShift),
       
   494 
       
   495 	/* Max DMA burst */
       
   496 	RxCfgDMAShift	= 8,
       
   497 	RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
       
   498 
       
   499 	/* rx ring buffer length */
       
   500 	RxCfgRcv8K	= 0,
       
   501 	RxCfgRcv16K	= (1 << 11),
       
   502 	RxCfgRcv32K	= (1 << 12),
       
   503 	RxCfgRcv64K	= (1 << 11) | (1 << 12),
       
   504 
       
   505 	/* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
       
   506 	RxNoWrap	= (1 << 7),
       
   507 };
       
   508 
       
   509 /* Twister tuning parameters from RealTek.
       
   510    Completely undocumented, but required to tune bad links on some boards. */
       
   511 enum CSCRBits {
       
   512 	CSCR_LinkOKBit		= 0x0400,
       
   513 	CSCR_LinkChangeBit	= 0x0800,
       
   514 	CSCR_LinkStatusBits	= 0x0f000,
       
   515 	CSCR_LinkDownOffCmd	= 0x003c0,
       
   516 	CSCR_LinkDownCmd	= 0x0f3c0,
       
   517 };
       
   518 
       
   519 enum Cfg9346Bits {
       
   520 	Cfg9346_Lock	= 0x00,
       
   521 	Cfg9346_Unlock	= 0xC0,
       
   522 };
       
   523 
       
   524 typedef enum {
       
   525 	CH_8139	= 0,
       
   526 	CH_8139_K,
       
   527 	CH_8139A,
       
   528 	CH_8139A_G,
       
   529 	CH_8139B,
       
   530 	CH_8130,
       
   531 	CH_8139C,
       
   532 	CH_8100,
       
   533 	CH_8100B_8139D,
       
   534 	CH_8101,
       
   535 } chip_t;
       
   536 
       
   537 enum chip_flags {
       
   538 	HasHltClk	= (1 << 0),
       
   539 	HasLWake	= (1 << 1),
       
   540 };
       
   541 
       
   542 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
       
   543 	(b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
       
   544 #define HW_REVID_MASK	HW_REVID(1, 1, 1, 1, 1, 1, 1)
       
   545 
       
   546 /* directly indexed by chip_t, above */
       
   547 static const struct {
       
   548 	const char *name;
       
   549 	u32 version; /* from RTL8139C/RTL8139D docs */
       
   550 	u32 flags;
       
   551 } rtl_chip_info[] = {
       
   552 	{ "RTL-8139",
       
   553 	  HW_REVID(1, 0, 0, 0, 0, 0, 0),
       
   554 	  HasHltClk,
       
   555 	},
       
   556 
       
   557 	{ "RTL-8139 rev K",
       
   558 	  HW_REVID(1, 1, 0, 0, 0, 0, 0),
       
   559 	  HasHltClk,
       
   560 	},
       
   561 
       
   562 	{ "RTL-8139A",
       
   563 	  HW_REVID(1, 1, 1, 0, 0, 0, 0),
       
   564 	  HasHltClk, /* XXX undocumented? */
       
   565 	},
       
   566 
       
   567 	{ "RTL-8139A rev G",
       
   568 	  HW_REVID(1, 1, 1, 0, 0, 1, 0),
       
   569 	  HasHltClk, /* XXX undocumented? */
       
   570 	},
       
   571 
       
   572 	{ "RTL-8139B",
       
   573 	  HW_REVID(1, 1, 1, 1, 0, 0, 0),
       
   574 	  HasLWake,
       
   575 	},
       
   576 
       
   577 	{ "RTL-8130",
       
   578 	  HW_REVID(1, 1, 1, 1, 1, 0, 0),
       
   579 	  HasLWake,
       
   580 	},
       
   581 
       
   582 	{ "RTL-8139C",
       
   583 	  HW_REVID(1, 1, 1, 0, 1, 0, 0),
       
   584 	  HasLWake,
       
   585 	},
       
   586 
       
   587 	{ "RTL-8100",
       
   588 	  HW_REVID(1, 1, 1, 1, 0, 1, 0),
       
   589  	  HasLWake,
       
   590  	},
       
   591 
       
   592 	{ "RTL-8100B/8139D",
       
   593 	  HW_REVID(1, 1, 1, 0, 1, 0, 1),
       
   594 	  HasHltClk /* XXX undocumented? */
       
   595 	| HasLWake,
       
   596 	},
       
   597 
       
   598 	{ "RTL-8101",
       
   599 	  HW_REVID(1, 1, 1, 0, 1, 1, 1),
       
   600 	  HasLWake,
       
   601 	},
       
   602 };
       
   603 
       
   604 struct rtl_extra_stats {
       
   605 	unsigned long early_rx;
       
   606 	unsigned long tx_buf_mapped;
       
   607 	unsigned long tx_timeouts;
       
   608 	unsigned long rx_lost_in_ring;
       
   609 };
       
   610 
       
   611 struct rtl8139_private {
       
   612 	void __iomem		*mmio_addr;
       
   613 	int			drv_flags;
       
   614 	struct pci_dev		*pci_dev;
       
   615 	u32			msg_enable;
       
   616 	struct napi_struct	napi;
       
   617 	struct net_device	*dev;
       
   618 
       
   619 	unsigned char		*rx_ring;
       
   620 	unsigned int		cur_rx;	/* RX buf index of next pkt */
       
   621 	dma_addr_t		rx_ring_dma;
       
   622 
       
   623 	unsigned int		tx_flag;
       
   624 	unsigned long		cur_tx;
       
   625 	unsigned long		dirty_tx;
       
   626 	unsigned char		*tx_buf[NUM_TX_DESC];	/* Tx bounce buffers */
       
   627 	unsigned char		*tx_bufs;	/* Tx bounce buffer region. */
       
   628 	dma_addr_t		tx_bufs_dma;
       
   629 
       
   630 	signed char		phys[4];	/* MII device addresses. */
       
   631 
       
   632 				/* Twister tune state. */
       
   633 	char			twistie, twist_row, twist_col;
       
   634 
       
   635 	unsigned int		watchdog_fired : 1;
       
   636 	unsigned int		default_port : 4; /* Last dev->if_port value. */
       
   637 	unsigned int		have_thread : 1;
       
   638 
       
   639 	spinlock_t		lock;
       
   640 	spinlock_t		rx_lock;
       
   641 
       
   642 	chip_t			chipset;
       
   643 	u32			rx_config;
       
   644 	struct rtl_extra_stats	xstats;
       
   645 
       
   646 	struct delayed_work	thread;
       
   647 
       
   648 	struct mii_if_info	mii;
       
   649 	unsigned int		regs_len;
       
   650 	unsigned long		fifo_copy_timeout;
       
   651     
       
   652 	ec_device_t *ecdev;
       
   653 };
       
   654 
       
   655 MODULE_AUTHOR("Florian Pose <fp@igh-essen.com>");
       
   656 MODULE_DESCRIPTION("RealTek RTL-8139 EtherCAT driver");
       
   657 MODULE_LICENSE("GPL");
       
   658 MODULE_VERSION(EC_MASTER_VERSION);
       
   659 
       
   660 module_param(use_io, int, 0);
       
   661 MODULE_PARM_DESC(use_io, "Force use of I/O access mode. 0=MMIO 1=PIO");
       
   662 module_param(multicast_filter_limit, int, 0);
       
   663 module_param_array(media, int, NULL, 0);
       
   664 module_param_array(full_duplex, int, NULL, 0);
       
   665 module_param(debug, int, 0);
       
   666 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
       
   667 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
       
   668 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
       
   669 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
       
   670 
       
   671 void ec_poll(struct net_device *);
       
   672 
       
   673 static int read_eeprom (void __iomem *ioaddr, int location, int addr_len);
       
   674 static int rtl8139_open (struct net_device *dev);
       
   675 static int mdio_read (struct net_device *dev, int phy_id, int location);
       
   676 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
   677 			int val);
       
   678 static void rtl8139_start_thread(struct rtl8139_private *tp);
       
   679 static void rtl8139_tx_timeout (struct net_device *dev);
       
   680 static void rtl8139_init_ring (struct net_device *dev);
       
   681 static int rtl8139_start_xmit (struct sk_buff *skb,
       
   682 			       struct net_device *dev);
       
   683 #ifdef CONFIG_NET_POLL_CONTROLLER
       
   684 static void rtl8139_poll_controller(struct net_device *dev);
       
   685 #endif
       
   686 static int rtl8139_set_mac_address(struct net_device *dev, void *p);
       
   687 static int rtl8139_poll(struct napi_struct *napi, int budget);
       
   688 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance);
       
   689 static int rtl8139_close (struct net_device *dev);
       
   690 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
       
   691 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev);
       
   692 static void rtl8139_set_rx_mode (struct net_device *dev);
       
   693 static void __set_rx_mode (struct net_device *dev);
       
   694 static void rtl8139_hw_start (struct net_device *dev);
       
   695 static void rtl8139_thread (struct work_struct *work);
       
   696 static void rtl8139_tx_timeout_task(struct work_struct *work);
       
   697 static const struct ethtool_ops rtl8139_ethtool_ops;
       
   698 
       
   699 /* write MMIO register, with flush */
       
   700 /* Flush avoids rtl8139 bug w/ posted MMIO writes */
       
   701 #define RTL_W8_F(reg, val8)	do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0)
       
   702 #define RTL_W16_F(reg, val16)	do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0)
       
   703 #define RTL_W32_F(reg, val32)	do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0)
       
   704 
       
   705 /* write MMIO register */
       
   706 #define RTL_W8(reg, val8)	iowrite8 ((val8), ioaddr + (reg))
       
   707 #define RTL_W16(reg, val16)	iowrite16 ((val16), ioaddr + (reg))
       
   708 #define RTL_W32(reg, val32)	iowrite32 ((val32), ioaddr + (reg))
       
   709 
       
   710 /* read MMIO register */
       
   711 #define RTL_R8(reg)		ioread8 (ioaddr + (reg))
       
   712 #define RTL_R16(reg)		ioread16 (ioaddr + (reg))
       
   713 #define RTL_R32(reg)		((unsigned long) ioread32 (ioaddr + (reg)))
       
   714 
       
   715 
       
   716 static const u16 rtl8139_intr_mask =
       
   717 	PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
       
   718 	TxErr | TxOK | RxErr | RxOK;
       
   719 
       
   720 static const u16 rtl8139_norx_intr_mask =
       
   721 	PCIErr | PCSTimeout | RxUnderrun |
       
   722 	TxErr | TxOK | RxErr ;
       
   723 
       
   724 #if RX_BUF_IDX == 0
       
   725 static const unsigned int rtl8139_rx_config =
       
   726 	RxCfgRcv8K | RxNoWrap |
       
   727 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   728 	(RX_DMA_BURST << RxCfgDMAShift);
       
   729 #elif RX_BUF_IDX == 1
       
   730 static const unsigned int rtl8139_rx_config =
       
   731 	RxCfgRcv16K | RxNoWrap |
       
   732 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   733 	(RX_DMA_BURST << RxCfgDMAShift);
       
   734 #elif RX_BUF_IDX == 2
       
   735 static const unsigned int rtl8139_rx_config =
       
   736 	RxCfgRcv32K | RxNoWrap |
       
   737 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   738 	(RX_DMA_BURST << RxCfgDMAShift);
       
   739 #elif RX_BUF_IDX == 3
       
   740 static const unsigned int rtl8139_rx_config =
       
   741 	RxCfgRcv64K |
       
   742 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   743 	(RX_DMA_BURST << RxCfgDMAShift);
       
   744 #else
       
   745 #error "Invalid configuration for 8139_RXBUF_IDX"
       
   746 #endif
       
   747 
       
   748 static const unsigned int rtl8139_tx_config =
       
   749 	TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
       
   750 
       
   751 static void __rtl8139_cleanup_dev (struct net_device *dev)
       
   752 {
       
   753 	struct rtl8139_private *tp = netdev_priv(dev);
       
   754 	struct pci_dev *pdev;
       
   755 
       
   756 	assert (dev != NULL);
       
   757 	assert (tp->pci_dev != NULL);
       
   758 	pdev = tp->pci_dev;
       
   759 
       
   760 	if (tp->mmio_addr)
       
   761 		pci_iounmap (pdev, tp->mmio_addr);
       
   762 
       
   763 	/* it's ok to call this even if we have no regions to free */
       
   764 	pci_release_regions (pdev);
       
   765 
       
   766 	free_netdev(dev);
       
   767 	pci_set_drvdata (pdev, NULL);
       
   768 }
       
   769 
       
   770 
       
   771 static void rtl8139_chip_reset (void __iomem *ioaddr)
       
   772 {
       
   773 	int i;
       
   774 
       
   775 	/* Soft reset the chip. */
       
   776 	RTL_W8 (ChipCmd, CmdReset);
       
   777 
       
   778 	/* Check that the chip has finished the reset. */
       
   779 	for (i = 1000; i > 0; i--) {
       
   780 		barrier();
       
   781 		if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
       
   782 			break;
       
   783 		udelay (10);
       
   784 	}
       
   785 }
       
   786 
       
   787 
       
   788 static __devinit struct net_device * rtl8139_init_board (struct pci_dev *pdev)
       
   789 {
       
   790 	void __iomem *ioaddr;
       
   791 	struct net_device *dev;
       
   792 	struct rtl8139_private *tp;
       
   793 	u8 tmp8;
       
   794 	int rc, disable_dev_on_err = 0;
       
   795 	unsigned int i;
       
   796 	unsigned long pio_start, pio_end, pio_flags, pio_len;
       
   797 	unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
       
   798 	u32 version;
       
   799 
       
   800 	assert (pdev != NULL);
       
   801 
       
   802 	/* dev and priv zeroed in alloc_etherdev */
       
   803 	dev = alloc_etherdev (sizeof (*tp));
       
   804 	if (dev == NULL) {
       
   805 		dev_err(&pdev->dev, "Unable to alloc new net device\n");
       
   806 		return ERR_PTR(-ENOMEM);
       
   807 	}
       
   808 	SET_NETDEV_DEV(dev, &pdev->dev);
       
   809 
       
   810 	tp = netdev_priv(dev);
       
   811 	tp->pci_dev = pdev;
       
   812 
       
   813 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
       
   814 	rc = pci_enable_device (pdev);
       
   815 	if (rc)
       
   816 		goto err_out;
       
   817 
       
   818 	pio_start = pci_resource_start (pdev, 0);
       
   819 	pio_end = pci_resource_end (pdev, 0);
       
   820 	pio_flags = pci_resource_flags (pdev, 0);
       
   821 	pio_len = pci_resource_len (pdev, 0);
       
   822 
       
   823 	mmio_start = pci_resource_start (pdev, 1);
       
   824 	mmio_end = pci_resource_end (pdev, 1);
       
   825 	mmio_flags = pci_resource_flags (pdev, 1);
       
   826 	mmio_len = pci_resource_len (pdev, 1);
       
   827 
       
   828 	/* set this immediately, we need to know before
       
   829 	 * we talk to the chip directly */
       
   830 	pr_debug("PIO region size == 0x%02lX\n", pio_len);
       
   831 	pr_debug("MMIO region size == 0x%02lX\n", mmio_len);
       
   832 
       
   833 retry:
       
   834 	if (use_io) {
       
   835 		/* make sure PCI base addr 0 is PIO */
       
   836 		if (!(pio_flags & IORESOURCE_IO)) {
       
   837 			dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n");
       
   838 			rc = -ENODEV;
       
   839 			goto err_out;
       
   840 		}
       
   841 		/* check for weird/broken PCI region reporting */
       
   842 		if (pio_len < RTL_MIN_IO_SIZE) {
       
   843 			dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n");
       
   844 			rc = -ENODEV;
       
   845 			goto err_out;
       
   846 		}
       
   847 	} else {
       
   848 		/* make sure PCI base addr 1 is MMIO */
       
   849 		if (!(mmio_flags & IORESOURCE_MEM)) {
       
   850 			dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
       
   851 			rc = -ENODEV;
       
   852 			goto err_out;
       
   853 		}
       
   854 		if (mmio_len < RTL_MIN_IO_SIZE) {
       
   855 			dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n");
       
   856 			rc = -ENODEV;
       
   857 			goto err_out;
       
   858 		}
       
   859 	}
       
   860 
       
   861 	rc = pci_request_regions (pdev, DRV_NAME);
       
   862 	if (rc)
       
   863 		goto err_out;
       
   864 	disable_dev_on_err = 1;
       
   865 
       
   866 	/* enable PCI bus-mastering */
       
   867 	pci_set_master (pdev);
       
   868 
       
   869 	if (use_io) {
       
   870 		ioaddr = pci_iomap(pdev, 0, 0);
       
   871 		if (!ioaddr) {
       
   872 			dev_err(&pdev->dev, "cannot map PIO, aborting\n");
       
   873 			rc = -EIO;
       
   874 			goto err_out;
       
   875 		}
       
   876 		dev->base_addr = pio_start;
       
   877 		tp->regs_len = pio_len;
       
   878 	} else {
       
   879 		/* ioremap MMIO region */
       
   880 		ioaddr = pci_iomap(pdev, 1, 0);
       
   881 		if (ioaddr == NULL) {
       
   882 			dev_err(&pdev->dev, "cannot remap MMIO, trying PIO\n");
       
   883 			pci_release_regions(pdev);
       
   884 			use_io = 1;
       
   885 			goto retry;
       
   886 		}
       
   887 		dev->base_addr = (long) ioaddr;
       
   888 		tp->regs_len = mmio_len;
       
   889 	}
       
   890 	tp->mmio_addr = ioaddr;
       
   891 
       
   892 	/* Bring old chips out of low-power mode. */
       
   893 	RTL_W8 (HltClk, 'R');
       
   894 
       
   895 	/* check for missing/broken hardware */
       
   896 	if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
       
   897 		dev_err(&pdev->dev, "Chip not responding, ignoring board\n");
       
   898 		rc = -EIO;
       
   899 		goto err_out;
       
   900 	}
       
   901 
       
   902 	/* identify chip attached to board */
       
   903 	version = RTL_R32 (TxConfig) & HW_REVID_MASK;
       
   904 	for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
       
   905 		if (version == rtl_chip_info[i].version) {
       
   906 			tp->chipset = i;
       
   907 			goto match;
       
   908 		}
       
   909 
       
   910 	/* if unknown chip, assume array element #0, original RTL-8139 in this case */
       
   911 	i = 0;
       
   912 	dev_dbg(&pdev->dev, "unknown chip version, assuming RTL-8139\n");
       
   913 	dev_dbg(&pdev->dev, "TxConfig = 0x%lx\n", RTL_R32 (TxConfig));
       
   914 	tp->chipset = 0;
       
   915 
       
   916 match:
       
   917 	pr_debug("chipset id (%d) == index %d, '%s'\n",
       
   918 		 version, i, rtl_chip_info[i].name);
       
   919 
       
   920 	if (tp->chipset >= CH_8139B) {
       
   921 		u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
       
   922 		pr_debug("PCI PM wakeup\n");
       
   923 		if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
       
   924 		    (tmp8 & LWAKE))
       
   925 			new_tmp8 &= ~LWAKE;
       
   926 		new_tmp8 |= Cfg1_PM_Enable;
       
   927 		if (new_tmp8 != tmp8) {
       
   928 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   929 			RTL_W8 (Config1, tmp8);
       
   930 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   931 		}
       
   932 		if (rtl_chip_info[tp->chipset].flags & HasLWake) {
       
   933 			tmp8 = RTL_R8 (Config4);
       
   934 			if (tmp8 & LWPTN) {
       
   935 				RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   936 				RTL_W8 (Config4, tmp8 & ~LWPTN);
       
   937 				RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   938 			}
       
   939 		}
       
   940 	} else {
       
   941 		pr_debug("Old chip wakeup\n");
       
   942 		tmp8 = RTL_R8 (Config1);
       
   943 		tmp8 &= ~(SLEEP | PWRDN);
       
   944 		RTL_W8 (Config1, tmp8);
       
   945 	}
       
   946 
       
   947 	rtl8139_chip_reset (ioaddr);
       
   948 
       
   949 	return dev;
       
   950 
       
   951 err_out:
       
   952 	__rtl8139_cleanup_dev (dev);
       
   953 	if (disable_dev_on_err)
       
   954 		pci_disable_device (pdev);
       
   955 	return ERR_PTR(rc);
       
   956 }
       
   957 
       
   958 static const struct net_device_ops rtl8139_netdev_ops = {
       
   959 	.ndo_open		= rtl8139_open,
       
   960 	.ndo_stop		= rtl8139_close,
       
   961 	.ndo_get_stats		= rtl8139_get_stats,
       
   962 	.ndo_change_mtu		= eth_change_mtu,
       
   963 	.ndo_validate_addr	= eth_validate_addr,
       
   964 	.ndo_set_mac_address 	= rtl8139_set_mac_address,
       
   965 	.ndo_start_xmit		= rtl8139_start_xmit,
       
   966 	.ndo_set_multicast_list	= rtl8139_set_rx_mode,
       
   967 	.ndo_do_ioctl		= netdev_ioctl,
       
   968 	.ndo_tx_timeout		= rtl8139_tx_timeout,
       
   969 #ifdef CONFIG_NET_POLL_CONTROLLER
       
   970 	.ndo_poll_controller	= rtl8139_poll_controller,
       
   971 #endif
       
   972 };
       
   973 
       
   974 static int __devinit rtl8139_init_one (struct pci_dev *pdev,
       
   975 				       const struct pci_device_id *ent)
       
   976 {
       
   977 	struct net_device *dev = NULL;
       
   978 	struct rtl8139_private *tp;
       
   979 	int i, addr_len, option;
       
   980 	void __iomem *ioaddr;
       
   981 	static int board_idx = -1;
       
   982 
       
   983 	assert (pdev != NULL);
       
   984 	assert (ent != NULL);
       
   985 
       
   986 	board_idx++;
       
   987 
       
   988 	/* when we're built into the kernel, the driver version message
       
   989 	 * is only printed if at least one 8139 board has been found
       
   990 	 */
       
   991 #ifndef MODULE
       
   992 	{
       
   993 		static int printed_version;
       
   994 		if (!printed_version++)
       
   995 			pr_info(RTL8139_DRIVER_NAME "\n");
       
   996 	}
       
   997 #endif
       
   998 
       
   999 	if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
       
  1000 	    pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision >= 0x20) {
       
  1001 		dev_info(&pdev->dev,
       
  1002 			   "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip, use 8139cp\n",
       
  1003 		       	   pdev->vendor, pdev->device, pdev->revision);
       
  1004 		return -ENODEV;
       
  1005 	}
       
  1006 
       
  1007 	if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
       
  1008 	    pdev->device == PCI_DEVICE_ID_REALTEK_8139 &&
       
  1009 	    pdev->subsystem_vendor == PCI_VENDOR_ID_ATHEROS &&
       
  1010 	    pdev->subsystem_device == PCI_DEVICE_ID_REALTEK_8139) {
       
  1011 		pr_info("8139too: OQO Model 2 detected. Forcing PIO\n");
       
  1012 		use_io = 1;
       
  1013 	}
       
  1014 
       
  1015 	dev = rtl8139_init_board (pdev);
       
  1016 	if (IS_ERR(dev))
       
  1017 		return PTR_ERR(dev);
       
  1018 
       
  1019 	assert (dev != NULL);
       
  1020 	tp = netdev_priv(dev);
       
  1021 	tp->dev = dev;
       
  1022 
       
  1023 	ioaddr = tp->mmio_addr;
       
  1024 	assert (ioaddr != NULL);
       
  1025 
       
  1026 	addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
       
  1027 	for (i = 0; i < 3; i++)
       
  1028 		((__le16 *) (dev->dev_addr))[i] =
       
  1029 		    cpu_to_le16(read_eeprom (ioaddr, i + 7, addr_len));
       
  1030 	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
       
  1031 
       
  1032 	/* The Rtl8139-specific entries in the device structure. */
       
  1033 	dev->netdev_ops = &rtl8139_netdev_ops;
       
  1034 	dev->ethtool_ops = &rtl8139_ethtool_ops;
       
  1035 	dev->watchdog_timeo = TX_TIMEOUT;
       
  1036 	netif_napi_add(dev, &tp->napi, rtl8139_poll, 64);
       
  1037 
       
  1038 	/* note: the hardware is not capable of sg/csum/highdma, however
       
  1039 	 * through the use of skb_copy_and_csum_dev we enable these
       
  1040 	 * features
       
  1041 	 */
       
  1042 	dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
       
  1043 
       
  1044 	dev->irq = pdev->irq;
       
  1045 
       
  1046 	/* tp zeroed and aligned in alloc_etherdev */
       
  1047 	tp = netdev_priv(dev);
       
  1048 
       
  1049 	/* note: tp->chipset set in rtl8139_init_board */
       
  1050 	tp->drv_flags = board_info[ent->driver_data].hw_flags;
       
  1051 	tp->mmio_addr = ioaddr;
       
  1052 	tp->msg_enable =
       
  1053 		(debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1));
       
  1054 	spin_lock_init (&tp->lock);
       
  1055 	spin_lock_init (&tp->rx_lock);
       
  1056 	INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
       
  1057 	tp->mii.dev = dev;
       
  1058 	tp->mii.mdio_read = mdio_read;
       
  1059 	tp->mii.mdio_write = mdio_write;
       
  1060 	tp->mii.phy_id_mask = 0x3f;
       
  1061 	tp->mii.reg_num_mask = 0x1f;
       
  1062 
       
  1063 	/* dev is fully set up and ready to use now */
       
  1064 	// offer device to EtherCAT master module
       
  1065 	tp->ecdev = ecdev_offer(dev, ec_poll, THIS_MODULE);
       
  1066 
       
  1067 	if (!tp->ecdev) {
       
  1068 		pr_debug("about to register device named %s (%p)...\n", dev->name, dev);
       
  1069 		i = register_netdev (dev);
       
  1070 		if (i) goto err_out;
       
  1071 	}
       
  1072 
       
  1073 	pci_set_drvdata (pdev, dev);
       
  1074 
       
  1075 	pr_info("%s: %s at 0x%lx, %pM, IRQ %d\n",
       
  1076 		dev->name,
       
  1077 		board_info[ent->driver_data].name,
       
  1078 		dev->base_addr,
       
  1079 		dev->dev_addr,
       
  1080 		dev->irq);
       
  1081 
       
  1082 	pr_debug("%s:  Identified 8139 chip type '%s'\n",
       
  1083 		dev->name, rtl_chip_info[tp->chipset].name);
       
  1084 
       
  1085 	/* Find the connected MII xcvrs.
       
  1086 	   Doing this in open() would allow detecting external xcvrs later, but
       
  1087 	   takes too much time. */
       
  1088 #ifdef CONFIG_8139TOO_8129
       
  1089 	if (tp->drv_flags & HAS_MII_XCVR) {
       
  1090 		int phy, phy_idx = 0;
       
  1091 		for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
       
  1092 			int mii_status = mdio_read(dev, phy, 1);
       
  1093 			if (mii_status != 0xffff  &&  mii_status != 0x0000) {
       
  1094 				u16 advertising = mdio_read(dev, phy, 4);
       
  1095 				tp->phys[phy_idx++] = phy;
       
  1096 				pr_info("%s: MII transceiver %d status 0x%4.4x advertising %4.4x.\n",
       
  1097 					   dev->name, phy, mii_status, advertising);
       
  1098 			}
       
  1099 		}
       
  1100 		if (phy_idx == 0) {
       
  1101 			pr_info("%s: No MII transceivers found! Assuming SYM transceiver.\n",
       
  1102 				   dev->name);
       
  1103 			tp->phys[0] = 32;
       
  1104 		}
       
  1105 	} else
       
  1106 #endif
       
  1107 		tp->phys[0] = 32;
       
  1108 	tp->mii.phy_id = tp->phys[0];
       
  1109 
       
  1110 	/* The lower four bits are the media type. */
       
  1111 	option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
       
  1112 	if (option > 0) {
       
  1113 		tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
       
  1114 		tp->default_port = option & 0xFF;
       
  1115 		if (tp->default_port)
       
  1116 			tp->mii.force_media = 1;
       
  1117 	}
       
  1118 	if (board_idx < MAX_UNITS  &&  full_duplex[board_idx] > 0)
       
  1119 		tp->mii.full_duplex = full_duplex[board_idx];
       
  1120 	if (tp->mii.full_duplex) {
       
  1121 		pr_info("%s: Media type forced to Full Duplex.\n", dev->name);
       
  1122 		/* Changing the MII-advertised media because might prevent
       
  1123 		   re-connection. */
       
  1124 		tp->mii.force_media = 1;
       
  1125 	}
       
  1126 	if (tp->default_port) {
       
  1127 		pr_info("  Forcing %dMbps %s-duplex operation.\n",
       
  1128 			   (option & 0x20 ? 100 : 10),
       
  1129 			   (option & 0x10 ? "full" : "half"));
       
  1130 		mdio_write(dev, tp->phys[0], 0,
       
  1131 				   ((option & 0x20) ? 0x2000 : 0) | 	/* 100Mbps? */
       
  1132 				   ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
       
  1133 	}
       
  1134 
       
  1135 	/* Put the chip into low-power mode. */
       
  1136 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1137 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  1138 
       
  1139 	if (tp->ecdev && ecdev_open(tp->ecdev)) {
       
  1140 		ecdev_withdraw(tp->ecdev);
       
  1141 		goto err_out;
       
  1142 	}
       
  1143 
       
  1144 	return 0;
       
  1145 
       
  1146 err_out:
       
  1147 	__rtl8139_cleanup_dev (dev);
       
  1148 	pci_disable_device (pdev);
       
  1149 	return i;
       
  1150 }
       
  1151 
       
  1152 
       
  1153 static void __devexit rtl8139_remove_one (struct pci_dev *pdev)
       
  1154 {
       
  1155 	struct net_device *dev = pci_get_drvdata (pdev);
       
  1156 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1157 
       
  1158 	assert (dev != NULL);
       
  1159 
       
  1160 	flush_scheduled_work();
       
  1161 
       
  1162 	if (tp->ecdev) {
       
  1163 		ecdev_close(tp->ecdev);
       
  1164 		ecdev_withdraw(tp->ecdev);
       
  1165 	}
       
  1166 	else {
       
  1167 		unregister_netdev (dev);
       
  1168 	}
       
  1169 
       
  1170 	__rtl8139_cleanup_dev (dev);
       
  1171 	pci_disable_device (pdev);
       
  1172 }
       
  1173 
       
  1174 
       
  1175 /* Serial EEPROM section. */
       
  1176 
       
  1177 /*  EEPROM_Ctrl bits. */
       
  1178 #define EE_SHIFT_CLK	0x04	/* EEPROM shift clock. */
       
  1179 #define EE_CS			0x08	/* EEPROM chip select. */
       
  1180 #define EE_DATA_WRITE	0x02	/* EEPROM chip data in. */
       
  1181 #define EE_WRITE_0		0x00
       
  1182 #define EE_WRITE_1		0x02
       
  1183 #define EE_DATA_READ	0x01	/* EEPROM chip data out. */
       
  1184 #define EE_ENB			(0x80 | EE_CS)
       
  1185 
       
  1186 /* Delay between EEPROM clock transitions.
       
  1187    No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
       
  1188  */
       
  1189 
       
  1190 #define eeprom_delay()	(void)RTL_R32(Cfg9346)
       
  1191 
       
  1192 /* The EEPROM commands include the alway-set leading bit. */
       
  1193 #define EE_WRITE_CMD	(5)
       
  1194 #define EE_READ_CMD		(6)
       
  1195 #define EE_ERASE_CMD	(7)
       
  1196 
       
  1197 static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len)
       
  1198 {
       
  1199 	int i;
       
  1200 	unsigned retval = 0;
       
  1201 	int read_cmd = location | (EE_READ_CMD << addr_len);
       
  1202 
       
  1203 	RTL_W8 (Cfg9346, EE_ENB & ~EE_CS);
       
  1204 	RTL_W8 (Cfg9346, EE_ENB);
       
  1205 	eeprom_delay ();
       
  1206 
       
  1207 	/* Shift the read command bits out. */
       
  1208 	for (i = 4 + addr_len; i >= 0; i--) {
       
  1209 		int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
       
  1210 		RTL_W8 (Cfg9346, EE_ENB | dataval);
       
  1211 		eeprom_delay ();
       
  1212 		RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK);
       
  1213 		eeprom_delay ();
       
  1214 	}
       
  1215 	RTL_W8 (Cfg9346, EE_ENB);
       
  1216 	eeprom_delay ();
       
  1217 
       
  1218 	for (i = 16; i > 0; i--) {
       
  1219 		RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK);
       
  1220 		eeprom_delay ();
       
  1221 		retval =
       
  1222 		    (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 :
       
  1223 				     0);
       
  1224 		RTL_W8 (Cfg9346, EE_ENB);
       
  1225 		eeprom_delay ();
       
  1226 	}
       
  1227 
       
  1228 	/* Terminate the EEPROM access. */
       
  1229 	RTL_W8 (Cfg9346, ~EE_CS);
       
  1230 	eeprom_delay ();
       
  1231 
       
  1232 	return retval;
       
  1233 }
       
  1234 
       
  1235 /* MII serial management: mostly bogus for now. */
       
  1236 /* Read and write the MII management registers using software-generated
       
  1237    serial MDIO protocol.
       
  1238    The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
       
  1239    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
       
  1240    "overclocking" issues. */
       
  1241 #define MDIO_DIR		0x80
       
  1242 #define MDIO_DATA_OUT	0x04
       
  1243 #define MDIO_DATA_IN	0x02
       
  1244 #define MDIO_CLK		0x01
       
  1245 #define MDIO_WRITE0 (MDIO_DIR)
       
  1246 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
       
  1247 
       
  1248 #define mdio_delay()	RTL_R8(Config4)
       
  1249 
       
  1250 
       
  1251 static const char mii_2_8139_map[8] = {
       
  1252 	BasicModeCtrl,
       
  1253 	BasicModeStatus,
       
  1254 	0,
       
  1255 	0,
       
  1256 	NWayAdvert,
       
  1257 	NWayLPAR,
       
  1258 	NWayExpansion,
       
  1259 	0
       
  1260 };
       
  1261 
       
  1262 
       
  1263 #ifdef CONFIG_8139TOO_8129
       
  1264 /* Syncronize the MII management interface by shifting 32 one bits out. */
       
  1265 static void mdio_sync (void __iomem *ioaddr)
       
  1266 {
       
  1267 	int i;
       
  1268 
       
  1269 	for (i = 32; i >= 0; i--) {
       
  1270 		RTL_W8 (Config4, MDIO_WRITE1);
       
  1271 		mdio_delay ();
       
  1272 		RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK);
       
  1273 		mdio_delay ();
       
  1274 	}
       
  1275 }
       
  1276 #endif
       
  1277 
       
  1278 static int mdio_read (struct net_device *dev, int phy_id, int location)
       
  1279 {
       
  1280 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1281 	int retval = 0;
       
  1282 #ifdef CONFIG_8139TOO_8129
       
  1283 	void __iomem *ioaddr = tp->mmio_addr;
       
  1284 	int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
       
  1285 	int i;
       
  1286 #endif
       
  1287 
       
  1288 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1289 		void __iomem *ioaddr = tp->mmio_addr;
       
  1290 		return location < 8 && mii_2_8139_map[location] ?
       
  1291 		    RTL_R16 (mii_2_8139_map[location]) : 0;
       
  1292 	}
       
  1293 
       
  1294 #ifdef CONFIG_8139TOO_8129
       
  1295 	mdio_sync (ioaddr);
       
  1296 	/* Shift the read command bits out. */
       
  1297 	for (i = 15; i >= 0; i--) {
       
  1298 		int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
       
  1299 
       
  1300 		RTL_W8 (Config4, MDIO_DIR | dataval);
       
  1301 		mdio_delay ();
       
  1302 		RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK);
       
  1303 		mdio_delay ();
       
  1304 	}
       
  1305 
       
  1306 	/* Read the two transition, 16 data, and wire-idle bits. */
       
  1307 	for (i = 19; i > 0; i--) {
       
  1308 		RTL_W8 (Config4, 0);
       
  1309 		mdio_delay ();
       
  1310 		retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0);
       
  1311 		RTL_W8 (Config4, MDIO_CLK);
       
  1312 		mdio_delay ();
       
  1313 	}
       
  1314 #endif
       
  1315 
       
  1316 	return (retval >> 1) & 0xffff;
       
  1317 }
       
  1318 
       
  1319 
       
  1320 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
  1321 			int value)
       
  1322 {
       
  1323 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1324 #ifdef CONFIG_8139TOO_8129
       
  1325 	void __iomem *ioaddr = tp->mmio_addr;
       
  1326 	int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
       
  1327 	int i;
       
  1328 #endif
       
  1329 
       
  1330 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1331 		void __iomem *ioaddr = tp->mmio_addr;
       
  1332 		if (location == 0) {
       
  1333 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1334 			RTL_W16 (BasicModeCtrl, value);
       
  1335 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1336 		} else if (location < 8 && mii_2_8139_map[location])
       
  1337 			RTL_W16 (mii_2_8139_map[location], value);
       
  1338 		return;
       
  1339 	}
       
  1340 
       
  1341 #ifdef CONFIG_8139TOO_8129
       
  1342 	mdio_sync (ioaddr);
       
  1343 
       
  1344 	/* Shift the command bits out. */
       
  1345 	for (i = 31; i >= 0; i--) {
       
  1346 		int dataval =
       
  1347 		    (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
       
  1348 		RTL_W8 (Config4, dataval);
       
  1349 		mdio_delay ();
       
  1350 		RTL_W8 (Config4, dataval | MDIO_CLK);
       
  1351 		mdio_delay ();
       
  1352 	}
       
  1353 	/* Clear out extra bits. */
       
  1354 	for (i = 2; i > 0; i--) {
       
  1355 		RTL_W8 (Config4, 0);
       
  1356 		mdio_delay ();
       
  1357 		RTL_W8 (Config4, MDIO_CLK);
       
  1358 		mdio_delay ();
       
  1359 	}
       
  1360 #endif
       
  1361 }
       
  1362 
       
  1363 
       
  1364 static int rtl8139_open (struct net_device *dev)
       
  1365 {
       
  1366 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1367 	int retval;
       
  1368 	void __iomem *ioaddr = tp->mmio_addr;
       
  1369 
       
  1370 	if (!tp->ecdev) {
       
  1371 		retval = request_irq(dev->irq, rtl8139_interrupt,
       
  1372 			IRQF_SHARED, dev->name, dev);
       
  1373 		if (retval)
       
  1374 			return retval;
       
  1375 	}
       
  1376 
       
  1377 	tp->tx_bufs = dma_alloc_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN,
       
  1378 					   &tp->tx_bufs_dma, GFP_KERNEL);
       
  1379 	tp->rx_ring = dma_alloc_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN,
       
  1380 					   &tp->rx_ring_dma, GFP_KERNEL);
       
  1381 	if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
       
  1382 		if (!tp->ecdev) free_irq(dev->irq, dev);
       
  1383 
       
  1384 		if (tp->tx_bufs)
       
  1385 			dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN,
       
  1386 					    tp->tx_bufs, tp->tx_bufs_dma);
       
  1387 		if (tp->rx_ring)
       
  1388 			dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN,
       
  1389 					    tp->rx_ring, tp->rx_ring_dma);
       
  1390 
       
  1391 		return -ENOMEM;
       
  1392 
       
  1393 	}
       
  1394 
       
  1395 	napi_enable(&tp->napi);
       
  1396 
       
  1397 	tp->mii.full_duplex = tp->mii.force_media;
       
  1398 	tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
       
  1399 
       
  1400 	rtl8139_init_ring (dev);
       
  1401 	rtl8139_hw_start (dev);
       
  1402 	netif_start_queue (dev);
       
  1403 
       
  1404 	if (!tp->ecdev) {
       
  1405 		if (netif_msg_ifup(tp))
       
  1406 			pr_debug("%s: rtl8139_open() ioaddr %#llx IRQ %d"
       
  1407 				" GP Pins %2.2x %s-duplex.\n", dev->name,
       
  1408 				(unsigned long long)pci_resource_start (tp->pci_dev, 1),
       
  1409 				dev->irq, RTL_R8 (MediaStatus),
       
  1410 				tp->mii.full_duplex ? "full" : "half");
       
  1411 
       
  1412 		rtl8139_start_thread(tp);
       
  1413 	}
       
  1414 
       
  1415 	return 0;
       
  1416 }
       
  1417 
       
  1418 
       
  1419 static void rtl_check_media (struct net_device *dev, unsigned int init_media)
       
  1420 {
       
  1421 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1422 
       
  1423 	if (tp->ecdev) {
       
  1424 		void __iomem *ioaddr = tp->mmio_addr;
       
  1425 		u16 state = RTL_R16(BasicModeStatus) & BMSR_LSTATUS;
       
  1426 		ecdev_set_link(tp->ecdev, state ? 1 : 0);
       
  1427 	}
       
  1428 	else {
       
  1429 		if (tp->phys[0] >= 0) {
       
  1430 			mii_check_media(&tp->mii, netif_msg_link(tp), init_media);
       
  1431 		}
       
  1432 	}
       
  1433 }
       
  1434 
       
  1435 /* Start the hardware at open or resume. */
       
  1436 static void rtl8139_hw_start (struct net_device *dev)
       
  1437 {
       
  1438 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1439 	void __iomem *ioaddr = tp->mmio_addr;
       
  1440 	u32 i;
       
  1441 	u8 tmp;
       
  1442 
       
  1443 	/* Bring old chips out of low-power mode. */
       
  1444 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1445 		RTL_W8 (HltClk, 'R');
       
  1446 
       
  1447 	rtl8139_chip_reset (ioaddr);
       
  1448 
       
  1449 	/* unlock Config[01234] and BMCR register writes */
       
  1450 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1451 	/* Restore our idea of the MAC address. */
       
  1452 	RTL_W32_F (MAC0 + 0, le32_to_cpu (*(__le32 *) (dev->dev_addr + 0)));
       
  1453 	RTL_W32_F (MAC0 + 4, le16_to_cpu (*(__le16 *) (dev->dev_addr + 4)));
       
  1454 
       
  1455 	tp->cur_rx = 0;
       
  1456 
       
  1457 	/* init Rx ring buffer DMA address */
       
  1458 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1459 
       
  1460 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1461 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1462 
       
  1463 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1464 	RTL_W32 (RxConfig, tp->rx_config);
       
  1465 	RTL_W32 (TxConfig, rtl8139_tx_config);
       
  1466 
       
  1467 	rtl_check_media (dev, 1);
       
  1468 
       
  1469 	if (tp->chipset >= CH_8139B) {
       
  1470 		/* Disable magic packet scanning, which is enabled
       
  1471 		 * when PM is enabled in Config1.  It can be reenabled
       
  1472 		 * via ETHTOOL_SWOL if desired.  */
       
  1473 		RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
       
  1474 	}
       
  1475 
       
  1476 	pr_debug("init buffer addresses\n");
       
  1477 
       
  1478 	/* Lock Config[01234] and BMCR register writes */
       
  1479 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1480 
       
  1481 	/* init Tx buffer DMA addresses */
       
  1482 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1483 		RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
       
  1484 
       
  1485 	RTL_W32 (RxMissed, 0);
       
  1486 
       
  1487 	rtl8139_set_rx_mode (dev);
       
  1488 
       
  1489 	/* no early-rx interrupts */
       
  1490 	RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
       
  1491 
       
  1492 	/* make sure RxTx has started */
       
  1493 	tmp = RTL_R8 (ChipCmd);
       
  1494 	if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
       
  1495 		RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1496 
       
  1497 	if (!tp->ecdev)
       
  1498 		/* Enable all known interrupts by setting the interrupt mask. */
       
  1499 		RTL_W16 (IntrMask, rtl8139_intr_mask);
       
  1500 }
       
  1501 
       
  1502 
       
  1503 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
       
  1504 static void rtl8139_init_ring (struct net_device *dev)
       
  1505 {
       
  1506 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1507 	int i;
       
  1508 
       
  1509 	tp->cur_rx = 0;
       
  1510 	tp->cur_tx = 0;
       
  1511 	tp->dirty_tx = 0;
       
  1512 
       
  1513 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1514 		tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
       
  1515 }
       
  1516 
       
  1517 
       
  1518 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
       
  1519 static int next_tick = 3 * HZ;
       
  1520 
       
  1521 #ifndef CONFIG_8139TOO_TUNE_TWISTER
       
  1522 static inline void rtl8139_tune_twister (struct net_device *dev,
       
  1523 				  struct rtl8139_private *tp) {}
       
  1524 #else
       
  1525 enum TwisterParamVals {
       
  1526 	PARA78_default	= 0x78fa8388,
       
  1527 	PARA7c_default	= 0xcb38de43,	/* param[0][3] */
       
  1528 	PARA7c_xxx	= 0xcb38de43,
       
  1529 };
       
  1530 
       
  1531 static const unsigned long param[4][4] = {
       
  1532 	{0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
       
  1533 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1534 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1535 	{0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
       
  1536 };
       
  1537 
       
  1538 static void rtl8139_tune_twister (struct net_device *dev,
       
  1539 				  struct rtl8139_private *tp)
       
  1540 {
       
  1541 	int linkcase;
       
  1542 	void __iomem *ioaddr = tp->mmio_addr;
       
  1543 
       
  1544 	/* This is a complicated state machine to configure the "twister" for
       
  1545 	   impedance/echos based on the cable length.
       
  1546 	   All of this is magic and undocumented.
       
  1547 	 */
       
  1548 	switch (tp->twistie) {
       
  1549 	case 1:
       
  1550 		if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
       
  1551 			/* We have link beat, let us tune the twister. */
       
  1552 			RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
       
  1553 			tp->twistie = 2;	/* Change to state 2. */
       
  1554 			next_tick = HZ / 10;
       
  1555 		} else {
       
  1556 			/* Just put in some reasonable defaults for when beat returns. */
       
  1557 			RTL_W16 (CSCR, CSCR_LinkDownCmd);
       
  1558 			RTL_W32 (FIFOTMS, 0x20);	/* Turn on cable test mode. */
       
  1559 			RTL_W32 (PARA78, PARA78_default);
       
  1560 			RTL_W32 (PARA7c, PARA7c_default);
       
  1561 			tp->twistie = 0;	/* Bail from future actions. */
       
  1562 		}
       
  1563 		break;
       
  1564 	case 2:
       
  1565 		/* Read how long it took to hear the echo. */
       
  1566 		linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
       
  1567 		if (linkcase == 0x7000)
       
  1568 			tp->twist_row = 3;
       
  1569 		else if (linkcase == 0x3000)
       
  1570 			tp->twist_row = 2;
       
  1571 		else if (linkcase == 0x1000)
       
  1572 			tp->twist_row = 1;
       
  1573 		else
       
  1574 			tp->twist_row = 0;
       
  1575 		tp->twist_col = 0;
       
  1576 		tp->twistie = 3;	/* Change to state 2. */
       
  1577 		next_tick = HZ / 10;
       
  1578 		break;
       
  1579 	case 3:
       
  1580 		/* Put out four tuning parameters, one per 100msec. */
       
  1581 		if (tp->twist_col == 0)
       
  1582 			RTL_W16 (FIFOTMS, 0);
       
  1583 		RTL_W32 (PARA7c, param[(int) tp->twist_row]
       
  1584 			 [(int) tp->twist_col]);
       
  1585 		next_tick = HZ / 10;
       
  1586 		if (++tp->twist_col >= 4) {
       
  1587 			/* For short cables we are done.
       
  1588 			   For long cables (row == 3) check for mistune. */
       
  1589 			tp->twistie =
       
  1590 			    (tp->twist_row == 3) ? 4 : 0;
       
  1591 		}
       
  1592 		break;
       
  1593 	case 4:
       
  1594 		/* Special case for long cables: check for mistune. */
       
  1595 		if ((RTL_R16 (CSCR) &
       
  1596 		     CSCR_LinkStatusBits) == 0x7000) {
       
  1597 			tp->twistie = 0;
       
  1598 			break;
       
  1599 		} else {
       
  1600 			RTL_W32 (PARA7c, 0xfb38de03);
       
  1601 			tp->twistie = 5;
       
  1602 			next_tick = HZ / 10;
       
  1603 		}
       
  1604 		break;
       
  1605 	case 5:
       
  1606 		/* Retune for shorter cable (column 2). */
       
  1607 		RTL_W32 (FIFOTMS, 0x20);
       
  1608 		RTL_W32 (PARA78, PARA78_default);
       
  1609 		RTL_W32 (PARA7c, PARA7c_default);
       
  1610 		RTL_W32 (FIFOTMS, 0x00);
       
  1611 		tp->twist_row = 2;
       
  1612 		tp->twist_col = 0;
       
  1613 		tp->twistie = 3;
       
  1614 		next_tick = HZ / 10;
       
  1615 		break;
       
  1616 
       
  1617 	default:
       
  1618 		/* do nothing */
       
  1619 		break;
       
  1620 	}
       
  1621 }
       
  1622 #endif /* CONFIG_8139TOO_TUNE_TWISTER */
       
  1623 
       
  1624 static inline void rtl8139_thread_iter (struct net_device *dev,
       
  1625 				 struct rtl8139_private *tp,
       
  1626 				 void __iomem *ioaddr)
       
  1627 {
       
  1628 	int mii_lpa;
       
  1629 
       
  1630 	mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
       
  1631 
       
  1632 	if (!tp->mii.force_media && mii_lpa != 0xffff) {
       
  1633 		int duplex = (mii_lpa & LPA_100FULL)
       
  1634 		    || (mii_lpa & 0x01C0) == 0x0040;
       
  1635 		if (tp->mii.full_duplex != duplex) {
       
  1636 			tp->mii.full_duplex = duplex;
       
  1637 
       
  1638 			if (mii_lpa) {
       
  1639 				pr_info("%s: Setting %s-duplex based on MII #%d link"
       
  1640 					" partner ability of %4.4x.\n",
       
  1641 					dev->name,
       
  1642 					tp->mii.full_duplex ? "full" : "half",
       
  1643 					tp->phys[0], mii_lpa);
       
  1644 			} else {
       
  1645 				pr_info("%s: media is unconnected, link down, or incompatible connection\n",
       
  1646 				       dev->name);
       
  1647 			}
       
  1648 #if 0
       
  1649 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1650 			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
       
  1651 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1652 #endif
       
  1653 		}
       
  1654 	}
       
  1655 
       
  1656 	next_tick = HZ * 60;
       
  1657 
       
  1658 	rtl8139_tune_twister (dev, tp);
       
  1659 
       
  1660 	pr_debug("%s: Media selection tick, Link partner %4.4x.\n",
       
  1661 		 dev->name, RTL_R16 (NWayLPAR));
       
  1662 	pr_debug("%s:  Other registers are IntMask %4.4x IntStatus %4.4x\n",
       
  1663 		 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus));
       
  1664 	pr_debug("%s:  Chip config %2.2x %2.2x.\n",
       
  1665 		 dev->name, RTL_R8 (Config0),
       
  1666 		 RTL_R8 (Config1));
       
  1667 }
       
  1668 
       
  1669 static void rtl8139_thread (struct work_struct *work)
       
  1670 {
       
  1671 	struct rtl8139_private *tp =
       
  1672 		container_of(work, struct rtl8139_private, thread.work);
       
  1673 	struct net_device *dev = tp->mii.dev;
       
  1674 	unsigned long thr_delay = next_tick;
       
  1675 
       
  1676 	rtnl_lock();
       
  1677 
       
  1678 	if (!netif_running(dev))
       
  1679 		goto out_unlock;
       
  1680 
       
  1681 	if (tp->watchdog_fired) {
       
  1682 		tp->watchdog_fired = 0;
       
  1683 		rtl8139_tx_timeout_task(work);
       
  1684 	} else
       
  1685 		rtl8139_thread_iter(dev, tp, tp->mmio_addr);
       
  1686 
       
  1687 	if (tp->have_thread)
       
  1688 		schedule_delayed_work(&tp->thread, thr_delay);
       
  1689 out_unlock:
       
  1690 	rtnl_unlock ();
       
  1691 }
       
  1692 
       
  1693 static void rtl8139_start_thread(struct rtl8139_private *tp)
       
  1694 {
       
  1695 	tp->twistie = 0;
       
  1696 	if (tp->chipset == CH_8139_K)
       
  1697 		tp->twistie = 1;
       
  1698 	else if (tp->drv_flags & HAS_LNK_CHNG)
       
  1699 		return;
       
  1700 
       
  1701 	tp->have_thread = 1;
       
  1702 	tp->watchdog_fired = 0;
       
  1703 
       
  1704 	schedule_delayed_work(&tp->thread, next_tick);
       
  1705 }
       
  1706 
       
  1707 static inline void rtl8139_tx_clear (struct rtl8139_private *tp)
       
  1708 {
       
  1709 	tp->cur_tx = 0;
       
  1710 	tp->dirty_tx = 0;
       
  1711 
       
  1712 	/* XXX account for unsent Tx packets in tp->stats.tx_dropped */
       
  1713 }
       
  1714 
       
  1715 static void rtl8139_tx_timeout_task (struct work_struct *work)
       
  1716 {
       
  1717 	struct rtl8139_private *tp =
       
  1718 		container_of(work, struct rtl8139_private, thread.work);
       
  1719 	struct net_device *dev = tp->mii.dev;
       
  1720 	void __iomem *ioaddr = tp->mmio_addr;
       
  1721 	int i;
       
  1722 	u8 tmp8;
       
  1723 
       
  1724 	pr_debug("%s: Transmit timeout, status %2.2x %4.4x %4.4x media %2.2x.\n",
       
  1725 		dev->name, RTL_R8 (ChipCmd),
       
  1726 		RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus));
       
  1727 	/* Emit info to figure out what went wrong. */
       
  1728 	pr_debug("%s: Tx queue start entry %ld  dirty entry %ld.\n",
       
  1729 		dev->name, tp->cur_tx, tp->dirty_tx);
       
  1730 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1731 		pr_debug("%s:  Tx descriptor %d is %8.8lx.%s\n",
       
  1732 			dev->name, i, RTL_R32 (TxStatus0 + (i * 4)),
       
  1733 			i == tp->dirty_tx % NUM_TX_DESC ?
       
  1734 				" (queue head)" : "");
       
  1735 
       
  1736 	tp->xstats.tx_timeouts++;
       
  1737 
       
  1738 	/* disable Tx ASAP, if not already */
       
  1739 	tmp8 = RTL_R8 (ChipCmd);
       
  1740 	if (tmp8 & CmdTxEnb)
       
  1741 		RTL_W8 (ChipCmd, CmdRxEnb);
       
  1742 
       
  1743 	if (tp->ecdev) {
       
  1744 		rtl8139_tx_clear (tp);
       
  1745 		rtl8139_hw_start (dev);
       
  1746 	}
       
  1747 	else {
       
  1748 	  spin_lock_bh(&tp->rx_lock);
       
  1749 	  /* Disable interrupts by clearing the interrupt mask. */
       
  1750 	  RTL_W16 (IntrMask, 0x0000);
       
  1751 
       
  1752 	  /* Stop a shared interrupt from scavenging while we are. */
       
  1753 	  spin_lock_irq(&tp->lock);
       
  1754 	  rtl8139_tx_clear (tp);
       
  1755 	  spin_unlock_irq(&tp->lock);
       
  1756 
       
  1757 	  /* ...and finally, reset everything */
       
  1758 	  if (netif_running(dev)) {
       
  1759 	    rtl8139_hw_start (dev);
       
  1760 	    netif_wake_queue (dev);
       
  1761 	  }
       
  1762 	  spin_unlock_bh(&tp->rx_lock);
       
  1763 	}
       
  1764 }
       
  1765 
       
  1766 static void rtl8139_tx_timeout (struct net_device *dev)
       
  1767 {
       
  1768 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1769 
       
  1770 	tp->watchdog_fired = 1;
       
  1771 	if (!tp->ecdev && !tp->have_thread) {
       
  1772 		INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
       
  1773 		schedule_delayed_work(&tp->thread, next_tick);
       
  1774 	}
       
  1775 }
       
  1776 
       
  1777 static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
       
  1778 {
       
  1779 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1780 	void __iomem *ioaddr = tp->mmio_addr;
       
  1781 	unsigned int entry;
       
  1782 	unsigned int len = skb->len;
       
  1783 	unsigned long flags;
       
  1784 
       
  1785 	/* Calculate the next Tx descriptor entry. */
       
  1786 	entry = tp->cur_tx % NUM_TX_DESC;
       
  1787 
       
  1788 	/* Note: the chip doesn't have auto-pad! */
       
  1789 	if (likely(len < TX_BUF_SIZE)) {
       
  1790 		if (len < ETH_ZLEN)
       
  1791 			memset(tp->tx_buf[entry], 0, ETH_ZLEN);
       
  1792 		skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
       
  1793 		if (!tp->ecdev) dev_kfree_skb(skb);
       
  1794 	} else {
       
  1795 		if (!tp->ecdev) dev_kfree_skb(skb);
       
  1796 		dev->stats.tx_dropped++;
       
  1797 		return 0;
       
  1798 	}
       
  1799 
       
  1800 	if (tp->ecdev) {
       
  1801 		wmb();
       
  1802 		RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
       
  1803 			tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
       
  1804  
       
  1805  
       
  1806 		tp->cur_tx++;
       
  1807 	} else {
       
  1808 		spin_lock_irqsave(&tp->lock, flags);
       
  1809 		/*
       
  1810 		 * Writing to TxStatus triggers a DMA transfer of the data
       
  1811 		 * copied to tp->tx_buf[entry] above. Use a memory barrier
       
  1812 		 * to make sure that the device sees the updated data.
       
  1813 		 */
       
  1814 		wmb();
       
  1815 		RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
       
  1816 			   tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
       
  1817 
       
  1818 		tp->cur_tx++;
       
  1819 
       
  1820 		if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
       
  1821 			netif_stop_queue (dev);
       
  1822 		spin_unlock_irqrestore(&tp->lock, flags);
       
  1823 
       
  1824 		if (netif_msg_tx_queued(tp))
       
  1825 			pr_debug("%s: Queued Tx packet size %u to slot %d.\n",
       
  1826 				dev->name, len, entry);
       
  1827 	}
       
  1828 
       
  1829 	return 0;
       
  1830 }
       
  1831 
       
  1832 
       
  1833 static void rtl8139_tx_interrupt (struct net_device *dev,
       
  1834 				  struct rtl8139_private *tp,
       
  1835 				  void __iomem *ioaddr)
       
  1836 {
       
  1837 	unsigned long dirty_tx, tx_left;
       
  1838 
       
  1839 	assert (dev != NULL);
       
  1840 	assert (ioaddr != NULL);
       
  1841 
       
  1842 	dirty_tx = tp->dirty_tx;
       
  1843 	tx_left = tp->cur_tx - dirty_tx;
       
  1844 	while (tx_left > 0) {
       
  1845 		int entry = dirty_tx % NUM_TX_DESC;
       
  1846 		int txstatus;
       
  1847 
       
  1848 		txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
       
  1849 
       
  1850 		if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
       
  1851 			break;	/* It still hasn't been Txed */
       
  1852 
       
  1853 		/* Note: TxCarrierLost is always asserted at 100mbps. */
       
  1854 		if (txstatus & (TxOutOfWindow | TxAborted)) {
       
  1855 			/* There was an major error, log it. */
       
  1856 			if (netif_msg_tx_err(tp))
       
  1857 				pr_debug("%s: Transmit error, Tx status %8.8x.\n",
       
  1858 					dev->name, txstatus);
       
  1859 			dev->stats.tx_errors++;
       
  1860 			if (txstatus & TxAborted) {
       
  1861 				dev->stats.tx_aborted_errors++;
       
  1862 				RTL_W32 (TxConfig, TxClearAbt);
       
  1863 				RTL_W16 (IntrStatus, TxErr);
       
  1864 				wmb();
       
  1865 			}
       
  1866 			if (txstatus & TxCarrierLost)
       
  1867 				dev->stats.tx_carrier_errors++;
       
  1868 			if (txstatus & TxOutOfWindow)
       
  1869 				dev->stats.tx_window_errors++;
       
  1870 		} else {
       
  1871 			if (txstatus & TxUnderrun) {
       
  1872 				/* Add 64 to the Tx FIFO threshold. */
       
  1873 				if (tp->tx_flag < 0x00300000)
       
  1874 					tp->tx_flag += 0x00020000;
       
  1875 				dev->stats.tx_fifo_errors++;
       
  1876 			}
       
  1877 			dev->stats.collisions += (txstatus >> 24) & 15;
       
  1878 			dev->stats.tx_bytes += txstatus & 0x7ff;
       
  1879 			dev->stats.tx_packets++;
       
  1880 		}
       
  1881 
       
  1882 		dirty_tx++;
       
  1883 		tx_left--;
       
  1884 	}
       
  1885 
       
  1886 #ifndef RTL8139_NDEBUG
       
  1887 	if (!tp->ecdev && tp->cur_tx - dirty_tx > NUM_TX_DESC) {
       
  1888 		pr_err("%s: Out-of-sync dirty pointer, %ld vs. %ld.\n",
       
  1889 		        dev->name, dirty_tx, tp->cur_tx);
       
  1890 		dirty_tx += NUM_TX_DESC;
       
  1891 	}
       
  1892 #endif /* RTL8139_NDEBUG */
       
  1893 
       
  1894 	/* only wake the queue if we did work, and the queue is stopped */
       
  1895 	if (tp->dirty_tx != dirty_tx) {
       
  1896 		tp->dirty_tx = dirty_tx;
       
  1897 		mb();
       
  1898 		if (!tp->ecdev) netif_wake_queue (dev);
       
  1899 	}
       
  1900 }
       
  1901 
       
  1902 
       
  1903 /* TODO: clean this up!  Rx reset need not be this intensive */
       
  1904 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
       
  1905 			    struct rtl8139_private *tp, void __iomem *ioaddr)
       
  1906 {
       
  1907 	u8 tmp8;
       
  1908 #ifdef CONFIG_8139_OLD_RX_RESET
       
  1909 	int tmp_work;
       
  1910 #endif
       
  1911 
       
  1912 	if (netif_msg_rx_err (tp))
       
  1913 		pr_debug("%s: Ethernet frame had errors, status %8.8x.\n",
       
  1914 			dev->name, rx_status);
       
  1915 	dev->stats.rx_errors++;
       
  1916 	if (!(rx_status & RxStatusOK)) {
       
  1917 		if (rx_status & RxTooLong) {
       
  1918 			pr_debug("%s: Oversized Ethernet frame, status %4.4x!\n",
       
  1919 			 	dev->name, rx_status);
       
  1920 			/* A.C.: The chip hangs here. */
       
  1921 		}
       
  1922 		if (rx_status & (RxBadSymbol | RxBadAlign))
       
  1923 			dev->stats.rx_frame_errors++;
       
  1924 		if (rx_status & (RxRunt | RxTooLong))
       
  1925 			dev->stats.rx_length_errors++;
       
  1926 		if (rx_status & RxCRCErr)
       
  1927 			dev->stats.rx_crc_errors++;
       
  1928 	} else {
       
  1929 		tp->xstats.rx_lost_in_ring++;
       
  1930 	}
       
  1931 
       
  1932 #ifndef CONFIG_8139_OLD_RX_RESET
       
  1933 	tmp8 = RTL_R8 (ChipCmd);
       
  1934 	RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
       
  1935 	RTL_W8 (ChipCmd, tmp8);
       
  1936 	RTL_W32 (RxConfig, tp->rx_config);
       
  1937 	tp->cur_rx = 0;
       
  1938 #else
       
  1939 	/* Reset the receiver, based on RealTek recommendation. (Bug?) */
       
  1940 
       
  1941 	/* disable receive */
       
  1942 	RTL_W8_F (ChipCmd, CmdTxEnb);
       
  1943 	tmp_work = 200;
       
  1944 	while (--tmp_work > 0) {
       
  1945 		udelay(1);
       
  1946 		tmp8 = RTL_R8 (ChipCmd);
       
  1947 		if (!(tmp8 & CmdRxEnb))
       
  1948 			break;
       
  1949 	}
       
  1950 	if (tmp_work <= 0)
       
  1951 		pr_warning(PFX "rx stop wait too long\n");
       
  1952 	/* restart receive */
       
  1953 	tmp_work = 200;
       
  1954 	while (--tmp_work > 0) {
       
  1955 		RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1956 		udelay(1);
       
  1957 		tmp8 = RTL_R8 (ChipCmd);
       
  1958 		if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
       
  1959 			break;
       
  1960 	}
       
  1961 	if (tmp_work <= 0)
       
  1962 		pr_warning(PFX "tx/rx enable wait too long\n");
       
  1963 
       
  1964 	/* and reinitialize all rx related registers */
       
  1965 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1966 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1967 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1968 
       
  1969 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1970 	RTL_W32 (RxConfig, tp->rx_config);
       
  1971 	tp->cur_rx = 0;
       
  1972 
       
  1973 	pr_debug("init buffer addresses\n");
       
  1974 
       
  1975 	/* Lock Config[01234] and BMCR register writes */
       
  1976 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1977 
       
  1978 	/* init Rx ring buffer DMA address */
       
  1979 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1980 
       
  1981 	/* A.C.: Reset the multicast list. */
       
  1982 	__set_rx_mode (dev);
       
  1983 #endif
       
  1984 }
       
  1985 
       
  1986 #if RX_BUF_IDX == 3
       
  1987 static inline void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
       
  1988 				 u32 offset, unsigned int size)
       
  1989 {
       
  1990 	u32 left = RX_BUF_LEN - offset;
       
  1991 
       
  1992 	if (size > left) {
       
  1993 		skb_copy_to_linear_data(skb, ring + offset, left);
       
  1994 		skb_copy_to_linear_data_offset(skb, left, ring, size - left);
       
  1995 	} else
       
  1996 		skb_copy_to_linear_data(skb, ring + offset, size);
       
  1997 }
       
  1998 #endif
       
  1999 
       
  2000 static void rtl8139_isr_ack(struct rtl8139_private *tp)
       
  2001 {
       
  2002 	void __iomem *ioaddr = tp->mmio_addr;
       
  2003 	u16 status;
       
  2004 
       
  2005 	status = RTL_R16 (IntrStatus) & RxAckBits;
       
  2006 
       
  2007 	/* Clear out errors and receive interrupts */
       
  2008 	if (likely(status != 0)) {
       
  2009 		if (unlikely(status & (RxFIFOOver | RxOverflow))) {
       
  2010 			tp->dev->stats.rx_errors++;
       
  2011 			if (status & RxFIFOOver)
       
  2012 				tp->dev->stats.rx_fifo_errors++;
       
  2013 		}
       
  2014 		RTL_W16_F (IntrStatus, RxAckBits);
       
  2015 	}
       
  2016 }
       
  2017 
       
  2018 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
       
  2019 		      int budget)
       
  2020 {
       
  2021 	void __iomem *ioaddr = tp->mmio_addr;
       
  2022 	int received = 0;
       
  2023 	unsigned char *rx_ring = tp->rx_ring;
       
  2024 	unsigned int cur_rx = tp->cur_rx;
       
  2025 	unsigned int rx_size = 0;
       
  2026 
       
  2027 	pr_debug("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
       
  2028 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx,
       
  2029 		 RTL_R16 (RxBufAddr),
       
  2030 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
       
  2031 
       
  2032 	while ((tp->ecdev || netif_running(dev))
       
  2033 			&& received < budget
       
  2034 			&& (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
       
  2035 		u32 ring_offset = cur_rx % RX_BUF_LEN;
       
  2036 		u32 rx_status;
       
  2037 		unsigned int pkt_size;
       
  2038 		struct sk_buff *skb;
       
  2039 
       
  2040 		rmb();
       
  2041 
       
  2042 		/* read size+status of next frame from DMA ring buffer */
       
  2043 		rx_status = le32_to_cpu (*(__le32 *) (rx_ring + ring_offset));
       
  2044 		rx_size = rx_status >> 16;
       
  2045 		pkt_size = rx_size - 4;
       
  2046 
       
  2047 		if (!tp->ecdev) {
       
  2048 			if (netif_msg_rx_status(tp))
       
  2049 				pr_debug("%s:  rtl8139_rx() status %4.4x, size %4.4x,"
       
  2050 					" cur %4.4x.\n", dev->name, rx_status,
       
  2051 				 rx_size, cur_rx);
       
  2052 		}
       
  2053 #if RTL8139_DEBUG > 2
       
  2054 		{
       
  2055 			int i;
       
  2056 			pr_debug("%s: Frame contents ", dev->name);
       
  2057 			for (i = 0; i < 70; i++)
       
  2058 				pr_cont(" %2.2x",
       
  2059 					rx_ring[ring_offset + i]);
       
  2060 			pr_cont(".\n");
       
  2061 		}
       
  2062 #endif
       
  2063 
       
  2064 		/* Packet copy from FIFO still in progress.
       
  2065 		 * Theoretically, this should never happen
       
  2066 		 * since EarlyRx is disabled.
       
  2067 		 */
       
  2068 		if (unlikely(rx_size == 0xfff0)) {
       
  2069 			if (!tp->fifo_copy_timeout)
       
  2070 				tp->fifo_copy_timeout = jiffies + 2;
       
  2071 			else if (time_after(jiffies, tp->fifo_copy_timeout)) {
       
  2072 				pr_debug("%s: hung FIFO. Reset.", dev->name);
       
  2073 				rx_size = 0;
       
  2074 				goto no_early_rx;
       
  2075 			}
       
  2076 			if (netif_msg_intr(tp)) {
       
  2077 				pr_debug("%s: fifo copy in progress.",
       
  2078 				       dev->name);
       
  2079 			}
       
  2080 			tp->xstats.early_rx++;
       
  2081 			break;
       
  2082 		}
       
  2083 
       
  2084 no_early_rx:
       
  2085 		tp->fifo_copy_timeout = 0;
       
  2086 
       
  2087 		/* If Rx err or invalid rx_size/rx_status received
       
  2088 		 * (which happens if we get lost in the ring),
       
  2089 		 * Rx process gets reset, so we abort any further
       
  2090 		 * Rx processing.
       
  2091 		 */
       
  2092 		if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
       
  2093 			     (rx_size < 8) ||
       
  2094 			     (!(rx_status & RxStatusOK)))) {
       
  2095 			rtl8139_rx_err (rx_status, dev, tp, ioaddr);
       
  2096 			received = -1;
       
  2097 			goto out;
       
  2098 		}
       
  2099 
       
  2100 		if (tp->ecdev) {
       
  2101 			ecdev_receive(tp->ecdev,
       
  2102 					&rx_ring[ring_offset + 4], pkt_size);
       
  2103 					dev->last_rx = jiffies;
       
  2104 					dev->stats.rx_bytes += pkt_size;
       
  2105 					dev->stats.rx_packets++;
       
  2106 		} else {
       
  2107 			/* Malloc up new buffer, compatible with net-2e. */
       
  2108 			/* Omit the four octet CRC from the length. */
       
  2109 
       
  2110 			skb = netdev_alloc_skb(dev, pkt_size + NET_IP_ALIGN);
       
  2111 			if (likely(skb)) {
       
  2112 				skb_reserve (skb, NET_IP_ALIGN);	/* 16 byte align the IP fields. */
       
  2113 #if RX_BUF_IDX == 3
       
  2114 				wrap_copy(skb, rx_ring, ring_offset+4, pkt_size);
       
  2115 #else
       
  2116 				skb_copy_to_linear_data (skb, &rx_ring[ring_offset + 4], pkt_size);
       
  2117 #endif
       
  2118 				skb_put (skb, pkt_size);
       
  2119 
       
  2120 				skb->protocol = eth_type_trans (skb, dev);
       
  2121 
       
  2122 				dev->stats.rx_bytes += pkt_size;
       
  2123 				dev->stats.rx_packets++;
       
  2124 
       
  2125 				netif_receive_skb (skb);
       
  2126 			} else {
       
  2127 				if (net_ratelimit())
       
  2128 					pr_warning("%s: Memory squeeze, dropping packet.\n",
       
  2129 						dev->name);
       
  2130 				dev->stats.rx_dropped++;
       
  2131 			}
       
  2132 		}
       
  2133 		received++;
       
  2134 
       
  2135 		cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
       
  2136 		RTL_W16 (RxBufPtr, (u16) (cur_rx - 16));
       
  2137 
       
  2138 		rtl8139_isr_ack(tp);
       
  2139 	}
       
  2140 
       
  2141 	if (unlikely(!received || rx_size == 0xfff0))
       
  2142 		rtl8139_isr_ack(tp);
       
  2143 
       
  2144 	pr_debug("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
       
  2145 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
       
  2146 		 RTL_R16 (RxBufAddr),
       
  2147 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
       
  2148 
       
  2149 	tp->cur_rx = cur_rx;
       
  2150 
       
  2151 	/*
       
  2152 	 * The receive buffer should be mostly empty.
       
  2153 	 * Tell NAPI to reenable the Rx irq.
       
  2154 	 */
       
  2155 	if (tp->fifo_copy_timeout)
       
  2156 		received = budget;
       
  2157 
       
  2158 out:
       
  2159 	return received;
       
  2160 }
       
  2161 
       
  2162 
       
  2163 static void rtl8139_weird_interrupt (struct net_device *dev,
       
  2164 				     struct rtl8139_private *tp,
       
  2165 				     void __iomem *ioaddr,
       
  2166 				     int status, int link_changed)
       
  2167 {
       
  2168 	pr_debug("%s: Abnormal interrupt, status %8.8x.\n",
       
  2169 		 dev->name, status);
       
  2170 
       
  2171 	assert (dev != NULL);
       
  2172 	assert (tp != NULL);
       
  2173 	assert (ioaddr != NULL);
       
  2174 
       
  2175 	/* Update the error count. */
       
  2176 	dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2177 	RTL_W32 (RxMissed, 0);
       
  2178 
       
  2179 	if ((status & RxUnderrun) && link_changed &&
       
  2180 	    (tp->drv_flags & HAS_LNK_CHNG)) {
       
  2181 		rtl_check_media(dev, 0);
       
  2182 		status &= ~RxUnderrun;
       
  2183 	}
       
  2184 
       
  2185 	if (status & (RxUnderrun | RxErr))
       
  2186 		dev->stats.rx_errors++;
       
  2187 
       
  2188 	if (status & PCSTimeout)
       
  2189 		dev->stats.rx_length_errors++;
       
  2190 	if (status & RxUnderrun)
       
  2191 		dev->stats.rx_fifo_errors++;
       
  2192 	if (status & PCIErr) {
       
  2193 		u16 pci_cmd_status;
       
  2194 		pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
       
  2195 		pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
       
  2196 
       
  2197 		pr_err("%s: PCI Bus error %4.4x.\n",
       
  2198 			dev->name, pci_cmd_status);
       
  2199 	}
       
  2200 }
       
  2201 
       
  2202 static int rtl8139_poll(struct napi_struct *napi, int budget)
       
  2203 {
       
  2204 	struct rtl8139_private *tp = container_of(napi, struct rtl8139_private, napi);
       
  2205 	struct net_device *dev = tp->dev;
       
  2206 	void __iomem *ioaddr = tp->mmio_addr;
       
  2207 	int work_done;
       
  2208 
       
  2209 	spin_lock(&tp->rx_lock);
       
  2210 	work_done = 0;
       
  2211 	if (likely(RTL_R16(IntrStatus) & RxAckBits))
       
  2212 		work_done += rtl8139_rx(dev, tp, budget);
       
  2213 
       
  2214 	if (work_done < budget) {
       
  2215 		unsigned long flags;
       
  2216 		/*
       
  2217 		 * Order is important since data can get interrupted
       
  2218 		 * again when we think we are done.
       
  2219 		 */
       
  2220 		spin_lock_irqsave(&tp->lock, flags);
       
  2221 		__napi_complete(napi);
       
  2222 		RTL_W16_F(IntrMask, rtl8139_intr_mask);
       
  2223 		spin_unlock_irqrestore(&tp->lock, flags);
       
  2224 	}
       
  2225 	spin_unlock(&tp->rx_lock);
       
  2226 
       
  2227 	return work_done;
       
  2228 }
       
  2229 
       
  2230 void ec_poll(struct net_device *dev)
       
  2231 {
       
  2232     rtl8139_interrupt(0, dev);
       
  2233 }
       
  2234 
       
  2235 /* The interrupt handler does all of the Rx thread work and cleans up
       
  2236    after the Tx thread. */
       
  2237 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance)
       
  2238 {
       
  2239 	struct net_device *dev = (struct net_device *) dev_instance;
       
  2240 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2241 	void __iomem *ioaddr = tp->mmio_addr;
       
  2242 	u16 status, ackstat;
       
  2243 	int link_changed = 0; /* avoid bogus "uninit" warning */
       
  2244 	int handled = 0;
       
  2245 
       
  2246 	if (tp->ecdev) {
       
  2247 		status = RTL_R16 (IntrStatus);
       
  2248 	}
       
  2249 	else {
       
  2250 		spin_lock (&tp->lock);
       
  2251 		status = RTL_R16 (IntrStatus);
       
  2252 
       
  2253 		/* shared irq? */
       
  2254 		if (unlikely((status & rtl8139_intr_mask) == 0))
       
  2255 			goto out;
       
  2256 	}
       
  2257 
       
  2258 	handled = 1;
       
  2259 
       
  2260 	/* h/w no longer present (hotplug?) or major error, bail */
       
  2261 	if (unlikely(status == 0xFFFF))
       
  2262 		goto out;
       
  2263 
       
  2264 	if (!tp->ecdev) {
       
  2265 		/* close possible race's with dev_close */
       
  2266 		if (unlikely(!netif_running(dev))) {
       
  2267 			RTL_W16 (IntrMask, 0);
       
  2268 			goto out;
       
  2269 		}
       
  2270 	}
       
  2271 
       
  2272 	/* Acknowledge all of the current interrupt sources ASAP, but
       
  2273 	   an first get an additional status bit from CSCR. */
       
  2274 	if (unlikely(status & RxUnderrun))
       
  2275 		link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
       
  2276 
       
  2277 	ackstat = status & ~(RxAckBits | TxErr);
       
  2278 	if (ackstat)
       
  2279 		RTL_W16 (IntrStatus, ackstat);
       
  2280 
       
  2281 	/* Receive packets are processed by poll routine.
       
  2282 	   If not running start it now. */
       
  2283 	if (status & RxAckBits){
       
  2284 		if (tp->ecdev) {
       
  2285 			/* EtherCAT device: Just receive all frames */
       
  2286 			rtl8139_rx(dev, tp, 100); // FIXME
       
  2287 		} else {
       
  2288 			/* Mark for polling */
       
  2289 			if (napi_schedule_prep(&tp->napi)) {
       
  2290 				RTL_W16_F (IntrMask, rtl8139_norx_intr_mask);
       
  2291 				__napi_schedule(&tp->napi);
       
  2292 			}
       
  2293 		}
       
  2294 	}
       
  2295 
       
  2296 	/* Check uncommon events with one test. */
       
  2297 	if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr)))
       
  2298 		rtl8139_weird_interrupt (dev, tp, ioaddr,
       
  2299 					 status, link_changed);
       
  2300 
       
  2301 	if (status & (TxOK | TxErr)) {
       
  2302 		rtl8139_tx_interrupt (dev, tp, ioaddr);
       
  2303 		if (status & TxErr)
       
  2304 			RTL_W16 (IntrStatus, TxErr);
       
  2305 	}
       
  2306  out:
       
  2307 	if (!tp->ecdev) spin_unlock (&tp->lock);
       
  2308 
       
  2309 	pr_debug("%s: exiting interrupt, intr_status=%#4.4x.\n",
       
  2310 		 dev->name, RTL_R16 (IntrStatus));
       
  2311 	return IRQ_RETVAL(handled);
       
  2312 }
       
  2313 
       
  2314 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  2315 /*
       
  2316  * Polling receive - used by netconsole and other diagnostic tools
       
  2317  * to allow network i/o with interrupts disabled.
       
  2318  */
       
  2319 static void rtl8139_poll_controller(struct net_device *dev)
       
  2320 {
       
  2321 	disable_irq(dev->irq);
       
  2322 	rtl8139_interrupt(dev->irq, dev);
       
  2323 	enable_irq(dev->irq);
       
  2324 }
       
  2325 #endif
       
  2326 
       
  2327 static int rtl8139_set_mac_address(struct net_device *dev, void *p)
       
  2328 {
       
  2329 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2330 	void __iomem *ioaddr = tp->mmio_addr;
       
  2331 	struct sockaddr *addr = p;
       
  2332 
       
  2333 	if (!is_valid_ether_addr(addr->sa_data))
       
  2334 		return -EADDRNOTAVAIL;
       
  2335 
       
  2336 	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
       
  2337 
       
  2338 	spin_lock_irq(&tp->lock);
       
  2339 
       
  2340 	RTL_W8_F(Cfg9346, Cfg9346_Unlock);
       
  2341 	RTL_W32_F(MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
       
  2342 	RTL_W32_F(MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
       
  2343 	RTL_W8_F(Cfg9346, Cfg9346_Lock);
       
  2344 
       
  2345 	spin_unlock_irq(&tp->lock);
       
  2346 
       
  2347 	return 0;
       
  2348 }
       
  2349 
       
  2350 static int rtl8139_close (struct net_device *dev)
       
  2351 {
       
  2352 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2353 	void __iomem *ioaddr = tp->mmio_addr;
       
  2354 	unsigned long flags;
       
  2355 
       
  2356 	if (tp->ecdev) {
       
  2357 		/* Stop the chip's Tx and Rx DMA processes. */
       
  2358 		RTL_W8 (ChipCmd, 0);
       
  2359 
       
  2360 		/* Disable interrupts by clearing the interrupt mask. */
       
  2361 		RTL_W16 (IntrMask, 0);
       
  2362 
       
  2363 		/* Update the error counts. */
       
  2364 		dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2365 		RTL_W32 (RxMissed, 0);
       
  2366 	} else {
       
  2367 		netif_stop_queue(dev);
       
  2368 		napi_disable(&tp->napi);
       
  2369 
       
  2370 		if (netif_msg_ifdown(tp))
       
  2371 			pr_debug("%s: Shutting down ethercard, status was 0x%4.4x.\n",
       
  2372 				dev->name, RTL_R16 (IntrStatus));
       
  2373 
       
  2374 		spin_lock_irqsave (&tp->lock, flags);
       
  2375 
       
  2376 		/* Stop the chip's Tx and Rx DMA processes. */
       
  2377 		RTL_W8 (ChipCmd, 0);
       
  2378 
       
  2379 		/* Disable interrupts by clearing the interrupt mask. */
       
  2380 		RTL_W16 (IntrMask, 0);
       
  2381 
       
  2382 		/* Update the error counts. */
       
  2383 		dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2384 		RTL_W32 (RxMissed, 0);
       
  2385 
       
  2386 		spin_unlock_irqrestore (&tp->lock, flags);
       
  2387 
       
  2388 		free_irq (dev->irq, dev);
       
  2389 	}
       
  2390 
       
  2391 	rtl8139_tx_clear (tp);
       
  2392 
       
  2393 	dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN,
       
  2394 			  tp->rx_ring, tp->rx_ring_dma);
       
  2395 	dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN,
       
  2396 			  tp->tx_bufs, tp->tx_bufs_dma);
       
  2397 	tp->rx_ring = NULL;
       
  2398 	tp->tx_bufs = NULL;
       
  2399 
       
  2400 	/* Green! Put the chip in low-power mode. */
       
  2401 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2402 
       
  2403 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  2404 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  2405 
       
  2406 	return 0;
       
  2407 }
       
  2408 
       
  2409 
       
  2410 /* Get the ethtool Wake-on-LAN settings.  Assumes that wol points to
       
  2411    kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
       
  2412    other threads or interrupts aren't messing with the 8139.  */
       
  2413 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2414 {
       
  2415 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2416 	void __iomem *ioaddr = tp->mmio_addr;
       
  2417 
       
  2418 	spin_lock_irq(&tp->lock);
       
  2419 	if (rtl_chip_info[tp->chipset].flags & HasLWake) {
       
  2420 		u8 cfg3 = RTL_R8 (Config3);
       
  2421 		u8 cfg5 = RTL_R8 (Config5);
       
  2422 
       
  2423 		wol->supported = WAKE_PHY | WAKE_MAGIC
       
  2424 			| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
       
  2425 
       
  2426 		wol->wolopts = 0;
       
  2427 		if (cfg3 & Cfg3_LinkUp)
       
  2428 			wol->wolopts |= WAKE_PHY;
       
  2429 		if (cfg3 & Cfg3_Magic)
       
  2430 			wol->wolopts |= WAKE_MAGIC;
       
  2431 		/* (KON)FIXME: See how netdev_set_wol() handles the
       
  2432 		   following constants.  */
       
  2433 		if (cfg5 & Cfg5_UWF)
       
  2434 			wol->wolopts |= WAKE_UCAST;
       
  2435 		if (cfg5 & Cfg5_MWF)
       
  2436 			wol->wolopts |= WAKE_MCAST;
       
  2437 		if (cfg5 & Cfg5_BWF)
       
  2438 			wol->wolopts |= WAKE_BCAST;
       
  2439 	}
       
  2440 	spin_unlock_irq(&tp->lock);
       
  2441 }
       
  2442 
       
  2443 
       
  2444 /* Set the ethtool Wake-on-LAN settings.  Return 0 or -errno.  Assumes
       
  2445    that wol points to kernel memory and other threads or interrupts
       
  2446    aren't messing with the 8139.  */
       
  2447 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2448 {
       
  2449 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2450 	void __iomem *ioaddr = tp->mmio_addr;
       
  2451 	u32 support;
       
  2452 	u8 cfg3, cfg5;
       
  2453 
       
  2454 	support = ((rtl_chip_info[tp->chipset].flags & HasLWake)
       
  2455 		   ? (WAKE_PHY | WAKE_MAGIC
       
  2456 		      | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
       
  2457 		   : 0);
       
  2458 	if (wol->wolopts & ~support)
       
  2459 		return -EINVAL;
       
  2460 
       
  2461 	spin_lock_irq(&tp->lock);
       
  2462 	cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
       
  2463 	if (wol->wolopts & WAKE_PHY)
       
  2464 		cfg3 |= Cfg3_LinkUp;
       
  2465 	if (wol->wolopts & WAKE_MAGIC)
       
  2466 		cfg3 |= Cfg3_Magic;
       
  2467 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2468 	RTL_W8 (Config3, cfg3);
       
  2469 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  2470 
       
  2471 	cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
       
  2472 	/* (KON)FIXME: These are untested.  We may have to set the
       
  2473 	   CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
       
  2474 	   documentation.  */
       
  2475 	if (wol->wolopts & WAKE_UCAST)
       
  2476 		cfg5 |= Cfg5_UWF;
       
  2477 	if (wol->wolopts & WAKE_MCAST)
       
  2478 		cfg5 |= Cfg5_MWF;
       
  2479 	if (wol->wolopts & WAKE_BCAST)
       
  2480 		cfg5 |= Cfg5_BWF;
       
  2481 	RTL_W8 (Config5, cfg5);	/* need not unlock via Cfg9346 */
       
  2482 	spin_unlock_irq(&tp->lock);
       
  2483 
       
  2484 	return 0;
       
  2485 }
       
  2486 
       
  2487 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
       
  2488 {
       
  2489 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2490 	strcpy(info->driver, DRV_NAME);
       
  2491 	strcpy(info->version, DRV_VERSION);
       
  2492 	strcpy(info->bus_info, pci_name(tp->pci_dev));
       
  2493 	info->regdump_len = tp->regs_len;
       
  2494 }
       
  2495 
       
  2496 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2497 {
       
  2498 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2499 	spin_lock_irq(&tp->lock);
       
  2500 	mii_ethtool_gset(&tp->mii, cmd);
       
  2501 	spin_unlock_irq(&tp->lock);
       
  2502 	return 0;
       
  2503 }
       
  2504 
       
  2505 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2506 {
       
  2507 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2508 	int rc;
       
  2509 	spin_lock_irq(&tp->lock);
       
  2510 	rc = mii_ethtool_sset(&tp->mii, cmd);
       
  2511 	spin_unlock_irq(&tp->lock);
       
  2512 	return rc;
       
  2513 }
       
  2514 
       
  2515 static int rtl8139_nway_reset(struct net_device *dev)
       
  2516 {
       
  2517 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2518 	return mii_nway_restart(&tp->mii);
       
  2519 }
       
  2520 
       
  2521 static u32 rtl8139_get_link(struct net_device *dev)
       
  2522 {
       
  2523 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2524 	return mii_link_ok(&tp->mii);
       
  2525 }
       
  2526 
       
  2527 static u32 rtl8139_get_msglevel(struct net_device *dev)
       
  2528 {
       
  2529 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2530 	return tp->msg_enable;
       
  2531 }
       
  2532 
       
  2533 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
       
  2534 {
       
  2535 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2536 	tp->msg_enable = datum;
       
  2537 }
       
  2538 
       
  2539 static int rtl8139_get_regs_len(struct net_device *dev)
       
  2540 {
       
  2541 	struct rtl8139_private *tp;
       
  2542 	/* TODO: we are too slack to do reg dumping for pio, for now */
       
  2543 	if (use_io)
       
  2544 		return 0;
       
  2545 	tp = netdev_priv(dev);
       
  2546 	return tp->regs_len;
       
  2547 }
       
  2548 
       
  2549 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
       
  2550 {
       
  2551 	struct rtl8139_private *tp;
       
  2552 
       
  2553 	/* TODO: we are too slack to do reg dumping for pio, for now */
       
  2554 	if (use_io)
       
  2555 		return;
       
  2556 	tp = netdev_priv(dev);
       
  2557 
       
  2558 	regs->version = RTL_REGS_VER;
       
  2559 
       
  2560 	spin_lock_irq(&tp->lock);
       
  2561 	memcpy_fromio(regbuf, tp->mmio_addr, regs->len);
       
  2562 	spin_unlock_irq(&tp->lock);
       
  2563 }
       
  2564 
       
  2565 static int rtl8139_get_sset_count(struct net_device *dev, int sset)
       
  2566 {
       
  2567 	switch (sset) {
       
  2568 	case ETH_SS_STATS:
       
  2569 		return RTL_NUM_STATS;
       
  2570 	default:
       
  2571 		return -EOPNOTSUPP;
       
  2572 	}
       
  2573 }
       
  2574 
       
  2575 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
       
  2576 {
       
  2577 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2578 
       
  2579 	data[0] = tp->xstats.early_rx;
       
  2580 	data[1] = tp->xstats.tx_buf_mapped;
       
  2581 	data[2] = tp->xstats.tx_timeouts;
       
  2582 	data[3] = tp->xstats.rx_lost_in_ring;
       
  2583 }
       
  2584 
       
  2585 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
       
  2586 {
       
  2587 	memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
       
  2588 }
       
  2589 
       
  2590 static const struct ethtool_ops rtl8139_ethtool_ops = {
       
  2591 	.get_drvinfo		= rtl8139_get_drvinfo,
       
  2592 	.get_settings		= rtl8139_get_settings,
       
  2593 	.set_settings		= rtl8139_set_settings,
       
  2594 	.get_regs_len		= rtl8139_get_regs_len,
       
  2595 	.get_regs		= rtl8139_get_regs,
       
  2596 	.nway_reset		= rtl8139_nway_reset,
       
  2597 	.get_link		= rtl8139_get_link,
       
  2598 	.get_msglevel		= rtl8139_get_msglevel,
       
  2599 	.set_msglevel		= rtl8139_set_msglevel,
       
  2600 	.get_wol		= rtl8139_get_wol,
       
  2601 	.set_wol		= rtl8139_set_wol,
       
  2602 	.get_strings		= rtl8139_get_strings,
       
  2603 	.get_sset_count		= rtl8139_get_sset_count,
       
  2604 	.get_ethtool_stats	= rtl8139_get_ethtool_stats,
       
  2605 };
       
  2606 
       
  2607 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
       
  2608 {
       
  2609 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2610 	int rc;
       
  2611 
       
  2612 	if (tp->ecdev || !netif_running(dev))
       
  2613 		return -EINVAL;
       
  2614 
       
  2615 	spin_lock_irq(&tp->lock);
       
  2616 	rc = generic_mii_ioctl(&tp->mii, if_mii(rq), cmd, NULL);
       
  2617 	spin_unlock_irq(&tp->lock);
       
  2618 
       
  2619 	return rc;
       
  2620 }
       
  2621 
       
  2622 
       
  2623 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev)
       
  2624 {
       
  2625 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2626 	void __iomem *ioaddr = tp->mmio_addr;
       
  2627 	unsigned long flags;
       
  2628 
       
  2629 	if (tp->ecdev || netif_running(dev)) {
       
  2630 		spin_lock_irqsave (&tp->lock, flags);
       
  2631 		dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2632 		RTL_W32 (RxMissed, 0);
       
  2633 		spin_unlock_irqrestore (&tp->lock, flags);
       
  2634 	}
       
  2635 
       
  2636 	return &dev->stats;
       
  2637 }
       
  2638 
       
  2639 /* Set or clear the multicast filter for this adaptor.
       
  2640    This routine is not state sensitive and need not be SMP locked. */
       
  2641 
       
  2642 static void __set_rx_mode (struct net_device *dev)
       
  2643 {
       
  2644 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2645 	void __iomem *ioaddr = tp->mmio_addr;
       
  2646 	u32 mc_filter[2];	/* Multicast hash filter */
       
  2647 	int rx_mode;
       
  2648 	u32 tmp;
       
  2649 
       
  2650 	pr_debug("%s:   rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
       
  2651 			dev->name, dev->flags, RTL_R32 (RxConfig));
       
  2652 
       
  2653 	/* Note: do not reorder, GCC is clever about common statements. */
       
  2654 	if (dev->flags & IFF_PROMISC) {
       
  2655 		rx_mode =
       
  2656 		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
       
  2657 		    AcceptAllPhys;
       
  2658 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2659 	} else if ((netdev_mc_count(dev) > multicast_filter_limit)
       
  2660 		   || (dev->flags & IFF_ALLMULTI)) {
       
  2661 		/* Too many to filter perfectly -- accept all multicasts. */
       
  2662 		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
       
  2663 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2664 	} else {
       
  2665 		struct netdev_hw_addr *ha;
       
  2666 		rx_mode = AcceptBroadcast | AcceptMyPhys;
       
  2667 		mc_filter[1] = mc_filter[0] = 0;
       
  2668 		netdev_for_each_mc_addr(ha, dev) {
       
  2669 			int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
       
  2670 
       
  2671 			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
       
  2672 			rx_mode |= AcceptMulticast;
       
  2673 		}
       
  2674 	}
       
  2675 
       
  2676 	/* We can safely update without stopping the chip. */
       
  2677 	tmp = rtl8139_rx_config | rx_mode;
       
  2678 	if (tp->rx_config != tmp) {
       
  2679 		RTL_W32_F (RxConfig, tmp);
       
  2680 		tp->rx_config = tmp;
       
  2681 	}
       
  2682 	RTL_W32_F (MAR0 + 0, mc_filter[0]);
       
  2683 	RTL_W32_F (MAR0 + 4, mc_filter[1]);
       
  2684 }
       
  2685 
       
  2686 static void rtl8139_set_rx_mode (struct net_device *dev)
       
  2687 {
       
  2688 	unsigned long flags;
       
  2689 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2690 
       
  2691 	spin_lock_irqsave (&tp->lock, flags);
       
  2692 	__set_rx_mode(dev);
       
  2693 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2694 }
       
  2695 
       
  2696 #ifdef CONFIG_PM
       
  2697 
       
  2698 static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state)
       
  2699 {
       
  2700 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2701 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2702 	void __iomem *ioaddr = tp->mmio_addr;
       
  2703 	unsigned long flags;
       
  2704 
       
  2705 	pci_save_state (pdev);
       
  2706 
       
  2707 	if (tp->ecdev || !netif_running (dev))
       
  2708 		return 0;
       
  2709 
       
  2710 	netif_device_detach (dev);
       
  2711 
       
  2712 	spin_lock_irqsave (&tp->lock, flags);
       
  2713 
       
  2714 	/* Disable interrupts, stop Tx and Rx. */
       
  2715 	RTL_W16 (IntrMask, 0);
       
  2716 	RTL_W8 (ChipCmd, 0);
       
  2717 
       
  2718 	/* Update the error counts. */
       
  2719 	dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2720 	RTL_W32 (RxMissed, 0);
       
  2721 
       
  2722 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2723 
       
  2724 	pci_set_power_state (pdev, PCI_D3hot);
       
  2725 
       
  2726 	return 0;
       
  2727 }
       
  2728 
       
  2729 
       
  2730 static int rtl8139_resume (struct pci_dev *pdev)
       
  2731 {
       
  2732 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2733 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2734 
       
  2735 	pci_restore_state (pdev);
       
  2736 	if (tp->ecdev || !netif_running (dev))
       
  2737 		return 0;
       
  2738 	pci_set_power_state (pdev, PCI_D0);
       
  2739 	rtl8139_init_ring (dev);
       
  2740 	rtl8139_hw_start (dev);
       
  2741 	netif_device_attach (dev);
       
  2742 	return 0;
       
  2743 }
       
  2744 
       
  2745 #endif /* CONFIG_PM */
       
  2746 
       
  2747 
       
  2748 static struct pci_driver rtl8139_pci_driver = {
       
  2749 	.name		= DRV_NAME,
       
  2750 	.id_table	= rtl8139_pci_tbl,
       
  2751 	.probe		= rtl8139_init_one,
       
  2752 	.remove		= __devexit_p(rtl8139_remove_one),
       
  2753 #ifdef CONFIG_PM
       
  2754 	.suspend	= rtl8139_suspend,
       
  2755 	.resume		= rtl8139_resume,
       
  2756 #endif /* CONFIG_PM */
       
  2757 };
       
  2758 
       
  2759 
       
  2760 static int __init rtl8139_init_module (void)
       
  2761 {
       
  2762 	/* when we're a module, we always print a version message,
       
  2763 	 * even if no 8139 board is found.
       
  2764 	 */
       
  2765 #ifdef MODULE
       
  2766 	pr_info(RTL8139_DRIVER_NAME "\n");
       
  2767 #endif
       
  2768 
       
  2769 	return pci_register_driver(&rtl8139_pci_driver);
       
  2770 }
       
  2771 
       
  2772 
       
  2773 static void __exit rtl8139_cleanup_module (void)
       
  2774 {
       
  2775 	pci_unregister_driver (&rtl8139_pci_driver);
       
  2776 }
       
  2777 
       
  2778 
       
  2779 module_init(rtl8139_init_module);
       
  2780 module_exit(rtl8139_cleanup_module);