678 size_t sync_size; |
678 size_t sync_size; |
679 |
679 |
680 sync_size = ec_slave_calc_sync_size(slave, sync); |
680 sync_size = ec_slave_calc_sync_size(slave, sync); |
681 |
681 |
682 if (slave->master->debug_level) { |
682 if (slave->master->debug_level) { |
683 EC_DBG("Slave %i, sync manager %i:\n", slave->ring_position, |
683 EC_DBG("Slave %3i, SM %i: Addr 0x%04X, Size %3i, Ctrl 0x%02X\n", |
684 sync->index); |
684 slave->ring_position, sync->index, sync->physical_start_address, |
685 EC_DBG(" Address: 0x%04X\n", sync->physical_start_address); |
685 sync_size, sync->control_register); |
686 EC_DBG(" Size: %i\n", sync_size); |
|
687 EC_DBG(" Control: 0x%02X\n", sync->control_register); |
|
688 } |
686 } |
689 |
687 |
690 EC_WRITE_U16(data, sync->physical_start_address); |
688 EC_WRITE_U16(data, sync->physical_start_address); |
691 EC_WRITE_U16(data + 2, sync_size); |
689 EC_WRITE_U16(data + 2, sync_size); |
692 EC_WRITE_U8 (data + 4, sync->control_register); |
690 EC_WRITE_U8 (data + 4, sync->control_register); |
709 size_t sync_size; |
707 size_t sync_size; |
710 |
708 |
711 sync_size = ec_slave_calc_sync_size(slave, fmmu->sync); |
709 sync_size = ec_slave_calc_sync_size(slave, fmmu->sync); |
712 |
710 |
713 if (slave->master->debug_level) { |
711 if (slave->master->debug_level) { |
714 EC_DBG("Slave %i, FMMU %i:\n", |
712 EC_DBG("Slave %3i, FMMU %2i:" |
715 slave->ring_position, fmmu->index); |
713 " LogAddr 0x%08X, Size %3i, PhysAddr 0x%04X, Dir %s\n", |
716 |
714 slave->ring_position, fmmu->index, fmmu->logical_start_address, |
717 EC_DBG(" Logical address: 0x%04X\n", fmmu->logical_start_address); |
715 sync_size, fmmu->sync->physical_start_address, |
718 EC_DBG(" Size: %i\n", sync_size); |
716 ((fmmu->sync->control_register & 0x04) ? "out" : "in")); |
719 EC_DBG(" Physical address: 0x%04X\n", |
|
720 fmmu->sync->physical_start_address); |
|
721 EC_DBG(" Direction: %s\n", |
|
722 ((fmmu->sync->control_register & 0x04) ? "output" : "input")); |
|
723 } |
717 } |
724 |
718 |
725 EC_WRITE_U32(data, fmmu->logical_start_address); |
719 EC_WRITE_U32(data, fmmu->logical_start_address); |
726 EC_WRITE_U16(data + 4, sync_size); // size of fmmu |
720 EC_WRITE_U16(data + 4, sync_size); // size of fmmu |
727 EC_WRITE_U8 (data + 6, 0x00); // logical start bit |
721 EC_WRITE_U8 (data + 6, 0x00); // logical start bit |