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/******************************************************************************
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*
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* Sample module for use with IgH MSR library.
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*
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* $Id$
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*
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* Copyright (C) 2006 Florian Pose, Ingenieurgemeinschaft IgH
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*
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* This file is part of the IgH EtherCAT Master.
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*
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* The IgH EtherCAT Master is free software; you can redistribute it
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* and/or modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2 of the License.
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*
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* The IgH EtherCAT Master is distributed in the hope that it will be
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* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the IgH EtherCAT Master; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*****************************************************************************/
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// Linux
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#include <linux/module.h>
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// RTAI
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#include "rtai_sched.h"
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#include "rtai_sem.h"
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// RT_lib
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#include <msr_main.h>
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#include <msr_reg.h>
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#include "msr_param.h"
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// EtherCAT
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#include "../../include/ecrt.h"
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#define ASYNC
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#define HZREDUCTION (MSR_ABTASTFREQUENZ / HZ)
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#define TIMERTICKS (1000000000 / MSR_ABTASTFREQUENZ)
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/*****************************************************************************/
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// RTAI
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RT_TASK task;
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SEM master_sem;
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cycles_t t_start = 0, t_critical;
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// MSR
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extern unsigned long msr_controller_execution_time;
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extern unsigned long msr_controller_call_time;
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extern wait_queue_head_t msr_read_waitqueue;
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int count_wakeup = 0;
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// EtherCAT
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ec_master_t *master = NULL;
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ec_domain_t *domain1 = NULL;
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// Prozessdaten
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void *r_ssi;
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void *r_ssi_st;
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// Channels
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uint32_t k_ssi;
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uint32_t k_ssi_st;
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ec_field_init_t domain1_fields[] = {
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{&r_ssi, "0:3", "Beckhoff", "EL5001", "InputValue", 0},
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{&r_ssi_st, "0:3", "Beckhoff", "EL5001", "Status", 0},
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{}
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};
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/*****************************************************************************/
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void msr_run(long data)
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{
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cycles_t t_last_start;
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while (1)
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{
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t_last_start = t_start;
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t_start = get_cycles();
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rt_sem_wait(&master_sem);
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#ifdef ASYNC
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// Empfangen
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ecrt_master_async_receive(master);
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ecrt_domain_process(domain1);
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#else
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// Senden und empfangen
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ecrt_domain_queue(domain1);
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ecrt_master_run(master);
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ecrt_master_sync_io(master);
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ecrt_domain_process(domain1);
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#endif
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// Prozessdaten verarbeiten
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k_ssi = EC_READ_U32(r_ssi);
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k_ssi_st = EC_READ_U8 (r_ssi_st);
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#ifdef ASYNC
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// Senden
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ecrt_domain_queue(domain1);
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ecrt_master_run(master);
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ecrt_master_async_send(master);
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#endif
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rt_sem_signal(&master_sem);
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/* write data to MSR ring buffers */
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msr_write_kanal_list();
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/* wake up MSR read queue */
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if(++count_wakeup >= MSR_ABTASTFREQUENZ / 10) {
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wake_up_interruptible(&msr_read_waitqueue);
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count_wakeup = 0;
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}
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/* calculate timing */
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msr_controller_execution_time =
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(unsigned long) (get_cycles() - t_start) * 1000 / cpu_khz;
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msr_controller_call_time =
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(unsigned long) (t_start - t_last_start) * 1000 / cpu_khz;
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rt_task_wait_period();
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}
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}
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/*****************************************************************************/
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int msr_reg(void)
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{
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msr_reg_kanal("/ssi_position", "", &k_ssi, TUINT);
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msr_reg_kanal("/ssi_status", "", &k_ssi_st, TUINT);
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return 0;
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}
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/*****************************************************************************/
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int request_lock(void *data)
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{
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// too close to the next RT cycle: deny access...
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if (get_cycles() - t_start > t_critical) return -1;
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// allow access
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rt_sem_wait(&master_sem);
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return 0;
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}
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/*****************************************************************************/
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void release_lock(void *data)
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{
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rt_sem_signal(&master_sem);
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}
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/*****************************************************************************/
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int __init init_mod(void)
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{
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RTIME ticks;
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#if 0
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ec_slave_t *slave;
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#endif
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printk(KERN_INFO "=== Starting EtherCAT RTAI MSR sample module... ===\n");
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rt_sem_init(&master_sem, 1);
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t_critical = cpu_khz * 800 / MSR_ABTASTFREQUENZ; // ticks for 80%
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if (msr_rtlib_init(1, MSR_ABTASTFREQUENZ, 10, &msr_reg) < 0) {
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printk(KERN_ERR "Failed to initialize rtlib!\n");
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goto out_return;
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}
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if ((master = ecrt_request_master(0)) == NULL) {
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printk(KERN_ERR "Failed to request master 0!\n");
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goto out_msr_cleanup;
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}
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ecrt_master_callbacks(master, request_lock, release_lock, NULL);
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printk(KERN_INFO "Creating domains...\n");
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if (!(domain1 = ecrt_master_create_domain(master))) {
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printk(KERN_ERR "Failed to create domains!\n");
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goto out_release_master;
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}
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printk(KERN_INFO "Registering domain fields...\n");
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if (ecrt_domain_register_field_list(domain1, domain1_fields)) {
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printk(KERN_ERR "Failed to register domain fields.\n");
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goto out_release_master;
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}
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printk(KERN_INFO "Activating master...\n");
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if (ecrt_master_activate(master)) {
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printk(KERN_ERR "Could not activate master!\n");
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goto out_release_master;
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}
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#if 0
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if (ecrt_master_fetch_sdo_lists(master)) {
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printk(KERN_ERR "Failed to fetch SDO lists!\n");
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goto out_deactivate;
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}
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ecrt_master_print(master, 2);
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#else
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ecrt_master_print(master, 0);
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#endif
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#if 0
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if (!(slave = ecrt_master_get_slave(master, "0:3"))) {
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printk(KERN_ERR "Failed to get slave!\n");
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goto out_deactivate;
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}
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if (
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ecrt_slave_sdo_write_exp8(slave, 0x4061, 1, 1) || // disable frame error bit
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ecrt_slave_sdo_write_exp8(slave, 0x4061, 2, 0) || // power failure bit
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ecrt_slave_sdo_write_exp8(slave, 0x4061, 3, 1) || // inhibit time
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ecrt_slave_sdo_write_exp8(slave, 0x4061, 4, 0) || // test mode
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ecrt_slave_sdo_write_exp8(slave, 0x4066, 0, 1) || // dualcode
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ecrt_slave_sdo_write_exp8(slave, 0x4067, 0, 5) || // 125kbaud
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ecrt_slave_sdo_write_exp8(slave, 0x4068, 0, 0) || // single-turn
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ecrt_slave_sdo_write_exp8(slave, 0x4069, 0, 25) || // frame size
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ecrt_slave_sdo_write_exp8(slave, 0x406A, 0, 25) || // data length
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ecrt_slave_sdo_write_exp16(slave, 0x406B, 0, 30000) // inhibit time in us
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) {
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printk(KERN_ERR "Failed to configure SSI slave!\n");
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goto out_deactivate;
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}
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#endif
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#if 0
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if (!(slave = ecrt_master_get_slave(master, "1:0"))) {
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printk(KERN_ERR "Failed to get slave!\n");
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goto out_deactivate;
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}
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if (ecrt_slave_write_alias(slave, 0x5678)) {
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printk(KERN_ERR "Failed to write alias!\n");
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goto out_deactivate;
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}
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#endif
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#ifdef ASYNC
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// Einmal senden und warten...
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ecrt_master_prepare_async_io(master);
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#endif
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if (ecrt_master_start_eoe(master)) {
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printk(KERN_ERR "Failed to start EoE processing!\n");
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goto out_deactivate;
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}
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printk("Starting cyclic sample thread...\n");
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ticks = start_rt_timer(nano2count(TIMERTICKS));
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if (rt_task_init(&task, msr_run, 0, 2000, 0, 1, NULL)) {
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printk(KERN_ERR "Failed to init RTAI task!\n");
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goto out_stop_timer;
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}
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if (rt_task_make_periodic(&task, rt_get_time() + ticks, ticks)) {
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printk(KERN_ERR "Failed to run RTAI task!\n");
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goto out_stop_task;
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}
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printk(KERN_INFO "=== EtherCAT RTAI MSR sample module started. ===\n");
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return 0;
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out_stop_task:
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rt_task_delete(&task);
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out_stop_timer:
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stop_rt_timer();
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out_deactivate:
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ecrt_master_deactivate(master);
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out_release_master:
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ecrt_release_master(master);
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out_msr_cleanup:
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msr_rtlib_cleanup();
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out_return:
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rt_sem_delete(&master_sem);
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return -1;
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}
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/*****************************************************************************/
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void __exit cleanup_mod(void)
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{
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printk(KERN_INFO "=== Unloading EtherCAT RTAI MSR sample module... ===\n");
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rt_task_delete(&task);
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stop_rt_timer();
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ecrt_master_deactivate(master);
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ecrt_release_master(master);
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rt_sem_delete(&master_sem);
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msr_rtlib_cleanup();
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printk(KERN_INFO "=== EtherCAT RTAI MSR sample module unloaded. ===\n");
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}
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/*****************************************************************************/
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR ("Florian Pose <fp@igh-essen.com>");
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MODULE_DESCRIPTION ("EtherCAT RTAI MSR sample module");
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module_init(init_mod);
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module_exit(cleanup_mod);
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/*****************************************************************************/
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