author | Florian Pose <fp@igh-essen.com> |
Fri, 25 Apr 2014 17:32:49 +0200 | |
branch | stable-1.5 |
changeset 2561 | 4839e81d2bdd |
parent 2559 | a24ff468cb25 |
child 2565 | f7b06b264646 |
permissions | -rw-r--r-- |
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/** |
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Network Driver for Beckhoff CCAT communication controller |
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Copyright (C) 2014 Beckhoff Automation GmbH |
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Author: Patrick Bruenn <p.bruenn@beckhoff.com> |
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This program is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 2 of the License, or |
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(at your option) any later version. |
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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You should have received a copy of the GNU General Public License along |
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with this program; if not, write to the Free Software Foundation, Inc., |
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51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. |
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*/ |
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#include <linux/fs.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/sched.h> |
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#include <linux/uaccess.h> |
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#include "compat.h" |
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#include "module.h" |
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#include "print.h" |
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#include "update.h" |
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#define CCAT_DATA_IN_4 0x038 |
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#define CCAT_DATA_IN_N 0x7F0 |
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#define CCAT_DATA_OUT_4 0x030 |
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#define CCAT_DATA_BLOCK_SIZE (size_t)((CCAT_DATA_IN_N - CCAT_DATA_IN_4)/8) |
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#define CCAT_WRITE_BLOCK_SIZE 128 |
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#define CCAT_FLASH_SIZE (size_t)0xE0000 |
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/** FUNCTION_NAME CMD, CLOCKS */ |
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#define CCAT_BULK_ERASE 0xE3, 8 |
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#define CCAT_GET_PROM_ID 0xD5, 40 |
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#define CCAT_READ_FLASH 0xC0, 32 |
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#define CCAT_READ_STATUS 0xA0, 16 |
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#define CCAT_WRITE_ENABLE 0x60, 8 |
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#define CCAT_WRITE_FLASH 0x40, 32 |
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/* from http://graphics.stanford.edu/~seander/bithacks.html#ReverseByteWith32Bits */ |
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#define SWAP_BITS(B) \ |
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((((B) * 0x0802LU & 0x22110LU) | ((B) * 0x8020LU & 0x88440LU)) * 0x10101LU >> 16) |
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/** |
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* struct update_buffer - keep track of a CCAT FPGA update |
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* @update: pointer to a valid ccat_update object |
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* @data: buffer used for write operations |
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* @size: number of bytes written to the data buffer, if 0 on ccat_update_release() no data will be written to FPGA |
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*/ |
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struct update_buffer { |
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struct ccat_update *update; |
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char data[CCAT_FLASH_SIZE]; |
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size_t size; |
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}; |
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static void ccat_wait_status_cleared(void __iomem * const ioaddr); |
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static int ccat_read_flash(void __iomem * const ioaddr, char __user * buf, |
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uint32_t len, loff_t * off); |
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static void ccat_write_flash(const struct update_buffer *const buf); |
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static void ccat_update_cmd(void __iomem * const ioaddr, uint8_t cmd, |
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uint16_t clocks); |
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static void ccat_update_destroy(struct kref *ref); |
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/** |
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* wait_until_busy_reset() - wait until the busy flag was reset |
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* @ioaddr: address of the CCAT Update function in PCI config space |
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*/ |
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static inline void wait_until_busy_reset(void __iomem * const ioaddr) |
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{ |
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wmb(); |
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while (ioread8(ioaddr + 1)) { |
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schedule(); |
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} |
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} |
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static int ccat_update_open(struct inode *const i, struct file *const f) |
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{ |
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struct ccat_update *update = |
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container_of(i->i_cdev, struct ccat_update, cdev); |
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struct update_buffer *buf; |
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kref_get(&update->refcount); |
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if (atomic_read(&update->refcount.refcount) > 2) { |
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kref_put(&update->refcount, ccat_update_destroy); |
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return -EBUSY; |
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} |
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buf = kzalloc(sizeof(*buf), GFP_KERNEL); |
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if (!buf) { |
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kref_put(&update->refcount, ccat_update_destroy); |
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return -ENOMEM; |
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} |
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buf->update = update; |
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f->private_data = buf; |
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return 0; |
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102 |
} |
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103 |
|
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104 |
static int ccat_update_release(struct inode *const i, struct file *const f) |
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105 |
{ |
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106 |
const struct update_buffer *const buf = f->private_data; |
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107 |
struct ccat_update *const update = buf->update; |
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108 |
if (buf->size > 0) { |
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109 |
ccat_update_cmd(update->ioaddr, CCAT_WRITE_ENABLE); |
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110 |
ccat_update_cmd(update->ioaddr, CCAT_BULK_ERASE); |
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111 |
ccat_wait_status_cleared(update->ioaddr); |
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112 |
ccat_write_flash(buf); |
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113 |
} |
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114 |
kfree(f->private_data); |
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115 |
kref_put(&update->refcount, ccat_update_destroy); |
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116 |
return 0; |
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117 |
} |
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118 |
|
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119 |
/** |
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120 |
* ccat_update_read() - Read CCAT configuration data from flash |
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121 |
* @f: file handle previously initialized with ccat_update_open() |
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122 |
* @buf: buffer in user space provided for our data |
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123 |
* @len: length of the user space buffer |
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124 |
* @off: current offset of our file operation |
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125 |
* |
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126 |
* Copies data from the CCAT FPGA's configuration flash to user space. |
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127 |
* Note that the size of the FPGA's firmware is not known exactly so it |
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128 |
* is very possible that the overall buffer ends with a lot of 0xff. |
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129 |
* |
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130 |
* Return: the number of bytes written, or 0 if EOF reached |
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131 |
*/ |
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132 |
static ssize_t ccat_update_read(struct file *const f, char __user * buf, |
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133 |
size_t len, loff_t * off) |
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134 |
{ |
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135 |
struct update_buffer *update = f->private_data; |
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136 |
if (!buf || !off) { |
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137 |
return -EINVAL; |
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138 |
} |
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139 |
if (*off >= CCAT_FLASH_SIZE) { |
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140 |
return 0; |
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141 |
} |
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142 |
if (*off + len >= CCAT_FLASH_SIZE) { |
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143 |
len = CCAT_FLASH_SIZE - *off; |
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144 |
} |
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145 |
return ccat_read_flash(update->update->ioaddr, buf, len, off); |
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146 |
} |
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147 |
|
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148 |
/** |
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149 |
* ccat_update_write() - Write data to the CCAT FPGA's configuration flash |
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150 |
* @f: file handle previously initialized with ccat_update_open() |
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151 |
* @buf: buffer in user space providing the new configuration data (from *.rbf) |
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152 |
* @len: length of the user space buffer |
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153 |
* @off: current offset in the configuration data |
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154 |
* |
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155 |
* Copies data from user space (possibly a *.rbf) to the CCAT FPGA's |
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156 |
* configuration flash to user space. |
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157 |
* |
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158 |
* Return: the number of bytes written, or 0 if flash end is reached |
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159 |
*/ |
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160 |
|
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161 |
static ssize_t ccat_update_write(struct file *const f, const char __user * buf, |
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162 |
size_t len, loff_t * off) |
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163 |
{ |
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164 |
struct update_buffer *const update = f->private_data; |
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165 |
if (*off + len > sizeof(update->data)) |
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166 |
return 0; |
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167 |
|
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168 |
if (copy_from_user(update->data + *off, buf, len)) { |
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169 |
return -EFAULT; |
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170 |
} |
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171 |
|
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172 |
*off += len; |
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173 |
update->size = *off; |
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174 |
return len; |
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175 |
} |
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176 |
|
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177 |
static struct file_operations update_ops = { |
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178 |
.owner = THIS_MODULE, |
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179 |
.open = ccat_update_open, |
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180 |
.release = ccat_update_release, |
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181 |
.read = ccat_update_read, |
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182 |
.write = ccat_update_write, |
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183 |
}; |
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184 |
|
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185 |
/** |
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186 |
* __ccat_update_cmd() - Helper to issue a FPGA flash command |
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187 |
* @ioaddr: address of the CCAT Update function in PCI config space |
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188 |
* @cmd: the command identifier |
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189 |
* @clocks: the number of clocks associated with the specified command |
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190 |
* |
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191 |
* no write memory barrier is called and the busy flag is not evaluated |
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192 |
*/ |
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193 |
static inline void __ccat_update_cmd(void __iomem * const ioaddr, uint8_t cmd, |
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194 |
uint16_t clocks) |
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195 |
{ |
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196 |
iowrite8((0xff00 & clocks) >> 8, ioaddr); |
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197 |
iowrite8(0x00ff & clocks, ioaddr + 0x8); |
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198 |
iowrite8(cmd, ioaddr + 0x10); |
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199 |
} |
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200 |
|
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201 |
/** |
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202 |
* ccat_update_cmd() - Helper to issue a FPGA flash command |
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203 |
* @ioaddr: address of the CCAT Update function in PCI config space |
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204 |
* @cmd: the command identifier |
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205 |
* @clocks: the number of clocks associated with the specified command |
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* |
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* Triggers a full flash command cycle with write memory barrier and |
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* command activate. This call blocks until the busy flag is reset. |
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*/ |
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static inline void ccat_update_cmd(void __iomem * const ioaddr, uint8_t cmd, |
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211 |
uint16_t clocks) |
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{ |
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__ccat_update_cmd(ioaddr, cmd, clocks); |
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wmb(); |
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iowrite8(0xff, ioaddr + 0x7f8); |
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wait_until_busy_reset(ioaddr); |
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} |
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218 |
|
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219 |
/** |
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* ccat_update_cmd_addr() - Helper to issue a FPGA flash command with address parameter |
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221 |
* @ioaddr: address of the CCAT Update function in PCI config space |
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222 |
* @cmd: the command identifier |
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* @clocks: the number of clocks associated with the specified command |
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224 |
* @addr: 24 bit address associated with the specified command |
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225 |
* |
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226 |
* Triggers a full flash command cycle with write memory barrier and |
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227 |
* command activate. This call blocks until the busy flag is reset. |
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228 |
*/ |
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229 |
static inline void ccat_update_cmd_addr(void __iomem * const ioaddr, |
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230 |
uint8_t cmd, uint16_t clocks, |
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231 |
uint32_t addr) |
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232 |
{ |
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const uint8_t addr_0 = SWAP_BITS(addr & 0xff); |
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const uint8_t addr_1 = SWAP_BITS((addr & 0xff00) >> 8); |
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const uint8_t addr_2 = SWAP_BITS((addr & 0xff0000) >> 16); |
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236 |
__ccat_update_cmd(ioaddr, cmd, clocks); |
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iowrite8(addr_2, ioaddr + 0x18); |
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238 |
iowrite8(addr_1, ioaddr + 0x20); |
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iowrite8(addr_0, ioaddr + 0x28); |
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240 |
wmb(); |
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241 |
iowrite8(0xff, ioaddr + 0x7f8); |
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242 |
wait_until_busy_reset(ioaddr); |
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243 |
} |
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244 |
|
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245 |
/** |
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246 |
* ccat_get_prom_id() - Read CCAT PROM ID |
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247 |
* @ioaddr: address of the CCAT Update function in PCI config space |
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248 |
* |
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249 |
* Return: the CCAT FPGA's PROM identifier |
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250 |
*/ |
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251 |
uint8_t ccat_get_prom_id(void __iomem * const ioaddr) |
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252 |
{ |
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253 |
ccat_update_cmd(ioaddr, CCAT_GET_PROM_ID); |
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254 |
return ioread8(ioaddr + 0x38); |
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255 |
} |
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256 |
|
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257 |
/** |
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258 |
* ccat_get_status() - Read CCAT Update status |
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259 |
* @ioaddr: address of the CCAT Update function in PCI config space |
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260 |
* |
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261 |
* Return: the current status of the CCAT Update function |
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262 |
*/ |
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263 |
static uint8_t ccat_get_status(void __iomem * const ioaddr) |
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264 |
{ |
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265 |
ccat_update_cmd(ioaddr, CCAT_READ_STATUS); |
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266 |
return ioread8(ioaddr + 0x20); |
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267 |
} |
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268 |
|
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269 |
/** |
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270 |
* ccat_wait_status_cleared() - wait until CCAT status is cleared |
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271 |
* @ioaddr: address of the CCAT Update function in PCI config space |
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272 |
* |
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273 |
* Blocks until bit 7 of the CCAT Update status is reset |
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274 |
*/ |
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275 |
|
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276 |
static void ccat_wait_status_cleared(void __iomem * const ioaddr) |
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277 |
{ |
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278 |
uint8_t status; |
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279 |
do { |
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280 |
status = ccat_get_status(ioaddr); |
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281 |
} while (status & (1 << 7)); |
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282 |
} |
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|
283 |
|
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284 |
/** |
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285 |
* ccat_read_flash_block() - Read a block of CCAT configuration data from flash |
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286 |
* @ioaddr: address of the CCAT Update function in PCI config space |
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287 |
* @addr: 24 bit address of the block to read |
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288 |
* @len: number of bytes to read from this block, len <= CCAT_DATA_BLOCK_SIZE |
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289 |
* @buf: output buffer in user space |
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290 |
* |
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291 |
* Copies one block of configuration data from the CCAT FPGA's flash to |
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292 |
* the user space buffer. |
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293 |
* Note that the size of the FPGA's firmware is not known exactly so it |
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294 |
* is very possible that the overall buffer ends with a lot of 0xff. |
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295 |
* |
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296 |
* Return: the number of bytes copied |
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297 |
*/ |
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298 |
static int ccat_read_flash_block(void __iomem * const ioaddr, |
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299 |
const uint32_t addr, const uint16_t len, |
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300 |
char __user * const buf) |
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301 |
{ |
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302 |
uint16_t i; |
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303 |
const uint16_t clocks = 8 * len; |
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304 |
ccat_update_cmd_addr(ioaddr, CCAT_READ_FLASH + clocks, addr); |
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305 |
for (i = 0; i < len; i++) { |
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306 |
put_user(ioread8(ioaddr + CCAT_DATA_IN_4 + 8 * i), buf + i); |
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307 |
} |
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308 |
return len; |
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|
309 |
} |
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|
310 |
|
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|
311 |
/** |
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312 |
* ccat_read_flash() - Read a chunk of CCAT configuration data from flash |
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|
313 |
* @ioaddr: address of the CCAT Update function in PCI config space |
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|
314 |
* @buf: output buffer in user space |
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|
315 |
* @len: number of bytes to read |
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|
316 |
* @off: offset in the configuration data |
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|
317 |
* |
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|
318 |
* Copies multiple blocks of configuration data from the CCAT FPGA's |
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|
319 |
* flash to the user space buffer. |
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|
320 |
* |
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|
321 |
* Return: the number of bytes copied |
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322 |
*/ |
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|
323 |
static int ccat_read_flash(void __iomem * const ioaddr, char __user * buf, |
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|
324 |
uint32_t len, loff_t * off) |
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|
325 |
{ |
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|
326 |
const loff_t start = *off; |
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|
327 |
while (len > CCAT_DATA_BLOCK_SIZE) { |
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|
328 |
*off += |
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|
329 |
ccat_read_flash_block(ioaddr, *off, CCAT_DATA_BLOCK_SIZE, |
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|
330 |
buf); |
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|
331 |
buf += CCAT_DATA_BLOCK_SIZE; |
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|
332 |
len -= CCAT_DATA_BLOCK_SIZE; |
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|
333 |
} |
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|
334 |
*off += ccat_read_flash_block(ioaddr, *off, len, buf); |
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|
335 |
return *off - start; |
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|
336 |
} |
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|
337 |
|
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|
338 |
/** |
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|
339 |
* ccat_write_flash_block() - Write a block of CCAT configuration data to flash |
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|
340 |
* @ioaddr: address of the CCAT Update function in PCI config space |
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|
341 |
* @addr: 24 bit start address in the CCAT FPGA's flash |
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|
342 |
* @len: number of bytes to write in this block, len <= CCAT_WRITE_BLOCK_SIZE |
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|
343 |
* @buf: input buffer |
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|
344 |
* |
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|
345 |
* Copies one block of configuration data to the CCAT FPGA's flash |
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|
346 |
* |
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|
347 |
* Return: the number of bytes copied |
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|
348 |
*/ |
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|
349 |
static int ccat_write_flash_block(void __iomem * const ioaddr, |
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|
350 |
const uint32_t addr, const uint16_t len, |
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|
351 |
const char *const buf) |
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|
352 |
{ |
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|
353 |
const uint16_t clocks = 8 * len; |
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|
354 |
uint16_t i; |
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|
355 |
ccat_update_cmd(ioaddr, CCAT_WRITE_ENABLE); |
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|
356 |
for (i = 0; i < len; i++) { |
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|
357 |
iowrite8(buf[i], ioaddr + CCAT_DATA_OUT_4 + 8 * i); |
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|
358 |
} |
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|
359 |
ccat_update_cmd_addr(ioaddr, CCAT_WRITE_FLASH + clocks, addr); |
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|
360 |
ccat_wait_status_cleared(ioaddr); |
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|
361 |
return len; |
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|
362 |
} |
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|
363 |
|
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|
364 |
/** |
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|
365 |
* ccat_write_flash() - Write a new CCAT configuration to FPGA's flash |
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|
366 |
* @update: a CCAT Update buffer containing the new FPGA configuration |
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|
367 |
*/ |
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|
368 |
static void ccat_write_flash(const struct update_buffer *const update) |
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|
369 |
{ |
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|
370 |
const char *buf = update->data; |
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|
371 |
uint32_t off = 0; |
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|
372 |
size_t len = update->size; |
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|
373 |
while (len > CCAT_WRITE_BLOCK_SIZE) { |
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|
374 |
ccat_write_flash_block(update->update->ioaddr, off, |
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|
375 |
(uint16_t) CCAT_WRITE_BLOCK_SIZE, buf); |
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|
376 |
off += CCAT_WRITE_BLOCK_SIZE; |
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|
377 |
buf += CCAT_WRITE_BLOCK_SIZE; |
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|
378 |
len -= CCAT_WRITE_BLOCK_SIZE; |
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|
379 |
} |
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|
380 |
ccat_write_flash_block(update->update->ioaddr, off, (uint16_t) len, |
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|
381 |
buf); |
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changeset
|
382 |
} |
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changeset
|
383 |
|
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changeset
|
384 |
/** |
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|
385 |
* ccat_update_init() - Initialize the CCAT Update function |
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|
386 |
*/ |
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|
387 |
struct ccat_update *ccat_update_init(const struct ccat_device *const ccatdev, |
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|
388 |
void __iomem * const addr) |
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changeset
|
389 |
{ |
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changeset
|
390 |
struct ccat_update *const update = kzalloc(sizeof(*update), GFP_KERNEL); |
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changeset
|
391 |
if (!update) { |
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changeset
|
392 |
return NULL; |
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changeset
|
393 |
} |
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changeset
|
394 |
kref_init(&update->refcount); |
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changeset
|
395 |
update->ioaddr = ccatdev->bar[0].ioaddr + ioread32(addr + 0x8); |
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changeset
|
396 |
memcpy_fromio(&update->info, addr, sizeof(update->info)); |
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changeset
|
397 |
print_update_info(&update->info, update->ioaddr); |
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changeset
|
398 |
|
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changeset
|
399 |
if (0x00 != update->info.nRevision) { |
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changeset
|
400 |
pr_warn("CCAT Update rev. %d not supported\n", |
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changeset
|
401 |
update->info.nRevision); |
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changeset
|
402 |
goto cleanup; |
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changeset
|
403 |
} |
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changeset
|
404 |
|
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changeset
|
405 |
if (alloc_chrdev_region(&update->dev, 0, 1, DRV_NAME)) { |
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changeset
|
406 |
pr_warn("alloc_chrdev_region() failed\n"); |
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changeset
|
407 |
goto cleanup; |
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changeset
|
408 |
} |
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changeset
|
409 |
|
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changeset
|
410 |
update->class = class_create(THIS_MODULE, "ccat_update"); |
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411 |
if (NULL == update->class) { |
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412 |
pr_warn("Create device class failed\n"); |
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413 |
goto cleanup; |
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|
414 |
} |
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|
415 |
|
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|
416 |
if (NULL == |
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|
417 |
device_create(update->class, NULL, update->dev, NULL, |
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|
418 |
"ccat_update")) { |
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|
419 |
pr_warn("device_create() failed\n"); |
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|
420 |
goto cleanup; |
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|
421 |
} |
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changeset
|
422 |
|
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|
423 |
cdev_init(&update->cdev, &update_ops); |
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|
424 |
update->cdev.owner = THIS_MODULE; |
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|
425 |
update->cdev.ops = &update_ops; |
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|
426 |
if (cdev_add(&update->cdev, update->dev, 1)) { |
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|
427 |
pr_warn("add update device failed\n"); |
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|
428 |
goto cleanup; |
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changeset
|
429 |
} |
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|
430 |
return update; |
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|
431 |
cleanup: |
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|
432 |
kref_put(&update->refcount, ccat_update_destroy); |
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|
433 |
return NULL; |
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|
434 |
} |
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changeset
|
435 |
|
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changeset
|
436 |
/** |
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|
437 |
* ccat_update_destroy() - Cleanup the CCAT Update function |
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|
438 |
* @ref: pointer to a struct kref embedded into a struct ccat_update, which we intend to destroy |
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|
439 |
* |
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|
440 |
* Retrieves the parent struct ccat_update and destroys it. |
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|
441 |
*/ |
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|
442 |
static void ccat_update_destroy(struct kref *ref) |
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|
443 |
{ |
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changeset
|
444 |
struct ccat_update *update = |
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|
445 |
container_of(ref, struct ccat_update, refcount); |
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|
446 |
cdev_del(&update->cdev); |
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|
447 |
device_destroy(update->class, update->dev); |
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|
448 |
class_destroy(update->class); |
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|
449 |
unregister_chrdev_region(update->dev, 1); |
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|
450 |
kfree(update); |
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|
451 |
pr_debug("%s(): done\n", __FUNCTION__); |
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changeset
|
452 |
} |
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changeset
|
453 |
|
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changeset
|
454 |
/** |
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changeset
|
455 |
* ccat_update_remove() - Prepare the CCAT Update function for removal |
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changeset
|
456 |
*/ |
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changeset
|
457 |
void ccat_update_remove(struct ccat_update *update) |
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|
458 |
{ |
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changeset
|
459 |
kref_put(&update->refcount, ccat_update_destroy); |
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changeset
|
460 |
pr_debug("%s(): done\n", __FUNCTION__); |
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changeset
|
461 |
} |