author | Florian Pose <fp@igh-essen.com> |
Thu, 20 Sep 2007 10:05:37 +0000 | |
changeset 745 | 3f4e5a50733e |
parent 741 | aece53f82df3 |
child 754 | 0b47b49c5976 |
permissions | -rw-r--r-- |
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/****************************************************************************** |
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* |
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* $Id$ |
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* |
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* Copyright (C) 2006 Florian Pose, Ingenieurgemeinschaft IgH |
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* |
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* This file is part of the IgH EtherCAT Master. |
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* |
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* The IgH EtherCAT Master is free software; you can redistribute it |
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* and/or modify it under the terms of the GNU General Public License |
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* as published by the Free Software Foundation; either version 2 of the |
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* License, or (at your option) any later version. |
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* |
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* The IgH EtherCAT Master is distributed in the hope that it will be |
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* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with the IgH EtherCAT Master; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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* |
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* The right to use EtherCAT Technology is granted and comes free of |
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* charge under condition of compatibility of product made by |
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* Licensee. People intending to distribute/sell products based on the |
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* code, have to sign an agreement to guarantee that products using |
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* software based on IgH EtherCAT master stay compatible with the actual |
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* EtherCAT specification (which are released themselves as an open |
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* standard) as the (only) precondition to have the right to use EtherCAT |
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* Technology, IP and trade marks. |
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* |
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*****************************************************************************/ |
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/** |
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\file |
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EtherCAT finite state machines. |
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*/ |
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/*****************************************************************************/ |
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#ifndef __EC_FSM_MASTER__ |
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#define __EC_FSM_MASTER__ |
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VERSION 1.1: New realtime interface, only state machines.
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#include "globals.h" |
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#include "../include/ecrt.h" |
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#include "datagram.h" |
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#include "slave.h" |
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#include "canopen.h" |
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#include "fsm_slave.h" |
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#include "fsm_coe_map.h" |
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/*****************************************************************************/ |
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/** |
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* EEPROM write request. |
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*/ |
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typedef struct |
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{ |
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struct list_head list; |
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ec_slave_t *slave; |
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off_t offset; |
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size_t size; |
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const uint16_t *words; |
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ec_request_state_t state; |
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} |
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ec_eeprom_write_request_t; |
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/*****************************************************************************/ |
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typedef struct ec_fsm_master ec_fsm_master_t; /**< \see ec_fsm_master */ |
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/** |
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Finite state machine of an EtherCAT master. |
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*/ |
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struct ec_fsm_master |
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{ |
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ec_master_t *master; /**< master the FSM runs on */ |
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ec_datagram_t *datagram; /**< datagram used in the state machine */ |
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unsigned int retries; /**< retries on datagram timeout. */ |
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void (*state)(ec_fsm_master_t *); /**< master state function */ |
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int idle; /**< state machine is in idle phase */ |
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unsigned long scan_jiffies; /**< beginning of slave scanning */ |
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unsigned int slaves_responding; /**< number of responding slaves */ |
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unsigned int topology_change_pending; /**< bus topology changed */ |
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ec_slave_state_t slave_states; /**< states of responding slaves */ |
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unsigned int validate; /**< non-zero, if validation to do */ |
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unsigned int tainted; /**< non-zero, if the current bus topology does |
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not meet the initial conditions */ |
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unsigned int config_error; /**< error during slave configuration */ |
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ec_slave_t *slave; /**< current slave */ |
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ec_eeprom_write_request_t *eeprom_request; /**< EEPROM write request */ |
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off_t eeprom_index; /**< index to EEPROM write request data */ |
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ec_sdo_request_t *sdo_request; /**< SDO request to process */ |
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ec_fsm_slave_t fsm_slave; /**< slave state machine */ |
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ec_fsm_sii_t fsm_sii; /**< SII state machine */ |
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ec_fsm_change_t fsm_change; /**< State change state machine */ |
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ec_fsm_coe_t fsm_coe; /**< CoE state machine */ |
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ec_fsm_coe_map_t fsm_coe_map; /**< CoE mapping state machine */ |
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}; |
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/*****************************************************************************/ |
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void ec_fsm_master_init(ec_fsm_master_t *, ec_master_t *, ec_datagram_t *); |
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void ec_fsm_master_clear(ec_fsm_master_t *); |
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int ec_fsm_master_exec(ec_fsm_master_t *); |
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int ec_fsm_master_running(const ec_fsm_master_t *); |
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113 |
int ec_fsm_master_idle(const ec_fsm_master_t *); |
456
dea14706efc2
Explicit use of slave configuration FSM in ecrt_master_activate() and ecrt_master_release().
Florian Pose <fp@igh-essen.com>
parents:
446
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114 |
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238
b4960499098f
Added finite state machine (FSM) processing.
Florian Pose <fp@igh-essen.com>
parents:
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115 |
/*****************************************************************************/ |
b4960499098f
Added finite state machine (FSM) processing.
Florian Pose <fp@igh-essen.com>
parents:
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116 |
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b4960499098f
Added finite state machine (FSM) processing.
Florian Pose <fp@igh-essen.com>
parents:
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117 |
#endif |