| author | Florian Pose <fp@igh-essen.com> |
| Mon, 09 Jan 2012 17:42:12 +0100 | |
| branch | stable-1.5 |
| changeset 2234 | 18f9c69d9590 |
| parent 1363 | 11c0b2caa253 |
| child 2582 | 87e502828b3f |
| permissions | -rw-r--r-- |
| 1321 | 1 |
/****************************************************************************** |
2 |
* |
|
3 |
* $Id$ |
|
4 |
* |
|
|
1326
ef907b0b5125
merge -c1603 branches/stable-1.4: Changed licence headers to avoid conflicts with the GPL; restricted licence to GPLv2 only.
Florian Pose <fp@igh-essen.com>
parents:
1321
diff
changeset
|
5 |
* Copyright (C) 2006-2008 Florian Pose, Ingenieurgemeinschaft IgH |
| 1321 | 6 |
* |
7 |
* This file is part of the IgH EtherCAT Master. |
|
8 |
* |
|
|
1326
ef907b0b5125
merge -c1603 branches/stable-1.4: Changed licence headers to avoid conflicts with the GPL; restricted licence to GPLv2 only.
Florian Pose <fp@igh-essen.com>
parents:
1321
diff
changeset
|
9 |
* The IgH EtherCAT Master is free software; you can redistribute it and/or |
|
ef907b0b5125
merge -c1603 branches/stable-1.4: Changed licence headers to avoid conflicts with the GPL; restricted licence to GPLv2 only.
Florian Pose <fp@igh-essen.com>
parents:
1321
diff
changeset
|
10 |
* modify it under the terms of the GNU General Public License version 2, as |
|
ef907b0b5125
merge -c1603 branches/stable-1.4: Changed licence headers to avoid conflicts with the GPL; restricted licence to GPLv2 only.
Florian Pose <fp@igh-essen.com>
parents:
1321
diff
changeset
|
11 |
* published by the Free Software Foundation. |
| 1321 | 12 |
* |
|
1326
ef907b0b5125
merge -c1603 branches/stable-1.4: Changed licence headers to avoid conflicts with the GPL; restricted licence to GPLv2 only.
Florian Pose <fp@igh-essen.com>
parents:
1321
diff
changeset
|
13 |
* The IgH EtherCAT Master is distributed in the hope that it will be useful, |
|
ef907b0b5125
merge -c1603 branches/stable-1.4: Changed licence headers to avoid conflicts with the GPL; restricted licence to GPLv2 only.
Florian Pose <fp@igh-essen.com>
parents:
1321
diff
changeset
|
14 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
ef907b0b5125
merge -c1603 branches/stable-1.4: Changed licence headers to avoid conflicts with the GPL; restricted licence to GPLv2 only.
Florian Pose <fp@igh-essen.com>
parents:
1321
diff
changeset
|
15 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General |
|
ef907b0b5125
merge -c1603 branches/stable-1.4: Changed licence headers to avoid conflicts with the GPL; restricted licence to GPLv2 only.
Florian Pose <fp@igh-essen.com>
parents:
1321
diff
changeset
|
16 |
* Public License for more details. |
| 1321 | 17 |
* |
|
1326
ef907b0b5125
merge -c1603 branches/stable-1.4: Changed licence headers to avoid conflicts with the GPL; restricted licence to GPLv2 only.
Florian Pose <fp@igh-essen.com>
parents:
1321
diff
changeset
|
18 |
* You should have received a copy of the GNU General Public License along |
|
ef907b0b5125
merge -c1603 branches/stable-1.4: Changed licence headers to avoid conflicts with the GPL; restricted licence to GPLv2 only.
Florian Pose <fp@igh-essen.com>
parents:
1321
diff
changeset
|
19 |
* with the IgH EtherCAT Master; if not, write to the Free Software |
| 1321 | 20 |
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
21 |
* |
|
|
1363
11c0b2caa253
Improved and added license headers.
Florian Pose <fp@igh-essen.com>
parents:
1326
diff
changeset
|
22 |
* --- |
|
11c0b2caa253
Improved and added license headers.
Florian Pose <fp@igh-essen.com>
parents:
1326
diff
changeset
|
23 |
* |
|
11c0b2caa253
Improved and added license headers.
Florian Pose <fp@igh-essen.com>
parents:
1326
diff
changeset
|
24 |
* The license mentioned above concerns the source code only. Using the |
|
11c0b2caa253
Improved and added license headers.
Florian Pose <fp@igh-essen.com>
parents:
1326
diff
changeset
|
25 |
* EtherCAT technology and brand is only permitted in compliance with the |
|
11c0b2caa253
Improved and added license headers.
Florian Pose <fp@igh-essen.com>
parents:
1326
diff
changeset
|
26 |
* industrial property and similar rights of Beckhoff Automation GmbH. |
| 1321 | 27 |
* |
28 |
*****************************************************************************/ |
|
29 |
||
30 |
/** |
|
31 |
\file |
|
32 |
EtherCAT driver for RTL8139-compatible NICs. |
|
33 |
*/ |
|
34 |
||
35 |
/*****************************************************************************/ |
|
36 |
||
37 |
/* |
|
38 |
Former documentation: |
|
39 |
||
40 |
8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux. |
|
41 |
||
42 |
Maintained by Jeff Garzik <jgarzik@pobox.com> |
|
43 |
Copyright 2000-2002 Jeff Garzik |
|
44 |
||
45 |
Much code comes from Donald Becker's rtl8139.c driver, |
|
46 |
versions 1.13 and older. This driver was originally based |
|
47 |
on rtl8139.c version 1.07. Header of rtl8139.c version 1.13: |
|
48 |
||
49 |
-----<snip>----- |
|
50 |
||
51 |
Written 1997-2001 by Donald Becker. |
|
52 |
This software may be used and distributed according to the |
|
53 |
terms of the GNU General Public License (GPL), incorporated |
|
54 |
herein by reference. Drivers based on or derived from this |
|
55 |
code fall under the GPL and must retain the authorship, |
|
56 |
copyright and license notice. This file is not a complete |
|
57 |
program and may only be used when the entire operating |
|
58 |
system is licensed under the GPL. |
|
59 |
||
60 |
This driver is for boards based on the RTL8129 and RTL8139 |
|
61 |
PCI ethernet chips. |
|
62 |
||
63 |
The author may be reached as becker@scyld.com, or C/O Scyld |
|
64 |
Computing Corporation 410 Severn Ave., Suite 210 Annapolis |
|
65 |
MD 21403 |
|
66 |
||
67 |
Support and updates available at |
|
68 |
http://www.scyld.com/network/rtl8139.html |
|
69 |
||
70 |
Twister-tuning table provided by Kinston |
|
71 |
<shangh@realtek.com.tw>. |
|
72 |
||
73 |
-----<snip>----- |
|
74 |
||
75 |
This software may be used and distributed according to the terms |
|
76 |
of the GNU General Public License, incorporated herein by reference. |
|
77 |
||
78 |
Contributors: |
|
79 |
||
80 |
Donald Becker - he wrote the original driver, kudos to him! |
|
81 |
(but please don't e-mail him for support, this isn't his driver) |
|
82 |
||
83 |
Tigran Aivazian - bug fixes, skbuff free cleanup |
|
84 |
||
85 |
Martin Mares - suggestions for PCI cleanup |
|
86 |
||
87 |
David S. Miller - PCI DMA and softnet updates |
|
88 |
||
89 |
Ernst Gill - fixes ported from BSD driver |
|
90 |
||
91 |
Daniel Kobras - identified specific locations of |
|
92 |
posted MMIO write bugginess |
|
93 |
||
94 |
Gerard Sharp - bug fix, testing and feedback |
|
95 |
||
96 |
David Ford - Rx ring wrap fix |
|
97 |
||
98 |
Dan DeMaggio - swapped RTL8139 cards with me, and allowed me |
|
99 |
to find and fix a crucial bug on older chipsets. |
|
100 |
||
101 |
Donald Becker/Chris Butterworth/Marcus Westergren - |
|
102 |
Noticed various Rx packet size-related buglets. |
|
103 |
||
104 |
Santiago Garcia Mantinan - testing and feedback |
|
105 |
||
106 |
Jens David - 2.2.x kernel backports |
|
107 |
||
108 |
Martin Dennett - incredibly helpful insight on undocumented |
|
109 |
features of the 8139 chips |
|
110 |
||
111 |
Jean-Jacques Michel - bug fix |
|
112 |
||
113 |
Tobias Ringström - Rx interrupt status checking suggestion |
|
114 |
||
115 |
Andrew Morton - Clear blocked signals, avoid |
|
116 |
buffer overrun setting current->comm. |
|
117 |
||
118 |
Kalle Olavi Niemitalo - Wake-on-LAN ioctls |
|
119 |
||
120 |
Robert Kuebel - Save kernel thread from dying on any signal. |
|
121 |
||
122 |
Submitting bug reports: |
|
123 |
||
124 |
"rtl8139-diag -mmmaaavvveefN" output |
|
125 |
enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log |
|
126 |
||
127 |
*/ |
|
128 |
||
129 |
#define DRV_NAME "ec_8139too" |
|
130 |
#define DRV_VERSION "0.9.28" |
|
131 |
||
132 |
||
133 |
#include <linux/module.h> |
|
134 |
#include <linux/kernel.h> |
|
135 |
#include <linux/compiler.h> |
|
136 |
#include <linux/pci.h> |
|
137 |
#include <linux/init.h> |
|
138 |
#include <linux/ioport.h> |
|
139 |
#include <linux/netdevice.h> |
|
140 |
#include <linux/etherdevice.h> |
|
141 |
#include <linux/rtnetlink.h> |
|
142 |
#include <linux/delay.h> |
|
143 |
#include <linux/ethtool.h> |
|
144 |
#include <linux/mii.h> |
|
145 |
#include <linux/completion.h> |
|
146 |
#include <linux/crc32.h> |
|
147 |
#include <asm/io.h> |
|
148 |
#include <asm/uaccess.h> |
|
149 |
#include <asm/irq.h> |
|
150 |
||
151 |
#include "../globals.h" |
|
152 |
#include "ecdev.h" |
|
153 |
||
154 |
#define RTL8139_DRIVER_NAME DRV_NAME \ |
|
155 |
" EtherCAT-capable Fast Ethernet driver " \ |
|
156 |
DRV_VERSION ", master " EC_MASTER_VERSION |
|
157 |
||
158 |
#define PFX DRV_NAME ": " |
|
159 |
||
160 |
/* Default Message level */ |
|
161 |
#define RTL8139_DEF_MSG_ENABLE (NETIF_MSG_DRV | \ |
|
162 |
NETIF_MSG_PROBE | \ |
|
163 |
NETIF_MSG_LINK) |
|
164 |
||
165 |
||
166 |
/* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */ |
|
167 |
#ifdef CONFIG_8139TOO_PIO |
|
168 |
#define USE_IO_OPS 1 |
|
169 |
#endif |
|
170 |
||
171 |
/* define to 1, 2 or 3 to enable copious debugging info */ |
|
172 |
#define RTL8139_DEBUG 0 |
|
173 |
||
174 |
/* define to 1 to disable lightweight runtime debugging checks */ |
|
175 |
#undef RTL8139_NDEBUG |
|
176 |
||
177 |
||
178 |
#if RTL8139_DEBUG |
|
179 |
/* note: prints function name for you */ |
|
180 |
# define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) |
|
181 |
#else |
|
182 |
# define DPRINTK(fmt, args...) |
|
183 |
#endif |
|
184 |
||
185 |
#ifdef RTL8139_NDEBUG |
|
186 |
# define assert(expr) do {} while (0)
|
|
187 |
#else |
|
188 |
# define assert(expr) \ |
|
189 |
if(unlikely(!(expr))) { \
|
|
190 |
printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \ |
|
191 |
#expr,__FILE__,__FUNCTION__,__LINE__); \ |
|
192 |
} |
|
193 |
#endif |
|
194 |
||
195 |
||
196 |
/* A few user-configurable values. */ |
|
197 |
/* media options */ |
|
198 |
#define MAX_UNITS 8 |
|
199 |
static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
|
|
200 |
static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
|
|
201 |
||
202 |
/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). |
|
203 |
The RTL chips use a 64 element hash table based on the Ethernet CRC. */ |
|
204 |
static int multicast_filter_limit = 32; |
|
205 |
||
206 |
/* bitmapped message enable number */ |
|
207 |
static int debug = -1; |
|
208 |
||
209 |
/* |
|
210 |
* Receive ring size |
|
211 |
* Warning: 64K ring has hardware issues and may lock up. |
|
212 |
*/ |
|
213 |
#if defined(CONFIG_SH_DREAMCAST) |
|
214 |
#define RX_BUF_IDX 0 /* 8K ring */ |
|
215 |
#else |
|
216 |
#define RX_BUF_IDX 2 /* 32K ring */ |
|
217 |
#endif |
|
218 |
#define RX_BUF_LEN (8192 << RX_BUF_IDX) |
|
219 |
#define RX_BUF_PAD 16 |
|
220 |
#define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ |
|
221 |
||
222 |
#if RX_BUF_LEN == 65536 |
|
223 |
#define RX_BUF_TOT_LEN RX_BUF_LEN |
|
224 |
#else |
|
225 |
#define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD) |
|
226 |
#endif |
|
227 |
||
228 |
/* Number of Tx descriptor registers. */ |
|
229 |
#define NUM_TX_DESC 4 |
|
230 |
||
231 |
/* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/ |
|
232 |
#define MAX_ETH_FRAME_SIZE 1536 |
|
233 |
||
234 |
/* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */ |
|
235 |
#define TX_BUF_SIZE MAX_ETH_FRAME_SIZE |
|
236 |
#define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC) |
|
237 |
||
238 |
/* PCI Tuning Parameters |
|
239 |
Threshold is bytes transferred to chip before transmission starts. */ |
|
240 |
#define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ |
|
241 |
||
242 |
/* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */ |
|
243 |
#define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */ |
|
244 |
#define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */ |
|
245 |
#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ |
|
246 |
#define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */ |
|
247 |
||
248 |
/* Operational parameters that usually are not changed. */ |
|
249 |
/* Time in jiffies before concluding the transmitter is hung. */ |
|
250 |
#define TX_TIMEOUT (6*HZ) |
|
251 |
||
252 |
||
253 |
enum {
|
|
254 |
HAS_MII_XCVR = 0x010000, |
|
255 |
HAS_CHIP_XCVR = 0x020000, |
|
256 |
HAS_LNK_CHNG = 0x040000, |
|
257 |
}; |
|
258 |
||
259 |
#define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */ |
|
260 |
#define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */ |
|
261 |
#define RTL_MIN_IO_SIZE 0x80 |
|
262 |
#define RTL8139B_IO_SIZE 256 |
|
263 |
||
264 |
#define RTL8129_CAPS HAS_MII_XCVR |
|
265 |
#define RTL8139_CAPS HAS_CHIP_XCVR|HAS_LNK_CHNG |
|
266 |
||
267 |
typedef enum {
|
|
268 |
RTL8139 = 0, |
|
269 |
RTL8129, |
|
270 |
} board_t; |
|
271 |
||
272 |
||
273 |
/* indexed by board_t, above */ |
|
274 |
static const struct {
|
|
275 |
const char *name; |
|
276 |
u32 hw_flags; |
|
277 |
} board_info[] __devinitdata = {
|
|
278 |
{ "RealTek RTL8139", RTL8139_CAPS },
|
|
279 |
{ "RealTek RTL8129", RTL8129_CAPS },
|
|
280 |
}; |
|
281 |
||
282 |
||
283 |
static struct pci_device_id rtl8139_pci_tbl[] = {
|
|
284 |
{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
285 |
{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
286 |
{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
287 |
{0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
288 |
{0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
289 |
{0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
290 |
{0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
291 |
{0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
292 |
{0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
293 |
{0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
294 |
{0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
295 |
{0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
296 |
{0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
297 |
{0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
298 |
{0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
299 |
{0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
300 |
{0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
301 |
{0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
302 |
{0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
303 |
||
304 |
#ifdef CONFIG_SH_SECUREEDGE5410 |
|
305 |
/* Bogus 8139 silicon reports 8129 without external PROM :-( */ |
|
306 |
{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
|
|
307 |
#endif |
|
308 |
#ifdef CONFIG_8139TOO_8129 |
|
309 |
{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
|
|
310 |
#endif |
|
311 |
||
312 |
/* some crazy cards report invalid vendor ids like |
|
313 |
* 0x0001 here. The other ids are valid and constant, |
|
314 |
* so we simply don't match on the main vendor id. |
|
315 |
*/ |
|
316 |
{PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
|
|
317 |
{PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
|
|
318 |
{PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
|
|
319 |
||
320 |
{0,}
|
|
321 |
}; |
|
322 |
||
323 |
/* prevent driver from being loaded automatically */ |
|
324 |
//MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl); |
|
325 |
||
326 |
static struct {
|
|
327 |
const char str[ETH_GSTRING_LEN]; |
|
328 |
} ethtool_stats_keys[] = {
|
|
329 |
{ "early_rx" },
|
|
330 |
{ "tx_buf_mapped" },
|
|
331 |
{ "tx_timeouts" },
|
|
332 |
{ "rx_lost_in_ring" },
|
|
333 |
}; |
|
334 |
||
335 |
/* The rest of these values should never change. */ |
|
336 |
||
337 |
/* Symbolic offsets to registers. */ |
|
338 |
enum RTL8139_registers {
|
|
339 |
MAC0 = 0, /* Ethernet hardware address. */ |
|
340 |
MAR0 = 8, /* Multicast filter. */ |
|
341 |
TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */ |
|
342 |
TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */ |
|
343 |
RxBuf = 0x30, |
|
344 |
ChipCmd = 0x37, |
|
345 |
RxBufPtr = 0x38, |
|
346 |
RxBufAddr = 0x3A, |
|
347 |
IntrMask = 0x3C, |
|
348 |
IntrStatus = 0x3E, |
|
349 |
TxConfig = 0x40, |
|
350 |
RxConfig = 0x44, |
|
351 |
Timer = 0x48, /* A general-purpose counter. */ |
|
352 |
RxMissed = 0x4C, /* 24 bits valid, write clears. */ |
|
353 |
Cfg9346 = 0x50, |
|
354 |
Config0 = 0x51, |
|
355 |
Config1 = 0x52, |
|
356 |
FlashReg = 0x54, |
|
357 |
MediaStatus = 0x58, |
|
358 |
Config3 = 0x59, |
|
359 |
Config4 = 0x5A, /* absent on RTL-8139A */ |
|
360 |
HltClk = 0x5B, |
|
361 |
MultiIntr = 0x5C, |
|
362 |
TxSummary = 0x60, |
|
363 |
BasicModeCtrl = 0x62, |
|
364 |
BasicModeStatus = 0x64, |
|
365 |
NWayAdvert = 0x66, |
|
366 |
NWayLPAR = 0x68, |
|
367 |
NWayExpansion = 0x6A, |
|
368 |
/* Undocumented registers, but required for proper operation. */ |
|
369 |
FIFOTMS = 0x70, /* FIFO Control and test. */ |
|
370 |
CSCR = 0x74, /* Chip Status and Configuration Register. */ |
|
371 |
PARA78 = 0x78, |
|
372 |
PARA7c = 0x7c, /* Magic transceiver parameter register. */ |
|
373 |
Config5 = 0xD8, /* absent on RTL-8139A */ |
|
374 |
}; |
|
375 |
||
376 |
enum ClearBitMasks {
|
|
377 |
MultiIntrClear = 0xF000, |
|
378 |
ChipCmdClear = 0xE2, |
|
379 |
Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1), |
|
380 |
}; |
|
381 |
||
382 |
enum ChipCmdBits {
|
|
383 |
CmdReset = 0x10, |
|
384 |
CmdRxEnb = 0x08, |
|
385 |
CmdTxEnb = 0x04, |
|
386 |
RxBufEmpty = 0x01, |
|
387 |
}; |
|
388 |
||
389 |
/* Interrupt register bits, using my own meaningful names. */ |
|
390 |
enum IntrStatusBits {
|
|
391 |
PCIErr = 0x8000, |
|
392 |
PCSTimeout = 0x4000, |
|
393 |
RxFIFOOver = 0x40, |
|
394 |
RxUnderrun = 0x20, |
|
395 |
RxOverflow = 0x10, |
|
396 |
TxErr = 0x08, |
|
397 |
TxOK = 0x04, |
|
398 |
RxErr = 0x02, |
|
399 |
RxOK = 0x01, |
|
400 |
||
401 |
RxAckBits = RxFIFOOver | RxOverflow | RxOK, |
|
402 |
}; |
|
403 |
||
404 |
enum TxStatusBits {
|
|
405 |
TxHostOwns = 0x2000, |
|
406 |
TxUnderrun = 0x4000, |
|
407 |
TxStatOK = 0x8000, |
|
408 |
TxOutOfWindow = 0x20000000, |
|
409 |
TxAborted = 0x40000000, |
|
410 |
TxCarrierLost = 0x80000000, |
|
411 |
}; |
|
412 |
enum RxStatusBits {
|
|
413 |
RxMulticast = 0x8000, |
|
414 |
RxPhysical = 0x4000, |
|
415 |
RxBroadcast = 0x2000, |
|
416 |
RxBadSymbol = 0x0020, |
|
417 |
RxRunt = 0x0010, |
|
418 |
RxTooLong = 0x0008, |
|
419 |
RxCRCErr = 0x0004, |
|
420 |
RxBadAlign = 0x0002, |
|
421 |
RxStatusOK = 0x0001, |
|
422 |
}; |
|
423 |
||
424 |
/* Bits in RxConfig. */ |
|
425 |
enum rx_mode_bits {
|
|
426 |
AcceptErr = 0x20, |
|
427 |
AcceptRunt = 0x10, |
|
428 |
AcceptBroadcast = 0x08, |
|
429 |
AcceptMulticast = 0x04, |
|
430 |
AcceptMyPhys = 0x02, |
|
431 |
AcceptAllPhys = 0x01, |
|
432 |
}; |
|
433 |
||
434 |
/* Bits in TxConfig. */ |
|
435 |
enum tx_config_bits {
|
|
436 |
/* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */ |
|
437 |
TxIFGShift = 24, |
|
438 |
TxIFG84 = (0 << TxIFGShift), /* 8.4us / 840ns (10 / 100Mbps) */ |
|
439 |
TxIFG88 = (1 << TxIFGShift), /* 8.8us / 880ns (10 / 100Mbps) */ |
|
440 |
TxIFG92 = (2 << TxIFGShift), /* 9.2us / 920ns (10 / 100Mbps) */ |
|
441 |
TxIFG96 = (3 << TxIFGShift), /* 9.6us / 960ns (10 / 100Mbps) */ |
|
442 |
||
443 |
TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */ |
|
444 |
TxCRC = (1 << 16), /* DISABLE Tx pkt CRC append */ |
|
445 |
TxClearAbt = (1 << 0), /* Clear abort (WO) */ |
|
446 |
TxDMAShift = 8, /* DMA burst value (0-7) is shifted X many bits */ |
|
447 |
TxRetryShift = 4, /* TXRR value (0-15) is shifted X many bits */ |
|
448 |
||
449 |
TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */ |
|
450 |
}; |
|
451 |
||
452 |
/* Bits in Config1 */ |
|
453 |
enum Config1Bits {
|
|
454 |
Cfg1_PM_Enable = 0x01, |
|
455 |
Cfg1_VPD_Enable = 0x02, |
|
456 |
Cfg1_PIO = 0x04, |
|
457 |
Cfg1_MMIO = 0x08, |
|
458 |
LWAKE = 0x10, /* not on 8139, 8139A */ |
|
459 |
Cfg1_Driver_Load = 0x20, |
|
460 |
Cfg1_LED0 = 0x40, |
|
461 |
Cfg1_LED1 = 0x80, |
|
462 |
SLEEP = (1 << 1), /* only on 8139, 8139A */ |
|
463 |
PWRDN = (1 << 0), /* only on 8139, 8139A */ |
|
464 |
}; |
|
465 |
||
466 |
/* Bits in Config3 */ |
|
467 |
enum Config3Bits {
|
|
468 |
Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */ |
|
469 |
Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */ |
|
470 |
Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */ |
|
471 |
Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */ |
|
472 |
Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */ |
|
473 |
Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */ |
|
474 |
Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */ |
|
475 |
Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */ |
|
476 |
}; |
|
477 |
||
478 |
/* Bits in Config4 */ |
|
479 |
enum Config4Bits {
|
|
480 |
LWPTN = (1 << 2), /* not on 8139, 8139A */ |
|
481 |
}; |
|
482 |
||
483 |
/* Bits in Config5 */ |
|
484 |
enum Config5Bits {
|
|
485 |
Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */ |
|
486 |
Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */ |
|
487 |
Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */ |
|
488 |
Cfg5_FIFOAddrPtr= (1 << 3), /* Realtek internal SRAM testing */ |
|
489 |
Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */ |
|
490 |
Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */ |
|
491 |
Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */ |
|
492 |
}; |
|
493 |
||
494 |
enum RxConfigBits {
|
|
495 |
/* rx fifo threshold */ |
|
496 |
RxCfgFIFOShift = 13, |
|
497 |
RxCfgFIFONone = (7 << RxCfgFIFOShift), |
|
498 |
||
499 |
/* Max DMA burst */ |
|
500 |
RxCfgDMAShift = 8, |
|
501 |
RxCfgDMAUnlimited = (7 << RxCfgDMAShift), |
|
502 |
||
503 |
/* rx ring buffer length */ |
|
504 |
RxCfgRcv8K = 0, |
|
505 |
RxCfgRcv16K = (1 << 11), |
|
506 |
RxCfgRcv32K = (1 << 12), |
|
507 |
RxCfgRcv64K = (1 << 11) | (1 << 12), |
|
508 |
||
509 |
/* Disable packet wrap at end of Rx buffer. (not possible with 64k) */ |
|
510 |
RxNoWrap = (1 << 7), |
|
511 |
}; |
|
512 |
||
513 |
/* Twister tuning parameters from RealTek. |
|
514 |
Completely undocumented, but required to tune bad links on some boards. */ |
|
515 |
enum CSCRBits {
|
|
516 |
CSCR_LinkOKBit = 0x0400, |
|
517 |
CSCR_LinkChangeBit = 0x0800, |
|
518 |
CSCR_LinkStatusBits = 0x0f000, |
|
519 |
CSCR_LinkDownOffCmd = 0x003c0, |
|
520 |
CSCR_LinkDownCmd = 0x0f3c0, |
|
521 |
}; |
|
522 |
||
523 |
enum Cfg9346Bits {
|
|
524 |
Cfg9346_Lock = 0x00, |
|
525 |
Cfg9346_Unlock = 0xC0, |
|
526 |
}; |
|
527 |
||
528 |
typedef enum {
|
|
529 |
CH_8139 = 0, |
|
530 |
CH_8139_K, |
|
531 |
CH_8139A, |
|
532 |
CH_8139A_G, |
|
533 |
CH_8139B, |
|
534 |
CH_8130, |
|
535 |
CH_8139C, |
|
536 |
CH_8100, |
|
537 |
CH_8100B_8139D, |
|
538 |
CH_8101, |
|
539 |
} chip_t; |
|
540 |
||
541 |
enum chip_flags {
|
|
542 |
HasHltClk = (1 << 0), |
|
543 |
HasLWake = (1 << 1), |
|
544 |
}; |
|
545 |
||
546 |
#define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \ |
|
547 |
(b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22) |
|
548 |
#define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1) |
|
549 |
||
550 |
/* directly indexed by chip_t, above */ |
|
551 |
static const struct {
|
|
552 |
const char *name; |
|
553 |
u32 version; /* from RTL8139C/RTL8139D docs */ |
|
554 |
u32 flags; |
|
555 |
} rtl_chip_info[] = {
|
|
556 |
{ "RTL-8139",
|
|
557 |
HW_REVID(1, 0, 0, 0, 0, 0, 0), |
|
558 |
HasHltClk, |
|
559 |
}, |
|
560 |
||
561 |
{ "RTL-8139 rev K",
|
|
562 |
HW_REVID(1, 1, 0, 0, 0, 0, 0), |
|
563 |
HasHltClk, |
|
564 |
}, |
|
565 |
||
566 |
{ "RTL-8139A",
|
|
567 |
HW_REVID(1, 1, 1, 0, 0, 0, 0), |
|
568 |
HasHltClk, /* XXX undocumented? */ |
|
569 |
}, |
|
570 |
||
571 |
{ "RTL-8139A rev G",
|
|
572 |
HW_REVID(1, 1, 1, 0, 0, 1, 0), |
|
573 |
HasHltClk, /* XXX undocumented? */ |
|
574 |
}, |
|
575 |
||
576 |
{ "RTL-8139B",
|
|
577 |
HW_REVID(1, 1, 1, 1, 0, 0, 0), |
|
578 |
HasLWake, |
|
579 |
}, |
|
580 |
||
581 |
{ "RTL-8130",
|
|
582 |
HW_REVID(1, 1, 1, 1, 1, 0, 0), |
|
583 |
HasLWake, |
|
584 |
}, |
|
585 |
||
586 |
{ "RTL-8139C",
|
|
587 |
HW_REVID(1, 1, 1, 0, 1, 0, 0), |
|
588 |
HasLWake, |
|
589 |
}, |
|
590 |
||
591 |
{ "RTL-8100",
|
|
592 |
HW_REVID(1, 1, 1, 1, 0, 1, 0), |
|
593 |
HasLWake, |
|
594 |
}, |
|
595 |
||
596 |
{ "RTL-8100B/8139D",
|
|
597 |
HW_REVID(1, 1, 1, 0, 1, 0, 1), |
|
598 |
HasHltClk /* XXX undocumented? */ |
|
599 |
| HasLWake, |
|
600 |
}, |
|
601 |
||
602 |
{ "RTL-8101",
|
|
603 |
HW_REVID(1, 1, 1, 0, 1, 1, 1), |
|
604 |
HasLWake, |
|
605 |
}, |
|
606 |
}; |
|
607 |
||
608 |
struct rtl_extra_stats {
|
|
609 |
unsigned long early_rx; |
|
610 |
unsigned long tx_buf_mapped; |
|
611 |
unsigned long tx_timeouts; |
|
612 |
unsigned long rx_lost_in_ring; |
|
613 |
}; |
|
614 |
||
615 |
struct rtl8139_private {
|
|
616 |
void __iomem *mmio_addr; |
|
617 |
int drv_flags; |
|
618 |
struct pci_dev *pci_dev; |
|
619 |
u32 msg_enable; |
|
620 |
struct napi_struct napi; |
|
621 |
struct net_device *dev; |
|
622 |
struct net_device_stats stats; |
|
623 |
||
624 |
unsigned char *rx_ring; |
|
625 |
unsigned int cur_rx; /* RX buf index of next pkt */ |
|
626 |
dma_addr_t rx_ring_dma; |
|
627 |
||
628 |
unsigned int tx_flag; |
|
629 |
unsigned long cur_tx; |
|
630 |
unsigned long dirty_tx; |
|
631 |
unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */ |
|
632 |
unsigned char *tx_bufs; /* Tx bounce buffer region. */ |
|
633 |
dma_addr_t tx_bufs_dma; |
|
634 |
||
635 |
signed char phys[4]; /* MII device addresses. */ |
|
636 |
||
637 |
/* Twister tune state. */ |
|
638 |
char twistie, twist_row, twist_col; |
|
639 |
||
640 |
unsigned int watchdog_fired : 1; |
|
641 |
unsigned int default_port : 4; /* Last dev->if_port value. */ |
|
642 |
unsigned int have_thread : 1; |
|
643 |
||
644 |
spinlock_t lock; |
|
645 |
spinlock_t rx_lock; |
|
646 |
||
647 |
chip_t chipset; |
|
648 |
u32 rx_config; |
|
649 |
struct rtl_extra_stats xstats; |
|
650 |
||
651 |
struct delayed_work thread; |
|
652 |
||
653 |
struct mii_if_info mii; |
|
654 |
unsigned int regs_len; |
|
655 |
unsigned long fifo_copy_timeout; |
|
656 |
||
657 |
ec_device_t *ecdev; |
|
658 |
}; |
|
659 |
||
660 |
MODULE_AUTHOR("Florian Pose <fp@igh-essen.com>");
|
|
661 |
MODULE_DESCRIPTION("RealTek RTL-8139 EtherCAT driver");
|
|
662 |
MODULE_LICENSE("GPL");
|
|
663 |
MODULE_VERSION(EC_MASTER_VERSION); |
|
664 |
||
665 |
module_param(multicast_filter_limit, int, 0); |
|
666 |
module_param_array(media, int, NULL, 0); |
|
667 |
module_param_array(full_duplex, int, NULL, 0); |
|
668 |
module_param(debug, int, 0); |
|
669 |
MODULE_PARM_DESC (debug, "8139too bitmapped message enable number"); |
|
670 |
MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses"); |
|
671 |
MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps"); |
|
672 |
MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)"); |
|
673 |
||
674 |
void ec_poll(struct net_device *); |
|
675 |
||
676 |
static int read_eeprom (void __iomem *ioaddr, int location, int addr_len); |
|
677 |
static int rtl8139_open (struct net_device *dev); |
|
678 |
static int mdio_read (struct net_device *dev, int phy_id, int location); |
|
679 |
static void mdio_write (struct net_device *dev, int phy_id, int location, |
|
680 |
int val); |
|
681 |
static void rtl8139_start_thread(struct rtl8139_private *tp); |
|
682 |
static void rtl8139_tx_timeout (struct net_device *dev); |
|
683 |
static void rtl8139_init_ring (struct net_device *dev); |
|
684 |
static int rtl8139_start_xmit (struct sk_buff *skb, |
|
685 |
struct net_device *dev); |
|
686 |
#ifdef CONFIG_NET_POLL_CONTROLLER |
|
687 |
static void rtl8139_poll_controller(struct net_device *dev); |
|
688 |
#endif |
|
689 |
static int rtl8139_poll(struct napi_struct *napi, int budget); |
|
690 |
static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance); |
|
691 |
static int rtl8139_close (struct net_device *dev); |
|
692 |
static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); |
|
693 |
static struct net_device_stats *rtl8139_get_stats (struct net_device *dev); |
|
694 |
static void rtl8139_set_rx_mode (struct net_device *dev); |
|
695 |
static void __set_rx_mode (struct net_device *dev); |
|
696 |
static void rtl8139_hw_start (struct net_device *dev); |
|
697 |
static void rtl8139_thread (struct work_struct *work); |
|
698 |
static void rtl8139_tx_timeout_task(struct work_struct *work); |
|
699 |
static const struct ethtool_ops rtl8139_ethtool_ops; |
|
700 |
||
701 |
/* write MMIO register, with flush */ |
|
702 |
/* Flush avoids rtl8139 bug w/ posted MMIO writes */ |
|
703 |
#define RTL_W8_F(reg, val8) do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0)
|
|
704 |
#define RTL_W16_F(reg, val16) do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0)
|
|
705 |
#define RTL_W32_F(reg, val32) do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0)
|
|
706 |
||
707 |
/* write MMIO register */ |
|
708 |
#define RTL_W8(reg, val8) iowrite8 ((val8), ioaddr + (reg)) |
|
709 |
#define RTL_W16(reg, val16) iowrite16 ((val16), ioaddr + (reg)) |
|
710 |
#define RTL_W32(reg, val32) iowrite32 ((val32), ioaddr + (reg)) |
|
711 |
||
712 |
/* read MMIO register */ |
|
713 |
#define RTL_R8(reg) ioread8 (ioaddr + (reg)) |
|
714 |
#define RTL_R16(reg) ioread16 (ioaddr + (reg)) |
|
715 |
#define RTL_R32(reg) ((unsigned long) ioread32 (ioaddr + (reg))) |
|
716 |
||
717 |
||
718 |
static const u16 rtl8139_intr_mask = |
|
719 |
PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | |
|
720 |
TxErr | TxOK | RxErr | RxOK; |
|
721 |
||
722 |
static const u16 rtl8139_norx_intr_mask = |
|
723 |
PCIErr | PCSTimeout | RxUnderrun | |
|
724 |
TxErr | TxOK | RxErr ; |
|
725 |
||
726 |
#if RX_BUF_IDX == 0 |
|
727 |
static const unsigned int rtl8139_rx_config = |
|
728 |
RxCfgRcv8K | RxNoWrap | |
|
729 |
(RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
730 |
(RX_DMA_BURST << RxCfgDMAShift); |
|
731 |
#elif RX_BUF_IDX == 1 |
|
732 |
static const unsigned int rtl8139_rx_config = |
|
733 |
RxCfgRcv16K | RxNoWrap | |
|
734 |
(RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
735 |
(RX_DMA_BURST << RxCfgDMAShift); |
|
736 |
#elif RX_BUF_IDX == 2 |
|
737 |
static const unsigned int rtl8139_rx_config = |
|
738 |
RxCfgRcv32K | RxNoWrap | |
|
739 |
(RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
740 |
(RX_DMA_BURST << RxCfgDMAShift); |
|
741 |
#elif RX_BUF_IDX == 3 |
|
742 |
static const unsigned int rtl8139_rx_config = |
|
743 |
RxCfgRcv64K | |
|
744 |
(RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
745 |
(RX_DMA_BURST << RxCfgDMAShift); |
|
746 |
#else |
|
747 |
#error "Invalid configuration for 8139_RXBUF_IDX" |
|
748 |
#endif |
|
749 |
||
750 |
static const unsigned int rtl8139_tx_config = |
|
751 |
TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift); |
|
752 |
||
753 |
static void __rtl8139_cleanup_dev (struct net_device *dev) |
|
754 |
{
|
|
755 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
756 |
struct pci_dev *pdev; |
|
757 |
||
758 |
assert (dev != NULL); |
|
759 |
assert (tp->pci_dev != NULL); |
|
760 |
pdev = tp->pci_dev; |
|
761 |
||
762 |
#ifdef USE_IO_OPS |
|
763 |
if (tp->mmio_addr) |
|
764 |
ioport_unmap (tp->mmio_addr); |
|
765 |
#else |
|
766 |
if (tp->mmio_addr) |
|
767 |
pci_iounmap (pdev, tp->mmio_addr); |
|
768 |
#endif /* USE_IO_OPS */ |
|
769 |
||
770 |
/* it's ok to call this even if we have no regions to free */ |
|
771 |
pci_release_regions (pdev); |
|
772 |
||
773 |
free_netdev(dev); |
|
774 |
pci_set_drvdata (pdev, NULL); |
|
775 |
} |
|
776 |
||
777 |
||
778 |
static void rtl8139_chip_reset (void __iomem *ioaddr) |
|
779 |
{
|
|
780 |
int i; |
|
781 |
||
782 |
/* Soft reset the chip. */ |
|
783 |
RTL_W8 (ChipCmd, CmdReset); |
|
784 |
||
785 |
/* Check that the chip has finished the reset. */ |
|
786 |
for (i = 1000; i > 0; i--) {
|
|
787 |
barrier(); |
|
788 |
if ((RTL_R8 (ChipCmd) & CmdReset) == 0) |
|
789 |
break; |
|
790 |
udelay (10); |
|
791 |
} |
|
792 |
} |
|
793 |
||
794 |
||
795 |
static int __devinit rtl8139_init_board (struct pci_dev *pdev, |
|
796 |
struct net_device **dev_out) |
|
797 |
{
|
|
798 |
void __iomem *ioaddr; |
|
799 |
struct net_device *dev; |
|
800 |
struct rtl8139_private *tp; |
|
801 |
u8 tmp8; |
|
802 |
int rc, disable_dev_on_err = 0; |
|
803 |
unsigned int i; |
|
804 |
unsigned long pio_start, pio_end, pio_flags, pio_len; |
|
805 |
unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; |
|
806 |
u32 version; |
|
807 |
||
808 |
assert (pdev != NULL); |
|
809 |
||
810 |
*dev_out = NULL; |
|
811 |
||
812 |
/* dev and priv zeroed in alloc_etherdev */ |
|
813 |
dev = alloc_etherdev (sizeof (*tp)); |
|
814 |
if (dev == NULL) {
|
|
815 |
dev_err(&pdev->dev, "Unable to alloc new net device\n"); |
|
816 |
return -ENOMEM; |
|
817 |
} |
|
818 |
SET_NETDEV_DEV(dev, &pdev->dev); |
|
819 |
||
820 |
tp = netdev_priv(dev); |
|
821 |
tp->pci_dev = pdev; |
|
822 |
||
823 |
/* enable device (incl. PCI PM wakeup and hotplug setup) */ |
|
824 |
rc = pci_enable_device (pdev); |
|
825 |
if (rc) |
|
826 |
goto err_out; |
|
827 |
||
828 |
pio_start = pci_resource_start (pdev, 0); |
|
829 |
pio_end = pci_resource_end (pdev, 0); |
|
830 |
pio_flags = pci_resource_flags (pdev, 0); |
|
831 |
pio_len = pci_resource_len (pdev, 0); |
|
832 |
||
833 |
mmio_start = pci_resource_start (pdev, 1); |
|
834 |
mmio_end = pci_resource_end (pdev, 1); |
|
835 |
mmio_flags = pci_resource_flags (pdev, 1); |
|
836 |
mmio_len = pci_resource_len (pdev, 1); |
|
837 |
||
838 |
/* set this immediately, we need to know before |
|
839 |
* we talk to the chip directly */ |
|
840 |
DPRINTK("PIO region size == 0x%02X\n", pio_len);
|
|
841 |
DPRINTK("MMIO region size == 0x%02lX\n", mmio_len);
|
|
842 |
||
843 |
#ifdef USE_IO_OPS |
|
844 |
/* make sure PCI base addr 0 is PIO */ |
|
845 |
if (!(pio_flags & IORESOURCE_IO)) {
|
|
846 |
dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n"); |
|
847 |
rc = -ENODEV; |
|
848 |
goto err_out; |
|
849 |
} |
|
850 |
/* check for weird/broken PCI region reporting */ |
|
851 |
if (pio_len < RTL_MIN_IO_SIZE) {
|
|
852 |
dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n"); |
|
853 |
rc = -ENODEV; |
|
854 |
goto err_out; |
|
855 |
} |
|
856 |
#else |
|
857 |
/* make sure PCI base addr 1 is MMIO */ |
|
858 |
if (!(mmio_flags & IORESOURCE_MEM)) {
|
|
859 |
dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n"); |
|
860 |
rc = -ENODEV; |
|
861 |
goto err_out; |
|
862 |
} |
|
863 |
if (mmio_len < RTL_MIN_IO_SIZE) {
|
|
864 |
dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n"); |
|
865 |
rc = -ENODEV; |
|
866 |
goto err_out; |
|
867 |
} |
|
868 |
#endif |
|
869 |
||
870 |
rc = pci_request_regions (pdev, DRV_NAME); |
|
871 |
if (rc) |
|
872 |
goto err_out; |
|
873 |
disable_dev_on_err = 1; |
|
874 |
||
875 |
/* enable PCI bus-mastering */ |
|
876 |
pci_set_master (pdev); |
|
877 |
||
878 |
#ifdef USE_IO_OPS |
|
879 |
ioaddr = ioport_map(pio_start, pio_len); |
|
880 |
if (!ioaddr) {
|
|
881 |
dev_err(&pdev->dev, "cannot map PIO, aborting\n"); |
|
882 |
rc = -EIO; |
|
883 |
goto err_out; |
|
884 |
} |
|
885 |
dev->base_addr = pio_start; |
|
886 |
tp->mmio_addr = ioaddr; |
|
887 |
tp->regs_len = pio_len; |
|
888 |
#else |
|
889 |
/* ioremap MMIO region */ |
|
890 |
ioaddr = pci_iomap(pdev, 1, 0); |
|
891 |
if (ioaddr == NULL) {
|
|
892 |
dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); |
|
893 |
rc = -EIO; |
|
894 |
goto err_out; |
|
895 |
} |
|
896 |
dev->base_addr = (long) ioaddr; |
|
897 |
tp->mmio_addr = ioaddr; |
|
898 |
tp->regs_len = mmio_len; |
|
899 |
#endif /* USE_IO_OPS */ |
|
900 |
||
901 |
/* Bring old chips out of low-power mode. */ |
|
902 |
RTL_W8 (HltClk, 'R'); |
|
903 |
||
904 |
/* check for missing/broken hardware */ |
|
905 |
if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
|
|
906 |
dev_err(&pdev->dev, "Chip not responding, ignoring board\n"); |
|
907 |
rc = -EIO; |
|
908 |
goto err_out; |
|
909 |
} |
|
910 |
||
911 |
/* identify chip attached to board */ |
|
912 |
version = RTL_R32 (TxConfig) & HW_REVID_MASK; |
|
913 |
for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++) |
|
914 |
if (version == rtl_chip_info[i].version) {
|
|
915 |
tp->chipset = i; |
|
916 |
goto match; |
|
917 |
} |
|
918 |
||
919 |
/* if unknown chip, assume array element #0, original RTL-8139 in this case */ |
|
920 |
dev_printk (KERN_DEBUG, &pdev->dev, |
|
921 |
"unknown chip version, assuming RTL-8139\n"); |
|
922 |
dev_printk (KERN_DEBUG, &pdev->dev, |
|
923 |
"TxConfig = 0x%lx\n", RTL_R32 (TxConfig)); |
|
924 |
tp->chipset = 0; |
|
925 |
||
926 |
match: |
|
927 |
DPRINTK ("chipset id (%d) == index %d, '%s'\n",
|
|
928 |
version, i, rtl_chip_info[i].name); |
|
929 |
||
930 |
if (tp->chipset >= CH_8139B) {
|
|
931 |
u8 new_tmp8 = tmp8 = RTL_R8 (Config1); |
|
932 |
DPRINTK("PCI PM wakeup\n");
|
|
933 |
if ((rtl_chip_info[tp->chipset].flags & HasLWake) && |
|
934 |
(tmp8 & LWAKE)) |
|
935 |
new_tmp8 &= ~LWAKE; |
|
936 |
new_tmp8 |= Cfg1_PM_Enable; |
|
937 |
if (new_tmp8 != tmp8) {
|
|
938 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
939 |
RTL_W8 (Config1, tmp8); |
|
940 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
941 |
} |
|
942 |
if (rtl_chip_info[tp->chipset].flags & HasLWake) {
|
|
943 |
tmp8 = RTL_R8 (Config4); |
|
944 |
if (tmp8 & LWPTN) {
|
|
945 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
946 |
RTL_W8 (Config4, tmp8 & ~LWPTN); |
|
947 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
948 |
} |
|
949 |
} |
|
950 |
} else {
|
|
951 |
DPRINTK("Old chip wakeup\n");
|
|
952 |
tmp8 = RTL_R8 (Config1); |
|
953 |
tmp8 &= ~(SLEEP | PWRDN); |
|
954 |
RTL_W8 (Config1, tmp8); |
|
955 |
} |
|
956 |
||
957 |
rtl8139_chip_reset (ioaddr); |
|
958 |
||
959 |
*dev_out = dev; |
|
960 |
return 0; |
|
961 |
||
962 |
err_out: |
|
963 |
__rtl8139_cleanup_dev (dev); |
|
964 |
if (disable_dev_on_err) |
|
965 |
pci_disable_device (pdev); |
|
966 |
return rc; |
|
967 |
} |
|
968 |
||
969 |
||
970 |
static int __devinit rtl8139_init_one (struct pci_dev *pdev, |
|
971 |
const struct pci_device_id *ent) |
|
972 |
{
|
|
973 |
struct net_device *dev = NULL; |
|
974 |
struct rtl8139_private *tp; |
|
975 |
int i, addr_len, option; |
|
976 |
void __iomem *ioaddr; |
|
977 |
static int board_idx = -1; |
|
978 |
DECLARE_MAC_BUF(mac); |
|
979 |
||
980 |
assert (pdev != NULL); |
|
981 |
assert (ent != NULL); |
|
982 |
||
983 |
board_idx++; |
|
984 |
||
985 |
/* when we're built into the kernel, the driver version message |
|
986 |
* is only printed if at least one 8139 board has been found |
|
987 |
*/ |
|
988 |
#ifndef MODULE |
|
989 |
{
|
|
990 |
static int printed_version; |
|
991 |
if (!printed_version++) |
|
992 |
printk (KERN_INFO RTL8139_DRIVER_NAME "\n"); |
|
993 |
} |
|
994 |
#endif |
|
995 |
||
996 |
if (pdev->vendor == PCI_VENDOR_ID_REALTEK && |
|
997 |
pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision >= 0x20) {
|
|
998 |
dev_info(&pdev->dev, |
|
999 |
"This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n", |
|
1000 |
pdev->vendor, pdev->device, pdev->revision); |
|
1001 |
dev_info(&pdev->dev, |
|
1002 |
"Use the \"8139cp\" driver for improved performance and stability.\n"); |
|
1003 |
} |
|
1004 |
||
1005 |
i = rtl8139_init_board (pdev, &dev); |
|
1006 |
if (i < 0) |
|
1007 |
return i; |
|
1008 |
||
1009 |
assert (dev != NULL); |
|
1010 |
tp = netdev_priv(dev); |
|
1011 |
tp->dev = dev; |
|
1012 |
||
1013 |
ioaddr = tp->mmio_addr; |
|
1014 |
assert (ioaddr != NULL); |
|
1015 |
||
1016 |
addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6; |
|
1017 |
for (i = 0; i < 3; i++) |
|
1018 |
((u16 *) (dev->dev_addr))[i] = |
|
1019 |
le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len)); |
|
1020 |
memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
|
1021 |
||
1022 |
/* The Rtl8139-specific entries in the device structure. */ |
|
1023 |
dev->open = rtl8139_open; |
|
1024 |
dev->hard_start_xmit = rtl8139_start_xmit; |
|
1025 |
netif_napi_add(dev, &tp->napi, rtl8139_poll, 64); |
|
1026 |
dev->stop = rtl8139_close; |
|
1027 |
dev->get_stats = rtl8139_get_stats; |
|
1028 |
dev->set_multicast_list = rtl8139_set_rx_mode; |
|
1029 |
dev->do_ioctl = netdev_ioctl; |
|
1030 |
dev->ethtool_ops = &rtl8139_ethtool_ops; |
|
1031 |
dev->tx_timeout = rtl8139_tx_timeout; |
|
1032 |
dev->watchdog_timeo = TX_TIMEOUT; |
|
1033 |
#ifdef CONFIG_NET_POLL_CONTROLLER |
|
1034 |
dev->poll_controller = rtl8139_poll_controller; |
|
1035 |
#endif |
|
1036 |
||
1037 |
/* note: the hardware is not capable of sg/csum/highdma, however |
|
1038 |
* through the use of skb_copy_and_csum_dev we enable these |
|
1039 |
* features |
|
1040 |
*/ |
|
1041 |
dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA; |
|
1042 |
||
1043 |
dev->irq = pdev->irq; |
|
1044 |
||
1045 |
/* tp zeroed and aligned in alloc_etherdev */ |
|
1046 |
tp = netdev_priv(dev); |
|
1047 |
||
1048 |
/* note: tp->chipset set in rtl8139_init_board */ |
|
1049 |
tp->drv_flags = board_info[ent->driver_data].hw_flags; |
|
1050 |
tp->mmio_addr = ioaddr; |
|
1051 |
tp->msg_enable = |
|
1052 |
(debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1)); |
|
1053 |
spin_lock_init (&tp->lock); |
|
1054 |
spin_lock_init (&tp->rx_lock); |
|
1055 |
INIT_DELAYED_WORK(&tp->thread, rtl8139_thread); |
|
1056 |
tp->mii.dev = dev; |
|
1057 |
tp->mii.mdio_read = mdio_read; |
|
1058 |
tp->mii.mdio_write = mdio_write; |
|
1059 |
tp->mii.phy_id_mask = 0x3f; |
|
1060 |
tp->mii.reg_num_mask = 0x1f; |
|
1061 |
||
1062 |
/* dev is fully set up and ready to use now */ |
|
1063 |
||
1064 |
// offer device to EtherCAT master module |
|
1065 |
tp->ecdev = ecdev_offer(dev, ec_poll, THIS_MODULE); |
|
1066 |
||
1067 |
if (!tp->ecdev) {
|
|
1068 |
DPRINTK("about to register device named %s (%p)...\n", dev->name, dev);
|
|
1069 |
i = register_netdev (dev); |
|
1070 |
if (i) goto err_out; |
|
1071 |
} |
|
1072 |
||
1073 |
pci_set_drvdata (pdev, dev); |
|
1074 |
||
1075 |
printk (KERN_INFO "%s: %s at 0x%lx, " |
|
1076 |
"%s, IRQ %d\n", |
|
1077 |
dev->name, |
|
1078 |
board_info[ent->driver_data].name, |
|
1079 |
dev->base_addr, |
|
1080 |
print_mac(mac, dev->dev_addr), |
|
1081 |
dev->irq); |
|
1082 |
||
1083 |
printk (KERN_DEBUG "%s: Identified 8139 chip type '%s'\n", |
|
1084 |
dev->name, rtl_chip_info[tp->chipset].name); |
|
1085 |
||
1086 |
/* Find the connected MII xcvrs. |
|
1087 |
Doing this in open() would allow detecting external xcvrs later, but |
|
1088 |
takes too much time. */ |
|
1089 |
#ifdef CONFIG_8139TOO_8129 |
|
1090 |
if (tp->drv_flags & HAS_MII_XCVR) {
|
|
1091 |
int phy, phy_idx = 0; |
|
1092 |
for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
|
|
1093 |
int mii_status = mdio_read(dev, phy, 1); |
|
1094 |
if (mii_status != 0xffff && mii_status != 0x0000) {
|
|
1095 |
u16 advertising = mdio_read(dev, phy, 4); |
|
1096 |
tp->phys[phy_idx++] = phy; |
|
1097 |
printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x " |
|
1098 |
"advertising %4.4x.\n", |
|
1099 |
dev->name, phy, mii_status, advertising); |
|
1100 |
} |
|
1101 |
} |
|
1102 |
if (phy_idx == 0) {
|
|
1103 |
printk(KERN_INFO "%s: No MII transceivers found! Assuming SYM " |
|
1104 |
"transceiver.\n", |
|
1105 |
dev->name); |
|
1106 |
tp->phys[0] = 32; |
|
1107 |
} |
|
1108 |
} else |
|
1109 |
#endif |
|
1110 |
tp->phys[0] = 32; |
|
1111 |
tp->mii.phy_id = tp->phys[0]; |
|
1112 |
||
1113 |
/* The lower four bits are the media type. */ |
|
1114 |
option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx]; |
|
1115 |
if (option > 0) {
|
|
1116 |
tp->mii.full_duplex = (option & 0x210) ? 1 : 0; |
|
1117 |
tp->default_port = option & 0xFF; |
|
1118 |
if (tp->default_port) |
|
1119 |
tp->mii.force_media = 1; |
|
1120 |
} |
|
1121 |
if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0) |
|
1122 |
tp->mii.full_duplex = full_duplex[board_idx]; |
|
1123 |
if (tp->mii.full_duplex) {
|
|
1124 |
printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name); |
|
1125 |
/* Changing the MII-advertised media because might prevent |
|
1126 |
re-connection. */ |
|
1127 |
tp->mii.force_media = 1; |
|
1128 |
} |
|
1129 |
if (tp->default_port) {
|
|
1130 |
printk(KERN_INFO " Forcing %dMbps %s-duplex operation.\n", |
|
1131 |
(option & 0x20 ? 100 : 10), |
|
1132 |
(option & 0x10 ? "full" : "half")); |
|
1133 |
mdio_write(dev, tp->phys[0], 0, |
|
1134 |
((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */ |
|
1135 |
((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */ |
|
1136 |
} |
|
1137 |
||
1138 |
/* Put the chip into low-power mode. */ |
|
1139 |
if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
1140 |
RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ |
|
1141 |
||
1142 |
if (tp->ecdev && ecdev_open(tp->ecdev)) {
|
|
1143 |
ecdev_withdraw(tp->ecdev); |
|
1144 |
goto err_out; |
|
1145 |
} |
|
1146 |
||
1147 |
return 0; |
|
1148 |
||
1149 |
err_out: |
|
1150 |
__rtl8139_cleanup_dev (dev); |
|
1151 |
pci_disable_device (pdev); |
|
1152 |
return i; |
|
1153 |
} |
|
1154 |
||
1155 |
||
1156 |
static void __devexit rtl8139_remove_one (struct pci_dev *pdev) |
|
1157 |
{
|
|
1158 |
struct net_device *dev = pci_get_drvdata (pdev); |
|
1159 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
1160 |
||
1161 |
assert (dev != NULL); |
|
1162 |
||
1163 |
flush_scheduled_work(); |
|
1164 |
||
1165 |
if (tp->ecdev) {
|
|
1166 |
ecdev_close(tp->ecdev); |
|
1167 |
ecdev_withdraw(tp->ecdev); |
|
1168 |
} |
|
1169 |
else {
|
|
1170 |
unregister_netdev (dev); |
|
1171 |
} |
|
1172 |
||
1173 |
__rtl8139_cleanup_dev (dev); |
|
1174 |
pci_disable_device (pdev); |
|
1175 |
} |
|
1176 |
||
1177 |
||
1178 |
/* Serial EEPROM section. */ |
|
1179 |
||
1180 |
/* EEPROM_Ctrl bits. */ |
|
1181 |
#define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ |
|
1182 |
#define EE_CS 0x08 /* EEPROM chip select. */ |
|
1183 |
#define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ |
|
1184 |
#define EE_WRITE_0 0x00 |
|
1185 |
#define EE_WRITE_1 0x02 |
|
1186 |
#define EE_DATA_READ 0x01 /* EEPROM chip data out. */ |
|
1187 |
#define EE_ENB (0x80 | EE_CS) |
|
1188 |
||
1189 |
/* Delay between EEPROM clock transitions. |
|
1190 |
No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. |
|
1191 |
*/ |
|
1192 |
||
1193 |
#define eeprom_delay() (void)RTL_R32(Cfg9346) |
|
1194 |
||
1195 |
/* The EEPROM commands include the alway-set leading bit. */ |
|
1196 |
#define EE_WRITE_CMD (5) |
|
1197 |
#define EE_READ_CMD (6) |
|
1198 |
#define EE_ERASE_CMD (7) |
|
1199 |
||
1200 |
static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len) |
|
1201 |
{
|
|
1202 |
int i; |
|
1203 |
unsigned retval = 0; |
|
1204 |
int read_cmd = location | (EE_READ_CMD << addr_len); |
|
1205 |
||
1206 |
RTL_W8 (Cfg9346, EE_ENB & ~EE_CS); |
|
1207 |
RTL_W8 (Cfg9346, EE_ENB); |
|
1208 |
eeprom_delay (); |
|
1209 |
||
1210 |
/* Shift the read command bits out. */ |
|
1211 |
for (i = 4 + addr_len; i >= 0; i--) {
|
|
1212 |
int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; |
|
1213 |
RTL_W8 (Cfg9346, EE_ENB | dataval); |
|
1214 |
eeprom_delay (); |
|
1215 |
RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK); |
|
1216 |
eeprom_delay (); |
|
1217 |
} |
|
1218 |
RTL_W8 (Cfg9346, EE_ENB); |
|
1219 |
eeprom_delay (); |
|
1220 |
||
1221 |
for (i = 16; i > 0; i--) {
|
|
1222 |
RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK); |
|
1223 |
eeprom_delay (); |
|
1224 |
retval = |
|
1225 |
(retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 : |
|
1226 |
0); |
|
1227 |
RTL_W8 (Cfg9346, EE_ENB); |
|
1228 |
eeprom_delay (); |
|
1229 |
} |
|
1230 |
||
1231 |
/* Terminate the EEPROM access. */ |
|
1232 |
RTL_W8 (Cfg9346, ~EE_CS); |
|
1233 |
eeprom_delay (); |
|
1234 |
||
1235 |
return retval; |
|
1236 |
} |
|
1237 |
||
1238 |
/* MII serial management: mostly bogus for now. */ |
|
1239 |
/* Read and write the MII management registers using software-generated |
|
1240 |
serial MDIO protocol. |
|
1241 |
The maximum data clock rate is 2.5 Mhz. The minimum timing is usually |
|
1242 |
met by back-to-back PCI I/O cycles, but we insert a delay to avoid |
|
1243 |
"overclocking" issues. */ |
|
1244 |
#define MDIO_DIR 0x80 |
|
1245 |
#define MDIO_DATA_OUT 0x04 |
|
1246 |
#define MDIO_DATA_IN 0x02 |
|
1247 |
#define MDIO_CLK 0x01 |
|
1248 |
#define MDIO_WRITE0 (MDIO_DIR) |
|
1249 |
#define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) |
|
1250 |
||
1251 |
#define mdio_delay() RTL_R8(Config4) |
|
1252 |
||
1253 |
||
1254 |
static const char mii_2_8139_map[8] = {
|
|
1255 |
BasicModeCtrl, |
|
1256 |
BasicModeStatus, |
|
1257 |
0, |
|
1258 |
0, |
|
1259 |
NWayAdvert, |
|
1260 |
NWayLPAR, |
|
1261 |
NWayExpansion, |
|
1262 |
0 |
|
1263 |
}; |
|
1264 |
||
1265 |
||
1266 |
#ifdef CONFIG_8139TOO_8129 |
|
1267 |
/* Syncronize the MII management interface by shifting 32 one bits out. */ |
|
1268 |
static void mdio_sync (void __iomem *ioaddr) |
|
1269 |
{
|
|
1270 |
int i; |
|
1271 |
||
1272 |
for (i = 32; i >= 0; i--) {
|
|
1273 |
RTL_W8 (Config4, MDIO_WRITE1); |
|
1274 |
mdio_delay (); |
|
1275 |
RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK); |
|
1276 |
mdio_delay (); |
|
1277 |
} |
|
1278 |
} |
|
1279 |
#endif |
|
1280 |
||
1281 |
static int mdio_read (struct net_device *dev, int phy_id, int location) |
|
1282 |
{
|
|
1283 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
1284 |
int retval = 0; |
|
1285 |
#ifdef CONFIG_8139TOO_8129 |
|
1286 |
void __iomem *ioaddr = tp->mmio_addr; |
|
1287 |
int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; |
|
1288 |
int i; |
|
1289 |
#endif |
|
1290 |
||
1291 |
if (phy_id > 31) { /* Really a 8139. Use internal registers. */
|
|
1292 |
void __iomem *ioaddr = tp->mmio_addr; |
|
1293 |
return location < 8 && mii_2_8139_map[location] ? |
|
1294 |
RTL_R16 (mii_2_8139_map[location]) : 0; |
|
1295 |
} |
|
1296 |
||
1297 |
#ifdef CONFIG_8139TOO_8129 |
|
1298 |
mdio_sync (ioaddr); |
|
1299 |
/* Shift the read command bits out. */ |
|
1300 |
for (i = 15; i >= 0; i--) {
|
|
1301 |
int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; |
|
1302 |
||
1303 |
RTL_W8 (Config4, MDIO_DIR | dataval); |
|
1304 |
mdio_delay (); |
|
1305 |
RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK); |
|
1306 |
mdio_delay (); |
|
1307 |
} |
|
1308 |
||
1309 |
/* Read the two transition, 16 data, and wire-idle bits. */ |
|
1310 |
for (i = 19; i > 0; i--) {
|
|
1311 |
RTL_W8 (Config4, 0); |
|
1312 |
mdio_delay (); |
|
1313 |
retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0); |
|
1314 |
RTL_W8 (Config4, MDIO_CLK); |
|
1315 |
mdio_delay (); |
|
1316 |
} |
|
1317 |
#endif |
|
1318 |
||
1319 |
return (retval >> 1) & 0xffff; |
|
1320 |
} |
|
1321 |
||
1322 |
||
1323 |
static void mdio_write (struct net_device *dev, int phy_id, int location, |
|
1324 |
int value) |
|
1325 |
{
|
|
1326 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
1327 |
#ifdef CONFIG_8139TOO_8129 |
|
1328 |
void __iomem *ioaddr = tp->mmio_addr; |
|
1329 |
int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; |
|
1330 |
int i; |
|
1331 |
#endif |
|
1332 |
||
1333 |
if (phy_id > 31) { /* Really a 8139. Use internal registers. */
|
|
1334 |
void __iomem *ioaddr = tp->mmio_addr; |
|
1335 |
if (location == 0) {
|
|
1336 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
1337 |
RTL_W16 (BasicModeCtrl, value); |
|
1338 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1339 |
} else if (location < 8 && mii_2_8139_map[location]) |
|
1340 |
RTL_W16 (mii_2_8139_map[location], value); |
|
1341 |
return; |
|
1342 |
} |
|
1343 |
||
1344 |
#ifdef CONFIG_8139TOO_8129 |
|
1345 |
mdio_sync (ioaddr); |
|
1346 |
||
1347 |
/* Shift the command bits out. */ |
|
1348 |
for (i = 31; i >= 0; i--) {
|
|
1349 |
int dataval = |
|
1350 |
(mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; |
|
1351 |
RTL_W8 (Config4, dataval); |
|
1352 |
mdio_delay (); |
|
1353 |
RTL_W8 (Config4, dataval | MDIO_CLK); |
|
1354 |
mdio_delay (); |
|
1355 |
} |
|
1356 |
/* Clear out extra bits. */ |
|
1357 |
for (i = 2; i > 0; i--) {
|
|
1358 |
RTL_W8 (Config4, 0); |
|
1359 |
mdio_delay (); |
|
1360 |
RTL_W8 (Config4, MDIO_CLK); |
|
1361 |
mdio_delay (); |
|
1362 |
} |
|
1363 |
#endif |
|
1364 |
} |
|
1365 |
||
1366 |
||
1367 |
static int rtl8139_open (struct net_device *dev) |
|
1368 |
{
|
|
1369 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
1370 |
int retval; |
|
1371 |
void __iomem *ioaddr = tp->mmio_addr; |
|
1372 |
||
1373 |
if (!tp->ecdev) {
|
|
1374 |
retval = request_irq(dev->irq, rtl8139_interrupt, |
|
1375 |
IRQF_SHARED, dev->name, dev); |
|
1376 |
if (retval) |
|
1377 |
return retval; |
|
1378 |
} |
|
1379 |
||
1380 |
tp->tx_bufs = dma_alloc_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN, |
|
1381 |
&tp->tx_bufs_dma, GFP_KERNEL); |
|
1382 |
tp->rx_ring = dma_alloc_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN, |
|
1383 |
&tp->rx_ring_dma, GFP_KERNEL); |
|
1384 |
if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
|
|
1385 |
if (!tp->ecdev) free_irq(dev->irq, dev); |
|
1386 |
||
1387 |
if (tp->tx_bufs) |
|
1388 |
dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN, |
|
1389 |
tp->tx_bufs, tp->tx_bufs_dma); |
|
1390 |
if (tp->rx_ring) |
|
1391 |
dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN, |
|
1392 |
tp->rx_ring, tp->rx_ring_dma); |
|
1393 |
||
1394 |
return -ENOMEM; |
|
1395 |
||
1396 |
} |
|
1397 |
||
1398 |
napi_enable(&tp->napi); |
|
1399 |
||
1400 |
tp->mii.full_duplex = tp->mii.force_media; |
|
1401 |
tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000; |
|
1402 |
||
1403 |
rtl8139_init_ring (dev); |
|
1404 |
rtl8139_hw_start (dev); |
|
1405 |
||
1406 |
if (!tp->ecdev) {
|
|
1407 |
netif_start_queue (dev); |
|
1408 |
||
1409 |
if (netif_msg_ifup(tp)) |
|
1410 |
printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#llx IRQ %d" |
|
1411 |
" GP Pins %2.2x %s-duplex.\n", dev->name, |
|
1412 |
(unsigned long long)pci_resource_start (tp->pci_dev, 1), |
|
1413 |
dev->irq, RTL_R8 (MediaStatus), |
|
1414 |
tp->mii.full_duplex ? "full" : "half"); |
|
1415 |
rtl8139_start_thread(tp); |
|
1416 |
} |
|
1417 |
||
1418 |
return 0; |
|
1419 |
} |
|
1420 |
||
1421 |
||
1422 |
static void rtl_check_media (struct net_device *dev, unsigned int init_media) |
|
1423 |
{
|
|
1424 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
1425 |
||
1426 |
if (tp->ecdev) {
|
|
1427 |
void __iomem *ioaddr = tp->mmio_addr; |
|
1428 |
uint16_t state = RTL_R16(BasicModeStatus) & BMSR_LSTATUS; |
|
1429 |
ecdev_set_link(tp->ecdev, state ? 1 : 0); |
|
1430 |
} |
|
1431 |
else {
|
|
1432 |
if (tp->phys[0] >= 0) {
|
|
1433 |
mii_check_media(&tp->mii, netif_msg_link(tp), init_media); |
|
1434 |
} |
|
1435 |
} |
|
1436 |
} |
|
1437 |
||
1438 |
/* Start the hardware at open or resume. */ |
|
1439 |
static void rtl8139_hw_start (struct net_device *dev) |
|
1440 |
{
|
|
1441 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
1442 |
void __iomem *ioaddr = tp->mmio_addr; |
|
1443 |
u32 i; |
|
1444 |
u8 tmp; |
|
1445 |
||
1446 |
/* Bring old chips out of low-power mode. */ |
|
1447 |
if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
1448 |
RTL_W8 (HltClk, 'R'); |
|
1449 |
||
1450 |
rtl8139_chip_reset (ioaddr); |
|
1451 |
||
1452 |
/* unlock Config[01234] and BMCR register writes */ |
|
1453 |
RTL_W8_F (Cfg9346, Cfg9346_Unlock); |
|
1454 |
/* Restore our idea of the MAC address. */ |
|
1455 |
RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0))); |
|
1456 |
RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4))); |
|
1457 |
||
1458 |
/* Must enable Tx/Rx before setting transfer thresholds! */ |
|
1459 |
RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
1460 |
||
1461 |
tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; |
|
1462 |
RTL_W32 (RxConfig, tp->rx_config); |
|
1463 |
RTL_W32 (TxConfig, rtl8139_tx_config); |
|
1464 |
||
1465 |
tp->cur_rx = 0; |
|
1466 |
||
1467 |
rtl_check_media (dev, 1); |
|
1468 |
||
1469 |
if (tp->chipset >= CH_8139B) {
|
|
1470 |
/* Disable magic packet scanning, which is enabled |
|
1471 |
* when PM is enabled in Config1. It can be reenabled |
|
1472 |
* via ETHTOOL_SWOL if desired. */ |
|
1473 |
RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic); |
|
1474 |
} |
|
1475 |
||
1476 |
DPRINTK("init buffer addresses\n");
|
|
1477 |
||
1478 |
/* Lock Config[01234] and BMCR register writes */ |
|
1479 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1480 |
||
1481 |
/* init Rx ring buffer DMA address */ |
|
1482 |
RTL_W32_F (RxBuf, tp->rx_ring_dma); |
|
1483 |
||
1484 |
/* init Tx buffer DMA addresses */ |
|
1485 |
for (i = 0; i < NUM_TX_DESC; i++) |
|
1486 |
RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs)); |
|
1487 |
||
1488 |
RTL_W32 (RxMissed, 0); |
|
1489 |
||
1490 |
rtl8139_set_rx_mode (dev); |
|
1491 |
||
1492 |
/* no early-rx interrupts */ |
|
1493 |
RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear); |
|
1494 |
||
1495 |
/* make sure RxTx has started */ |
|
1496 |
tmp = RTL_R8 (ChipCmd); |
|
1497 |
if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb))) |
|
1498 |
RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
1499 |
||
1500 |
if (!tp->ecdev) |
|
1501 |
/* Enable all known interrupts by setting the interrupt mask. */ |
|
1502 |
RTL_W16 (IntrMask, rtl8139_intr_mask); |
|
1503 |
} |
|
1504 |
||
1505 |
||
1506 |
/* Initialize the Rx and Tx rings, along with various 'dev' bits. */ |
|
1507 |
static void rtl8139_init_ring (struct net_device *dev) |
|
1508 |
{
|
|
1509 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
1510 |
int i; |
|
1511 |
||
1512 |
tp->cur_rx = 0; |
|
1513 |
tp->cur_tx = 0; |
|
1514 |
tp->dirty_tx = 0; |
|
1515 |
||
1516 |
for (i = 0; i < NUM_TX_DESC; i++) |
|
1517 |
tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE]; |
|
1518 |
} |
|
1519 |
||
1520 |
||
1521 |
/* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */ |
|
1522 |
static int next_tick = 3 * HZ; |
|
1523 |
||
1524 |
#ifndef CONFIG_8139TOO_TUNE_TWISTER |
|
1525 |
static inline void rtl8139_tune_twister (struct net_device *dev, |
|
1526 |
struct rtl8139_private *tp) {}
|
|
1527 |
#else |
|
1528 |
enum TwisterParamVals {
|
|
1529 |
PARA78_default = 0x78fa8388, |
|
1530 |
PARA7c_default = 0xcb38de43, /* param[0][3] */ |
|
1531 |
PARA7c_xxx = 0xcb38de43, |
|
1532 |
}; |
|
1533 |
||
1534 |
static const unsigned long param[4][4] = {
|
|
1535 |
{0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
|
|
1536 |
{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
|
|
1537 |
{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
|
|
1538 |
{0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
|
|
1539 |
}; |
|
1540 |
||
1541 |
static void rtl8139_tune_twister (struct net_device *dev, |
|
1542 |
struct rtl8139_private *tp) |
|
1543 |
{
|
|
1544 |
int linkcase; |
|
1545 |
void __iomem *ioaddr = tp->mmio_addr; |
|
1546 |
||
1547 |
/* This is a complicated state machine to configure the "twister" for |
|
1548 |
impedance/echos based on the cable length. |
|
1549 |
All of this is magic and undocumented. |
|
1550 |
*/ |
|
1551 |
switch (tp->twistie) {
|
|
1552 |
case 1: |
|
1553 |
if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
|
|
1554 |
/* We have link beat, let us tune the twister. */ |
|
1555 |
RTL_W16 (CSCR, CSCR_LinkDownOffCmd); |
|
1556 |
tp->twistie = 2; /* Change to state 2. */ |
|
1557 |
next_tick = HZ / 10; |
|
1558 |
} else {
|
|
1559 |
/* Just put in some reasonable defaults for when beat returns. */ |
|
1560 |
RTL_W16 (CSCR, CSCR_LinkDownCmd); |
|
1561 |
RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */ |
|
1562 |
RTL_W32 (PARA78, PARA78_default); |
|
1563 |
RTL_W32 (PARA7c, PARA7c_default); |
|
1564 |
tp->twistie = 0; /* Bail from future actions. */ |
|
1565 |
} |
|
1566 |
break; |
|
1567 |
case 2: |
|
1568 |
/* Read how long it took to hear the echo. */ |
|
1569 |
linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits; |
|
1570 |
if (linkcase == 0x7000) |
|
1571 |
tp->twist_row = 3; |
|
1572 |
else if (linkcase == 0x3000) |
|
1573 |
tp->twist_row = 2; |
|
1574 |
else if (linkcase == 0x1000) |
|
1575 |
tp->twist_row = 1; |
|
1576 |
else |
|
1577 |
tp->twist_row = 0; |
|
1578 |
tp->twist_col = 0; |
|
1579 |
tp->twistie = 3; /* Change to state 2. */ |
|
1580 |
next_tick = HZ / 10; |
|
1581 |
break; |
|
1582 |
case 3: |
|
1583 |
/* Put out four tuning parameters, one per 100msec. */ |
|
1584 |
if (tp->twist_col == 0) |
|
1585 |
RTL_W16 (FIFOTMS, 0); |
|
1586 |
RTL_W32 (PARA7c, param[(int) tp->twist_row] |
|
1587 |
[(int) tp->twist_col]); |
|
1588 |
next_tick = HZ / 10; |
|
1589 |
if (++tp->twist_col >= 4) {
|
|
1590 |
/* For short cables we are done. |
|
1591 |
For long cables (row == 3) check for mistune. */ |
|
1592 |
tp->twistie = |
|
1593 |
(tp->twist_row == 3) ? 4 : 0; |
|
1594 |
} |
|
1595 |
break; |
|
1596 |
case 4: |
|
1597 |
/* Special case for long cables: check for mistune. */ |
|
1598 |
if ((RTL_R16 (CSCR) & |
|
1599 |
CSCR_LinkStatusBits) == 0x7000) {
|
|
1600 |
tp->twistie = 0; |
|
1601 |
break; |
|
1602 |
} else {
|
|
1603 |
RTL_W32 (PARA7c, 0xfb38de03); |
|
1604 |
tp->twistie = 5; |
|
1605 |
next_tick = HZ / 10; |
|
1606 |
} |
|
1607 |
break; |
|
1608 |
case 5: |
|
1609 |
/* Retune for shorter cable (column 2). */ |
|
1610 |
RTL_W32 (FIFOTMS, 0x20); |
|
1611 |
RTL_W32 (PARA78, PARA78_default); |
|
1612 |
RTL_W32 (PARA7c, PARA7c_default); |
|
1613 |
RTL_W32 (FIFOTMS, 0x00); |
|
1614 |
tp->twist_row = 2; |
|
1615 |
tp->twist_col = 0; |
|
1616 |
tp->twistie = 3; |
|
1617 |
next_tick = HZ / 10; |
|
1618 |
break; |
|
1619 |
||
1620 |
default: |
|
1621 |
/* do nothing */ |
|
1622 |
break; |
|
1623 |
} |
|
1624 |
} |
|
1625 |
#endif /* CONFIG_8139TOO_TUNE_TWISTER */ |
|
1626 |
||
1627 |
static inline void rtl8139_thread_iter (struct net_device *dev, |
|
1628 |
struct rtl8139_private *tp, |
|
1629 |
void __iomem *ioaddr) |
|
1630 |
{
|
|
1631 |
int mii_lpa; |
|
1632 |
||
1633 |
mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA); |
|
1634 |
||
1635 |
if (!tp->mii.force_media && mii_lpa != 0xffff) {
|
|
1636 |
int duplex = (mii_lpa & LPA_100FULL) |
|
1637 |
|| (mii_lpa & 0x01C0) == 0x0040; |
|
1638 |
if (tp->mii.full_duplex != duplex) {
|
|
1639 |
tp->mii.full_duplex = duplex; |
|
1640 |
||
1641 |
if (mii_lpa) {
|
|
1642 |
printk (KERN_INFO |
|
1643 |
"%s: Setting %s-duplex based on MII #%d link" |
|
1644 |
" partner ability of %4.4x.\n", |
|
1645 |
dev->name, |
|
1646 |
tp->mii.full_duplex ? "full" : "half", |
|
1647 |
tp->phys[0], mii_lpa); |
|
1648 |
} else {
|
|
1649 |
printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n", |
|
1650 |
dev->name); |
|
1651 |
} |
|
1652 |
#if 0 |
|
1653 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
1654 |
RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20); |
|
1655 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1656 |
#endif |
|
1657 |
} |
|
1658 |
} |
|
1659 |
||
1660 |
next_tick = HZ * 60; |
|
1661 |
||
1662 |
rtl8139_tune_twister (dev, tp); |
|
1663 |
||
1664 |
DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n",
|
|
1665 |
dev->name, RTL_R16 (NWayLPAR)); |
|
1666 |
DPRINTK ("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n",
|
|
1667 |
dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus)); |
|
1668 |
DPRINTK ("%s: Chip config %2.2x %2.2x.\n",
|
|
1669 |
dev->name, RTL_R8 (Config0), |
|
1670 |
RTL_R8 (Config1)); |
|
1671 |
} |
|
1672 |
||
1673 |
static void rtl8139_thread (struct work_struct *work) |
|
1674 |
{
|
|
1675 |
struct rtl8139_private *tp = |
|
1676 |
container_of(work, struct rtl8139_private, thread.work); |
|
1677 |
struct net_device *dev = tp->mii.dev; |
|
1678 |
unsigned long thr_delay = next_tick; |
|
1679 |
||
1680 |
rtnl_lock(); |
|
1681 |
||
1682 |
if (!netif_running(dev)) |
|
1683 |
goto out_unlock; |
|
1684 |
||
1685 |
if (tp->watchdog_fired) {
|
|
1686 |
tp->watchdog_fired = 0; |
|
1687 |
rtl8139_tx_timeout_task(work); |
|
1688 |
} else |
|
1689 |
rtl8139_thread_iter(dev, tp, tp->mmio_addr); |
|
1690 |
||
1691 |
if (tp->have_thread) |
|
1692 |
schedule_delayed_work(&tp->thread, thr_delay); |
|
1693 |
out_unlock: |
|
1694 |
rtnl_unlock (); |
|
1695 |
} |
|
1696 |
||
1697 |
static void rtl8139_start_thread(struct rtl8139_private *tp) |
|
1698 |
{
|
|
1699 |
tp->twistie = 0; |
|
1700 |
if (tp->chipset == CH_8139_K) |
|
1701 |
tp->twistie = 1; |
|
1702 |
else if (tp->drv_flags & HAS_LNK_CHNG) |
|
1703 |
return; |
|
1704 |
||
1705 |
tp->have_thread = 1; |
|
1706 |
tp->watchdog_fired = 0; |
|
1707 |
||
1708 |
schedule_delayed_work(&tp->thread, next_tick); |
|
1709 |
} |
|
1710 |
||
1711 |
static inline void rtl8139_tx_clear (struct rtl8139_private *tp) |
|
1712 |
{
|
|
1713 |
tp->cur_tx = 0; |
|
1714 |
tp->dirty_tx = 0; |
|
1715 |
||
1716 |
/* XXX account for unsent Tx packets in tp->stats.tx_dropped */ |
|
1717 |
} |
|
1718 |
||
1719 |
static void rtl8139_tx_timeout_task (struct work_struct *work) |
|
1720 |
{
|
|
1721 |
struct rtl8139_private *tp = |
|
1722 |
container_of(work, struct rtl8139_private, thread.work); |
|
1723 |
struct net_device *dev = tp->mii.dev; |
|
1724 |
void __iomem *ioaddr = tp->mmio_addr; |
|
1725 |
int i; |
|
1726 |
u8 tmp8; |
|
1727 |
||
1728 |
printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x " |
|
1729 |
"media %2.2x.\n", dev->name, RTL_R8 (ChipCmd), |
|
1730 |
RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus)); |
|
1731 |
/* Emit info to figure out what went wrong. */ |
|
1732 |
printk (KERN_DEBUG "%s: Tx queue start entry %ld dirty entry %ld.\n", |
|
1733 |
dev->name, tp->cur_tx, tp->dirty_tx); |
|
1734 |
for (i = 0; i < NUM_TX_DESC; i++) |
|
1735 |
printk (KERN_DEBUG "%s: Tx descriptor %d is %8.8lx.%s\n", |
|
1736 |
dev->name, i, RTL_R32 (TxStatus0 + (i * 4)), |
|
1737 |
i == tp->dirty_tx % NUM_TX_DESC ? |
|
1738 |
" (queue head)" : ""); |
|
1739 |
||
1740 |
tp->xstats.tx_timeouts++; |
|
1741 |
||
1742 |
/* disable Tx ASAP, if not already */ |
|
1743 |
tmp8 = RTL_R8 (ChipCmd); |
|
1744 |
if (tmp8 & CmdTxEnb) |
|
1745 |
RTL_W8 (ChipCmd, CmdRxEnb); |
|
1746 |
||
1747 |
if (tp->ecdev) {
|
|
1748 |
rtl8139_tx_clear (tp); |
|
1749 |
rtl8139_hw_start (dev); |
|
1750 |
} |
|
1751 |
else {
|
|
1752 |
spin_lock_bh(&tp->rx_lock); |
|
1753 |
/* Disable interrupts by clearing the interrupt mask. */ |
|
1754 |
RTL_W16 (IntrMask, 0x0000); |
|
1755 |
||
1756 |
/* Stop a shared interrupt from scavenging while we are. */ |
|
1757 |
spin_lock_irq(&tp->lock); |
|
1758 |
rtl8139_tx_clear (tp); |
|
1759 |
spin_unlock_irq(&tp->lock); |
|
1760 |
||
1761 |
/* ...and finally, reset everything */ |
|
1762 |
if (netif_running(dev)) {
|
|
1763 |
rtl8139_hw_start (dev); |
|
1764 |
netif_wake_queue (dev); |
|
1765 |
} |
|
1766 |
spin_unlock_bh(&tp->rx_lock); |
|
1767 |
} |
|
1768 |
} |
|
1769 |
||
1770 |
static void rtl8139_tx_timeout (struct net_device *dev) |
|
1771 |
{
|
|
1772 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
1773 |
||
1774 |
tp->watchdog_fired = 1; |
|
1775 |
if (!tp->ecdev && !tp->have_thread) {
|
|
1776 |
INIT_DELAYED_WORK(&tp->thread, rtl8139_thread); |
|
1777 |
schedule_delayed_work(&tp->thread, next_tick); |
|
1778 |
} |
|
1779 |
} |
|
1780 |
||
1781 |
static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev) |
|
1782 |
{
|
|
1783 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
1784 |
void __iomem *ioaddr = tp->mmio_addr; |
|
1785 |
unsigned int entry; |
|
1786 |
unsigned int len = skb->len; |
|
1787 |
unsigned long flags; |
|
1788 |
||
1789 |
/* Calculate the next Tx descriptor entry. */ |
|
1790 |
entry = tp->cur_tx % NUM_TX_DESC; |
|
1791 |
||
1792 |
/* Note: the chip doesn't have auto-pad! */ |
|
1793 |
if (likely(len < TX_BUF_SIZE)) {
|
|
1794 |
if (len < ETH_ZLEN) |
|
1795 |
memset(tp->tx_buf[entry], 0, ETH_ZLEN); |
|
1796 |
skb_copy_and_csum_dev(skb, tp->tx_buf[entry]); |
|
1797 |
if (!tp->ecdev) dev_kfree_skb(skb); |
|
1798 |
} else {
|
|
1799 |
if (!tp->ecdev) dev_kfree_skb(skb); |
|
1800 |
tp->stats.tx_dropped++; |
|
1801 |
return 0; |
|
1802 |
} |
|
1803 |
||
1804 |
if (tp->ecdev) {
|
|
1805 |
RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), |
|
1806 |
tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); |
|
1807 |
||
1808 |
dev->trans_start = jiffies; |
|
1809 |
||
1810 |
tp->cur_tx++; |
|
1811 |
wmb(); |
|
1812 |
} |
|
1813 |
else {
|
|
1814 |
spin_lock_irqsave(&tp->lock, flags); |
|
1815 |
||
1816 |
RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), |
|
1817 |
tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); |
|
1818 |
||
1819 |
dev->trans_start = jiffies; |
|
1820 |
||
1821 |
tp->cur_tx++; |
|
1822 |
wmb(); |
|
1823 |
||
1824 |
if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx) |
|
1825 |
netif_stop_queue (dev); |
|
1826 |
spin_unlock_irqrestore(&tp->lock, flags); |
|
1827 |
||
1828 |
if (netif_msg_tx_queued(tp)) |
|
1829 |
printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n", |
|
1830 |
dev->name, len, entry); |
|
1831 |
} |
|
1832 |
||
1833 |
return 0; |
|
1834 |
} |
|
1835 |
||
1836 |
||
1837 |
static void rtl8139_tx_interrupt (struct net_device *dev, |
|
1838 |
struct rtl8139_private *tp, |
|
1839 |
void __iomem *ioaddr) |
|
1840 |
{
|
|
1841 |
unsigned long dirty_tx, tx_left; |
|
1842 |
||
1843 |
assert (dev != NULL); |
|
1844 |
assert (ioaddr != NULL); |
|
1845 |
||
1846 |
dirty_tx = tp->dirty_tx; |
|
1847 |
tx_left = tp->cur_tx - dirty_tx; |
|
1848 |
while (tx_left > 0) {
|
|
1849 |
int entry = dirty_tx % NUM_TX_DESC; |
|
1850 |
int txstatus; |
|
1851 |
||
1852 |
txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32))); |
|
1853 |
||
1854 |
if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted))) |
|
1855 |
break; /* It still hasn't been Txed */ |
|
1856 |
||
1857 |
/* Note: TxCarrierLost is always asserted at 100mbps. */ |
|
1858 |
if (txstatus & (TxOutOfWindow | TxAborted)) {
|
|
1859 |
/* There was an major error, log it. */ |
|
1860 |
if (netif_msg_tx_err(tp)) |
|
1861 |
printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n", |
|
1862 |
dev->name, txstatus); |
|
1863 |
tp->stats.tx_errors++; |
|
1864 |
if (txstatus & TxAborted) {
|
|
1865 |
tp->stats.tx_aborted_errors++; |
|
1866 |
RTL_W32 (TxConfig, TxClearAbt); |
|
1867 |
RTL_W16 (IntrStatus, TxErr); |
|
1868 |
wmb(); |
|
1869 |
} |
|
1870 |
if (txstatus & TxCarrierLost) |
|
1871 |
tp->stats.tx_carrier_errors++; |
|
1872 |
if (txstatus & TxOutOfWindow) |
|
1873 |
tp->stats.tx_window_errors++; |
|
1874 |
} else {
|
|
1875 |
if (txstatus & TxUnderrun) {
|
|
1876 |
/* Add 64 to the Tx FIFO threshold. */ |
|
1877 |
if (tp->tx_flag < 0x00300000) |
|
1878 |
tp->tx_flag += 0x00020000; |
|
1879 |
tp->stats.tx_fifo_errors++; |
|
1880 |
} |
|
1881 |
tp->stats.collisions += (txstatus >> 24) & 15; |
|
1882 |
tp->stats.tx_bytes += txstatus & 0x7ff; |
|
1883 |
tp->stats.tx_packets++; |
|
1884 |
} |
|
1885 |
||
1886 |
dirty_tx++; |
|
1887 |
tx_left--; |
|
1888 |
} |
|
1889 |
||
1890 |
#ifndef RTL8139_NDEBUG |
|
1891 |
if (!tp->ecdev && tp->cur_tx - dirty_tx > NUM_TX_DESC) {
|
|
1892 |
printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n", |
|
1893 |
dev->name, dirty_tx, tp->cur_tx); |
|
1894 |
dirty_tx += NUM_TX_DESC; |
|
1895 |
} |
|
1896 |
#endif /* RTL8139_NDEBUG */ |
|
1897 |
||
1898 |
/* only wake the queue if we did work, and the queue is stopped */ |
|
1899 |
if (tp->dirty_tx != dirty_tx) {
|
|
1900 |
tp->dirty_tx = dirty_tx; |
|
1901 |
mb(); |
|
1902 |
if (!tp->ecdev) netif_wake_queue (dev); |
|
1903 |
} |
|
1904 |
} |
|
1905 |
||
1906 |
||
1907 |
/* TODO: clean this up! Rx reset need not be this intensive */ |
|
1908 |
static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, |
|
1909 |
struct rtl8139_private *tp, void __iomem *ioaddr) |
|
1910 |
{
|
|
1911 |
u8 tmp8; |
|
1912 |
#ifdef CONFIG_8139_OLD_RX_RESET |
|
1913 |
int tmp_work; |
|
1914 |
#endif |
|
1915 |
||
1916 |
if (netif_msg_rx_err (tp)) |
|
1917 |
printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n", |
|
1918 |
dev->name, rx_status); |
|
1919 |
tp->stats.rx_errors++; |
|
1920 |
if (!(rx_status & RxStatusOK)) {
|
|
1921 |
if (rx_status & RxTooLong) {
|
|
1922 |
DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
|
|
1923 |
dev->name, rx_status); |
|
1924 |
/* A.C.: The chip hangs here. */ |
|
1925 |
} |
|
1926 |
if (rx_status & (RxBadSymbol | RxBadAlign)) |
|
1927 |
tp->stats.rx_frame_errors++; |
|
1928 |
if (rx_status & (RxRunt | RxTooLong)) |
|
1929 |
tp->stats.rx_length_errors++; |
|
1930 |
if (rx_status & RxCRCErr) |
|
1931 |
tp->stats.rx_crc_errors++; |
|
1932 |
} else {
|
|
1933 |
tp->xstats.rx_lost_in_ring++; |
|
1934 |
} |
|
1935 |
||
1936 |
#ifndef CONFIG_8139_OLD_RX_RESET |
|
1937 |
tmp8 = RTL_R8 (ChipCmd); |
|
1938 |
RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb); |
|
1939 |
RTL_W8 (ChipCmd, tmp8); |
|
1940 |
RTL_W32 (RxConfig, tp->rx_config); |
|
1941 |
tp->cur_rx = 0; |
|
1942 |
#else |
|
1943 |
/* Reset the receiver, based on RealTek recommendation. (Bug?) */ |
|
1944 |
||
1945 |
/* disable receive */ |
|
1946 |
RTL_W8_F (ChipCmd, CmdTxEnb); |
|
1947 |
tmp_work = 200; |
|
1948 |
while (--tmp_work > 0) {
|
|
1949 |
udelay(1); |
|
1950 |
tmp8 = RTL_R8 (ChipCmd); |
|
1951 |
if (!(tmp8 & CmdRxEnb)) |
|
1952 |
break; |
|
1953 |
} |
|
1954 |
if (tmp_work <= 0) |
|
1955 |
printk (KERN_WARNING PFX "rx stop wait too long\n"); |
|
1956 |
/* restart receive */ |
|
1957 |
tmp_work = 200; |
|
1958 |
while (--tmp_work > 0) {
|
|
1959 |
RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
1960 |
udelay(1); |
|
1961 |
tmp8 = RTL_R8 (ChipCmd); |
|
1962 |
if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb)) |
|
1963 |
break; |
|
1964 |
} |
|
1965 |
if (tmp_work <= 0) |
|
1966 |
printk (KERN_WARNING PFX "tx/rx enable wait too long\n"); |
|
1967 |
||
1968 |
/* and reinitialize all rx related registers */ |
|
1969 |
RTL_W8_F (Cfg9346, Cfg9346_Unlock); |
|
1970 |
/* Must enable Tx/Rx before setting transfer thresholds! */ |
|
1971 |
RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
1972 |
||
1973 |
tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; |
|
1974 |
RTL_W32 (RxConfig, tp->rx_config); |
|
1975 |
tp->cur_rx = 0; |
|
1976 |
||
1977 |
DPRINTK("init buffer addresses\n");
|
|
1978 |
||
1979 |
/* Lock Config[01234] and BMCR register writes */ |
|
1980 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1981 |
||
1982 |
/* init Rx ring buffer DMA address */ |
|
1983 |
RTL_W32_F (RxBuf, tp->rx_ring_dma); |
|
1984 |
||
1985 |
/* A.C.: Reset the multicast list. */ |
|
1986 |
__set_rx_mode (dev); |
|
1987 |
#endif |
|
1988 |
} |
|
1989 |
||
1990 |
#if RX_BUF_IDX == 3 |
|
1991 |
static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring, |
|
1992 |
u32 offset, unsigned int size) |
|
1993 |
{
|
|
1994 |
u32 left = RX_BUF_LEN - offset; |
|
1995 |
||
1996 |
if (size > left) {
|
|
1997 |
skb_copy_to_linear_data(skb, ring + offset, left); |
|
1998 |
skb_copy_to_linear_data_offset(skb, left, ring, size - left); |
|
1999 |
} else |
|
2000 |
skb_copy_to_linear_data(skb, ring + offset, size); |
|
2001 |
} |
|
2002 |
#endif |
|
2003 |
||
2004 |
static void rtl8139_isr_ack(struct rtl8139_private *tp) |
|
2005 |
{
|
|
2006 |
void __iomem *ioaddr = tp->mmio_addr; |
|
2007 |
u16 status; |
|
2008 |
||
2009 |
status = RTL_R16 (IntrStatus) & RxAckBits; |
|
2010 |
||
2011 |
/* Clear out errors and receive interrupts */ |
|
2012 |
if (likely(status != 0)) {
|
|
2013 |
if (unlikely(status & (RxFIFOOver | RxOverflow))) {
|
|
2014 |
tp->stats.rx_errors++; |
|
2015 |
if (status & RxFIFOOver) |
|
2016 |
tp->stats.rx_fifo_errors++; |
|
2017 |
} |
|
2018 |
RTL_W16_F (IntrStatus, RxAckBits); |
|
2019 |
} |
|
2020 |
} |
|
2021 |
||
2022 |
static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp, |
|
2023 |
int budget) |
|
2024 |
{
|
|
2025 |
void __iomem *ioaddr = tp->mmio_addr; |
|
2026 |
int received = 0; |
|
2027 |
unsigned char *rx_ring = tp->rx_ring; |
|
2028 |
unsigned int cur_rx = tp->cur_rx; |
|
2029 |
unsigned int rx_size = 0; |
|
2030 |
||
2031 |
DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
|
|
2032 |
" free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx, |
|
2033 |
RTL_R16 (RxBufAddr), |
|
2034 |
RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); |
|
2035 |
||
2036 |
while ((tp->ecdev || netif_running(dev)) |
|
2037 |
&& received < budget |
|
2038 |
&& (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
|
|
2039 |
u32 ring_offset = cur_rx % RX_BUF_LEN; |
|
2040 |
u32 rx_status; |
|
2041 |
unsigned int pkt_size; |
|
2042 |
struct sk_buff *skb; |
|
2043 |
||
2044 |
rmb(); |
|
2045 |
||
2046 |
/* read size+status of next frame from DMA ring buffer */ |
|
2047 |
rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset)); |
|
2048 |
rx_size = rx_status >> 16; |
|
2049 |
pkt_size = rx_size - 4; |
|
2050 |
||
2051 |
if (!tp->ecdev) {
|
|
2052 |
if (netif_msg_rx_status(tp)) |
|
2053 |
printk(KERN_DEBUG "%s: rtl8139_rx() status %4.4x, size %4.4x," |
|
2054 |
" cur %4.4x.\n", dev->name, rx_status, |
|
2055 |
rx_size, cur_rx); |
|
2056 |
} |
|
2057 |
#if RTL8139_DEBUG > 2 |
|
2058 |
{
|
|
2059 |
int i; |
|
2060 |
DPRINTK ("%s: Frame contents ", dev->name);
|
|
2061 |
for (i = 0; i < 70; i++) |
|
2062 |
printk (" %2.2x",
|
|
2063 |
rx_ring[ring_offset + i]); |
|
2064 |
printk (".\n");
|
|
2065 |
} |
|
2066 |
#endif |
|
2067 |
||
2068 |
/* Packet copy from FIFO still in progress. |
|
2069 |
* Theoretically, this should never happen |
|
2070 |
* since EarlyRx is disabled. |
|
2071 |
*/ |
|
2072 |
if (unlikely(rx_size == 0xfff0)) {
|
|
2073 |
if (!tp->fifo_copy_timeout) |
|
2074 |
tp->fifo_copy_timeout = jiffies + 2; |
|
2075 |
else if (time_after(jiffies, tp->fifo_copy_timeout)) {
|
|
2076 |
DPRINTK ("%s: hung FIFO. Reset.", dev->name);
|
|
2077 |
rx_size = 0; |
|
2078 |
goto no_early_rx; |
|
2079 |
} |
|
2080 |
if (netif_msg_intr(tp)) {
|
|
2081 |
printk(KERN_DEBUG "%s: fifo copy in progress.", |
|
2082 |
dev->name); |
|
2083 |
} |
|
2084 |
tp->xstats.early_rx++; |
|
2085 |
break; |
|
2086 |
} |
|
2087 |
||
2088 |
no_early_rx: |
|
2089 |
tp->fifo_copy_timeout = 0; |
|
2090 |
||
2091 |
/* If Rx err or invalid rx_size/rx_status received |
|
2092 |
* (which happens if we get lost in the ring), |
|
2093 |
* Rx process gets reset, so we abort any further |
|
2094 |
* Rx processing. |
|
2095 |
*/ |
|
2096 |
if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) || |
|
2097 |
(rx_size < 8) || |
|
2098 |
(!(rx_status & RxStatusOK)))) {
|
|
2099 |
rtl8139_rx_err (rx_status, dev, tp, ioaddr); |
|
2100 |
received = -1; |
|
2101 |
goto out; |
|
2102 |
} |
|
2103 |
||
2104 |
if (tp->ecdev) {
|
|
2105 |
ecdev_receive(tp->ecdev, |
|
2106 |
&rx_ring[ring_offset + 4], pkt_size); |
|
2107 |
dev->last_rx = jiffies; |
|
2108 |
tp->stats.rx_bytes += pkt_size; |
|
2109 |
tp->stats.rx_packets++; |
|
2110 |
} |
|
2111 |
else {
|
|
2112 |
||
2113 |
/* Malloc up new buffer, compatible with net-2e. */ |
|
2114 |
/* Omit the four octet CRC from the length. */ |
|
2115 |
||
2116 |
skb = dev_alloc_skb (pkt_size + 2); |
|
2117 |
if (likely(skb)) {
|
|
2118 |
skb_reserve (skb, 2); /* 16 byte align the IP fields. */ |
|
2119 |
#if RX_BUF_IDX == 3 |
|
2120 |
wrap_copy(skb, rx_ring, ring_offset+4, pkt_size); |
|
2121 |
#else |
|
2122 |
skb_copy_to_linear_data (skb, &rx_ring[ring_offset + 4], pkt_size); |
|
2123 |
#endif |
|
2124 |
skb_put (skb, pkt_size); |
|
2125 |
||
2126 |
skb->protocol = eth_type_trans (skb, dev); |
|
2127 |
||
2128 |
dev->last_rx = jiffies; |
|
2129 |
tp->stats.rx_bytes += pkt_size; |
|
2130 |
tp->stats.rx_packets++; |
|
2131 |
||
2132 |
netif_receive_skb (skb); |
|
2133 |
} else {
|
|
2134 |
if (net_ratelimit()) |
|
2135 |
printk (KERN_WARNING |
|
2136 |
"%s: Memory squeeze, dropping packet.\n", |
|
2137 |
dev->name); |
|
2138 |
tp->stats.rx_dropped++; |
|
2139 |
} |
|
2140 |
} |
|
2141 |
received++; |
|
2142 |
||
2143 |
cur_rx = (cur_rx + rx_size + 4 + 3) & ~3; |
|
2144 |
RTL_W16 (RxBufPtr, (u16) (cur_rx - 16)); |
|
2145 |
||
2146 |
rtl8139_isr_ack(tp); |
|
2147 |
} |
|
2148 |
||
2149 |
if (unlikely(!received || rx_size == 0xfff0)) |
|
2150 |
rtl8139_isr_ack(tp); |
|
2151 |
||
2152 |
#if RTL8139_DEBUG > 1 |
|
2153 |
DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
|
|
2154 |
" free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, |
|
2155 |
RTL_R16 (RxBufAddr), |
|
2156 |
RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); |
|
2157 |
#endif |
|
2158 |
||
2159 |
tp->cur_rx = cur_rx; |
|
2160 |
||
2161 |
/* |
|
2162 |
* The receive buffer should be mostly empty. |
|
2163 |
* Tell NAPI to reenable the Rx irq. |
|
2164 |
*/ |
|
2165 |
if (tp->fifo_copy_timeout) |
|
2166 |
received = budget; |
|
2167 |
||
2168 |
out: |
|
2169 |
return received; |
|
2170 |
} |
|
2171 |
||
2172 |
||
2173 |
static void rtl8139_weird_interrupt (struct net_device *dev, |
|
2174 |
struct rtl8139_private *tp, |
|
2175 |
void __iomem *ioaddr, |
|
2176 |
int status, int link_changed) |
|
2177 |
{
|
|
2178 |
DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n",
|
|
2179 |
dev->name, status); |
|
2180 |
||
2181 |
assert (dev != NULL); |
|
2182 |
assert (tp != NULL); |
|
2183 |
assert (ioaddr != NULL); |
|
2184 |
||
2185 |
/* Update the error count. */ |
|
2186 |
tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2187 |
RTL_W32 (RxMissed, 0); |
|
2188 |
||
2189 |
if ((status & RxUnderrun) && link_changed && |
|
2190 |
(tp->drv_flags & HAS_LNK_CHNG)) {
|
|
2191 |
rtl_check_media(dev, 0); |
|
2192 |
status &= ~RxUnderrun; |
|
2193 |
} |
|
2194 |
||
2195 |
if (status & (RxUnderrun | RxErr)) |
|
2196 |
tp->stats.rx_errors++; |
|
2197 |
||
2198 |
if (status & PCSTimeout) |
|
2199 |
tp->stats.rx_length_errors++; |
|
2200 |
if (status & RxUnderrun) |
|
2201 |
tp->stats.rx_fifo_errors++; |
|
2202 |
if (status & PCIErr) {
|
|
2203 |
u16 pci_cmd_status; |
|
2204 |
pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status); |
|
2205 |
pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status); |
|
2206 |
||
2207 |
printk (KERN_ERR "%s: PCI Bus error %4.4x.\n", |
|
2208 |
dev->name, pci_cmd_status); |
|
2209 |
} |
|
2210 |
} |
|
2211 |
||
2212 |
static int rtl8139_poll(struct napi_struct *napi, int budget) |
|
2213 |
{
|
|
2214 |
struct rtl8139_private *tp = container_of(napi, struct rtl8139_private, napi); |
|
2215 |
struct net_device *dev = tp->dev; |
|
2216 |
void __iomem *ioaddr = tp->mmio_addr; |
|
2217 |
int work_done; |
|
2218 |
||
2219 |
spin_lock(&tp->rx_lock); |
|
2220 |
work_done = 0; |
|
2221 |
if (likely(RTL_R16(IntrStatus) & RxAckBits)) |
|
2222 |
work_done += rtl8139_rx(dev, tp, budget); |
|
2223 |
||
2224 |
if (work_done < budget) {
|
|
2225 |
unsigned long flags; |
|
2226 |
/* |
|
2227 |
* Order is important since data can get interrupted |
|
2228 |
* again when we think we are done. |
|
2229 |
*/ |
|
2230 |
spin_lock_irqsave(&tp->lock, flags); |
|
2231 |
RTL_W16_F(IntrMask, rtl8139_intr_mask); |
|
2232 |
__netif_rx_complete(dev, napi); |
|
2233 |
spin_unlock_irqrestore(&tp->lock, flags); |
|
2234 |
} |
|
2235 |
spin_unlock(&tp->rx_lock); |
|
2236 |
||
2237 |
return work_done; |
|
2238 |
} |
|
2239 |
||
2240 |
void ec_poll(struct net_device *dev) |
|
2241 |
{
|
|
2242 |
rtl8139_interrupt(0, dev); |
|
2243 |
} |
|
2244 |
||
2245 |
/* The interrupt handler does all of the Rx thread work and cleans up |
|
2246 |
after the Tx thread. */ |
|
2247 |
static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance) |
|
2248 |
{
|
|
2249 |
struct net_device *dev = (struct net_device *) dev_instance; |
|
2250 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
2251 |
void __iomem *ioaddr = tp->mmio_addr; |
|
2252 |
u16 status, ackstat; |
|
2253 |
int link_changed = 0; /* avoid bogus "uninit" warning */ |
|
2254 |
int handled = 0; |
|
2255 |
||
2256 |
if (tp->ecdev) {
|
|
2257 |
status = RTL_R16 (IntrStatus); |
|
2258 |
} |
|
2259 |
else {
|
|
2260 |
spin_lock (&tp->lock); |
|
2261 |
status = RTL_R16 (IntrStatus); |
|
2262 |
||
2263 |
/* shared irq? */ |
|
2264 |
if (unlikely((status & rtl8139_intr_mask) == 0)) |
|
2265 |
goto out; |
|
2266 |
} |
|
2267 |
||
2268 |
handled = 1; |
|
2269 |
||
2270 |
/* h/w no longer present (hotplug?) or major error, bail */ |
|
2271 |
if (unlikely(status == 0xFFFF)) |
|
2272 |
goto out; |
|
2273 |
||
2274 |
if (!tp->ecdev) {
|
|
2275 |
/* close possible race's with dev_close */ |
|
2276 |
if (unlikely(!netif_running(dev))) {
|
|
2277 |
RTL_W16 (IntrMask, 0); |
|
2278 |
goto out; |
|
2279 |
} |
|
2280 |
} |
|
2281 |
||
2282 |
/* Acknowledge all of the current interrupt sources ASAP, but |
|
2283 |
an first get an additional status bit from CSCR. */ |
|
2284 |
if (unlikely(status & RxUnderrun)) |
|
2285 |
link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit; |
|
2286 |
||
2287 |
ackstat = status & ~(RxAckBits | TxErr); |
|
2288 |
if (ackstat) |
|
2289 |
RTL_W16 (IntrStatus, ackstat); |
|
2290 |
||
2291 |
/* Receive packets are processed by poll routine. |
|
2292 |
If not running start it now. */ |
|
2293 |
if (status & RxAckBits){
|
|
2294 |
if (tp->ecdev) {
|
|
2295 |
/* EtherCAT device: Just receive all frames */ |
|
2296 |
rtl8139_rx(dev, tp, 100); // FIXME |
|
2297 |
} else {
|
|
2298 |
/* Mark for polling */ |
|
2299 |
if (netif_rx_schedule_prep(dev, &tp->napi)) {
|
|
2300 |
RTL_W16_F (IntrMask, rtl8139_norx_intr_mask); |
|
2301 |
__netif_rx_schedule(dev, &tp->napi); |
|
2302 |
} |
|
2303 |
} |
|
2304 |
} |
|
2305 |
||
2306 |
/* Check uncommon events with one test. */ |
|
2307 |
if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr))) |
|
2308 |
rtl8139_weird_interrupt (dev, tp, ioaddr, |
|
2309 |
status, link_changed); |
|
2310 |
||
2311 |
if (status & (TxOK | TxErr)) {
|
|
2312 |
rtl8139_tx_interrupt (dev, tp, ioaddr); |
|
2313 |
if (status & TxErr) |
|
2314 |
RTL_W16 (IntrStatus, TxErr); |
|
2315 |
} |
|
2316 |
out: |
|
2317 |
if (!tp->ecdev) spin_unlock (&tp->lock); |
|
2318 |
||
2319 |
DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n",
|
|
2320 |
dev->name, RTL_R16 (IntrStatus)); |
|
2321 |
return IRQ_RETVAL(handled); |
|
2322 |
} |
|
2323 |
||
2324 |
#ifdef CONFIG_NET_POLL_CONTROLLER |
|
2325 |
/* |
|
2326 |
* Polling receive - used by netconsole and other diagnostic tools |
|
2327 |
* to allow network i/o with interrupts disabled. |
|
2328 |
*/ |
|
2329 |
static void rtl8139_poll_controller(struct net_device *dev) |
|
2330 |
{
|
|
2331 |
disable_irq(dev->irq); |
|
2332 |
rtl8139_interrupt(dev->irq, dev); |
|
2333 |
enable_irq(dev->irq); |
|
2334 |
} |
|
2335 |
#endif |
|
2336 |
||
2337 |
static int rtl8139_close (struct net_device *dev) |
|
2338 |
{
|
|
2339 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
2340 |
void __iomem *ioaddr = tp->mmio_addr; |
|
2341 |
unsigned long flags; |
|
2342 |
||
2343 |
if (tp->ecdev) {
|
|
2344 |
/* Stop the chip's Tx and Rx DMA processes. */ |
|
2345 |
RTL_W8 (ChipCmd, 0); |
|
2346 |
||
2347 |
/* Disable interrupts by clearing the interrupt mask. */ |
|
2348 |
RTL_W16 (IntrMask, 0); |
|
2349 |
||
2350 |
/* Update the error counts. */ |
|
2351 |
tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2352 |
RTL_W32 (RxMissed, 0); |
|
2353 |
} else {
|
|
2354 |
netif_stop_queue (dev); |
|
2355 |
napi_disable(&tp->napi); |
|
2356 |
||
2357 |
if (netif_msg_ifdown(tp)) |
|
2358 |
printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n", |
|
2359 |
dev->name, RTL_R16 (IntrStatus)); |
|
2360 |
||
2361 |
spin_lock_irqsave (&tp->lock, flags); |
|
2362 |
||
2363 |
/* Stop the chip's Tx and Rx DMA processes. */ |
|
2364 |
RTL_W8 (ChipCmd, 0); |
|
2365 |
||
2366 |
/* Disable interrupts by clearing the interrupt mask. */ |
|
2367 |
RTL_W16 (IntrMask, 0); |
|
2368 |
||
2369 |
/* Update the error counts. */ |
|
2370 |
tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2371 |
RTL_W32 (RxMissed, 0); |
|
2372 |
||
2373 |
spin_unlock_irqrestore (&tp->lock, flags); |
|
2374 |
||
2375 |
synchronize_irq (dev->irq); /* racy, but that's ok here */ |
|
2376 |
free_irq (dev->irq, dev); |
|
2377 |
} |
|
2378 |
||
2379 |
rtl8139_tx_clear (tp); |
|
2380 |
||
2381 |
dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN, |
|
2382 |
tp->rx_ring, tp->rx_ring_dma); |
|
2383 |
dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN, |
|
2384 |
tp->tx_bufs, tp->tx_bufs_dma); |
|
2385 |
tp->rx_ring = NULL; |
|
2386 |
tp->tx_bufs = NULL; |
|
2387 |
||
2388 |
/* Green! Put the chip in low-power mode. */ |
|
2389 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
2390 |
||
2391 |
if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
2392 |
RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ |
|
2393 |
||
2394 |
return 0; |
|
2395 |
} |
|
2396 |
||
2397 |
||
2398 |
/* Get the ethtool Wake-on-LAN settings. Assumes that wol points to |
|
2399 |
kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
|
|
2400 |
other threads or interrupts aren't messing with the 8139. */ |
|
2401 |
static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
|
2402 |
{
|
|
2403 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2404 |
void __iomem *ioaddr = np->mmio_addr; |
|
2405 |
||
2406 |
spin_lock_irq(&np->lock); |
|
2407 |
if (rtl_chip_info[np->chipset].flags & HasLWake) {
|
|
2408 |
u8 cfg3 = RTL_R8 (Config3); |
|
2409 |
u8 cfg5 = RTL_R8 (Config5); |
|
2410 |
||
2411 |
wol->supported = WAKE_PHY | WAKE_MAGIC |
|
2412 |
| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST; |
|
2413 |
||
2414 |
wol->wolopts = 0; |
|
2415 |
if (cfg3 & Cfg3_LinkUp) |
|
2416 |
wol->wolopts |= WAKE_PHY; |
|
2417 |
if (cfg3 & Cfg3_Magic) |
|
2418 |
wol->wolopts |= WAKE_MAGIC; |
|
2419 |
/* (KON)FIXME: See how netdev_set_wol() handles the |
|
2420 |
following constants. */ |
|
2421 |
if (cfg5 & Cfg5_UWF) |
|
2422 |
wol->wolopts |= WAKE_UCAST; |
|
2423 |
if (cfg5 & Cfg5_MWF) |
|
2424 |
wol->wolopts |= WAKE_MCAST; |
|
2425 |
if (cfg5 & Cfg5_BWF) |
|
2426 |
wol->wolopts |= WAKE_BCAST; |
|
2427 |
} |
|
2428 |
spin_unlock_irq(&np->lock); |
|
2429 |
} |
|
2430 |
||
2431 |
||
2432 |
/* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes |
|
2433 |
that wol points to kernel memory and other threads or interrupts |
|
2434 |
aren't messing with the 8139. */ |
|
2435 |
static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
|
2436 |
{
|
|
2437 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2438 |
void __iomem *ioaddr = np->mmio_addr; |
|
2439 |
u32 support; |
|
2440 |
u8 cfg3, cfg5; |
|
2441 |
||
2442 |
support = ((rtl_chip_info[np->chipset].flags & HasLWake) |
|
2443 |
? (WAKE_PHY | WAKE_MAGIC |
|
2444 |
| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST) |
|
2445 |
: 0); |
|
2446 |
if (wol->wolopts & ~support) |
|
2447 |
return -EINVAL; |
|
2448 |
||
2449 |
spin_lock_irq(&np->lock); |
|
2450 |
cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic); |
|
2451 |
if (wol->wolopts & WAKE_PHY) |
|
2452 |
cfg3 |= Cfg3_LinkUp; |
|
2453 |
if (wol->wolopts & WAKE_MAGIC) |
|
2454 |
cfg3 |= Cfg3_Magic; |
|
2455 |
RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
2456 |
RTL_W8 (Config3, cfg3); |
|
2457 |
RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
2458 |
||
2459 |
cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); |
|
2460 |
/* (KON)FIXME: These are untested. We may have to set the |
|
2461 |
CRC0, Wakeup0 and LSBCRC0 registers too, but I have no |
|
2462 |
documentation. */ |
|
2463 |
if (wol->wolopts & WAKE_UCAST) |
|
2464 |
cfg5 |= Cfg5_UWF; |
|
2465 |
if (wol->wolopts & WAKE_MCAST) |
|
2466 |
cfg5 |= Cfg5_MWF; |
|
2467 |
if (wol->wolopts & WAKE_BCAST) |
|
2468 |
cfg5 |= Cfg5_BWF; |
|
2469 |
RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ |
|
2470 |
spin_unlock_irq(&np->lock); |
|
2471 |
||
2472 |
return 0; |
|
2473 |
} |
|
2474 |
||
2475 |
static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
|
2476 |
{
|
|
2477 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2478 |
strcpy(info->driver, DRV_NAME); |
|
2479 |
strcpy(info->version, DRV_VERSION); |
|
2480 |
strcpy(info->bus_info, pci_name(np->pci_dev)); |
|
2481 |
info->regdump_len = np->regs_len; |
|
2482 |
} |
|
2483 |
||
2484 |
static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
|
2485 |
{
|
|
2486 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2487 |
spin_lock_irq(&np->lock); |
|
2488 |
mii_ethtool_gset(&np->mii, cmd); |
|
2489 |
spin_unlock_irq(&np->lock); |
|
2490 |
return 0; |
|
2491 |
} |
|
2492 |
||
2493 |
static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
|
2494 |
{
|
|
2495 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2496 |
int rc; |
|
2497 |
spin_lock_irq(&np->lock); |
|
2498 |
rc = mii_ethtool_sset(&np->mii, cmd); |
|
2499 |
spin_unlock_irq(&np->lock); |
|
2500 |
return rc; |
|
2501 |
} |
|
2502 |
||
2503 |
static int rtl8139_nway_reset(struct net_device *dev) |
|
2504 |
{
|
|
2505 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2506 |
return mii_nway_restart(&np->mii); |
|
2507 |
} |
|
2508 |
||
2509 |
static u32 rtl8139_get_link(struct net_device *dev) |
|
2510 |
{
|
|
2511 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2512 |
return mii_link_ok(&np->mii); |
|
2513 |
} |
|
2514 |
||
2515 |
static u32 rtl8139_get_msglevel(struct net_device *dev) |
|
2516 |
{
|
|
2517 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2518 |
return np->msg_enable; |
|
2519 |
} |
|
2520 |
||
2521 |
static void rtl8139_set_msglevel(struct net_device *dev, u32 datum) |
|
2522 |
{
|
|
2523 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2524 |
np->msg_enable = datum; |
|
2525 |
} |
|
2526 |
||
2527 |
/* TODO: we are too slack to do reg dumping for pio, for now */ |
|
2528 |
#ifdef CONFIG_8139TOO_PIO |
|
2529 |
#define rtl8139_get_regs_len NULL |
|
2530 |
#define rtl8139_get_regs NULL |
|
2531 |
#else |
|
2532 |
static int rtl8139_get_regs_len(struct net_device *dev) |
|
2533 |
{
|
|
2534 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2535 |
return np->regs_len; |
|
2536 |
} |
|
2537 |
||
2538 |
static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf) |
|
2539 |
{
|
|
2540 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2541 |
||
2542 |
regs->version = RTL_REGS_VER; |
|
2543 |
||
2544 |
spin_lock_irq(&np->lock); |
|
2545 |
memcpy_fromio(regbuf, np->mmio_addr, regs->len); |
|
2546 |
spin_unlock_irq(&np->lock); |
|
2547 |
} |
|
2548 |
#endif /* CONFIG_8139TOO_MMIO */ |
|
2549 |
||
2550 |
static int rtl8139_get_sset_count(struct net_device *dev, int sset) |
|
2551 |
{
|
|
2552 |
switch (sset) {
|
|
2553 |
case ETH_SS_STATS: |
|
2554 |
return RTL_NUM_STATS; |
|
2555 |
default: |
|
2556 |
return -EOPNOTSUPP; |
|
2557 |
} |
|
2558 |
} |
|
2559 |
||
2560 |
static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data) |
|
2561 |
{
|
|
2562 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2563 |
||
2564 |
data[0] = np->xstats.early_rx; |
|
2565 |
data[1] = np->xstats.tx_buf_mapped; |
|
2566 |
data[2] = np->xstats.tx_timeouts; |
|
2567 |
data[3] = np->xstats.rx_lost_in_ring; |
|
2568 |
} |
|
2569 |
||
2570 |
static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data) |
|
2571 |
{
|
|
2572 |
memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys)); |
|
2573 |
} |
|
2574 |
||
2575 |
static const struct ethtool_ops rtl8139_ethtool_ops = {
|
|
2576 |
.get_drvinfo = rtl8139_get_drvinfo, |
|
2577 |
.get_settings = rtl8139_get_settings, |
|
2578 |
.set_settings = rtl8139_set_settings, |
|
2579 |
.get_regs_len = rtl8139_get_regs_len, |
|
2580 |
.get_regs = rtl8139_get_regs, |
|
2581 |
.nway_reset = rtl8139_nway_reset, |
|
2582 |
.get_link = rtl8139_get_link, |
|
2583 |
.get_msglevel = rtl8139_get_msglevel, |
|
2584 |
.set_msglevel = rtl8139_set_msglevel, |
|
2585 |
.get_wol = rtl8139_get_wol, |
|
2586 |
.set_wol = rtl8139_set_wol, |
|
2587 |
.get_strings = rtl8139_get_strings, |
|
2588 |
.get_sset_count = rtl8139_get_sset_count, |
|
2589 |
.get_ethtool_stats = rtl8139_get_ethtool_stats, |
|
2590 |
}; |
|
2591 |
||
2592 |
static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
|
2593 |
{
|
|
2594 |
struct rtl8139_private *np = netdev_priv(dev); |
|
2595 |
int rc; |
|
2596 |
||
2597 |
if (np->ecdev || !netif_running(dev)) |
|
2598 |
return -EINVAL; |
|
2599 |
||
2600 |
spin_lock_irq(&np->lock); |
|
2601 |
rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL); |
|
2602 |
spin_unlock_irq(&np->lock); |
|
2603 |
||
2604 |
return rc; |
|
2605 |
} |
|
2606 |
||
2607 |
||
2608 |
static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) |
|
2609 |
{
|
|
2610 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
2611 |
void __iomem *ioaddr = tp->mmio_addr; |
|
2612 |
unsigned long flags; |
|
2613 |
||
2614 |
if (tp->ecdev || netif_running(dev)) {
|
|
2615 |
spin_lock_irqsave (&tp->lock, flags); |
|
2616 |
tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2617 |
RTL_W32 (RxMissed, 0); |
|
2618 |
spin_unlock_irqrestore (&tp->lock, flags); |
|
2619 |
} |
|
2620 |
||
2621 |
return &tp->stats; |
|
2622 |
} |
|
2623 |
||
2624 |
/* Set or clear the multicast filter for this adaptor. |
|
2625 |
This routine is not state sensitive and need not be SMP locked. */ |
|
2626 |
||
2627 |
static void __set_rx_mode (struct net_device *dev) |
|
2628 |
{
|
|
2629 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
2630 |
void __iomem *ioaddr = tp->mmio_addr; |
|
2631 |
u32 mc_filter[2]; /* Multicast hash filter */ |
|
2632 |
int i, rx_mode; |
|
2633 |
u32 tmp; |
|
2634 |
||
2635 |
DPRINTK ("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
|
|
2636 |
dev->name, dev->flags, RTL_R32 (RxConfig)); |
|
2637 |
||
2638 |
/* Note: do not reorder, GCC is clever about common statements. */ |
|
2639 |
if (dev->flags & IFF_PROMISC) {
|
|
2640 |
rx_mode = |
|
2641 |
AcceptBroadcast | AcceptMulticast | AcceptMyPhys | |
|
2642 |
AcceptAllPhys; |
|
2643 |
mc_filter[1] = mc_filter[0] = 0xffffffff; |
|
2644 |
} else if ((dev->mc_count > multicast_filter_limit) |
|
2645 |
|| (dev->flags & IFF_ALLMULTI)) {
|
|
2646 |
/* Too many to filter perfectly -- accept all multicasts. */ |
|
2647 |
rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; |
|
2648 |
mc_filter[1] = mc_filter[0] = 0xffffffff; |
|
2649 |
} else {
|
|
2650 |
struct dev_mc_list *mclist; |
|
2651 |
rx_mode = AcceptBroadcast | AcceptMyPhys; |
|
2652 |
mc_filter[1] = mc_filter[0] = 0; |
|
2653 |
for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; |
|
2654 |
i++, mclist = mclist->next) {
|
|
2655 |
int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; |
|
2656 |
||
2657 |
mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); |
|
2658 |
rx_mode |= AcceptMulticast; |
|
2659 |
} |
|
2660 |
} |
|
2661 |
||
2662 |
/* We can safely update without stopping the chip. */ |
|
2663 |
tmp = rtl8139_rx_config | rx_mode; |
|
2664 |
if (tp->rx_config != tmp) {
|
|
2665 |
RTL_W32_F (RxConfig, tmp); |
|
2666 |
tp->rx_config = tmp; |
|
2667 |
} |
|
2668 |
RTL_W32_F (MAR0 + 0, mc_filter[0]); |
|
2669 |
RTL_W32_F (MAR0 + 4, mc_filter[1]); |
|
2670 |
} |
|
2671 |
||
2672 |
static void rtl8139_set_rx_mode (struct net_device *dev) |
|
2673 |
{
|
|
2674 |
unsigned long flags; |
|
2675 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
2676 |
||
2677 |
spin_lock_irqsave (&tp->lock, flags); |
|
2678 |
__set_rx_mode(dev); |
|
2679 |
spin_unlock_irqrestore (&tp->lock, flags); |
|
2680 |
} |
|
2681 |
||
2682 |
#ifdef CONFIG_PM |
|
2683 |
||
2684 |
static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state) |
|
2685 |
{
|
|
2686 |
struct net_device *dev = pci_get_drvdata (pdev); |
|
2687 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
2688 |
void __iomem *ioaddr = tp->mmio_addr; |
|
2689 |
unsigned long flags; |
|
2690 |
||
2691 |
pci_save_state (pdev); |
|
2692 |
||
2693 |
if (tp->ecdev || !netif_running (dev)) |
|
2694 |
return 0; |
|
2695 |
||
2696 |
netif_device_detach (dev); |
|
2697 |
||
2698 |
spin_lock_irqsave (&tp->lock, flags); |
|
2699 |
||
2700 |
/* Disable interrupts, stop Tx and Rx. */ |
|
2701 |
RTL_W16 (IntrMask, 0); |
|
2702 |
RTL_W8 (ChipCmd, 0); |
|
2703 |
||
2704 |
/* Update the error counts. */ |
|
2705 |
tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2706 |
RTL_W32 (RxMissed, 0); |
|
2707 |
||
2708 |
spin_unlock_irqrestore (&tp->lock, flags); |
|
2709 |
||
2710 |
pci_set_power_state (pdev, PCI_D3hot); |
|
2711 |
||
2712 |
return 0; |
|
2713 |
} |
|
2714 |
||
2715 |
||
2716 |
static int rtl8139_resume (struct pci_dev *pdev) |
|
2717 |
{
|
|
2718 |
struct net_device *dev = pci_get_drvdata (pdev); |
|
2719 |
struct rtl8139_private *tp = netdev_priv(dev); |
|
2720 |
||
2721 |
pci_restore_state (pdev); |
|
2722 |
if (tp->ecdev || !netif_running (dev)) |
|
2723 |
return 0; |
|
2724 |
pci_set_power_state (pdev, PCI_D0); |
|
2725 |
rtl8139_init_ring (dev); |
|
2726 |
rtl8139_hw_start (dev); |
|
2727 |
netif_device_attach (dev); |
|
2728 |
return 0; |
|
2729 |
} |
|
2730 |
||
2731 |
#endif /* CONFIG_PM */ |
|
2732 |
||
2733 |
||
2734 |
static struct pci_driver rtl8139_pci_driver = {
|
|
2735 |
.name = DRV_NAME, |
|
2736 |
.id_table = rtl8139_pci_tbl, |
|
2737 |
.probe = rtl8139_init_one, |
|
2738 |
.remove = __devexit_p(rtl8139_remove_one), |
|
2739 |
#ifdef CONFIG_PM |
|
2740 |
.suspend = rtl8139_suspend, |
|
2741 |
.resume = rtl8139_resume, |
|
2742 |
#endif /* CONFIG_PM */ |
|
2743 |
}; |
|
2744 |
||
2745 |
||
2746 |
static int __init rtl8139_init_module (void) |
|
2747 |
{
|
|
2748 |
/* when we're a module, we always print a version message, |
|
2749 |
* even if no 8139 board is found. |
|
2750 |
*/ |
|
2751 |
#ifdef MODULE |
|
2752 |
printk (KERN_INFO RTL8139_DRIVER_NAME "\n"); |
|
2753 |
#endif |
|
2754 |
||
2755 |
return pci_register_driver(&rtl8139_pci_driver); |
|
2756 |
} |
|
2757 |
||
2758 |
||
2759 |
static void __exit rtl8139_cleanup_module (void) |
|
2760 |
{
|
|
2761 |
pci_unregister_driver (&rtl8139_pci_driver); |
|
2762 |
} |
|
2763 |
||
2764 |
||
2765 |
module_init(rtl8139_init_module); |
|
2766 |
module_exit(rtl8139_cleanup_module); |