author | Edouard Tisserant <edouard.tisserant@gmail.com> |
Tue, 20 Aug 2024 00:31:45 +0200 | |
changeset 3971 | f1c673cddc1f |
parent 3929 | 1a0bed0b4f1c |
permissions | -rw-r--r-- |
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1 |
Standard library |
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================ |
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.. |
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Documentation originally part of Smarteh's user Manual, and donated to Beremiz project. |
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.. list-table:: |
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* - .. figure:: library_panel.png |
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Library browser |
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- Library contains various groups of standard |
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and user defined functions. They support the |
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usage in different programmable controller |
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programming languages inside POUs. |
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* - .. figure:: block_properties.png |
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Block Properties |
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- Block Properties pop-up window can be |
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opened by double-click on function block. |
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Some of the blocks can have more inputs than |
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default. This is selectable in the Inputs field |
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(e.g. ADD block). Also an Execution Order of |
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the blocks can be programmer-defined. All |
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blocks have an additional Execution Control |
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check-box. If it is checked than two new pins |
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are added (EN – input and ENO – output) to |
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control dynamically their execution. |
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Standard function blocks |
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------------------------ |
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.. highlight:: text |
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.. list-table:: |
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* - .. figure:: std_block-012.png |
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45 |
SR bistable |
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- The SR bistable is a latch where the Set dominates.:: |
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( BOOL:S1, BOOL:R ) => ( BOOL:Q1 ) |
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This function represents a standard set-dominant set/reset flip |
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flop. The Q1 output become TRUE when the input S1 is TRUE and |
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the R input is FALSE. In the same way, the Q1 output become |
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FALSE when the input S1 is FALSE and the R input is TRUE. After |
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one of these transitions, when both the S1 and R signals return to |
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FALSE, the Q1 output keeps the previous state until a new |
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condition occurs. If you apply a TRUE condition for both the |
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signals, the Q1 output is forced to TRUE (set-dominant). |
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* - .. figure:: std_block-010.png |
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RS bistable |
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64 |
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- The RS bistable is a latch where the Reset dominates.:: |
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( BOOL:S, BOOL:R1 ) => ( BOOL:Q1 ) |
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69 |
This function represents a standard reset-dominant set/reset flip |
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flop. The Q1 output become TRUE when the input S is TRUE and |
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the R1 input is FALSE. In the same way, the Q1 output become |
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FALSE when the input S is FALSE and the R1 input is TRUE. After |
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one of these transitions, when both the S and R1 signals return to |
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FALSE, the Q1 output keeps the previous state until a new |
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condition occurs. If you apply a TRUE condition for both the |
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signals, the Q1 output is forced to FALSE (reset-dominant). |
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77 |
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78 |
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79 |
* - .. figure:: std_block-019.png |
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81 |
SEMA Semaphore |
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83 |
- The semaphore provides a mechanism to allow software elements |
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84 |
mutually exclusive access to certain resources.:: |
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85 |
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86 |
( BOOL:CLAIM, BOOL:RELEASE ) => ( BOOL:BUSY ) |
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87 |
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88 |
This function block implements a semaphore function. Normally |
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89 |
this function is used to synchronize events. The BUSY output is |
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90 |
activated by a TRUE condition on the CLAIM input and it is de- |
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91 |
activated by a TRUE condition on the RELEASE input. |
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92 |
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93 |
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94 |
* - .. figure:: std_block-021.png |
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95 |
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96 |
R_TRIG Rising edge detector |
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97 |
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98 |
- The output produces a single pulse when a rising edge is detected.:: |
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99 |
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100 |
( BOOL:CLK ) => ( BOOL:Q ) |
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101 |
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102 |
This function is a rising-edge detector. The Q output becomes |
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103 |
TRUE when a 0 to 1 (or FALSE to TRUE or OFF to ON) condition is |
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104 |
detected on the CLK input and it sustains this state for a complete |
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105 |
scan cycle. |
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106 |
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107 |
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108 |
* - .. figure:: std_block-023.png |
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109 |
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110 |
F TRIG |
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111 |
|
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112 |
- Falling edge detector |
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113 |
The output Q produces a single pulse when a falling edge is |
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114 |
detected.:: |
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115 |
|
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116 |
( BOOL:CLK ) => ( BOOL:Q ) |
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117 |
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118 |
This function is a falling-edge detector. The Q output becomes |
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119 |
TRUE when a 1 to 0 (or TRUE to FALSE or ON to OFF) condition is |
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120 |
detected on the CLK input and it sustains this state for a complete |
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121 |
scan cycle. |
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122 |
|
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123 |
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124 |
* - .. figure:: std_block-030.png |
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125 |
|
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126 |
CTU |
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127 |
CTU_DINT, |
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128 |
CTU_LINT, |
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129 |
CTU_UDINT, CTU_ULINT |
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130 |
Up-counter |
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131 |
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132 |
- The up-counter can be used to signal when a count has reached a |
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133 |
maximum value.:: |
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134 |
|
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135 |
CTU: ( BOOL:CU, BOOL:R, INT:PV ) => ( BOOL:Q, INT:CV ) |
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136 |
CTU_DINT: ( BOOL:CU, BOOL:R, DINT:PV ) => ( BOOL:Q, DINT:CV ) |
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137 |
CTU_LINT: |
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138 |
( BOOL:CU, BOOL:R, LINT:PV ) => ( BOOL:Q, LINT:CV ) |
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139 |
CTU_UDINT: ( BOOL:CU, BOOL:R, UDINT:PV ) => ( BOOL:Q, UDINT:CV ) |
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140 |
CTU_ULINT: ( BOOL:CU, BOOL:R, ULINT:PV ) => ( BOOL:Q, ULINT:CV ) |
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141 |
|
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142 |
The CTU function represents an up-counter. A rising-edge on CU |
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143 |
input will increment the counter by one. When the programmed |
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144 |
value, applied to the input PV, is reached, the Q output becomes |
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145 |
TRUE. Applying a TRUE signal on R input will reset the counter to |
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146 |
zero (Asynchronous reset). The CV output reports the current |
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147 |
counting value. |
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148 |
|
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149 |
|
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150 |
* - .. figure:: std_block-028.png |
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151 |
|
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152 |
CTD |
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153 |
CTD_DINT, CTD_LINT, |
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154 |
CTD_UDINT, CTD_ULINT |
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155 |
Down-counter |
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156 |
|
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157 |
- The down-counter can be used to signal when a count has reached |
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158 |
zero, on counting down from a pre-set value.:: |
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159 |
|
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160 |
CTD: ( BOOL:CD, BOOL:LD, INT:PV ) => ( BOOL:Q, INT:CV ) |
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161 |
CTD_DINT: ( BOOL:CD, BOOL:LD, DINT:PV ) => ( BOOL:Q, DINT:CV ) |
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162 |
CTD_LINT: ( BOOL:CD, BOOL:LD, LINT:PV ) => ( BOOL:Q, LINT:CV ) |
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163 |
CTD_UDINT: ( BOOL:CD, BOOL:LD, UDINT:PV ) => ( BOOL:Q, UDINT:CV ) |
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164 |
CTD_ULINT: ( BOOL:CD, BOOL:LD, ULINT:PV ) => ( BOOL:Q, ULINT:CV ) |
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165 |
|
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166 |
The CTD function represents a down-counter. A rising-edge on CD |
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167 |
input will decrement the counter by one. The Q output becomes |
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168 |
TRUE when the current counting value is equal or less than zero. |
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169 |
Applying a TRUE signal on LD (LOAD) input will load the counter |
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170 |
with the value present at input PV (Asynchronous load). The CV |
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171 |
output reports the current counting value. |
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172 |
|
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173 |
|
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174 |
* - .. figure:: std_block-035.png |
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175 |
|
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176 |
CTUD |
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177 |
CTUD_DINT, |
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178 |
CTUD_LINT, |
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179 |
CTUD_UDINT, |
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180 |
CTUD_ULINT |
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181 |
Up-down counter |
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182 |
|
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183 |
- The up-down counter has two inputs CU and CD. It can be used to |
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184 |
both count up on one input and down on the other.:: |
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185 |
|
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186 |
CTUD: ( BOOL:CU, BOOL:CD, BOOL:R, BOOL:LD, INT:PV ) => ( BOOL:QU, BOOL:QD, INT:CV ) |
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187 |
CTUD_DINT: ( BOOL:CU, BOOL:CD, BOOL:R, BOOL:LD, DINT:PV ) => ( BOOL:QU, BOOL:QD, DINT:CV ) |
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188 |
CTUD_LINT: ( BOOL:CU, BOOL:CD, BOOL:R, BOOL:LD, LINT:PV ) => ( BOOL:QU, BOOL:QD, LINT:CV ) |
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189 |
CTUD_UDINT: ( BOOL:CU, BOOL:CD, BOOL:R, BOOL:LD, UDINT:PV ) => ( BOOL:QU, BOOL:QD, UDINT:CV ) |
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190 |
CTUD_ULINT: ( BOOL:CU, BOOL:CD, BOOL:R, BOOL:LD, ULINT:PV ) => ( BOOL:QU, BOOL:QD, ULINT:CV ) |
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191 |
|
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192 |
This function represents an up-down programmable counter. A |
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193 |
rising-edge on the CU (COUNT-UP) input increments the counter |
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194 |
by one while a rising-edge on the CD (COUNT-DOWN) decreases |
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195 |
the current value. Applying a TRUE signal on R input will reset the |
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196 |
counter to zero. A TRUE condition on the LD signal will load the |
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197 |
counter with the value applied to the input PV (PROGRAMMED |
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198 |
VALUE). QU output becomes active when the current counting |
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199 |
value is greater or equal to the programmed value. The QD output |
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200 |
becomes active when the current value is less or equal to zero. |
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201 |
The CV output reports the current counter value. |
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202 |
|
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203 |
|
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204 |
* - .. figure:: std_block-037.png |
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205 |
|
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206 |
TP |
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207 |
Pulse timer |
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208 |
|
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209 |
- The pulse timer can be used to generate output pulses of a given |
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time duration.:: |
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211 |
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( BOOL:IN, TIME:PT ) => ( BOOL:Q, TIME:ET ) |
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213 |
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This kind of timer has the same behaviour of a single-shot timer or |
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a monostable timer. |
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When a rising-edge transition is detected on the IN input, the Q |
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output becomes TRUE immediately. This condition continues until |
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the programmed time PT, applied to the relative pin, is elapsed. |
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After that the PT is elapsed, the Q output keeps the ON state if |
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the input IN is still asserted else the Q output returns to the OFF |
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state. This timer is not re-triggerable. This means that after that |
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the timer has started it can't be stopped until the complete |
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session ends. The ET output reports the current elapsed time. |
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* - .. figure:: std_block-042.png |
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227 |
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228 |
TON |
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On-delay timer |
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231 |
- The on-delay timer can be used to delay setting an output true, |
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for fixed period after an input becomes true.:: |
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( BOOL:IN, TIME:PT ) => ( BOOL:Q, TIME:ET ) |
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235 |
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Asserting the input signal IN of this function starts the timer. |
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When the programmed time, applied to the input PT, is elapsed |
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and the input IN is still asserted, the Q output becomes TRUE. This |
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condition will continue until the input IN is released. If the IN |
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input is released before time elapsing, the timer will be cleared. |
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The ET output reports the current elapsed time. |
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242 |
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243 |
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244 |
* - .. figure:: std_block-044.png |
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245 |
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246 |
TOF |
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247 |
Off-delay timer |
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248 |
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249 |
- The off-delay timer can be used to delay setting an output false, |
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250 |
for fixed period after input goes false.:: |
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251 |
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252 |
( BOOL:IN, TIME:PT ) => ( BOOL:Q, TIME:ET ) |
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253 |
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254 |
Asserting the input signal IN of this function immediately activates |
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255 |
the Q output. At this point, releasing the input IN will start the |
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256 |
time elapsing. When the programmed time, applied to the input |
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257 |
PT, is elapsed and the input IN is still released, the Q output |
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becomes FALSE. This condition will be kept until the input IN is |
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259 |
released. If the IN input is asserted again before time elapses, the |
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timer will be cleared and the Q output remains TRUE. The ET |
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261 |
output reports the current elapsed time. |
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262 |
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263 |
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264 |
Additional function blocks |
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265 |
-------------------------- |
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266 |
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267 |
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268 |
.. list-table:: |
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269 |
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270 |
* - .. figure:: std_block-055.png |
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271 |
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272 |
RTC |
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273 |
Real Time Clock |
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274 |
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- The RTC function block sets the output CDT to the input value PDT at the next |
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276 |
evaluation of the function block following a transition from 0 to 1 of the IN input. The CDT output |
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277 |
of the RTC function block is undefined when the value of IN is 0. |
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278 |
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279 |
.. line-block:: |
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280 |
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PDT = Preset date and time, loaded on rising edge of IN |
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282 |
CDT = Current date and time, valid when IN=1 |
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283 |
Q = copy of EN |
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284 |
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285 |
.. code-block:: |
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286 |
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(BOOL:IN, PDT:DT) => (BOOL:Q, CDT:DT) |
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288 |
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* - .. figure:: std_block-049.png |
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291 |
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292 |
INTEGRAL |
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293 |
Integral |
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294 |
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295 |
- The integral function block integrates the value of input XIN over |
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time.:: |
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( BOOL:RUN, BOOL:R1, REAL:XIN, REAL:X0, TIME:CYCLE ) => ( BOOL:Q, REAL:XOUT ) |
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299 |
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When input RUN is True and override R1 is False, XOUT will |
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change for XIN value depends on CYCLE time value sampling |
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period. When RUN is False and override R1 is True, XOUT will hold |
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the last output value. If R1 is True, XOUT will be set to the X0 |
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304 |
value.:: |
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305 |
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XOUT = XOUT + (XIN * CYCLE) |
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* - .. figure:: std_block-051.png |
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311 |
DERIVATIVE |
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Derivative |
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- The derivative function block produces an output XOUT |
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proportional to the rate of change of the input XIN.:: |
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316 |
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317 |
( BOOL:RUN, REAL:XIN, TIME:CYCLE ) => ( REAL:XOUT ) |
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318 |
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319 |
When RUN is True, XOUT will change proportional to the rate of |
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320 |
changing of the value XIN depends on CYCLE time value sampling |
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321 |
period.:: |
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322 |
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323 |
XOUT = ((3 * (XIN - XIN(to-3))) + XIN(to-1) – XIN(to-2) ) / (10 * CYCLE) |
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324 |
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325 |
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326 |
* - .. figure:: std_block-060.png |
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327 |
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328 |
PID |
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329 |
Proportional, Integral, Derivative |
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330 |
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331 |
- The PID (Proportional, Integral, Derivative) function block |
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332 |
provides the classical three term controller for closed loop |
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333 |
control. It does not contain any output limitation parameters |
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334 |
(dead-band, minimum, maximum, …) or other parameters |
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335 |
normally used for real process control (see also PID_A).:: |
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336 |
|
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337 |
( BOOL:AUTO, REAL:PV, REAL:SP, REAL:X0, REAL:KP, REAL:TR, REAL:TD, TIME:CYCLE ) => ( REAL:XOUT ) |
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338 |
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339 |
When AUTO is False, PID function block XOUT will follow X0 value. |
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340 |
When AUTO is True, XOUT will be calculated from error value (PV |
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341 |
process variable – SP set point), KP proportional constant, TR |
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342 |
reset time, TD derivative constant and CYCLE time value sampling |
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343 |
period.:: |
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344 |
|
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345 |
XOUT = KP * ((PV-SP) + (I_OUT/TR) + (D_OUT * TD)) |
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346 |
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347 |
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348 |
* - .. figure:: std_block-062.png |
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349 |
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350 |
RAMP |
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351 |
Ramp |
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352 |
|
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353 |
- The RAMP function block is modelled on example given in the |
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354 |
standard but with the addition of a 'Holdback' feature.:: |
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355 |
|
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356 |
( BOOL:RUN, REAL:X0, REAL:X1, TIME:TR, TIME:CYCLE, BOOL:HOLDBACK, REAL:ERROR, REAL:PV ) => ( BOOL:RAMP, REAL:XOUT ) |
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357 |
|
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358 |
When RUN and HOLDBACK are False, XOUT will follow X0 value. |
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359 |
When RUN is True and HOLDBACK value is False, XOUT will change |
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360 |
for ``OUT(to-1) + (X1 – XOUT(to-1))`` every CYCLE time value sampling |
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361 |
period. |
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362 |
|
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363 |
|
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364 |
* - .. figure:: std_block-064.png |
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365 |
|
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366 |
HYSTERESIS |
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367 |
Hysteresis |
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368 |
|
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369 |
- The hysteresis function block provides a hysteresis boolean output |
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370 |
driven by the difference of two floating point (REAL) inputs XIN1 |
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371 |
and XIN2.:: |
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372 |
|
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373 |
( REAL:XIN1, REAL:XIN2, REAL:EPS ) => ( BOOL:Q ) |
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374 |
|
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375 |
When XIN1 value will be grater than XIN2 + EPS value, Q becomes |
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376 |
True. When XIN1 value will be less than XIN2 - EPS value, Q |
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377 |
becomes False. |