74 {} |
69 {} |
75 }; |
70 }; |
76 |
71 |
77 /*****************************************************************************/ |
72 /*****************************************************************************/ |
78 |
73 |
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74 void msr_controller_run(void) |
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75 { |
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76 rt_sem_wait(&master_sem); |
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77 |
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78 #ifdef ASYNC |
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79 // Empfangen |
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80 ecrt_master_async_receive(master); |
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81 ecrt_domain_process(domain1); |
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82 #else |
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83 // Senden und empfangen |
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84 ecrt_domain_queue(domain1); |
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85 ecrt_master_run(master); |
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86 ecrt_master_sync_io(master); |
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87 ecrt_domain_process(domain1); |
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88 #endif |
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89 |
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90 // Prozessdaten verarbeiten |
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91 k_ssi = EC_READ_U32(r_ssi); |
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92 k_ssi_st = EC_READ_U8 (r_ssi_st); |
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93 |
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94 #ifdef ASYNC |
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95 // Senden |
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96 ecrt_domain_queue(domain1); |
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97 ecrt_master_run(master); |
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98 ecrt_master_async_send(master); |
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99 #endif |
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100 |
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101 rt_sem_signal(&master_sem); |
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102 |
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103 msr_write_kanal_list(); |
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104 } |
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105 |
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106 /*****************************************************************************/ |
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107 |
79 void msr_run(long data) |
108 void msr_run(long data) |
80 { |
109 { |
81 cycles_t t_last_start; |
110 while (1) { |
82 |
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83 while (1) |
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84 { |
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85 t_last_start = t_start; |
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86 t_start = get_cycles(); |
111 t_start = get_cycles(); |
87 |
112 MSR_RTAITHREAD_CODE(msr_controller_run();); |
88 rt_sem_wait(&master_sem); |
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89 |
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90 #ifdef ASYNC |
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91 // Empfangen |
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92 ecrt_master_async_receive(master); |
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93 ecrt_domain_process(domain1); |
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94 #else |
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95 // Senden und empfangen |
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96 ecrt_domain_queue(domain1); |
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97 ecrt_master_run(master); |
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98 ecrt_master_sync_io(master); |
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99 ecrt_domain_process(domain1); |
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100 #endif |
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101 |
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102 // Prozessdaten verarbeiten |
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103 k_ssi = EC_READ_U32(r_ssi); |
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104 k_ssi_st = EC_READ_U8 (r_ssi_st); |
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105 |
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106 #ifdef ASYNC |
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107 // Senden |
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108 ecrt_domain_queue(domain1); |
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109 ecrt_master_run(master); |
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110 ecrt_master_async_send(master); |
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111 #endif |
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112 |
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113 rt_sem_signal(&master_sem); |
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114 |
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115 /* write data to MSR ring buffers */ |
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116 msr_write_kanal_list(); |
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117 |
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118 /* wake up MSR read queue */ |
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119 if(++count_wakeup >= MSR_ABTASTFREQUENZ / 10) { |
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120 wake_up_interruptible(&msr_read_waitqueue); |
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121 count_wakeup = 0; |
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122 } |
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123 |
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124 /* calculate timing */ |
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125 msr_controller_execution_time = |
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126 (unsigned long) (get_cycles() - t_start) * 1000 / cpu_khz; |
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127 msr_controller_call_time = |
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128 (unsigned long) (t_start - t_last_start) * 1000 / cpu_khz; |
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129 |
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130 rt_task_wait_period(); |
113 rt_task_wait_period(); |
131 } |
114 } |
132 } |
115 } |
133 |
116 |
134 /*****************************************************************************/ |
117 /*****************************************************************************/ |