devices/e1000e/e1000-2.6.37-orig.h
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     1 /*******************************************************************************
       
     2 
       
     3   Intel PRO/1000 Linux driver
       
     4   Copyright(c) 1999 - 2010 Intel Corporation.
       
     5 
       
     6   This program is free software; you can redistribute it and/or modify it
       
     7   under the terms and conditions of the GNU General Public License,
       
     8   version 2, as published by the Free Software Foundation.
       
     9 
       
    10   This program is distributed in the hope it will be useful, but WITHOUT
       
    11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
       
    12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
       
    13   more details.
       
    14 
       
    15   You should have received a copy of the GNU General Public License along with
       
    16   this program; if not, write to the Free Software Foundation, Inc.,
       
    17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
       
    18 
       
    19   The full GNU General Public License is included in this distribution in
       
    20   the file called "COPYING".
       
    21 
       
    22   Contact Information:
       
    23   Linux NICS <linux.nics@intel.com>
       
    24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
       
    25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
       
    26 
       
    27 *******************************************************************************/
       
    28 
       
    29 /* Linux PRO/1000 Ethernet Driver main header file */
       
    30 
       
    31 #ifndef _E1000_H_
       
    32 #define _E1000_H_
       
    33 
       
    34 #include <linux/types.h>
       
    35 #include <linux/timer.h>
       
    36 #include <linux/workqueue.h>
       
    37 #include <linux/io.h>
       
    38 #include <linux/netdevice.h>
       
    39 #include <linux/pci.h>
       
    40 #include <linux/pci-aspm.h>
       
    41 
       
    42 #include "hw.h"
       
    43 
       
    44 struct e1000_info;
       
    45 
       
    46 #define e_dbg(format, arg...) \
       
    47 	netdev_dbg(hw->adapter->netdev, format, ## arg)
       
    48 #define e_err(format, arg...) \
       
    49 	netdev_err(adapter->netdev, format, ## arg)
       
    50 #define e_info(format, arg...) \
       
    51 	netdev_info(adapter->netdev, format, ## arg)
       
    52 #define e_warn(format, arg...) \
       
    53 	netdev_warn(adapter->netdev, format, ## arg)
       
    54 #define e_notice(format, arg...) \
       
    55 	netdev_notice(adapter->netdev, format, ## arg)
       
    56 
       
    57 
       
    58 /* Interrupt modes, as used by the IntMode parameter */
       
    59 #define E1000E_INT_MODE_LEGACY		0
       
    60 #define E1000E_INT_MODE_MSI		1
       
    61 #define E1000E_INT_MODE_MSIX		2
       
    62 
       
    63 /* Tx/Rx descriptor defines */
       
    64 #define E1000_DEFAULT_TXD		256
       
    65 #define E1000_MAX_TXD			4096
       
    66 #define E1000_MIN_TXD			64
       
    67 
       
    68 #define E1000_DEFAULT_RXD		256
       
    69 #define E1000_MAX_RXD			4096
       
    70 #define E1000_MIN_RXD			64
       
    71 
       
    72 #define E1000_MIN_ITR_USECS		10 /* 100000 irq/sec */
       
    73 #define E1000_MAX_ITR_USECS		10000 /* 100    irq/sec */
       
    74 
       
    75 /* Early Receive defines */
       
    76 #define E1000_ERT_2048			0x100
       
    77 
       
    78 #define E1000_FC_PAUSE_TIME		0x0680 /* 858 usec */
       
    79 
       
    80 /* How many Tx Descriptors do we need to call netif_wake_queue ? */
       
    81 /* How many Rx Buffers do we bundle into one write to the hardware ? */
       
    82 #define E1000_RX_BUFFER_WRITE		16 /* Must be power of 2 */
       
    83 
       
    84 #define AUTO_ALL_MODES			0
       
    85 #define E1000_EEPROM_APME		0x0400
       
    86 
       
    87 #define E1000_MNG_VLAN_NONE		(-1)
       
    88 
       
    89 /* Number of packet split data buffers (not including the header buffer) */
       
    90 #define PS_PAGE_BUFFERS			(MAX_PS_BUFFERS - 1)
       
    91 
       
    92 #define DEFAULT_JUMBO			9234
       
    93 
       
    94 /* BM/HV Specific Registers */
       
    95 #define BM_PORT_CTRL_PAGE                 769
       
    96 
       
    97 #define PHY_UPPER_SHIFT                   21
       
    98 #define BM_PHY_REG(page, reg) \
       
    99 	(((reg) & MAX_PHY_REG_ADDRESS) |\
       
   100 	 (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
       
   101 	 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
       
   102 
       
   103 /* PHY Wakeup Registers and defines */
       
   104 #define BM_RCTL         PHY_REG(BM_WUC_PAGE, 0)
       
   105 #define BM_WUC          PHY_REG(BM_WUC_PAGE, 1)
       
   106 #define BM_WUFC         PHY_REG(BM_WUC_PAGE, 2)
       
   107 #define BM_WUS          PHY_REG(BM_WUC_PAGE, 3)
       
   108 #define BM_RAR_L(_i)    (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
       
   109 #define BM_RAR_M(_i)    (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
       
   110 #define BM_RAR_H(_i)    (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
       
   111 #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
       
   112 #define BM_MTA(_i)      (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
       
   113 
       
   114 #define BM_RCTL_UPE           0x0001          /* Unicast Promiscuous Mode */
       
   115 #define BM_RCTL_MPE           0x0002          /* Multicast Promiscuous Mode */
       
   116 #define BM_RCTL_MO_SHIFT      3               /* Multicast Offset Shift */
       
   117 #define BM_RCTL_MO_MASK       (3 << 3)        /* Multicast Offset Mask */
       
   118 #define BM_RCTL_BAM           0x0020          /* Broadcast Accept Mode */
       
   119 #define BM_RCTL_PMCF          0x0040          /* Pass MAC Control Frames */
       
   120 #define BM_RCTL_RFCE          0x0080          /* Rx Flow Control Enable */
       
   121 
       
   122 #define HV_SCC_UPPER		PHY_REG(778, 16) /* Single Collision Count */
       
   123 #define HV_SCC_LOWER		PHY_REG(778, 17)
       
   124 #define HV_ECOL_UPPER		PHY_REG(778, 18) /* Excessive Collision Count */
       
   125 #define HV_ECOL_LOWER		PHY_REG(778, 19)
       
   126 #define HV_MCC_UPPER		PHY_REG(778, 20) /* Multiple Collision Count */
       
   127 #define HV_MCC_LOWER		PHY_REG(778, 21)
       
   128 #define HV_LATECOL_UPPER	PHY_REG(778, 23) /* Late Collision Count */
       
   129 #define HV_LATECOL_LOWER	PHY_REG(778, 24)
       
   130 #define HV_COLC_UPPER		PHY_REG(778, 25) /* Collision Count */
       
   131 #define HV_COLC_LOWER		PHY_REG(778, 26)
       
   132 #define HV_DC_UPPER		PHY_REG(778, 27) /* Defer Count */
       
   133 #define HV_DC_LOWER		PHY_REG(778, 28)
       
   134 #define HV_TNCRS_UPPER		PHY_REG(778, 29) /* Transmit with no CRS */
       
   135 #define HV_TNCRS_LOWER		PHY_REG(778, 30)
       
   136 
       
   137 #define E1000_FCRTV_PCH     0x05F40 /* PCH Flow Control Refresh Timer Value */
       
   138 
       
   139 /* BM PHY Copper Specific Status */
       
   140 #define BM_CS_STATUS                      17
       
   141 #define BM_CS_STATUS_LINK_UP              0x0400
       
   142 #define BM_CS_STATUS_RESOLVED             0x0800
       
   143 #define BM_CS_STATUS_SPEED_MASK           0xC000
       
   144 #define BM_CS_STATUS_SPEED_1000           0x8000
       
   145 
       
   146 /* 82577 Mobile Phy Status Register */
       
   147 #define HV_M_STATUS                       26
       
   148 #define HV_M_STATUS_AUTONEG_COMPLETE      0x1000
       
   149 #define HV_M_STATUS_SPEED_MASK            0x0300
       
   150 #define HV_M_STATUS_SPEED_1000            0x0200
       
   151 #define HV_M_STATUS_LINK_UP               0x0040
       
   152 
       
   153 /* Time to wait before putting the device into D3 if there's no link (in ms). */
       
   154 #define LINK_TIMEOUT		100
       
   155 
       
   156 #define DEFAULT_RDTR			0
       
   157 #define DEFAULT_RADV			8
       
   158 #define BURST_RDTR			0x20
       
   159 #define BURST_RADV			0x20
       
   160 
       
   161 /*
       
   162  * in the case of WTHRESH, it appears at least the 82571/2 hardware
       
   163  * writes back 4 descriptors when WTHRESH=5, and 3 descriptors when
       
   164  * WTHRESH=4, and since we want 64 bytes at a time written back, set
       
   165  * it to 5
       
   166  */
       
   167 #define E1000_TXDCTL_DMA_BURST_ENABLE                          \
       
   168 	(E1000_TXDCTL_GRAN | /* set descriptor granularity */  \
       
   169 	 E1000_TXDCTL_COUNT_DESC |                             \
       
   170 	 (5 << 16) | /* wthresh must be +1 more than desired */\
       
   171 	 (1 << 8)  | /* hthresh */                             \
       
   172 	 0x1f)       /* pthresh */
       
   173 
       
   174 #define E1000_RXDCTL_DMA_BURST_ENABLE                          \
       
   175 	(0x01000000 | /* set descriptor granularity */         \
       
   176 	 (4 << 16)  | /* set writeback threshold    */         \
       
   177 	 (4 << 8)   | /* set prefetch threshold     */         \
       
   178 	 0x20)        /* set hthresh                */
       
   179 
       
   180 #define E1000_TIDV_FPD (1 << 31)
       
   181 #define E1000_RDTR_FPD (1 << 31)
       
   182 
       
   183 enum e1000_boards {
       
   184 	board_82571,
       
   185 	board_82572,
       
   186 	board_82573,
       
   187 	board_82574,
       
   188 	board_82583,
       
   189 	board_80003es2lan,
       
   190 	board_ich8lan,
       
   191 	board_ich9lan,
       
   192 	board_ich10lan,
       
   193 	board_pchlan,
       
   194 	board_pch2lan,
       
   195 };
       
   196 
       
   197 struct e1000_queue_stats {
       
   198 	u64 packets;
       
   199 	u64 bytes;
       
   200 };
       
   201 
       
   202 struct e1000_ps_page {
       
   203 	struct page *page;
       
   204 	u64 dma; /* must be u64 - written to hw */
       
   205 };
       
   206 
       
   207 /*
       
   208  * wrappers around a pointer to a socket buffer,
       
   209  * so a DMA handle can be stored along with the buffer
       
   210  */
       
   211 struct e1000_buffer {
       
   212 	dma_addr_t dma;
       
   213 	struct sk_buff *skb;
       
   214 	union {
       
   215 		/* Tx */
       
   216 		struct {
       
   217 			unsigned long time_stamp;
       
   218 			u16 length;
       
   219 			u16 next_to_watch;
       
   220 			unsigned int segs;
       
   221 			unsigned int bytecount;
       
   222 			u16 mapped_as_page;
       
   223 		};
       
   224 		/* Rx */
       
   225 		struct {
       
   226 			/* arrays of page information for packet split */
       
   227 			struct e1000_ps_page *ps_pages;
       
   228 			struct page *page;
       
   229 		};
       
   230 	};
       
   231 };
       
   232 
       
   233 struct e1000_ring {
       
   234 	void *desc;			/* pointer to ring memory  */
       
   235 	dma_addr_t dma;			/* phys address of ring    */
       
   236 	unsigned int size;		/* length of ring in bytes */
       
   237 	unsigned int count;		/* number of desc. in ring */
       
   238 
       
   239 	u16 next_to_use;
       
   240 	u16 next_to_clean;
       
   241 
       
   242 	u16 head;
       
   243 	u16 tail;
       
   244 
       
   245 	/* array of buffer information structs */
       
   246 	struct e1000_buffer *buffer_info;
       
   247 
       
   248 	char name[IFNAMSIZ + 5];
       
   249 	u32 ims_val;
       
   250 	u32 itr_val;
       
   251 	u16 itr_register;
       
   252 	int set_itr;
       
   253 
       
   254 	struct sk_buff *rx_skb_top;
       
   255 
       
   256 	struct e1000_queue_stats stats;
       
   257 };
       
   258 
       
   259 /* PHY register snapshot values */
       
   260 struct e1000_phy_regs {
       
   261 	u16 bmcr;		/* basic mode control register    */
       
   262 	u16 bmsr;		/* basic mode status register     */
       
   263 	u16 advertise;		/* auto-negotiation advertisement */
       
   264 	u16 lpa;		/* link partner ability register  */
       
   265 	u16 expansion;		/* auto-negotiation expansion reg */
       
   266 	u16 ctrl1000;		/* 1000BASE-T control register    */
       
   267 	u16 stat1000;		/* 1000BASE-T status register     */
       
   268 	u16 estatus;		/* extended status register       */
       
   269 };
       
   270 
       
   271 /* board specific private data structure */
       
   272 struct e1000_adapter {
       
   273 	struct timer_list watchdog_timer;
       
   274 	struct timer_list phy_info_timer;
       
   275 	struct timer_list blink_timer;
       
   276 
       
   277 	struct work_struct reset_task;
       
   278 	struct work_struct watchdog_task;
       
   279 
       
   280 	const struct e1000_info *ei;
       
   281 
       
   282 	struct vlan_group *vlgrp;
       
   283 	u32 bd_number;
       
   284 	u32 rx_buffer_len;
       
   285 	u16 mng_vlan_id;
       
   286 	u16 link_speed;
       
   287 	u16 link_duplex;
       
   288 	u16 eeprom_vers;
       
   289 
       
   290 	/* track device up/down/testing state */
       
   291 	unsigned long state;
       
   292 
       
   293 	/* Interrupt Throttle Rate */
       
   294 	u32 itr;
       
   295 	u32 itr_setting;
       
   296 	u16 tx_itr;
       
   297 	u16 rx_itr;
       
   298 
       
   299 	/*
       
   300 	 * Tx
       
   301 	 */
       
   302 	struct e1000_ring *tx_ring /* One per active queue */
       
   303 						____cacheline_aligned_in_smp;
       
   304 
       
   305 	struct napi_struct napi;
       
   306 
       
   307 	unsigned int restart_queue;
       
   308 	u32 txd_cmd;
       
   309 
       
   310 	bool detect_tx_hung;
       
   311 	u8 tx_timeout_factor;
       
   312 
       
   313 	u32 tx_int_delay;
       
   314 	u32 tx_abs_int_delay;
       
   315 
       
   316 	unsigned int total_tx_bytes;
       
   317 	unsigned int total_tx_packets;
       
   318 	unsigned int total_rx_bytes;
       
   319 	unsigned int total_rx_packets;
       
   320 
       
   321 	/* Tx stats */
       
   322 	u64 tpt_old;
       
   323 	u64 colc_old;
       
   324 	u32 gotc;
       
   325 	u64 gotc_old;
       
   326 	u32 tx_timeout_count;
       
   327 	u32 tx_fifo_head;
       
   328 	u32 tx_head_addr;
       
   329 	u32 tx_fifo_size;
       
   330 	u32 tx_dma_failed;
       
   331 
       
   332 	/*
       
   333 	 * Rx
       
   334 	 */
       
   335 	bool (*clean_rx) (struct e1000_adapter *adapter,
       
   336 			  int *work_done, int work_to_do)
       
   337 						____cacheline_aligned_in_smp;
       
   338 	void (*alloc_rx_buf) (struct e1000_adapter *adapter,
       
   339 			      int cleaned_count);
       
   340 	struct e1000_ring *rx_ring;
       
   341 
       
   342 	u32 rx_int_delay;
       
   343 	u32 rx_abs_int_delay;
       
   344 
       
   345 	/* Rx stats */
       
   346 	u64 hw_csum_err;
       
   347 	u64 hw_csum_good;
       
   348 	u64 rx_hdr_split;
       
   349 	u32 gorc;
       
   350 	u64 gorc_old;
       
   351 	u32 alloc_rx_buff_failed;
       
   352 	u32 rx_dma_failed;
       
   353 
       
   354 	unsigned int rx_ps_pages;
       
   355 	u16 rx_ps_bsize0;
       
   356 	u32 max_frame_size;
       
   357 	u32 min_frame_size;
       
   358 
       
   359 	/* OS defined structs */
       
   360 	struct net_device *netdev;
       
   361 	struct pci_dev *pdev;
       
   362 
       
   363 	/* structs defined in e1000_hw.h */
       
   364 	struct e1000_hw hw;
       
   365 
       
   366 	struct e1000_hw_stats stats;
       
   367 	struct e1000_phy_info phy_info;
       
   368 	struct e1000_phy_stats phy_stats;
       
   369 
       
   370 	/* Snapshot of PHY registers */
       
   371 	struct e1000_phy_regs phy_regs;
       
   372 
       
   373 	struct e1000_ring test_tx_ring;
       
   374 	struct e1000_ring test_rx_ring;
       
   375 	u32 test_icr;
       
   376 
       
   377 	u32 msg_enable;
       
   378 	unsigned int num_vectors;
       
   379 	struct msix_entry *msix_entries;
       
   380 	int int_mode;
       
   381 	u32 eiac_mask;
       
   382 
       
   383 	u32 eeprom_wol;
       
   384 	u32 wol;
       
   385 	u32 pba;
       
   386 	u32 max_hw_frame_size;
       
   387 
       
   388 	bool fc_autoneg;
       
   389 
       
   390 	unsigned long led_status;
       
   391 
       
   392 	unsigned int flags;
       
   393 	unsigned int flags2;
       
   394 	struct work_struct downshift_task;
       
   395 	struct work_struct update_phy_task;
       
   396 	struct work_struct led_blink_task;
       
   397 	struct work_struct print_hang_task;
       
   398 
       
   399 	bool idle_check;
       
   400 	int phy_hang_count;
       
   401 };
       
   402 
       
   403 struct e1000_info {
       
   404 	enum e1000_mac_type	mac;
       
   405 	unsigned int		flags;
       
   406 	unsigned int		flags2;
       
   407 	u32			pba;
       
   408 	u32			max_hw_frame_size;
       
   409 	s32			(*get_variants)(struct e1000_adapter *);
       
   410 	struct e1000_mac_operations *mac_ops;
       
   411 	struct e1000_phy_operations *phy_ops;
       
   412 	struct e1000_nvm_operations *nvm_ops;
       
   413 };
       
   414 
       
   415 /* hardware capability, feature, and workaround flags */
       
   416 #define FLAG_HAS_AMT                      (1 << 0)
       
   417 #define FLAG_HAS_FLASH                    (1 << 1)
       
   418 #define FLAG_HAS_HW_VLAN_FILTER           (1 << 2)
       
   419 #define FLAG_HAS_WOL                      (1 << 3)
       
   420 #define FLAG_HAS_ERT                      (1 << 4)
       
   421 #define FLAG_HAS_CTRLEXT_ON_LOAD          (1 << 5)
       
   422 #define FLAG_HAS_SWSM_ON_LOAD             (1 << 6)
       
   423 #define FLAG_HAS_JUMBO_FRAMES             (1 << 7)
       
   424 #define FLAG_READ_ONLY_NVM                (1 << 8)
       
   425 #define FLAG_IS_ICH                       (1 << 9)
       
   426 #define FLAG_HAS_MSIX                     (1 << 10)
       
   427 #define FLAG_HAS_SMART_POWER_DOWN         (1 << 11)
       
   428 #define FLAG_IS_QUAD_PORT_A               (1 << 12)
       
   429 #define FLAG_IS_QUAD_PORT                 (1 << 13)
       
   430 #define FLAG_TIPG_MEDIUM_FOR_80003ESLAN   (1 << 14)
       
   431 #define FLAG_APME_IN_WUC                  (1 << 15)
       
   432 #define FLAG_APME_IN_CTRL3                (1 << 16)
       
   433 #define FLAG_APME_CHECK_PORT_B            (1 << 17)
       
   434 #define FLAG_DISABLE_FC_PAUSE_TIME        (1 << 18)
       
   435 #define FLAG_NO_WAKE_UCAST                (1 << 19)
       
   436 #define FLAG_MNG_PT_ENABLED               (1 << 20)
       
   437 #define FLAG_RESET_OVERWRITES_LAA         (1 << 21)
       
   438 #define FLAG_TARC_SPEED_MODE_BIT          (1 << 22)
       
   439 #define FLAG_TARC_SET_BIT_ZERO            (1 << 23)
       
   440 #define FLAG_RX_NEEDS_RESTART             (1 << 24)
       
   441 #define FLAG_LSC_GIG_SPEED_DROP           (1 << 25)
       
   442 #define FLAG_SMART_POWER_DOWN             (1 << 26)
       
   443 #define FLAG_MSI_ENABLED                  (1 << 27)
       
   444 #define FLAG_RX_CSUM_ENABLED              (1 << 28)
       
   445 #define FLAG_TSO_FORCE                    (1 << 29)
       
   446 #define FLAG_RX_RESTART_NOW               (1 << 30)
       
   447 #define FLAG_MSI_TEST_FAILED              (1 << 31)
       
   448 
       
   449 /* CRC Stripping defines */
       
   450 #define FLAG2_CRC_STRIPPING               (1 << 0)
       
   451 #define FLAG2_HAS_PHY_WAKEUP              (1 << 1)
       
   452 #define FLAG2_IS_DISCARDING               (1 << 2)
       
   453 #define FLAG2_DISABLE_ASPM_L1             (1 << 3)
       
   454 #define FLAG2_HAS_PHY_STATS               (1 << 4)
       
   455 #define FLAG2_HAS_EEE                     (1 << 5)
       
   456 #define FLAG2_DMA_BURST                   (1 << 6)
       
   457 #define FLAG2_DISABLE_AIM                 (1 << 8)
       
   458 #define FLAG2_CHECK_PHY_HANG              (1 << 9)
       
   459 
       
   460 #define E1000_RX_DESC_PS(R, i)	    \
       
   461 	(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
       
   462 #define E1000_GET_DESC(R, i, type)	(&(((struct type *)((R).desc))[i]))
       
   463 #define E1000_RX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_rx_desc)
       
   464 #define E1000_TX_DESC(R, i)		E1000_GET_DESC(R, i, e1000_tx_desc)
       
   465 #define E1000_CONTEXT_DESC(R, i)	E1000_GET_DESC(R, i, e1000_context_desc)
       
   466 
       
   467 enum e1000_state_t {
       
   468 	__E1000_TESTING,
       
   469 	__E1000_RESETTING,
       
   470 	__E1000_DOWN
       
   471 };
       
   472 
       
   473 enum latency_range {
       
   474 	lowest_latency = 0,
       
   475 	low_latency = 1,
       
   476 	bulk_latency = 2,
       
   477 	latency_invalid = 255
       
   478 };
       
   479 
       
   480 extern char e1000e_driver_name[];
       
   481 extern const char e1000e_driver_version[];
       
   482 
       
   483 extern void e1000e_check_options(struct e1000_adapter *adapter);
       
   484 extern void e1000e_set_ethtool_ops(struct net_device *netdev);
       
   485 
       
   486 extern int e1000e_up(struct e1000_adapter *adapter);
       
   487 extern void e1000e_down(struct e1000_adapter *adapter);
       
   488 extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
       
   489 extern void e1000e_reset(struct e1000_adapter *adapter);
       
   490 extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
       
   491 extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
       
   492 extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
       
   493 extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
       
   494 extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
       
   495 extern void e1000e_update_stats(struct e1000_adapter *adapter);
       
   496 extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
       
   497 extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
       
   498 extern void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
       
   499 
       
   500 extern unsigned int copybreak;
       
   501 extern int entropy;
       
   502 
       
   503 extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
       
   504 
       
   505 extern struct e1000_info e1000_82571_info;
       
   506 extern struct e1000_info e1000_82572_info;
       
   507 extern struct e1000_info e1000_82573_info;
       
   508 extern struct e1000_info e1000_82574_info;
       
   509 extern struct e1000_info e1000_82583_info;
       
   510 extern struct e1000_info e1000_ich8_info;
       
   511 extern struct e1000_info e1000_ich9_info;
       
   512 extern struct e1000_info e1000_ich10_info;
       
   513 extern struct e1000_info e1000_pch_info;
       
   514 extern struct e1000_info e1000_pch2_info;
       
   515 extern struct e1000_info e1000_es2_info;
       
   516 
       
   517 extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
       
   518 
       
   519 extern s32  e1000e_commit_phy(struct e1000_hw *hw);
       
   520 
       
   521 extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
       
   522 
       
   523 extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
       
   524 extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
       
   525 
       
   526 extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
       
   527 extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
       
   528 						 bool state);
       
   529 extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
       
   530 extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
       
   531 extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
       
   532 extern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);
       
   533 extern s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable);
       
   534 extern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw);
       
   535 
       
   536 extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
       
   537 extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
       
   538 extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
       
   539 extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
       
   540 extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
       
   541 extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
       
   542 extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
       
   543 extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
       
   544 extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
       
   545 extern void e1000_set_lan_id_single_port(struct e1000_hw *hw);
       
   546 extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
       
   547 extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
       
   548 extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
       
   549 extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
       
   550 extern s32 e1000e_id_led_init(struct e1000_hw *hw);
       
   551 extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
       
   552 extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
       
   553 extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
       
   554 extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
       
   555 extern s32 e1000e_setup_link(struct e1000_hw *hw);
       
   556 extern void e1000_clear_vfta_generic(struct e1000_hw *hw);
       
   557 extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
       
   558 extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
       
   559 					       u8 *mc_addr_list,
       
   560 					       u32 mc_addr_count);
       
   561 extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
       
   562 extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
       
   563 extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
       
   564 extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
       
   565 extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
       
   566 extern void e1000e_config_collision_dist(struct e1000_hw *hw);
       
   567 extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
       
   568 extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
       
   569 extern s32 e1000e_blink_led(struct e1000_hw *hw);
       
   570 extern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
       
   571 extern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);
       
   572 extern void e1000e_reset_adaptive(struct e1000_hw *hw);
       
   573 extern void e1000e_update_adaptive(struct e1000_hw *hw);
       
   574 
       
   575 extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
       
   576 extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
       
   577 extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
       
   578 extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
       
   579 extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
       
   580 extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
       
   581 extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
       
   582 extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
       
   583 extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
       
   584                                           u16 *data);
       
   585 extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
       
   586 extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
       
   587 extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
       
   588 extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
       
   589                                            u16 data);
       
   590 extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
       
   591 extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
       
   592 extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
       
   593 extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
       
   594 extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
       
   595 extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
       
   596 extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
       
   597 extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
       
   598 extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
       
   599 extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
       
   600 extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
       
   601 extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
       
   602 extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
       
   603 extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
       
   604 extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
       
   605 extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
       
   606 extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
       
   607                                         u16 data);
       
   608 extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
       
   609 extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
       
   610                                        u16 *data);
       
   611 extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
       
   612 			       u32 usec_interval, bool *success);
       
   613 extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
       
   614 extern void e1000_power_up_phy_copper(struct e1000_hw *hw);
       
   615 extern void e1000_power_down_phy_copper(struct e1000_hw *hw);
       
   616 extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
       
   617 extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
       
   618 extern s32 e1000e_check_downshift(struct e1000_hw *hw);
       
   619 extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
       
   620 extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
       
   621                                         u16 *data);
       
   622 extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
       
   623 extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
       
   624                                          u16 data);
       
   625 extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
       
   626 extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
       
   627 extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
       
   628 extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
       
   629 extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
       
   630 extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
       
   631 
       
   632 extern s32 e1000_check_polarity_m88(struct e1000_hw *hw);
       
   633 extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
       
   634 extern s32 e1000_check_polarity_ife(struct e1000_hw *hw);
       
   635 extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
       
   636 extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
       
   637 extern bool e1000_check_phy_82574(struct e1000_hw *hw);
       
   638 
       
   639 static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
       
   640 {
       
   641 	return hw->phy.ops.reset(hw);
       
   642 }
       
   643 
       
   644 static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
       
   645 {
       
   646 	return hw->phy.ops.check_reset_block(hw);
       
   647 }
       
   648 
       
   649 static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
       
   650 {
       
   651 	return hw->phy.ops.read_reg(hw, offset, data);
       
   652 }
       
   653 
       
   654 static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
       
   655 {
       
   656 	return hw->phy.ops.write_reg(hw, offset, data);
       
   657 }
       
   658 
       
   659 static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
       
   660 {
       
   661 	return hw->phy.ops.get_cable_length(hw);
       
   662 }
       
   663 
       
   664 extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
       
   665 extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
       
   666 extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
       
   667 extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
       
   668 extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
       
   669 extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
       
   670 extern void e1000e_release_nvm(struct e1000_hw *hw);
       
   671 extern void e1000e_reload_nvm(struct e1000_hw *hw);
       
   672 extern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
       
   673 
       
   674 static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
       
   675 {
       
   676 	if (hw->mac.ops.read_mac_addr)
       
   677 		return hw->mac.ops.read_mac_addr(hw);
       
   678 
       
   679 	return e1000_read_mac_addr_generic(hw);
       
   680 }
       
   681 
       
   682 static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
       
   683 {
       
   684 	return hw->nvm.ops.validate(hw);
       
   685 }
       
   686 
       
   687 static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
       
   688 {
       
   689 	return hw->nvm.ops.update(hw);
       
   690 }
       
   691 
       
   692 static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
       
   693 {
       
   694 	return hw->nvm.ops.read(hw, offset, words, data);
       
   695 }
       
   696 
       
   697 static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
       
   698 {
       
   699 	return hw->nvm.ops.write(hw, offset, words, data);
       
   700 }
       
   701 
       
   702 static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
       
   703 {
       
   704 	return hw->phy.ops.get_info(hw);
       
   705 }
       
   706 
       
   707 static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
       
   708 {
       
   709 	return hw->mac.ops.check_mng_mode(hw);
       
   710 }
       
   711 
       
   712 extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
       
   713 extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
       
   714 extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
       
   715 
       
   716 static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
       
   717 {
       
   718 	return readl(hw->hw_addr + reg);
       
   719 }
       
   720 
       
   721 static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
       
   722 {
       
   723 	writel(val, hw->hw_addr + reg);
       
   724 }
       
   725 
       
   726 #endif /* _E1000_H_ */