17 * |
17 * |
18 * $Id$ |
18 * $Id$ |
19 * |
19 * |
20 *****************************************************************************/ |
20 *****************************************************************************/ |
21 |
21 |
22 #ifndef __KERNEL__ |
22 // Linux |
23 # define __KERNEL__ |
|
24 #endif |
|
25 #ifndef MODULE |
|
26 # define MODULE |
|
27 #endif |
|
28 |
|
29 #include <linux/config.h> |
|
30 #include <linux/module.h> |
23 #include <linux/module.h> |
31 |
|
32 #include <linux/sched.h> |
|
33 #include <linux/kernel.h> |
|
34 #include <linux/vmalloc.h> |
|
35 #include <linux/fs.h> /* everything... */ |
|
36 #include <linux/proc_fs.h> |
|
37 #include <linux/time.h> |
|
38 #include <linux/timer.h> |
|
39 #include <linux/timex.h> /* fuer get_cycles */ |
|
40 #include <linux/errno.h> /* error codes */ |
|
41 #include <asm/msr.h> /* maschine-specific registers */ |
|
42 #include <linux/param.h> /* fuer HZ */ |
|
43 #include <linux/ipipe.h> |
24 #include <linux/ipipe.h> |
44 |
25 |
45 #include "msr_param.h" //wird im Projektverzeichnis erwartet |
26 // RT_lib |
46 |
27 #include <msr_main.h> |
47 //#include <msr_control.h> |
28 #include <msr_utils.h> |
48 #include <msr_lists.h> |
29 #include <msr_messages.h> |
49 #include <msr_charbuf.h> |
30 #include <msr_float.h> |
50 #include <msr_reg.h> |
31 #include <msr_reg.h> |
51 #include <msr_error_reg.h> |
32 #include "msr_param.h" |
52 #include <msr_messages.h> |
33 #include "msr_jitter.h" |
53 #include <msr_proc.h> |
34 |
54 #include <msr_utils.h> |
35 // EtherCAT |
55 #include <msr_main.h> |
|
56 |
|
57 |
|
58 #include <msr_float.h> |
|
59 |
|
60 #include "../drivers/ec_master.h" |
36 #include "../drivers/ec_master.h" |
61 #include "../drivers/ec_device.h" |
37 #include "../drivers/ec_device.h" |
62 #include "../drivers/ec_types.h" |
38 #include "../drivers/ec_types.h" |
63 #include "../drivers/ec_module.h" |
39 #include "../drivers/ec_module.h" |
64 |
40 |
65 #include "msr_jitter.h" |
41 // Defines/Makros |
66 |
42 #define TSC2US(T1, T2) ((T2 - T1) * 1000UL / cpu_khz) |
67 #define TSC2US(T) ((unsigned long) (T) * 1000UL / cpu_khz) |
|
68 |
|
69 /*--external data------------------------------------------------------------*/ |
|
70 |
|
71 #define HZREDUCTION (MSR_ABTASTFREQUENZ/HZ) |
43 #define HZREDUCTION (MSR_ABTASTFREQUENZ/HZ) |
72 |
44 |
73 extern wait_queue_head_t msr_read_waitqueue; |
45 /*****************************************************************************/ |
74 |
46 /* Globale Variablen */ |
75 extern struct msr_char_buf *msr_kanal_puffer; |
47 |
76 |
48 // RT_lib |
77 extern int proc_abtastfrequenz; |
|
78 |
|
79 /*--local data---------------------------------------------------------------*/ |
|
80 |
|
81 extern struct timeval process_time; |
49 extern struct timeval process_time; |
82 struct timeval msr_time_increment; // Increment per Interrupt |
50 struct timeval msr_time_increment; // Increment per Interrupt |
83 |
51 |
84 //adeos |
52 // Adeos |
85 |
|
86 static struct ipipe_domain this_domain; |
53 static struct ipipe_domain this_domain; |
87 |
|
88 static struct ipipe_sysinfo sys_info; |
54 static struct ipipe_sysinfo sys_info; |
89 |
55 |
|
56 // EtherCAT |
|
57 |
90 static EtherCAT_master_t *ecat_master = NULL; |
58 static EtherCAT_master_t *ecat_master = NULL; |
|
59 static unsigned long ecat_bus_time = 0; |
91 |
60 |
92 static EtherCAT_slave_t ecat_slaves[] = |
61 static EtherCAT_slave_t ecat_slaves[] = |
93 { |
62 { |
94 #if 1 |
63 #if 1 |
95 // Block 1 |
64 // Block 1 |
254 t6 = ecat_master->rx_time; |
222 t6 = ecat_master->rx_time; |
255 tr2 = ecat_master->rx_tries; |
223 tr2 = ecat_master->rx_tries; |
256 |
224 |
257 //EtherCAT_process_data_cycle(ecat_master, 2); |
225 //EtherCAT_process_data_cycle(ecat_master, 2); |
258 |
226 |
|
227 rdtscl(t7); |
|
228 |
|
229 ecat_bus_time = TSC2US(t2, t7); |
|
230 |
259 // Daten lesen und skalieren |
231 // Daten lesen und skalieren |
260 #ifdef USE_MSR_LIB |
232 #ifdef USE_MSR_LIB |
261 value = EtherCAT_read_value(&ecat_slaves[5], 0) / 3276.0; |
233 value = EtherCAT_read_value(&ecat_slaves[5], 0) / 3276.0; |
262 dig1 = EtherCAT_read_value(&ecat_slaves[2], 0); |
234 dig1 = EtherCAT_read_value(&ecat_slaves[2], 0); |
263 #endif |
235 #endif |
264 |
|
265 rdtscl(t7); |
|
266 |
236 |
267 if (debug_counter == MSR_ABTASTFREQUENZ) { |
237 if (debug_counter == MSR_ABTASTFREQUENZ) { |
268 printk(KERN_DEBUG "%lu: %luŽµs + %luŽµs + %luŽµs + %luŽµs + %luŽµs +" |
238 printk(KERN_DEBUG "%lu: %luŽµs + %luŽµs + %luŽµs + %luŽµs + %luŽµs +" |
269 " %luŽµs = %luŽµs (%u %u)\n", |
239 " %luŽµs = %luŽµs (%u %u)\n", |
270 TSC2US(t1 - lt), |
240 TSC2US(lt, t1), |
271 TSC2US(t2 - t1), TSC2US(t3 - t2), TSC2US(t4 - t3), |
241 TSC2US(t1, t2), TSC2US(t2, t3), TSC2US(t3, t4), |
272 TSC2US(t5 - t4), TSC2US(t6 - t5), TSC2US(t7 - t6), |
242 TSC2US(t4, t5), TSC2US(t5, t6), TSC2US(t6, t7), |
273 TSC2US(t7 - t1), tr1, tr2); |
243 TSC2US(t1, t7), tr1, tr2); |
274 debug_counter = 0; |
244 debug_counter = 0; |
275 } |
245 } |
276 |
246 |
277 lt = t1; |
247 lt = t1; |
278 |
248 |
295 * |
265 * |
296 *****************************************************************************/ |
266 *****************************************************************************/ |
297 |
267 |
298 void msr_run(unsigned irq) |
268 void msr_run(unsigned irq) |
299 { |
269 { |
300 static int counter = 0; |
270 static int counter = 0; |
301 #ifdef USE_MSR_LIB |
271 |
302 |
272 #ifdef USE_MSR_LIB |
303 timeval_add(&process_time,&process_time,&msr_time_increment); |
273 timeval_add(&process_time, &process_time, &msr_time_increment); |
304 |
274 MSR_ADEOS_INTERRUPT_CODE(msr_controller_run(); msr_write_kanal_list();); |
305 MSR_ADEOS_INTERRUPT_CODE( |
|
306 msr_controller_run(); |
|
307 msr_write_kanal_list(); |
|
308 ); |
|
309 #else |
275 #else |
310 msr_controller_run(); |
276 msr_controller_run(); |
311 #endif |
277 #endif |
312 /* und wieder in die Timerliste eintragen */ |
|
313 /* und neu in die Taskqueue eintragen */ |
|
314 //timer.expires += 1; |
|
315 //add_timer(&timer); |
|
316 |
278 |
317 ipipe_control_irq(irq,0,IPIPE_ENABLE_MASK); //Interrupt bestŽätigen |
279 ipipe_control_irq(irq,0,IPIPE_ENABLE_MASK); //Interrupt bestŽätigen |
318 if(counter++ > HZREDUCTION) { |
280 if (counter++ > HZREDUCTION) { |
319 ipipe_propagate_irq(irq); //und weiterreichen |
281 ipipe_propagate_irq(irq); //und weiterreichen |
320 counter = 0; |
282 counter = 0; |
321 } |
283 } |
322 } |
284 } |
323 |
285 |
324 void domain_entry (void) |
286 /*****************************************************************************/ |
|
287 |
|
288 void domain_entry(void) |
325 { |
289 { |
326 printk("Domain %s started.\n", ipipe_current_domain->name); |
290 printk("Domain %s started.\n", ipipe_current_domain->name); |
327 |
291 |
328 ipipe_get_sysinfo(&sys_info); |
292 ipipe_get_sysinfo(&sys_info); |
329 ipipe_virtualize_irq(ipipe_current_domain,sys_info.archdep.tmirq, |
293 ipipe_virtualize_irq(ipipe_current_domain,sys_info.archdep.tmirq, |
350 { |
314 { |
351 #ifdef USE_MSR_LIB |
315 #ifdef USE_MSR_LIB |
352 msr_reg_kanal("/value", "V", &value, TDBL); |
316 msr_reg_kanal("/value", "V", &value, TDBL); |
353 msr_reg_kanal("/dig1", "", &dig1, TINT); |
317 msr_reg_kanal("/dig1", "", &dig1, TINT); |
354 #endif |
318 #endif |
355 #if 0 |
319 |
356 msr_reg_kanal("/Taskinfo/Ecat/TX-Delay","us",&ecat_tx_delay,TUINT); |
320 msr_reg_kanal("/Taskinfo/EtherCAT/BusTime", "us", &ecat_bus_time, TUINT); |
357 msr_reg_kanal("/Taskinfo/Ecat/RX-Delay","us",&ecat_rx_delay,TUINT); |
321 |
358 msr_reg_kanal("/Taskinfo/Ecat/TX-Cnt","",&tx_intr,TUINT); |
322 return 0; |
359 msr_reg_kanal("/Taskinfo/Ecat/RX-Cnt","",&rx_intr,TUINT); |
|
360 msr_reg_kanal("/Taskinfo/Ecat/Total-Cnt","",&total_intr,TUINT); |
|
361 #endif |
|
362 return 0; |
|
363 } |
323 } |
364 |
324 |
365 /****************************************************************************** |
325 /****************************************************************************** |
366 * the init/clean material |
326 * the init/clean material |
367 *****************************************************************************/ |
327 *****************************************************************************/ |