58 INIT_LIST_HEAD(&fmmu->list); |
58 INIT_LIST_HEAD(&fmmu->list); |
59 fmmu->sc = sc; |
59 fmmu->sc = sc; |
60 fmmu->sync_index = sync_index; |
60 fmmu->sync_index = sync_index; |
61 fmmu->dir = dir; |
61 fmmu->dir = dir; |
62 |
62 |
63 fmmu->logical_start_address = domain->data_size; |
63 fmmu->logical_domain_offset = domain->data_size; |
64 fmmu->data_size = ec_pdo_list_total_size( |
64 fmmu->data_size = ec_pdo_list_total_size( |
65 &sc->sync_configs[sync_index].pdos); |
65 &sc->sync_configs[sync_index].pdos); |
66 |
66 |
67 ec_domain_add_fmmu_config(domain, fmmu); |
67 ec_domain_add_fmmu_config(domain, fmmu); |
68 } |
68 } |
77 const ec_fmmu_config_t *fmmu, /**< EtherCAT FMMU configuration. */ |
77 const ec_fmmu_config_t *fmmu, /**< EtherCAT FMMU configuration. */ |
78 const ec_sync_t *sync, /**< Sync manager. */ |
78 const ec_sync_t *sync, /**< Sync manager. */ |
79 uint8_t *data /**> Configuration page memory. */ |
79 uint8_t *data /**> Configuration page memory. */ |
80 ) |
80 ) |
81 { |
81 { |
82 EC_CONFIG_DBG(fmmu->sc, 1, "FMMU: LogAddr 0x%08X, Size %3u," |
82 EC_CONFIG_DBG(fmmu->sc, 1, "FMMU: LogOff 0x%08X, Size %3u," |
83 " PhysAddr 0x%04X, SM%u, Dir %s\n", |
83 " PhysAddr 0x%04X, SM%u, Dir %s\n", |
84 fmmu->logical_start_address, fmmu->data_size, |
84 fmmu->logical_domain_offset, fmmu->data_size, |
85 sync->physical_start_address, fmmu->sync_index, |
85 sync->physical_start_address, fmmu->sync_index, |
86 fmmu->dir == EC_DIR_INPUT ? "in" : "out"); |
86 fmmu->dir == EC_DIR_INPUT ? "in" : "out"); |
87 |
87 |
88 EC_WRITE_U32(data, fmmu->logical_start_address); |
88 EC_WRITE_U32(data, fmmu->domain->logical_base_address + |
|
89 fmmu->logical_domain_offset); |
89 EC_WRITE_U16(data + 4, fmmu->data_size); // size of fmmu |
90 EC_WRITE_U16(data + 4, fmmu->data_size); // size of fmmu |
90 EC_WRITE_U8 (data + 6, 0x00); // logical start bit |
91 EC_WRITE_U8 (data + 6, 0x00); // logical start bit |
91 EC_WRITE_U8 (data + 7, 0x07); // logical end bit |
92 EC_WRITE_U8 (data + 7, 0x07); // logical end bit |
92 EC_WRITE_U16(data + 8, sync->physical_start_address); |
93 EC_WRITE_U16(data + 8, sync->physical_start_address); |
93 EC_WRITE_U8 (data + 10, 0x00); // physical start bit |
94 EC_WRITE_U8 (data + 10, 0x00); // physical start bit |