devices/8139too-2.6.17-ethercat.c
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     1 /******************************************************************************
       
     2  *
       
     3  *  $Id$
       
     4  *
       
     5  *  Copyright (C) 2006  Florian Pose, Ingenieurgemeinschaft IgH
       
     6  *
       
     7  *  This file is part of the IgH EtherCAT Master.
       
     8  *
       
     9  *  The IgH EtherCAT Master is free software; you can redistribute it
       
    10  *  and/or modify it under the terms of the GNU General Public License
       
    11  *  as published by the Free Software Foundation; either version 2 of the
       
    12  *  License, or (at your option) any later version.
       
    13  *
       
    14  *  The IgH EtherCAT Master is distributed in the hope that it will be
       
    15  *  useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
       
    16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
       
    17  *  GNU General Public License for more details.
       
    18  *
       
    19  *  You should have received a copy of the GNU General Public License
       
    20  *  along with the IgH EtherCAT Master; if not, write to the Free Software
       
    21  *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
       
    22  *
       
    23  *  The right to use EtherCAT Technology is granted and comes free of
       
    24  *  charge under condition of compatibility of product made by
       
    25  *  Licensee. People intending to distribute/sell products based on the
       
    26  *  code, have to sign an agreement to guarantee that products using
       
    27  *  software based on IgH EtherCAT master stay compatible with the actual
       
    28  *  EtherCAT specification (which are released themselves as an open
       
    29  *  standard) as the (only) precondition to have the right to use EtherCAT
       
    30  *  Technology, IP and trade marks.
       
    31  *
       
    32  *****************************************************************************/
       
    33 
       
    34 /**
       
    35    \file
       
    36    EtherCAT driver for RTL8139-compatible NICs.
       
    37 */
       
    38 
       
    39 /*****************************************************************************/
       
    40 
       
    41 /*
       
    42   Former documentation:
       
    43 
       
    44 	8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
       
    45 
       
    46 	Maintained by Jeff Garzik <jgarzik@pobox.com>
       
    47 	Copyright 2000-2002 Jeff Garzik
       
    48 
       
    49 	Much code comes from Donald Becker's rtl8139.c driver,
       
    50 	versions 1.13 and older.  This driver was originally based
       
    51 	on rtl8139.c version 1.07.  Header of rtl8139.c version 1.13:
       
    52 
       
    53 	-----<snip>-----
       
    54 
       
    55         	Written 1997-2001 by Donald Becker.
       
    56 		This software may be used and distributed according to the
       
    57 		terms of the GNU General Public License (GPL), incorporated
       
    58 		herein by reference.  Drivers based on or derived from this
       
    59 		code fall under the GPL and must retain the authorship,
       
    60 		copyright and license notice.  This file is not a complete
       
    61 		program and may only be used when the entire operating
       
    62 		system is licensed under the GPL.
       
    63 
       
    64 		This driver is for boards based on the RTL8129 and RTL8139
       
    65 		PCI ethernet chips.
       
    66 
       
    67 		The author may be reached as becker@scyld.com, or C/O Scyld
       
    68 		Computing Corporation 410 Severn Ave., Suite 210 Annapolis
       
    69 		MD 21403
       
    70 
       
    71 		Support and updates available at
       
    72 		http://www.scyld.com/network/rtl8139.html
       
    73 
       
    74 		Twister-tuning table provided by Kinston
       
    75 		<shangh@realtek.com.tw>.
       
    76 
       
    77 	-----<snip>-----
       
    78 
       
    79 	This software may be used and distributed according to the terms
       
    80 	of the GNU General Public License, incorporated herein by reference.
       
    81 
       
    82 	Contributors:
       
    83 
       
    84 		Donald Becker - he wrote the original driver, kudos to him!
       
    85 		(but please don't e-mail him for support, this isn't his driver)
       
    86 
       
    87 		Tigran Aivazian - bug fixes, skbuff free cleanup
       
    88 
       
    89 		Martin Mares - suggestions for PCI cleanup
       
    90 
       
    91 		David S. Miller - PCI DMA and softnet updates
       
    92 
       
    93 		Ernst Gill - fixes ported from BSD driver
       
    94 
       
    95 		Daniel Kobras - identified specific locations of
       
    96 			posted MMIO write bugginess
       
    97 
       
    98 		Gerard Sharp - bug fix, testing and feedback
       
    99 
       
   100 		David Ford - Rx ring wrap fix
       
   101 
       
   102 		Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
       
   103 		to find and fix a crucial bug on older chipsets.
       
   104 
       
   105 		Donald Becker/Chris Butterworth/Marcus Westergren -
       
   106 		Noticed various Rx packet size-related buglets.
       
   107 
       
   108 		Santiago Garcia Mantinan - testing and feedback
       
   109 
       
   110 		Jens David - 2.2.x kernel backports
       
   111 
       
   112 		Martin Dennett - incredibly helpful insight on undocumented
       
   113 		features of the 8139 chips
       
   114 
       
   115 		Jean-Jacques Michel - bug fix
       
   116 
       
   117 		Tobias Ringström - Rx interrupt status checking suggestion
       
   118 
       
   119 		Andrew Morton - Clear blocked signals, avoid
       
   120 		buffer overrun setting current->comm.
       
   121 
       
   122 		Kalle Olavi Niemitalo - Wake-on-LAN ioctls
       
   123 
       
   124 		Robert Kuebel - Save kernel thread from dying on any signal.
       
   125 
       
   126 	Submitting bug reports:
       
   127 
       
   128 		"rtl8139-diag -mmmaaavvveefN" output
       
   129 		enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
       
   130 
       
   131 */
       
   132 
       
   133 #define DRV_NAME	"ec_8139too"
       
   134 #define DRV_VERSION	"0.9.27"
       
   135 
       
   136 
       
   137 #include <linux/config.h>
       
   138 #include <linux/module.h>
       
   139 #include <linux/kernel.h>
       
   140 #include <linux/compiler.h>
       
   141 #include <linux/pci.h>
       
   142 #include <linux/init.h>
       
   143 #include <linux/ioport.h>
       
   144 #include <linux/netdevice.h>
       
   145 #include <linux/etherdevice.h>
       
   146 #include <linux/rtnetlink.h>
       
   147 #include <linux/delay.h>
       
   148 #include <linux/ethtool.h>
       
   149 #include <linux/mii.h>
       
   150 #include <linux/completion.h>
       
   151 #include <linux/crc32.h>
       
   152 #include <asm/io.h>
       
   153 #include <asm/uaccess.h>
       
   154 #include <asm/irq.h>
       
   155 
       
   156 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
   157 
       
   158 #include "../globals.h"
       
   159 #include "ecdev.h"
       
   160 
       
   161 #define RTL8139_DRIVER_NAME DRV_NAME \
       
   162                             " EtherCAT-capable Fast Ethernet driver " \
       
   163                             DRV_VERSION ", master " EC_MASTER_VERSION
       
   164 
       
   165 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
   166 
       
   167 #define PFX DRV_NAME ": "
       
   168 
       
   169 /* Default Message level */
       
   170 #define RTL8139_DEF_MSG_ENABLE   (NETIF_MSG_DRV   | \
       
   171                                  NETIF_MSG_PROBE  | \
       
   172                                  NETIF_MSG_LINK)
       
   173 
       
   174 
       
   175 /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */
       
   176 #ifdef CONFIG_8139TOO_PIO
       
   177 #define USE_IO_OPS 1
       
   178 #endif
       
   179 
       
   180 /* define to 1, 2 or 3 to enable copious debugging info */
       
   181 #define RTL8139_DEBUG 0
       
   182 
       
   183 /* define to 1 to disable lightweight runtime debugging checks */
       
   184 #undef RTL8139_NDEBUG
       
   185 
       
   186 
       
   187 #if RTL8139_DEBUG
       
   188 /* note: prints function name for you */
       
   189 #  define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
       
   190 #else
       
   191 #  define DPRINTK(fmt, args...)
       
   192 #endif
       
   193 
       
   194 #ifdef RTL8139_NDEBUG
       
   195 #  define assert(expr) do {} while (0)
       
   196 #else
       
   197 #  define assert(expr) \
       
   198         if(unlikely(!(expr))) {				        \
       
   199         printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n",	\
       
   200         #expr,__FILE__,__FUNCTION__,__LINE__);		        \
       
   201         }
       
   202 #endif
       
   203 
       
   204 
       
   205 /* A few user-configurable values. */
       
   206 /* media options */
       
   207 #define MAX_UNITS 8
       
   208 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   209 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   210 
       
   211 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
       
   212    The RTL chips use a 64 element hash table based on the Ethernet CRC.  */
       
   213 static int multicast_filter_limit = 32;
       
   214 
       
   215 /* bitmapped message enable number */
       
   216 static int debug = -1;
       
   217 
       
   218 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
   219 
       
   220 static int ec_device_index = -1;
       
   221 static int ec_device_master_index = 0;
       
   222 static ec_device_t *rtl_ec_dev;
       
   223 struct net_device *rtl_ec_net_dev = NULL;
       
   224 
       
   225 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
   226 
       
   227 /*
       
   228  * Receive ring size 
       
   229  * Warning: 64K ring has hardware issues and may lock up.
       
   230  */
       
   231 #if defined(CONFIG_SH_DREAMCAST)
       
   232 #define RX_BUF_IDX	1	/* 16K ring */
       
   233 #else
       
   234 #define RX_BUF_IDX	2	/* 32K ring */
       
   235 #endif
       
   236 #define RX_BUF_LEN	(8192 << RX_BUF_IDX)
       
   237 #define RX_BUF_PAD	16
       
   238 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
       
   239 
       
   240 #if RX_BUF_LEN == 65536
       
   241 #define RX_BUF_TOT_LEN	RX_BUF_LEN
       
   242 #else
       
   243 #define RX_BUF_TOT_LEN	(RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
       
   244 #endif
       
   245 
       
   246 /* Number of Tx descriptor registers. */
       
   247 #define NUM_TX_DESC	4
       
   248 
       
   249 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
       
   250 #define MAX_ETH_FRAME_SIZE	1536
       
   251 
       
   252 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
       
   253 #define TX_BUF_SIZE	MAX_ETH_FRAME_SIZE
       
   254 #define TX_BUF_TOT_LEN	(TX_BUF_SIZE * NUM_TX_DESC)
       
   255 
       
   256 /* PCI Tuning Parameters
       
   257    Threshold is bytes transferred to chip before transmission starts. */
       
   258 #define TX_FIFO_THRESH 256	/* In bytes, rounded down to 32 byte units. */
       
   259 
       
   260 /* The following settings are log_2(bytes)-4:  0 == 16 bytes .. 6==1024, 7==end of packet. */
       
   261 #define RX_FIFO_THRESH	7	/* Rx buffer level before first PCI xfer.  */
       
   262 #define RX_DMA_BURST	7	/* Maximum PCI burst, '6' is 1024 */
       
   263 #define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
       
   264 #define TX_RETRY	8	/* 0-15.  retries = 16 + (TX_RETRY * 16) */
       
   265 
       
   266 /* Operational parameters that usually are not changed. */
       
   267 /* Time in jiffies before concluding the transmitter is hung. */
       
   268 #define TX_TIMEOUT  (6*HZ)
       
   269 
       
   270 
       
   271 enum {
       
   272 	HAS_MII_XCVR = 0x010000,
       
   273 	HAS_CHIP_XCVR = 0x020000,
       
   274 	HAS_LNK_CHNG = 0x040000,
       
   275 };
       
   276 
       
   277 #define RTL_NUM_STATS 4		/* number of ETHTOOL_GSTATS u64's */
       
   278 #define RTL_REGS_VER 1		/* version of reg. data in ETHTOOL_GREGS */
       
   279 #define RTL_MIN_IO_SIZE 0x80
       
   280 #define RTL8139B_IO_SIZE 256
       
   281 
       
   282 #define RTL8129_CAPS	HAS_MII_XCVR
       
   283 #define RTL8139_CAPS	HAS_CHIP_XCVR|HAS_LNK_CHNG
       
   284 
       
   285 typedef enum {
       
   286 	RTL8139 = 0,
       
   287 	RTL8129,
       
   288 } board_t;
       
   289 
       
   290 
       
   291 /* indexed by board_t, above */
       
   292 static const struct {
       
   293 	const char *name;
       
   294 	u32 hw_flags;
       
   295 } board_info[] __devinitdata = {
       
   296 	{ "RealTek RTL8139", RTL8139_CAPS },
       
   297 	{ "RealTek RTL8129", RTL8129_CAPS },
       
   298 };
       
   299 
       
   300 
       
   301 static struct pci_device_id rtl8139_pci_tbl[] = {
       
   302 	{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   303 	{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   304 	{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   305 	{0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   306 	{0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   307 	{0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   308 	{0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   309 	{0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   310 	{0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   311 	{0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   312 	{0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   313 	{0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   314 	{0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   315 	{0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   316 	{0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   317 	{0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   318 	{0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   319 	{0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   320 	{0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, 
       
   321 
       
   322 #ifdef CONFIG_SH_SECUREEDGE5410
       
   323 	/* Bogus 8139 silicon reports 8129 without external PROM :-( */
       
   324 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   325 #endif
       
   326 #ifdef CONFIG_8139TOO_8129
       
   327 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
       
   328 #endif
       
   329 
       
   330 	/* some crazy cards report invalid vendor ids like
       
   331 	 * 0x0001 here.  The other ids are valid and constant,
       
   332 	 * so we simply don't match on the main vendor id.
       
   333 	 */
       
   334 	{PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
       
   335 	{PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
       
   336 	{PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
       
   337 
       
   338 	{0,}
       
   339 };
       
   340 
       
   341 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
   342 
       
   343 /* prevent driver from being loaded automatically */
       
   344 //MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
       
   345 
       
   346 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
   347 
       
   348 static struct {
       
   349 	const char str[ETH_GSTRING_LEN];
       
   350 } ethtool_stats_keys[] = {
       
   351 	{ "early_rx" },
       
   352 	{ "tx_buf_mapped" },
       
   353 	{ "tx_timeouts" },
       
   354 	{ "rx_lost_in_ring" },
       
   355 };
       
   356 
       
   357 /* The rest of these values should never change. */
       
   358 
       
   359 /* Symbolic offsets to registers. */
       
   360 enum RTL8139_registers {
       
   361 	MAC0 = 0,		/* Ethernet hardware address. */
       
   362 	MAR0 = 8,		/* Multicast filter. */
       
   363 	TxStatus0 = 0x10,	/* Transmit status (Four 32bit registers). */
       
   364 	TxAddr0 = 0x20,		/* Tx descriptors (also four 32bit). */
       
   365 	RxBuf = 0x30,
       
   366 	ChipCmd = 0x37,
       
   367 	RxBufPtr = 0x38,
       
   368 	RxBufAddr = 0x3A,
       
   369 	IntrMask = 0x3C,
       
   370 	IntrStatus = 0x3E,
       
   371 	TxConfig = 0x40,
       
   372 	RxConfig = 0x44,
       
   373 	Timer = 0x48,		/* A general-purpose counter. */
       
   374 	RxMissed = 0x4C,	/* 24 bits valid, write clears. */
       
   375 	Cfg9346 = 0x50,
       
   376 	Config0 = 0x51,
       
   377 	Config1 = 0x52,
       
   378 	FlashReg = 0x54,
       
   379 	MediaStatus = 0x58,
       
   380 	Config3 = 0x59,
       
   381 	Config4 = 0x5A,		/* absent on RTL-8139A */
       
   382 	HltClk = 0x5B,
       
   383 	MultiIntr = 0x5C,
       
   384 	TxSummary = 0x60,
       
   385 	BasicModeCtrl = 0x62,
       
   386 	BasicModeStatus = 0x64,
       
   387 	NWayAdvert = 0x66,
       
   388 	NWayLPAR = 0x68,
       
   389 	NWayExpansion = 0x6A,
       
   390 	/* Undocumented registers, but required for proper operation. */
       
   391 	FIFOTMS = 0x70,		/* FIFO Control and test. */
       
   392 	CSCR = 0x74,		/* Chip Status and Configuration Register. */
       
   393 	PARA78 = 0x78,
       
   394 	PARA7c = 0x7c,		/* Magic transceiver parameter register. */
       
   395 	Config5 = 0xD8,		/* absent on RTL-8139A */
       
   396 };
       
   397 
       
   398 enum ClearBitMasks {
       
   399 	MultiIntrClear = 0xF000,
       
   400 	ChipCmdClear = 0xE2,
       
   401 	Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
       
   402 };
       
   403 
       
   404 enum ChipCmdBits {
       
   405 	CmdReset = 0x10,
       
   406 	CmdRxEnb = 0x08,
       
   407 	CmdTxEnb = 0x04,
       
   408 	RxBufEmpty = 0x01,
       
   409 };
       
   410 
       
   411 /* Interrupt register bits, using my own meaningful names. */
       
   412 enum IntrStatusBits {
       
   413 	PCIErr = 0x8000,
       
   414 	PCSTimeout = 0x4000,
       
   415 	RxFIFOOver = 0x40,
       
   416 	RxUnderrun = 0x20,
       
   417 	RxOverflow = 0x10,
       
   418 	TxErr = 0x08,
       
   419 	TxOK = 0x04,
       
   420 	RxErr = 0x02,
       
   421 	RxOK = 0x01,
       
   422 
       
   423 	RxAckBits = RxFIFOOver | RxOverflow | RxOK,
       
   424 };
       
   425 
       
   426 enum TxStatusBits {
       
   427 	TxHostOwns = 0x2000,
       
   428 	TxUnderrun = 0x4000,
       
   429 	TxStatOK = 0x8000,
       
   430 	TxOutOfWindow = 0x20000000,
       
   431 	TxAborted = 0x40000000,
       
   432 	TxCarrierLost = 0x80000000,
       
   433 };
       
   434 enum RxStatusBits {
       
   435 	RxMulticast = 0x8000,
       
   436 	RxPhysical = 0x4000,
       
   437 	RxBroadcast = 0x2000,
       
   438 	RxBadSymbol = 0x0020,
       
   439 	RxRunt = 0x0010,
       
   440 	RxTooLong = 0x0008,
       
   441 	RxCRCErr = 0x0004,
       
   442 	RxBadAlign = 0x0002,
       
   443 	RxStatusOK = 0x0001,
       
   444 };
       
   445 
       
   446 /* Bits in RxConfig. */
       
   447 enum rx_mode_bits {
       
   448 	AcceptErr = 0x20,
       
   449 	AcceptRunt = 0x10,
       
   450 	AcceptBroadcast = 0x08,
       
   451 	AcceptMulticast = 0x04,
       
   452 	AcceptMyPhys = 0x02,
       
   453 	AcceptAllPhys = 0x01,
       
   454 };
       
   455 
       
   456 /* Bits in TxConfig. */
       
   457 enum tx_config_bits {
       
   458 
       
   459         /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */
       
   460         TxIFGShift = 24,
       
   461         TxIFG84 = (0 << TxIFGShift),    /* 8.4us / 840ns (10 / 100Mbps) */
       
   462         TxIFG88 = (1 << TxIFGShift),    /* 8.8us / 880ns (10 / 100Mbps) */
       
   463         TxIFG92 = (2 << TxIFGShift),    /* 9.2us / 920ns (10 / 100Mbps) */
       
   464         TxIFG96 = (3 << TxIFGShift),    /* 9.6us / 960ns (10 / 100Mbps) */
       
   465 
       
   466 	TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */
       
   467 	TxCRC = (1 << 16),	/* DISABLE appending CRC to end of Tx packets */
       
   468 	TxClearAbt = (1 << 0),	/* Clear abort (WO) */
       
   469 	TxDMAShift = 8,		/* DMA burst value (0-7) is shifted this many bits */
       
   470 	TxRetryShift = 4,	/* TXRR value (0-15) is shifted this many bits */
       
   471 
       
   472 	TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */
       
   473 };
       
   474 
       
   475 /* Bits in Config1 */
       
   476 enum Config1Bits {
       
   477 	Cfg1_PM_Enable = 0x01,
       
   478 	Cfg1_VPD_Enable = 0x02,
       
   479 	Cfg1_PIO = 0x04,
       
   480 	Cfg1_MMIO = 0x08,
       
   481 	LWAKE = 0x10,		/* not on 8139, 8139A */
       
   482 	Cfg1_Driver_Load = 0x20,
       
   483 	Cfg1_LED0 = 0x40,
       
   484 	Cfg1_LED1 = 0x80,
       
   485 	SLEEP = (1 << 1),	/* only on 8139, 8139A */
       
   486 	PWRDN = (1 << 0),	/* only on 8139, 8139A */
       
   487 };
       
   488 
       
   489 /* Bits in Config3 */
       
   490 enum Config3Bits {
       
   491 	Cfg3_FBtBEn    = (1 << 0), /* 1 = Fast Back to Back */
       
   492 	Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */
       
   493 	Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */
       
   494 	Cfg3_CardB_En  = (1 << 3), /* 1 = enable CardBus registers */
       
   495 	Cfg3_LinkUp    = (1 << 4), /* 1 = wake up on link up */
       
   496 	Cfg3_Magic     = (1 << 5), /* 1 = wake up on Magic Packet (tm) */
       
   497 	Cfg3_PARM_En   = (1 << 6), /* 0 = software can set twister parameters */
       
   498 	Cfg3_GNTSel    = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */
       
   499 };
       
   500 
       
   501 /* Bits in Config4 */
       
   502 enum Config4Bits {
       
   503 	LWPTN = (1 << 2),	/* not on 8139, 8139A */
       
   504 };
       
   505 
       
   506 /* Bits in Config5 */
       
   507 enum Config5Bits {
       
   508 	Cfg5_PME_STS     = (1 << 0), /* 1 = PCI reset resets PME_Status */
       
   509 	Cfg5_LANWake     = (1 << 1), /* 1 = enable LANWake signal */
       
   510 	Cfg5_LDPS        = (1 << 2), /* 0 = save power when link is down */
       
   511 	Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */
       
   512 	Cfg5_UWF         = (1 << 4), /* 1 = accept unicast wakeup frame */
       
   513 	Cfg5_MWF         = (1 << 5), /* 1 = accept multicast wakeup frame */
       
   514 	Cfg5_BWF         = (1 << 6), /* 1 = accept broadcast wakeup frame */
       
   515 };
       
   516 
       
   517 enum RxConfigBits {
       
   518 	/* rx fifo threshold */
       
   519 	RxCfgFIFOShift = 13,
       
   520 	RxCfgFIFONone = (7 << RxCfgFIFOShift),
       
   521 
       
   522 	/* Max DMA burst */
       
   523 	RxCfgDMAShift = 8,
       
   524 	RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
       
   525 
       
   526 	/* rx ring buffer length */
       
   527 	RxCfgRcv8K = 0,
       
   528 	RxCfgRcv16K = (1 << 11),
       
   529 	RxCfgRcv32K = (1 << 12),
       
   530 	RxCfgRcv64K = (1 << 11) | (1 << 12),
       
   531 
       
   532 	/* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
       
   533 	RxNoWrap = (1 << 7),
       
   534 };
       
   535 
       
   536 /* Twister tuning parameters from RealTek.
       
   537    Completely undocumented, but required to tune bad links on some boards. */
       
   538 enum CSCRBits {
       
   539 	CSCR_LinkOKBit = 0x0400,
       
   540 	CSCR_LinkChangeBit = 0x0800,
       
   541 	CSCR_LinkStatusBits = 0x0f000,
       
   542 	CSCR_LinkDownOffCmd = 0x003c0,
       
   543 	CSCR_LinkDownCmd = 0x0f3c0,
       
   544 };
       
   545 
       
   546 enum Cfg9346Bits {
       
   547 	Cfg9346_Lock = 0x00,
       
   548 	Cfg9346_Unlock = 0xC0,
       
   549 };
       
   550 
       
   551 typedef enum {
       
   552 	CH_8139 = 0,
       
   553 	CH_8139_K,
       
   554 	CH_8139A,
       
   555 	CH_8139A_G,
       
   556 	CH_8139B,
       
   557 	CH_8130,
       
   558 	CH_8139C,
       
   559 	CH_8100,
       
   560 	CH_8100B_8139D,
       
   561 	CH_8101,
       
   562 } chip_t;
       
   563 
       
   564 enum chip_flags {
       
   565 	HasHltClk = (1 << 0),
       
   566 	HasLWake = (1 << 1),
       
   567 };
       
   568 
       
   569 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
       
   570 	(b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
       
   571 #define HW_REVID_MASK	HW_REVID(1, 1, 1, 1, 1, 1, 1)
       
   572 
       
   573 /* directly indexed by chip_t, above */
       
   574 static const struct {
       
   575 	const char *name;
       
   576 	u32 version; /* from RTL8139C/RTL8139D docs */
       
   577 	u32 flags;
       
   578 } rtl_chip_info[] = {
       
   579 	{ "RTL-8139",
       
   580 	  HW_REVID(1, 0, 0, 0, 0, 0, 0),
       
   581 	  HasHltClk,
       
   582 	},
       
   583 
       
   584 	{ "RTL-8139 rev K",
       
   585 	  HW_REVID(1, 1, 0, 0, 0, 0, 0),
       
   586 	  HasHltClk,
       
   587 	},
       
   588 
       
   589 	{ "RTL-8139A",
       
   590 	  HW_REVID(1, 1, 1, 0, 0, 0, 0),
       
   591 	  HasHltClk, /* XXX undocumented? */
       
   592 	},
       
   593 
       
   594 	{ "RTL-8139A rev G",
       
   595 	  HW_REVID(1, 1, 1, 0, 0, 1, 0),
       
   596 	  HasHltClk, /* XXX undocumented? */
       
   597 	},
       
   598 
       
   599 	{ "RTL-8139B",
       
   600 	  HW_REVID(1, 1, 1, 1, 0, 0, 0),
       
   601 	  HasLWake,
       
   602 	},
       
   603 
       
   604 	{ "RTL-8130",
       
   605 	  HW_REVID(1, 1, 1, 1, 1, 0, 0),
       
   606 	  HasLWake,
       
   607 	},
       
   608 
       
   609 	{ "RTL-8139C",
       
   610 	  HW_REVID(1, 1, 1, 0, 1, 0, 0),
       
   611 	  HasLWake,
       
   612 	},
       
   613 
       
   614 	{ "RTL-8100",
       
   615 	  HW_REVID(1, 1, 1, 1, 0, 1, 0),
       
   616  	  HasLWake,
       
   617  	},
       
   618 
       
   619 	{ "RTL-8100B/8139D",
       
   620 	  HW_REVID(1, 1, 1, 0, 1, 0, 1),
       
   621 	  HasHltClk /* XXX undocumented? */
       
   622 	| HasLWake,
       
   623 	},
       
   624 
       
   625 	{ "RTL-8101",
       
   626 	  HW_REVID(1, 1, 1, 0, 1, 1, 1),
       
   627 	  HasLWake,
       
   628 	},
       
   629 };
       
   630 
       
   631 struct rtl_extra_stats {
       
   632 	unsigned long early_rx;
       
   633 	unsigned long tx_buf_mapped;
       
   634 	unsigned long tx_timeouts;
       
   635 	unsigned long rx_lost_in_ring;
       
   636 };
       
   637 
       
   638 struct rtl8139_private {
       
   639 	void __iomem *mmio_addr;
       
   640 	int drv_flags;
       
   641 	struct pci_dev *pci_dev;
       
   642 	u32 msg_enable;
       
   643 	struct net_device_stats stats;
       
   644 	unsigned char *rx_ring;
       
   645 	unsigned int cur_rx;	/* Index into the Rx buffer of next Rx pkt. */
       
   646 	unsigned int tx_flag;
       
   647 	unsigned long cur_tx;
       
   648 	unsigned long dirty_tx;
       
   649 	unsigned char *tx_buf[NUM_TX_DESC];	/* Tx bounce buffers */
       
   650 	unsigned char *tx_bufs;	/* Tx bounce buffer region. */
       
   651 	dma_addr_t rx_ring_dma;
       
   652 	dma_addr_t tx_bufs_dma;
       
   653 	signed char phys[4];		/* MII device addresses. */
       
   654 	char twistie, twist_row, twist_col;	/* Twister tune state. */
       
   655 	unsigned int watchdog_fired : 1;
       
   656 	unsigned int default_port : 4;	/* Last dev->if_port value. */
       
   657 	unsigned int have_thread : 1;
       
   658 	spinlock_t lock;
       
   659 	spinlock_t rx_lock;
       
   660 	chip_t chipset;
       
   661 	u32 rx_config;
       
   662 	struct rtl_extra_stats xstats;
       
   663 
       
   664 	struct work_struct thread;
       
   665 
       
   666 	struct mii_if_info mii;
       
   667 	unsigned int regs_len;
       
   668 	unsigned long fifo_copy_timeout;
       
   669 };
       
   670 
       
   671 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
   672 
       
   673 MODULE_AUTHOR("Florian Pose <fp@igh-essen.com>");
       
   674 MODULE_DESCRIPTION("RealTek RTL-8139 EtherCAT driver");
       
   675 MODULE_LICENSE("GPL");
       
   676 MODULE_VERSION(EC_MASTER_VERSION);
       
   677 
       
   678 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
   679 
       
   680 module_param(multicast_filter_limit, int, 0);
       
   681 module_param_array(media, int, NULL, 0);
       
   682 module_param_array(full_duplex, int, NULL, 0);
       
   683 module_param(debug, int, 0);
       
   684 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
       
   685 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
       
   686 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
       
   687 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
       
   688 
       
   689 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
   690 
       
   691 module_param(ec_device_index, int, -1);
       
   692 module_param(ec_device_master_index, int, 0);
       
   693 MODULE_PARM_DESC(ec_device_index,
       
   694                  "Index of the device reserved for EtherCAT.");
       
   695 MODULE_PARM_DESC(ec_device_master_index,
       
   696                  "Index of the EtherCAT master to register the device.");
       
   697 
       
   698 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
   699 
       
   700 static int read_eeprom (void __iomem *ioaddr, int location, int addr_len);
       
   701 static int rtl8139_open (struct net_device *dev);
       
   702 static int mdio_read (struct net_device *dev, int phy_id, int location);
       
   703 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
   704 			int val);
       
   705 static void rtl8139_start_thread(struct rtl8139_private *tp);
       
   706 static void rtl8139_tx_timeout (struct net_device *dev);
       
   707 static void rtl8139_init_ring (struct net_device *dev);
       
   708 static int rtl8139_start_xmit (struct sk_buff *skb,
       
   709 			       struct net_device *dev);
       
   710 static int rtl8139_poll(struct net_device *dev, int *budget);
       
   711 #ifdef CONFIG_NET_POLL_CONTROLLER
       
   712 static void rtl8139_poll_controller(struct net_device *dev);
       
   713 #endif
       
   714 irqreturn_t rtl8139_interrupt (int irq, void *dev_instance,
       
   715                                struct pt_regs *regs);
       
   716 static int rtl8139_close (struct net_device *dev);
       
   717 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
       
   718 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev);
       
   719 static void rtl8139_set_rx_mode (struct net_device *dev);
       
   720 static void __set_rx_mode (struct net_device *dev);
       
   721 static void rtl8139_hw_start (struct net_device *dev);
       
   722 static void rtl8139_thread (void *_data);
       
   723 static void rtl8139_tx_timeout_task(void *_data);
       
   724 static struct ethtool_ops rtl8139_ethtool_ops;
       
   725 
       
   726 /* write MMIO register, with flush */
       
   727 /* Flush avoids rtl8139 bug w/ posted MMIO writes */
       
   728 #define RTL_W8_F(reg, val8)	do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0)
       
   729 #define RTL_W16_F(reg, val16)	do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0)
       
   730 #define RTL_W32_F(reg, val32)	do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0)
       
   731 
       
   732 
       
   733 #define MMIO_FLUSH_AUDIT_COMPLETE 1
       
   734 #if MMIO_FLUSH_AUDIT_COMPLETE
       
   735 
       
   736 /* write MMIO register */
       
   737 #define RTL_W8(reg, val8)	iowrite8 ((val8), ioaddr + (reg))
       
   738 #define RTL_W16(reg, val16)	iowrite16 ((val16), ioaddr + (reg))
       
   739 #define RTL_W32(reg, val32)	iowrite32 ((val32), ioaddr + (reg))
       
   740 
       
   741 #else
       
   742 
       
   743 /* write MMIO register, then flush */
       
   744 #define RTL_W8		RTL_W8_F
       
   745 #define RTL_W16		RTL_W16_F
       
   746 #define RTL_W32		RTL_W32_F
       
   747 
       
   748 #endif /* MMIO_FLUSH_AUDIT_COMPLETE */
       
   749 
       
   750 /* read MMIO register */
       
   751 #define RTL_R8(reg)		ioread8 (ioaddr + (reg))
       
   752 #define RTL_R16(reg)		ioread16 (ioaddr + (reg))
       
   753 #define RTL_R32(reg)		((unsigned long) ioread32 (ioaddr + (reg)))
       
   754 
       
   755 
       
   756 static const u16 rtl8139_intr_mask =
       
   757 	PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
       
   758 	TxErr | TxOK | RxErr | RxOK;
       
   759 
       
   760 static const u16 rtl8139_norx_intr_mask =
       
   761 	PCIErr | PCSTimeout | RxUnderrun |
       
   762 	TxErr | TxOK | RxErr ;
       
   763 
       
   764 #if RX_BUF_IDX == 0
       
   765 static const unsigned int rtl8139_rx_config =
       
   766 	RxCfgRcv8K | RxNoWrap |
       
   767 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   768 	(RX_DMA_BURST << RxCfgDMAShift);
       
   769 #elif RX_BUF_IDX == 1
       
   770 static const unsigned int rtl8139_rx_config =
       
   771 	RxCfgRcv16K | RxNoWrap |
       
   772 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   773 	(RX_DMA_BURST << RxCfgDMAShift);
       
   774 #elif RX_BUF_IDX == 2
       
   775 static const unsigned int rtl8139_rx_config =
       
   776 	RxCfgRcv32K | RxNoWrap |
       
   777 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   778 	(RX_DMA_BURST << RxCfgDMAShift);
       
   779 #elif RX_BUF_IDX == 3
       
   780 static const unsigned int rtl8139_rx_config =
       
   781 	RxCfgRcv64K |
       
   782 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   783 	(RX_DMA_BURST << RxCfgDMAShift);
       
   784 #else
       
   785 #error "Invalid configuration for 8139_RXBUF_IDX"
       
   786 #endif
       
   787 
       
   788 static const unsigned int rtl8139_tx_config =
       
   789 	TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
       
   790 
       
   791 static void __rtl8139_cleanup_dev (struct net_device *dev)
       
   792 {
       
   793 	struct rtl8139_private *tp = netdev_priv(dev);
       
   794 	struct pci_dev *pdev;
       
   795 
       
   796 	assert (dev != NULL);
       
   797 	assert (tp->pci_dev != NULL);
       
   798 	pdev = tp->pci_dev;
       
   799 
       
   800 #ifdef USE_IO_OPS
       
   801 	if (tp->mmio_addr)
       
   802 		ioport_unmap (tp->mmio_addr);
       
   803 #else
       
   804 	if (tp->mmio_addr)
       
   805 		pci_iounmap (pdev, tp->mmio_addr);
       
   806 #endif /* USE_IO_OPS */
       
   807 
       
   808 	/* it's ok to call this even if we have no regions to free */
       
   809 	pci_release_regions (pdev);
       
   810 
       
   811 	free_netdev(dev);
       
   812 	pci_set_drvdata (pdev, NULL);
       
   813 }
       
   814 
       
   815 
       
   816 static void rtl8139_chip_reset (void __iomem *ioaddr)
       
   817 {
       
   818 	int i;
       
   819 
       
   820 	/* Soft reset the chip. */
       
   821 	RTL_W8 (ChipCmd, CmdReset);
       
   822 
       
   823 	/* Check that the chip has finished the reset. */
       
   824 	for (i = 1000; i > 0; i--) {
       
   825 		barrier();
       
   826 		if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
       
   827 			break;
       
   828 		udelay (10);
       
   829 	}
       
   830 }
       
   831 
       
   832 
       
   833 static int __devinit rtl8139_init_board (struct pci_dev *pdev,
       
   834 					 struct net_device **dev_out)
       
   835 {
       
   836 	void __iomem *ioaddr;
       
   837 	struct net_device *dev;
       
   838 	struct rtl8139_private *tp;
       
   839 	u8 tmp8;
       
   840 	int rc, disable_dev_on_err = 0;
       
   841 	unsigned int i;
       
   842 	unsigned long pio_start, pio_end, pio_flags, pio_len;
       
   843 	unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
       
   844 	u32 version;
       
   845 
       
   846 	assert (pdev != NULL);
       
   847 
       
   848 	*dev_out = NULL;
       
   849 
       
   850 	/* dev and priv zeroed in alloc_etherdev */
       
   851 	dev = alloc_etherdev (sizeof (*tp));
       
   852 	if (dev == NULL) {
       
   853 		printk (KERN_ERR PFX "%s: Unable to alloc new net device\n", pci_name(pdev));
       
   854 		return -ENOMEM;
       
   855 	}
       
   856 	SET_MODULE_OWNER(dev);
       
   857 	SET_NETDEV_DEV(dev, &pdev->dev);
       
   858 
       
   859 	tp = netdev_priv(dev);
       
   860 	tp->pci_dev = pdev;
       
   861 
       
   862 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
       
   863 	rc = pci_enable_device (pdev);
       
   864 	if (rc)
       
   865 		goto err_out;
       
   866 
       
   867 	pio_start = pci_resource_start (pdev, 0);
       
   868 	pio_end = pci_resource_end (pdev, 0);
       
   869 	pio_flags = pci_resource_flags (pdev, 0);
       
   870 	pio_len = pci_resource_len (pdev, 0);
       
   871 
       
   872 	mmio_start = pci_resource_start (pdev, 1);
       
   873 	mmio_end = pci_resource_end (pdev, 1);
       
   874 	mmio_flags = pci_resource_flags (pdev, 1);
       
   875 	mmio_len = pci_resource_len (pdev, 1);
       
   876 
       
   877 	/* set this immediately, we need to know before
       
   878 	 * we talk to the chip directly */
       
   879 	DPRINTK("PIO region size == 0x%02X\n", pio_len);
       
   880 	DPRINTK("MMIO region size == 0x%02lX\n", mmio_len);
       
   881 
       
   882 #ifdef USE_IO_OPS
       
   883 	/* make sure PCI base addr 0 is PIO */
       
   884 	if (!(pio_flags & IORESOURCE_IO)) {
       
   885 		printk (KERN_ERR PFX "%s: region #0 not a PIO resource, aborting\n", pci_name(pdev));
       
   886 		rc = -ENODEV;
       
   887 		goto err_out;
       
   888 	}
       
   889 	/* check for weird/broken PCI region reporting */
       
   890 	if (pio_len < RTL_MIN_IO_SIZE) {
       
   891 		printk (KERN_ERR PFX "%s: Invalid PCI I/O region size(s), aborting\n", pci_name(pdev));
       
   892 		rc = -ENODEV;
       
   893 		goto err_out;
       
   894 	}
       
   895 #else
       
   896 	/* make sure PCI base addr 1 is MMIO */
       
   897 	if (!(mmio_flags & IORESOURCE_MEM)) {
       
   898 		printk (KERN_ERR PFX "%s: region #1 not an MMIO resource, aborting\n", pci_name(pdev));
       
   899 		rc = -ENODEV;
       
   900 		goto err_out;
       
   901 	}
       
   902 	if (mmio_len < RTL_MIN_IO_SIZE) {
       
   903 		printk (KERN_ERR PFX "%s: Invalid PCI mem region size(s), aborting\n", pci_name(pdev));
       
   904 		rc = -ENODEV;
       
   905 		goto err_out;
       
   906 	}
       
   907 #endif
       
   908 
       
   909 	rc = pci_request_regions (pdev, "8139too");
       
   910 	if (rc)
       
   911 		goto err_out;
       
   912 	disable_dev_on_err = 1;
       
   913 
       
   914 	/* enable PCI bus-mastering */
       
   915 	pci_set_master (pdev);
       
   916 
       
   917 #ifdef USE_IO_OPS
       
   918 	ioaddr = ioport_map(pio_start, pio_len);
       
   919 	if (!ioaddr) {
       
   920 		printk (KERN_ERR PFX "%s: cannot map PIO, aborting\n", pci_name(pdev));
       
   921 		rc = -EIO;
       
   922 		goto err_out;
       
   923 	}
       
   924 	dev->base_addr = pio_start;
       
   925 	tp->mmio_addr = ioaddr;
       
   926 	tp->regs_len = pio_len;
       
   927 #else
       
   928 	/* ioremap MMIO region */
       
   929 	ioaddr = pci_iomap(pdev, 1, 0);
       
   930 	if (ioaddr == NULL) {
       
   931 		printk (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pci_name(pdev));
       
   932 		rc = -EIO;
       
   933 		goto err_out;
       
   934 	}
       
   935 	dev->base_addr = (long) ioaddr;
       
   936 	tp->mmio_addr = ioaddr;
       
   937 	tp->regs_len = mmio_len;
       
   938 #endif /* USE_IO_OPS */
       
   939 
       
   940 	/* Bring old chips out of low-power mode. */
       
   941 	RTL_W8 (HltClk, 'R');
       
   942 
       
   943 	/* check for missing/broken hardware */
       
   944 	if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
       
   945 		printk (KERN_ERR PFX "%s: Chip not responding, ignoring board\n",
       
   946 			pci_name(pdev));
       
   947 		rc = -EIO;
       
   948 		goto err_out;
       
   949 	}
       
   950 
       
   951 	/* identify chip attached to board */
       
   952 	version = RTL_R32 (TxConfig) & HW_REVID_MASK;
       
   953 	for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
       
   954 		if (version == rtl_chip_info[i].version) {
       
   955 			tp->chipset = i;
       
   956 			goto match;
       
   957 		}
       
   958 
       
   959 	/* if unknown chip, assume array element #0, original RTL-8139 in this case */
       
   960 	printk (KERN_DEBUG PFX "%s: unknown chip version, assuming RTL-8139\n",
       
   961 		pci_name(pdev));
       
   962 	printk (KERN_DEBUG PFX "%s: TxConfig = 0x%lx\n", pci_name(pdev), RTL_R32 (TxConfig));
       
   963 	tp->chipset = 0;
       
   964 
       
   965 match:
       
   966 	DPRINTK ("chipset id (%d) == index %d, '%s'\n",
       
   967 		 version, i, rtl_chip_info[i].name);
       
   968 
       
   969 	if (tp->chipset >= CH_8139B) {
       
   970 		u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
       
   971 		DPRINTK("PCI PM wakeup\n");
       
   972 		if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
       
   973 		    (tmp8 & LWAKE))
       
   974 			new_tmp8 &= ~LWAKE;
       
   975 		new_tmp8 |= Cfg1_PM_Enable;
       
   976 		if (new_tmp8 != tmp8) {
       
   977 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   978 			RTL_W8 (Config1, tmp8);
       
   979 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   980 		}
       
   981 		if (rtl_chip_info[tp->chipset].flags & HasLWake) {
       
   982 			tmp8 = RTL_R8 (Config4);
       
   983 			if (tmp8 & LWPTN) {
       
   984 				RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   985 				RTL_W8 (Config4, tmp8 & ~LWPTN);
       
   986 				RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   987 			}
       
   988 		}
       
   989 	} else {
       
   990 		DPRINTK("Old chip wakeup\n");
       
   991 		tmp8 = RTL_R8 (Config1);
       
   992 		tmp8 &= ~(SLEEP | PWRDN);
       
   993 		RTL_W8 (Config1, tmp8);
       
   994 	}
       
   995 
       
   996 	rtl8139_chip_reset (ioaddr);
       
   997 
       
   998 	*dev_out = dev;
       
   999 	return 0;
       
  1000 
       
  1001 err_out:
       
  1002 	__rtl8139_cleanup_dev (dev);
       
  1003 	if (disable_dev_on_err)
       
  1004 		pci_disable_device (pdev);
       
  1005 	return rc;
       
  1006 }
       
  1007 
       
  1008 
       
  1009 static int __devinit rtl8139_init_one (struct pci_dev *pdev,
       
  1010 				       const struct pci_device_id *ent)
       
  1011 {
       
  1012 	struct net_device *dev = NULL;
       
  1013 	struct rtl8139_private *tp;
       
  1014 	int i, addr_len, option;
       
  1015 	void __iomem *ioaddr;
       
  1016 	static int board_idx = -1;
       
  1017 	u8 pci_rev;
       
  1018 
       
  1019 	assert (pdev != NULL);
       
  1020 	assert (ent != NULL);
       
  1021 
       
  1022 	board_idx++;
       
  1023 
       
  1024 	/* when we're built into the kernel, the driver version message
       
  1025 	 * is only printed if at least one 8139 board has been found
       
  1026 	 */
       
  1027 #ifndef MODULE
       
  1028 	{
       
  1029 		static int printed_version;
       
  1030 		if (!printed_version++)
       
  1031 			printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
       
  1032 	}
       
  1033 #endif
       
  1034 
       
  1035 	pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev);
       
  1036 
       
  1037 	if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
       
  1038 	    pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) {
       
  1039 		printk(KERN_INFO PFX "pci dev %s (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n",
       
  1040 		       pci_name(pdev), pdev->vendor, pdev->device, pci_rev);
       
  1041 		printk(KERN_INFO PFX "Use the \"8139cp\" driver for improved performance and stability.\n");
       
  1042 	}
       
  1043 
       
  1044 	i = rtl8139_init_board (pdev, &dev);
       
  1045 	if (i < 0)
       
  1046 		return i;
       
  1047 
       
  1048 	assert (dev != NULL);
       
  1049 	tp = netdev_priv(dev);
       
  1050 
       
  1051 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1052 
       
  1053 	if (board_idx == ec_device_index) {
       
  1054 		rtl_ec_net_dev = dev;
       
  1055 		strcpy(dev->name, "ec0");
       
  1056 	}
       
  1057 
       
  1058 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1059 
       
  1060 	ioaddr = tp->mmio_addr;
       
  1061 	assert (ioaddr != NULL);
       
  1062 
       
  1063 	addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
       
  1064 	for (i = 0; i < 3; i++)
       
  1065 		((u16 *) (dev->dev_addr))[i] =
       
  1066 		    le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len));
       
  1067 	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
       
  1068 
       
  1069 	/* The Rtl8139-specific entries in the device structure. */
       
  1070 	dev->open = rtl8139_open;
       
  1071 	dev->hard_start_xmit = rtl8139_start_xmit;
       
  1072 	dev->poll = rtl8139_poll;
       
  1073 	dev->weight = 64;
       
  1074 	dev->stop = rtl8139_close;
       
  1075 	dev->get_stats = rtl8139_get_stats;
       
  1076 	dev->set_multicast_list = rtl8139_set_rx_mode;
       
  1077 	dev->do_ioctl = netdev_ioctl;
       
  1078 	dev->ethtool_ops = &rtl8139_ethtool_ops;
       
  1079 	dev->tx_timeout = rtl8139_tx_timeout;
       
  1080 	dev->watchdog_timeo = TX_TIMEOUT;
       
  1081 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  1082 	dev->poll_controller = rtl8139_poll_controller;
       
  1083 #endif
       
  1084 
       
  1085 	/* note: the hardware is not capable of sg/csum/highdma, however
       
  1086 	 * through the use of skb_copy_and_csum_dev we enable these
       
  1087 	 * features
       
  1088 	 */
       
  1089 	dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
       
  1090 
       
  1091 	dev->irq = pdev->irq;
       
  1092 
       
  1093 	/* tp zeroed and aligned in alloc_etherdev */
       
  1094 	tp = netdev_priv(dev);
       
  1095 
       
  1096 	/* note: tp->chipset set in rtl8139_init_board */
       
  1097 	tp->drv_flags = board_info[ent->driver_data].hw_flags;
       
  1098 	tp->mmio_addr = ioaddr;
       
  1099 	tp->msg_enable =
       
  1100 		(debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1));
       
  1101 	spin_lock_init (&tp->lock);
       
  1102 	spin_lock_init (&tp->rx_lock);
       
  1103 	INIT_WORK(&tp->thread, rtl8139_thread, dev);
       
  1104 	tp->mii.dev = dev;
       
  1105 	tp->mii.mdio_read = mdio_read;
       
  1106 	tp->mii.mdio_write = mdio_write;
       
  1107 	tp->mii.phy_id_mask = 0x3f;
       
  1108 	tp->mii.reg_num_mask = 0x1f;
       
  1109 
       
  1110 	/* dev is fully set up and ready to use now */
       
  1111 
       
  1112 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1113 
       
  1114 	if (dev != rtl_ec_net_dev) {
       
  1115 		DPRINTK("about to register device named %s (%p)...\n", dev->name, dev);
       
  1116 		i = register_netdev (dev);
       
  1117 		if (i) goto err_out;
       
  1118 	}
       
  1119 
       
  1120 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1121 
       
  1122 	pci_set_drvdata (pdev, dev);
       
  1123 
       
  1124 	printk (KERN_INFO "%s: %s at 0x%lx, "
       
  1125 		"%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
       
  1126 		"IRQ %d\n",
       
  1127 		dev->name,
       
  1128 		board_info[ent->driver_data].name,
       
  1129 		dev->base_addr,
       
  1130 		dev->dev_addr[0], dev->dev_addr[1],
       
  1131 		dev->dev_addr[2], dev->dev_addr[3],
       
  1132 		dev->dev_addr[4], dev->dev_addr[5],
       
  1133 		dev->irq);
       
  1134 
       
  1135 	printk (KERN_DEBUG "%s:  Identified 8139 chip type '%s'\n",
       
  1136 		dev->name, rtl_chip_info[tp->chipset].name);
       
  1137 
       
  1138 	/* Find the connected MII xcvrs.
       
  1139 	   Doing this in open() would allow detecting external xcvrs later, but
       
  1140 	   takes too much time. */
       
  1141 #ifdef CONFIG_8139TOO_8129
       
  1142 	if (tp->drv_flags & HAS_MII_XCVR) {
       
  1143 		int phy, phy_idx = 0;
       
  1144 		for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
       
  1145 			int mii_status = mdio_read(dev, phy, 1);
       
  1146 			if (mii_status != 0xffff  &&  mii_status != 0x0000) {
       
  1147 				u16 advertising = mdio_read(dev, phy, 4);
       
  1148 				tp->phys[phy_idx++] = phy;
       
  1149 				printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x "
       
  1150 					   "advertising %4.4x.\n",
       
  1151 					   dev->name, phy, mii_status, advertising);
       
  1152 			}
       
  1153 		}
       
  1154 		if (phy_idx == 0) {
       
  1155 			printk(KERN_INFO "%s: No MII transceivers found!  Assuming SYM "
       
  1156 				   "transceiver.\n",
       
  1157 				   dev->name);
       
  1158 			tp->phys[0] = 32;
       
  1159 		}
       
  1160 	} else
       
  1161 #endif
       
  1162 		tp->phys[0] = 32;
       
  1163 	tp->mii.phy_id = tp->phys[0];
       
  1164 
       
  1165 	/* The lower four bits are the media type. */
       
  1166 	option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
       
  1167 	if (option > 0) {
       
  1168 		tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
       
  1169 		tp->default_port = option & 0xFF;
       
  1170 		if (tp->default_port)
       
  1171 			tp->mii.force_media = 1;
       
  1172 	}
       
  1173 	if (board_idx < MAX_UNITS  &&  full_duplex[board_idx] > 0)
       
  1174 		tp->mii.full_duplex = full_duplex[board_idx];
       
  1175 	if (tp->mii.full_duplex) {
       
  1176 		printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name);
       
  1177 		/* Changing the MII-advertised media because might prevent
       
  1178 		   re-connection. */
       
  1179 		tp->mii.force_media = 1;
       
  1180 	}
       
  1181 	if (tp->default_port) {
       
  1182 		printk(KERN_INFO "  Forcing %dMbps %s-duplex operation.\n",
       
  1183 			   (option & 0x20 ? 100 : 10),
       
  1184 			   (option & 0x10 ? "full" : "half"));
       
  1185 		mdio_write(dev, tp->phys[0], 0,
       
  1186 				   ((option & 0x20) ? 0x2000 : 0) | 	/* 100Mbps? */
       
  1187 				   ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
       
  1188 	}
       
  1189 
       
  1190 	/* Put the chip into low-power mode. */
       
  1191 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1192 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  1193 
       
  1194 	return 0;
       
  1195 
       
  1196 err_out:
       
  1197 	__rtl8139_cleanup_dev (dev);
       
  1198 	pci_disable_device (pdev);
       
  1199 	return i;
       
  1200 }
       
  1201 
       
  1202 
       
  1203 static void __devexit rtl8139_remove_one (struct pci_dev *pdev)
       
  1204 {
       
  1205 	struct net_device *dev = pci_get_drvdata (pdev);
       
  1206 
       
  1207 	assert (dev != NULL);
       
  1208 
       
  1209 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1210 
       
  1211 	if (dev != rtl_ec_net_dev) {
       
  1212 		unregister_netdev (dev);
       
  1213 	}
       
  1214 
       
  1215 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1216 
       
  1217 	__rtl8139_cleanup_dev (dev);
       
  1218 	pci_disable_device (pdev);
       
  1219 }
       
  1220 
       
  1221 
       
  1222 /* Serial EEPROM section. */
       
  1223 
       
  1224 /*  EEPROM_Ctrl bits. */
       
  1225 #define EE_SHIFT_CLK	0x04	/* EEPROM shift clock. */
       
  1226 #define EE_CS			0x08	/* EEPROM chip select. */
       
  1227 #define EE_DATA_WRITE	0x02	/* EEPROM chip data in. */
       
  1228 #define EE_WRITE_0		0x00
       
  1229 #define EE_WRITE_1		0x02
       
  1230 #define EE_DATA_READ	0x01	/* EEPROM chip data out. */
       
  1231 #define EE_ENB			(0x80 | EE_CS)
       
  1232 
       
  1233 /* Delay between EEPROM clock transitions.
       
  1234    No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
       
  1235  */
       
  1236 
       
  1237 #define eeprom_delay()	(void)RTL_R32(Cfg9346)
       
  1238 
       
  1239 /* The EEPROM commands include the alway-set leading bit. */
       
  1240 #define EE_WRITE_CMD	(5)
       
  1241 #define EE_READ_CMD		(6)
       
  1242 #define EE_ERASE_CMD	(7)
       
  1243 
       
  1244 static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len)
       
  1245 {
       
  1246 	int i;
       
  1247 	unsigned retval = 0;
       
  1248 	int read_cmd = location | (EE_READ_CMD << addr_len);
       
  1249 
       
  1250 	RTL_W8 (Cfg9346, EE_ENB & ~EE_CS);
       
  1251 	RTL_W8 (Cfg9346, EE_ENB);
       
  1252 	eeprom_delay ();
       
  1253 
       
  1254 	/* Shift the read command bits out. */
       
  1255 	for (i = 4 + addr_len; i >= 0; i--) {
       
  1256 		int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
       
  1257 		RTL_W8 (Cfg9346, EE_ENB | dataval);
       
  1258 		eeprom_delay ();
       
  1259 		RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK);
       
  1260 		eeprom_delay ();
       
  1261 	}
       
  1262 	RTL_W8 (Cfg9346, EE_ENB);
       
  1263 	eeprom_delay ();
       
  1264 
       
  1265 	for (i = 16; i > 0; i--) {
       
  1266 		RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK);
       
  1267 		eeprom_delay ();
       
  1268 		retval =
       
  1269 		    (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 :
       
  1270 				     0);
       
  1271 		RTL_W8 (Cfg9346, EE_ENB);
       
  1272 		eeprom_delay ();
       
  1273 	}
       
  1274 
       
  1275 	/* Terminate the EEPROM access. */
       
  1276 	RTL_W8 (Cfg9346, ~EE_CS);
       
  1277 	eeprom_delay ();
       
  1278 
       
  1279 	return retval;
       
  1280 }
       
  1281 
       
  1282 /* MII serial management: mostly bogus for now. */
       
  1283 /* Read and write the MII management registers using software-generated
       
  1284    serial MDIO protocol.
       
  1285    The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
       
  1286    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
       
  1287    "overclocking" issues. */
       
  1288 #define MDIO_DIR		0x80
       
  1289 #define MDIO_DATA_OUT	0x04
       
  1290 #define MDIO_DATA_IN	0x02
       
  1291 #define MDIO_CLK		0x01
       
  1292 #define MDIO_WRITE0 (MDIO_DIR)
       
  1293 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
       
  1294 
       
  1295 #define mdio_delay()	RTL_R8(Config4)
       
  1296 
       
  1297 
       
  1298 static const char mii_2_8139_map[8] = {
       
  1299 	BasicModeCtrl,
       
  1300 	BasicModeStatus,
       
  1301 	0,
       
  1302 	0,
       
  1303 	NWayAdvert,
       
  1304 	NWayLPAR,
       
  1305 	NWayExpansion,
       
  1306 	0
       
  1307 };
       
  1308 
       
  1309 
       
  1310 #ifdef CONFIG_8139TOO_8129
       
  1311 /* Syncronize the MII management interface by shifting 32 one bits out. */
       
  1312 static void mdio_sync (void __iomem *ioaddr)
       
  1313 {
       
  1314 	int i;
       
  1315 
       
  1316 	for (i = 32; i >= 0; i--) {
       
  1317 		RTL_W8 (Config4, MDIO_WRITE1);
       
  1318 		mdio_delay ();
       
  1319 		RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK);
       
  1320 		mdio_delay ();
       
  1321 	}
       
  1322 }
       
  1323 #endif
       
  1324 
       
  1325 static int mdio_read (struct net_device *dev, int phy_id, int location)
       
  1326 {
       
  1327 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1328 	int retval = 0;
       
  1329 #ifdef CONFIG_8139TOO_8129
       
  1330 	void __iomem *ioaddr = tp->mmio_addr;
       
  1331 	int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
       
  1332 	int i;
       
  1333 #endif
       
  1334 
       
  1335 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1336 		void __iomem *ioaddr = tp->mmio_addr;
       
  1337 		return location < 8 && mii_2_8139_map[location] ?
       
  1338 		    RTL_R16 (mii_2_8139_map[location]) : 0;
       
  1339 	}
       
  1340 
       
  1341 #ifdef CONFIG_8139TOO_8129
       
  1342 	mdio_sync (ioaddr);
       
  1343 	/* Shift the read command bits out. */
       
  1344 	for (i = 15; i >= 0; i--) {
       
  1345 		int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
       
  1346 
       
  1347 		RTL_W8 (Config4, MDIO_DIR | dataval);
       
  1348 		mdio_delay ();
       
  1349 		RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK);
       
  1350 		mdio_delay ();
       
  1351 	}
       
  1352 
       
  1353 	/* Read the two transition, 16 data, and wire-idle bits. */
       
  1354 	for (i = 19; i > 0; i--) {
       
  1355 		RTL_W8 (Config4, 0);
       
  1356 		mdio_delay ();
       
  1357 		retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0);
       
  1358 		RTL_W8 (Config4, MDIO_CLK);
       
  1359 		mdio_delay ();
       
  1360 	}
       
  1361 #endif
       
  1362 
       
  1363 	return (retval >> 1) & 0xffff;
       
  1364 }
       
  1365 
       
  1366 
       
  1367 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
  1368 			int value)
       
  1369 {
       
  1370 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1371 #ifdef CONFIG_8139TOO_8129
       
  1372 	void __iomem *ioaddr = tp->mmio_addr;
       
  1373 	int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
       
  1374 	int i;
       
  1375 #endif
       
  1376 
       
  1377 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1378 		void __iomem *ioaddr = tp->mmio_addr;
       
  1379 		if (location == 0) {
       
  1380 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1381 			RTL_W16 (BasicModeCtrl, value);
       
  1382 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1383 		} else if (location < 8 && mii_2_8139_map[location])
       
  1384 			RTL_W16 (mii_2_8139_map[location], value);
       
  1385 		return;
       
  1386 	}
       
  1387 
       
  1388 #ifdef CONFIG_8139TOO_8129
       
  1389 	mdio_sync (ioaddr);
       
  1390 
       
  1391 	/* Shift the command bits out. */
       
  1392 	for (i = 31; i >= 0; i--) {
       
  1393 		int dataval =
       
  1394 		    (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
       
  1395 		RTL_W8 (Config4, dataval);
       
  1396 		mdio_delay ();
       
  1397 		RTL_W8 (Config4, dataval | MDIO_CLK);
       
  1398 		mdio_delay ();
       
  1399 	}
       
  1400 	/* Clear out extra bits. */
       
  1401 	for (i = 2; i > 0; i--) {
       
  1402 		RTL_W8 (Config4, 0);
       
  1403 		mdio_delay ();
       
  1404 		RTL_W8 (Config4, MDIO_CLK);
       
  1405 		mdio_delay ();
       
  1406 	}
       
  1407 #endif
       
  1408 }
       
  1409 
       
  1410 
       
  1411 static int rtl8139_open (struct net_device *dev)
       
  1412 {
       
  1413 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1414 	int retval;
       
  1415 	void __iomem *ioaddr = tp->mmio_addr;
       
  1416 
       
  1417 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1418 
       
  1419 	if (dev != rtl_ec_net_dev) {
       
  1420 		retval = request_irq(dev->irq, rtl8139_interrupt,
       
  1421 			SA_SHIRQ, dev->name, dev);
       
  1422 		if (retval)
       
  1423 			return retval;
       
  1424 	}
       
  1425 
       
  1426 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1427 
       
  1428 	tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  1429 					   &tp->tx_bufs_dma);
       
  1430 	tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  1431 					   &tp->rx_ring_dma);
       
  1432 	if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
       
  1433 		/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1434 
       
  1435 		if (dev != rtl_ec_net_dev) {
       
  1436 			free_irq(dev->irq, dev);
       
  1437 		}
       
  1438 
       
  1439 		/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1440 
       
  1441 		if (tp->tx_bufs)
       
  1442 			pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  1443 					    tp->tx_bufs, tp->tx_bufs_dma);
       
  1444 		if (tp->rx_ring)
       
  1445 			pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  1446 					    tp->rx_ring, tp->rx_ring_dma);
       
  1447 
       
  1448 		return -ENOMEM;
       
  1449 
       
  1450 	}
       
  1451 
       
  1452 	tp->mii.full_duplex = tp->mii.force_media;
       
  1453 	tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
       
  1454 
       
  1455 	rtl8139_init_ring (dev);
       
  1456 	rtl8139_hw_start (dev);
       
  1457 
       
  1458 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1459 
       
  1460 	if (dev != rtl_ec_net_dev) {
       
  1461 		netif_start_queue (dev);
       
  1462 
       
  1463 		if (netif_msg_ifup(tp))
       
  1464 			printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#lx IRQ %d"
       
  1465 			       " GP Pins %2.2x %s-duplex.\n",
       
  1466 			       dev->name, pci_resource_start (tp->pci_dev, 1),
       
  1467 			       dev->irq, RTL_R8 (MediaStatus),
       
  1468 			       tp->mii.full_duplex ? "full" : "half");
       
  1469 
       
  1470 		rtl8139_start_thread(tp);
       
  1471 	}
       
  1472 
       
  1473 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1474 
       
  1475 	return 0;
       
  1476 }
       
  1477 
       
  1478 
       
  1479 static void rtl_check_media (struct net_device *dev, unsigned int init_media)
       
  1480 {
       
  1481 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1482 
       
  1483 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1484 
       
  1485 	if (dev != rtl_ec_net_dev) {
       
  1486 		if (tp->phys[0] >= 0) {
       
  1487 			mii_check_media(&tp->mii, netif_msg_link(tp), init_media);
       
  1488 		}
       
  1489 	} else {
       
  1490 		void __iomem *ioaddr = tp->mmio_addr;
       
  1491 		uint16_t state = RTL_R16(BasicModeStatus) & BMSR_LSTATUS;
       
  1492 		ecdev_link_state(rtl_ec_dev, state ? 1 : 0);
       
  1493 	}
       
  1494 
       
  1495 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1496 }
       
  1497 
       
  1498 /* Start the hardware at open or resume. */
       
  1499 static void rtl8139_hw_start (struct net_device *dev)
       
  1500 {
       
  1501 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1502 	void __iomem *ioaddr = tp->mmio_addr;
       
  1503 	u32 i;
       
  1504 	u8 tmp;
       
  1505 
       
  1506 	/* Bring old chips out of low-power mode. */
       
  1507 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1508 		RTL_W8 (HltClk, 'R');
       
  1509 
       
  1510 	rtl8139_chip_reset (ioaddr);
       
  1511 
       
  1512 	/* unlock Config[01234] and BMCR register writes */
       
  1513 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1514 	/* Restore our idea of the MAC address. */
       
  1515 	RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
       
  1516 	RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
       
  1517 
       
  1518 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1519 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1520 
       
  1521 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1522 	RTL_W32 (RxConfig, tp->rx_config);
       
  1523 	RTL_W32 (TxConfig, rtl8139_tx_config);
       
  1524 
       
  1525 	tp->cur_rx = 0;
       
  1526 
       
  1527 	rtl_check_media (dev, 1);
       
  1528 
       
  1529 	if (tp->chipset >= CH_8139B) {
       
  1530 		/* Disable magic packet scanning, which is enabled
       
  1531 		 * when PM is enabled in Config1.  It can be reenabled
       
  1532 		 * via ETHTOOL_SWOL if desired.  */
       
  1533 		RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
       
  1534 	}
       
  1535 
       
  1536 	DPRINTK("init buffer addresses\n");
       
  1537 
       
  1538 	/* Lock Config[01234] and BMCR register writes */
       
  1539 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1540 
       
  1541 	/* init Rx ring buffer DMA address */
       
  1542 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1543 
       
  1544 	/* init Tx buffer DMA addresses */
       
  1545 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1546 		RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
       
  1547 
       
  1548 	RTL_W32 (RxMissed, 0);
       
  1549 
       
  1550 	rtl8139_set_rx_mode (dev);
       
  1551 
       
  1552 	/* no early-rx interrupts */
       
  1553 	RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
       
  1554 
       
  1555 	/* make sure RxTx has started */
       
  1556 	tmp = RTL_R8 (ChipCmd);
       
  1557 	if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
       
  1558 		RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1559 
       
  1560 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1561 
       
  1562 	if (dev != rtl_ec_net_dev) {
       
  1563 		/* Enable all known interrupts by setting the interrupt mask. */
       
  1564 		RTL_W16 (IntrMask, rtl8139_intr_mask);
       
  1565 	}
       
  1566 
       
  1567 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1568 }
       
  1569 
       
  1570 
       
  1571 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
       
  1572 static void rtl8139_init_ring (struct net_device *dev)
       
  1573 {
       
  1574 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1575 	int i;
       
  1576 
       
  1577 	tp->cur_rx = 0;
       
  1578 	tp->cur_tx = 0;
       
  1579 	tp->dirty_tx = 0;
       
  1580 
       
  1581 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1582 		tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
       
  1583 }
       
  1584 
       
  1585 
       
  1586 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
       
  1587 static int next_tick = 3 * HZ;
       
  1588 
       
  1589 #ifndef CONFIG_8139TOO_TUNE_TWISTER
       
  1590 static inline void rtl8139_tune_twister (struct net_device *dev,
       
  1591 				  struct rtl8139_private *tp) {}
       
  1592 #else
       
  1593 enum TwisterParamVals {
       
  1594 	PARA78_default	= 0x78fa8388,
       
  1595 	PARA7c_default	= 0xcb38de43,	/* param[0][3] */
       
  1596 	PARA7c_xxx	= 0xcb38de43,
       
  1597 };
       
  1598 
       
  1599 static const unsigned long param[4][4] = {
       
  1600 	{0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
       
  1601 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1602 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1603 	{0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
       
  1604 };
       
  1605 
       
  1606 static void rtl8139_tune_twister (struct net_device *dev,
       
  1607 				  struct rtl8139_private *tp)
       
  1608 {
       
  1609 	int linkcase;
       
  1610 	void __iomem *ioaddr = tp->mmio_addr;
       
  1611 
       
  1612 	/* This is a complicated state machine to configure the "twister" for
       
  1613 	   impedance/echos based on the cable length.
       
  1614 	   All of this is magic and undocumented.
       
  1615 	 */
       
  1616 	switch (tp->twistie) {
       
  1617 	case 1:
       
  1618 		if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
       
  1619 			/* We have link beat, let us tune the twister. */
       
  1620 			RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
       
  1621 			tp->twistie = 2;	/* Change to state 2. */
       
  1622 			next_tick = HZ / 10;
       
  1623 		} else {
       
  1624 			/* Just put in some reasonable defaults for when beat returns. */
       
  1625 			RTL_W16 (CSCR, CSCR_LinkDownCmd);
       
  1626 			RTL_W32 (FIFOTMS, 0x20);	/* Turn on cable test mode. */
       
  1627 			RTL_W32 (PARA78, PARA78_default);
       
  1628 			RTL_W32 (PARA7c, PARA7c_default);
       
  1629 			tp->twistie = 0;	/* Bail from future actions. */
       
  1630 		}
       
  1631 		break;
       
  1632 	case 2:
       
  1633 		/* Read how long it took to hear the echo. */
       
  1634 		linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
       
  1635 		if (linkcase == 0x7000)
       
  1636 			tp->twist_row = 3;
       
  1637 		else if (linkcase == 0x3000)
       
  1638 			tp->twist_row = 2;
       
  1639 		else if (linkcase == 0x1000)
       
  1640 			tp->twist_row = 1;
       
  1641 		else
       
  1642 			tp->twist_row = 0;
       
  1643 		tp->twist_col = 0;
       
  1644 		tp->twistie = 3;	/* Change to state 2. */
       
  1645 		next_tick = HZ / 10;
       
  1646 		break;
       
  1647 	case 3:
       
  1648 		/* Put out four tuning parameters, one per 100msec. */
       
  1649 		if (tp->twist_col == 0)
       
  1650 			RTL_W16 (FIFOTMS, 0);
       
  1651 		RTL_W32 (PARA7c, param[(int) tp->twist_row]
       
  1652 			 [(int) tp->twist_col]);
       
  1653 		next_tick = HZ / 10;
       
  1654 		if (++tp->twist_col >= 4) {
       
  1655 			/* For short cables we are done.
       
  1656 			   For long cables (row == 3) check for mistune. */
       
  1657 			tp->twistie =
       
  1658 			    (tp->twist_row == 3) ? 4 : 0;
       
  1659 		}
       
  1660 		break;
       
  1661 	case 4:
       
  1662 		/* Special case for long cables: check for mistune. */
       
  1663 		if ((RTL_R16 (CSCR) &
       
  1664 		     CSCR_LinkStatusBits) == 0x7000) {
       
  1665 			tp->twistie = 0;
       
  1666 			break;
       
  1667 		} else {
       
  1668 			RTL_W32 (PARA7c, 0xfb38de03);
       
  1669 			tp->twistie = 5;
       
  1670 			next_tick = HZ / 10;
       
  1671 		}
       
  1672 		break;
       
  1673 	case 5:
       
  1674 		/* Retune for shorter cable (column 2). */
       
  1675 		RTL_W32 (FIFOTMS, 0x20);
       
  1676 		RTL_W32 (PARA78, PARA78_default);
       
  1677 		RTL_W32 (PARA7c, PARA7c_default);
       
  1678 		RTL_W32 (FIFOTMS, 0x00);
       
  1679 		tp->twist_row = 2;
       
  1680 		tp->twist_col = 0;
       
  1681 		tp->twistie = 3;
       
  1682 		next_tick = HZ / 10;
       
  1683 		break;
       
  1684 
       
  1685 	default:
       
  1686 		/* do nothing */
       
  1687 		break;
       
  1688 	}
       
  1689 }
       
  1690 #endif /* CONFIG_8139TOO_TUNE_TWISTER */
       
  1691 
       
  1692 static inline void rtl8139_thread_iter (struct net_device *dev,
       
  1693 				 struct rtl8139_private *tp,
       
  1694 				 void __iomem *ioaddr)
       
  1695 {
       
  1696 	int mii_lpa;
       
  1697 
       
  1698 	mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
       
  1699 
       
  1700 	if (!tp->mii.force_media && mii_lpa != 0xffff) {
       
  1701 		int duplex = (mii_lpa & LPA_100FULL)
       
  1702 		    || (mii_lpa & 0x01C0) == 0x0040;
       
  1703 		if (tp->mii.full_duplex != duplex) {
       
  1704 			tp->mii.full_duplex = duplex;
       
  1705 
       
  1706 			if (mii_lpa) {
       
  1707 				printk (KERN_INFO
       
  1708 					"%s: Setting %s-duplex based on MII #%d link"
       
  1709 					" partner ability of %4.4x.\n",
       
  1710 					dev->name,
       
  1711 					tp->mii.full_duplex ? "full" : "half",
       
  1712 					tp->phys[0], mii_lpa);
       
  1713 			} else {
       
  1714 				printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n",
       
  1715 				       dev->name);
       
  1716 			}
       
  1717 #if 0
       
  1718 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1719 			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
       
  1720 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1721 #endif
       
  1722 		}
       
  1723 	}
       
  1724 
       
  1725 	next_tick = HZ * 60;
       
  1726 
       
  1727 	rtl8139_tune_twister (dev, tp);
       
  1728 
       
  1729 	DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n",
       
  1730 		 dev->name, RTL_R16 (NWayLPAR));
       
  1731 	DPRINTK ("%s:  Other registers are IntMask %4.4x IntStatus %4.4x\n",
       
  1732 		 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus));
       
  1733 	DPRINTK ("%s:  Chip config %2.2x %2.2x.\n",
       
  1734 		 dev->name, RTL_R8 (Config0),
       
  1735 		 RTL_R8 (Config1));
       
  1736 }
       
  1737 
       
  1738 static void rtl8139_thread (void *_data)
       
  1739 {
       
  1740 	struct net_device *dev = _data;
       
  1741 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1742 	unsigned long thr_delay = next_tick;
       
  1743 
       
  1744 	if (tp->watchdog_fired) {
       
  1745 		tp->watchdog_fired = 0;
       
  1746 		rtl8139_tx_timeout_task(_data);
       
  1747 	} else if (rtnl_trylock()) {
       
  1748 		rtl8139_thread_iter (dev, tp, tp->mmio_addr);
       
  1749 		rtnl_unlock ();
       
  1750 	} else {
       
  1751 		/* unlikely race.  mitigate with fast poll. */
       
  1752 		thr_delay = HZ / 2;
       
  1753 	}
       
  1754 
       
  1755 	schedule_delayed_work(&tp->thread, thr_delay);
       
  1756 }
       
  1757 
       
  1758 static void rtl8139_start_thread(struct rtl8139_private *tp)
       
  1759 {
       
  1760 	tp->twistie = 0;
       
  1761 	if (tp->chipset == CH_8139_K)
       
  1762 		tp->twistie = 1;
       
  1763 	else if (tp->drv_flags & HAS_LNK_CHNG)
       
  1764 		return;
       
  1765 
       
  1766 	tp->have_thread = 1;
       
  1767 
       
  1768 	schedule_delayed_work(&tp->thread, next_tick);
       
  1769 }
       
  1770 
       
  1771 static void rtl8139_stop_thread(struct rtl8139_private *tp)
       
  1772 {
       
  1773 	if (tp->have_thread) {
       
  1774 		cancel_rearming_delayed_work(&tp->thread);
       
  1775 		tp->have_thread = 0;
       
  1776 	} else
       
  1777 		flush_scheduled_work();
       
  1778 }
       
  1779 
       
  1780 static inline void rtl8139_tx_clear (struct rtl8139_private *tp)
       
  1781 {
       
  1782 	tp->cur_tx = 0;
       
  1783 	tp->dirty_tx = 0;
       
  1784 
       
  1785 	/* XXX account for unsent Tx packets in tp->stats.tx_dropped */
       
  1786 }
       
  1787 
       
  1788 static void rtl8139_tx_timeout_task (void *_data)
       
  1789 {
       
  1790 	struct net_device *dev = _data;
       
  1791 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1792 	void __iomem *ioaddr = tp->mmio_addr;
       
  1793 	int i;
       
  1794 	u8 tmp8;
       
  1795 
       
  1796 	printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x "
       
  1797 		"media %2.2x.\n", dev->name, RTL_R8 (ChipCmd),
       
  1798 		RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus));
       
  1799 	/* Emit info to figure out what went wrong. */
       
  1800 	printk (KERN_DEBUG "%s: Tx queue start entry %ld  dirty entry %ld.\n",
       
  1801 		dev->name, tp->cur_tx, tp->dirty_tx);
       
  1802 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1803 		printk (KERN_DEBUG "%s:  Tx descriptor %d is %8.8lx.%s\n",
       
  1804 			dev->name, i, RTL_R32 (TxStatus0 + (i * 4)),
       
  1805 			i == tp->dirty_tx % NUM_TX_DESC ?
       
  1806 				" (queue head)" : "");
       
  1807 
       
  1808 	tp->xstats.tx_timeouts++;
       
  1809 
       
  1810 	/* disable Tx ASAP, if not already */
       
  1811 	tmp8 = RTL_R8 (ChipCmd);
       
  1812 	if (tmp8 & CmdTxEnb)
       
  1813 		RTL_W8 (ChipCmd, CmdRxEnb);
       
  1814 
       
  1815 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1816 
       
  1817 	if (dev != rtl_ec_net_dev) {
       
  1818 		spin_lock_bh(&tp->rx_lock);
       
  1819 		/* Disable interrupts by clearing the interrupt mask. */
       
  1820 		RTL_W16 (IntrMask, 0x0000);
       
  1821 
       
  1822 		/* Stop a shared interrupt from scavenging while we are. */
       
  1823 		spin_lock_irq(&tp->lock);
       
  1824 		rtl8139_tx_clear (tp);
       
  1825 		spin_unlock_irq(&tp->lock);
       
  1826 
       
  1827 		/* ...and finally, reset everything */
       
  1828 		if (netif_running(dev)) {
       
  1829 			rtl8139_hw_start (dev);
       
  1830 			netif_wake_queue (dev);
       
  1831 		}
       
  1832 		spin_unlock_bh(&tp->rx_lock);
       
  1833 	} else {
       
  1834 		rtl8139_tx_clear (tp);
       
  1835 		rtl8139_hw_start (dev);
       
  1836 	}
       
  1837 
       
  1838 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1839 }
       
  1840 
       
  1841 static void rtl8139_tx_timeout (struct net_device *dev)
       
  1842 {
       
  1843 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1844 
       
  1845 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1846 
       
  1847 	if (dev != rtl_ec_net_dev && !tp->have_thread) {
       
  1848 		INIT_WORK(&tp->thread, rtl8139_tx_timeout_task, dev);
       
  1849 		schedule_delayed_work(&tp->thread, next_tick);
       
  1850 	} else
       
  1851 		tp->watchdog_fired = 1;
       
  1852 
       
  1853 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1854 }
       
  1855 
       
  1856 static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
       
  1857 {
       
  1858 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1859 	void __iomem *ioaddr = tp->mmio_addr;
       
  1860 	unsigned int entry;
       
  1861 	unsigned int len = skb->len;
       
  1862 
       
  1863 	/* Calculate the next Tx descriptor entry. */
       
  1864 	entry = tp->cur_tx % NUM_TX_DESC;
       
  1865 
       
  1866 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1867 
       
  1868 	/* Note: the chip doesn't have auto-pad! */
       
  1869 	if (likely(len < TX_BUF_SIZE)) {
       
  1870 		if (len < ETH_ZLEN)
       
  1871 			memset(tp->tx_buf[entry], 0, ETH_ZLEN);
       
  1872 		skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
       
  1873 		if (dev != rtl_ec_net_dev) {
       
  1874 			dev_kfree_skb(skb);
       
  1875 		}
       
  1876 	} else {
       
  1877 		if (dev != rtl_ec_net_dev) {
       
  1878 			dev_kfree_skb(skb);
       
  1879 		}
       
  1880 		tp->stats.tx_dropped++;
       
  1881 		return 0;
       
  1882 	}
       
  1883 
       
  1884 	if (dev != rtl_ec_net_dev) {
       
  1885 		spin_lock_irq(&tp->lock);
       
  1886 	}
       
  1887 
       
  1888 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1889 
       
  1890 	RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
       
  1891 		   tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
       
  1892 
       
  1893 	dev->trans_start = jiffies;
       
  1894 
       
  1895 	tp->cur_tx++;
       
  1896 	wmb();
       
  1897 
       
  1898 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1899 
       
  1900 	if (dev != rtl_ec_net_dev) {
       
  1901 		if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
       
  1902 			netif_stop_queue (dev);
       
  1903 		spin_unlock_irq(&tp->lock);
       
  1904 
       
  1905 		if (netif_msg_tx_queued(tp))
       
  1906 			printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n",
       
  1907 				dev->name, len, entry);
       
  1908 	}
       
  1909 
       
  1910 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1911 
       
  1912 	return 0;
       
  1913 }
       
  1914 
       
  1915 
       
  1916 static void rtl8139_tx_interrupt (struct net_device *dev,
       
  1917 				  struct rtl8139_private *tp,
       
  1918 				  void __iomem *ioaddr)
       
  1919 {
       
  1920 	unsigned long dirty_tx, tx_left;
       
  1921 
       
  1922 	assert (dev != NULL);
       
  1923 	assert (ioaddr != NULL);
       
  1924 
       
  1925 	dirty_tx = tp->dirty_tx;
       
  1926 	tx_left = tp->cur_tx - dirty_tx;
       
  1927 	while (tx_left > 0) {
       
  1928 		int entry = dirty_tx % NUM_TX_DESC;
       
  1929 		int txstatus;
       
  1930 
       
  1931 		txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
       
  1932 
       
  1933 		if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
       
  1934 			break;	/* It still hasn't been Txed */
       
  1935 
       
  1936 		/* Note: TxCarrierLost is always asserted at 100mbps. */
       
  1937 		if (txstatus & (TxOutOfWindow | TxAborted)) {
       
  1938 			/* There was an major error, log it. */
       
  1939 			if (netif_msg_tx_err(tp))
       
  1940 				printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
       
  1941 					dev->name, txstatus);
       
  1942 			tp->stats.tx_errors++;
       
  1943 			if (txstatus & TxAborted) {
       
  1944 				tp->stats.tx_aborted_errors++;
       
  1945 				RTL_W32 (TxConfig, TxClearAbt);
       
  1946 				RTL_W16 (IntrStatus, TxErr);
       
  1947 				wmb();
       
  1948 			}
       
  1949 			if (txstatus & TxCarrierLost)
       
  1950 				tp->stats.tx_carrier_errors++;
       
  1951 			if (txstatus & TxOutOfWindow)
       
  1952 				tp->stats.tx_window_errors++;
       
  1953 		} else {
       
  1954 			if (txstatus & TxUnderrun) {
       
  1955 				/* Add 64 to the Tx FIFO threshold. */
       
  1956 				if (tp->tx_flag < 0x00300000)
       
  1957 					tp->tx_flag += 0x00020000;
       
  1958 				tp->stats.tx_fifo_errors++;
       
  1959 			}
       
  1960 			tp->stats.collisions += (txstatus >> 24) & 15;
       
  1961 			tp->stats.tx_bytes += txstatus & 0x7ff;
       
  1962 			tp->stats.tx_packets++;
       
  1963 		}
       
  1964 
       
  1965 		dirty_tx++;
       
  1966 		tx_left--;
       
  1967 	}
       
  1968 
       
  1969 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  1970 
       
  1971 #ifndef RTL8139_NDEBUG
       
  1972 	if (dev != rtl_ec_net_dev && tp->cur_tx - dirty_tx > NUM_TX_DESC) {
       
  1973 		printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n",
       
  1974 		        dev->name, dirty_tx, tp->cur_tx);
       
  1975 		dirty_tx += NUM_TX_DESC;
       
  1976 	}
       
  1977 #endif /* RTL8139_NDEBUG */
       
  1978 
       
  1979 	if (dev != rtl_ec_net_dev) {
       
  1980 		/* only wake the queue if we did work, and the queue is stopped */
       
  1981 		if (tp->dirty_tx != dirty_tx) {
       
  1982 			tp->dirty_tx = dirty_tx;
       
  1983 			mb();
       
  1984 			netif_wake_queue (dev);
       
  1985 		}
       
  1986 	}
       
  1987 
       
  1988 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  1989 }
       
  1990 
       
  1991 
       
  1992 /* TODO: clean this up!  Rx reset need not be this intensive */
       
  1993 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
       
  1994 			    struct rtl8139_private *tp, void __iomem *ioaddr)
       
  1995 {
       
  1996 	u8 tmp8;
       
  1997 #ifdef CONFIG_8139_OLD_RX_RESET
       
  1998 	int tmp_work;
       
  1999 #endif
       
  2000 
       
  2001 	if (netif_msg_rx_err (tp)) 
       
  2002 		printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n",
       
  2003 			dev->name, rx_status);
       
  2004 	tp->stats.rx_errors++;
       
  2005 	if (!(rx_status & RxStatusOK)) {
       
  2006 		if (rx_status & RxTooLong) {
       
  2007 			DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
       
  2008 			 	dev->name, rx_status);
       
  2009 			/* A.C.: The chip hangs here. */
       
  2010 		}
       
  2011 		if (rx_status & (RxBadSymbol | RxBadAlign))
       
  2012 			tp->stats.rx_frame_errors++;
       
  2013 		if (rx_status & (RxRunt | RxTooLong))
       
  2014 			tp->stats.rx_length_errors++;
       
  2015 		if (rx_status & RxCRCErr)
       
  2016 			tp->stats.rx_crc_errors++;
       
  2017 	} else {
       
  2018 		tp->xstats.rx_lost_in_ring++;
       
  2019 	}
       
  2020 
       
  2021 #ifndef CONFIG_8139_OLD_RX_RESET
       
  2022 	tmp8 = RTL_R8 (ChipCmd);
       
  2023 	RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
       
  2024 	RTL_W8 (ChipCmd, tmp8);
       
  2025 	RTL_W32 (RxConfig, tp->rx_config);
       
  2026 	tp->cur_rx = 0;
       
  2027 #else
       
  2028 	/* Reset the receiver, based on RealTek recommendation. (Bug?) */
       
  2029 
       
  2030 	/* disable receive */
       
  2031 	RTL_W8_F (ChipCmd, CmdTxEnb);
       
  2032 	tmp_work = 200;
       
  2033 	while (--tmp_work > 0) {
       
  2034 		udelay(1);
       
  2035 		tmp8 = RTL_R8 (ChipCmd);
       
  2036 		if (!(tmp8 & CmdRxEnb))
       
  2037 			break;
       
  2038 	}
       
  2039 	if (tmp_work <= 0)
       
  2040 		printk (KERN_WARNING PFX "rx stop wait too long\n");
       
  2041 	/* restart receive */
       
  2042 	tmp_work = 200;
       
  2043 	while (--tmp_work > 0) {
       
  2044 		RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  2045 		udelay(1);
       
  2046 		tmp8 = RTL_R8 (ChipCmd);
       
  2047 		if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
       
  2048 			break;
       
  2049 	}
       
  2050 	if (tmp_work <= 0)
       
  2051 		printk (KERN_WARNING PFX "tx/rx enable wait too long\n");
       
  2052 
       
  2053 	/* and reinitialize all rx related registers */
       
  2054 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  2055 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  2056 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  2057 
       
  2058 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  2059 	RTL_W32 (RxConfig, tp->rx_config);
       
  2060 	tp->cur_rx = 0;
       
  2061 
       
  2062 	DPRINTK("init buffer addresses\n");
       
  2063 
       
  2064 	/* Lock Config[01234] and BMCR register writes */
       
  2065 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  2066 
       
  2067 	/* init Rx ring buffer DMA address */
       
  2068 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  2069 
       
  2070 	/* A.C.: Reset the multicast list. */
       
  2071 	__set_rx_mode (dev);
       
  2072 #endif
       
  2073 }
       
  2074 
       
  2075 #if RX_BUF_IDX == 3
       
  2076 static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
       
  2077 				 u32 offset, unsigned int size)
       
  2078 {
       
  2079 	u32 left = RX_BUF_LEN - offset;
       
  2080 
       
  2081 	if (size > left) {
       
  2082 		memcpy(skb->data, ring + offset, left);
       
  2083 		memcpy(skb->data+left, ring, size - left);
       
  2084 	} else
       
  2085 		memcpy(skb->data, ring + offset, size);
       
  2086 }
       
  2087 #endif
       
  2088 
       
  2089 static void rtl8139_isr_ack(struct rtl8139_private *tp)
       
  2090 {
       
  2091 	void __iomem *ioaddr = tp->mmio_addr;
       
  2092 	u16 status;
       
  2093 
       
  2094 	status = RTL_R16 (IntrStatus) & RxAckBits;
       
  2095 
       
  2096 	/* Clear out errors and receive interrupts */
       
  2097 	if (likely(status != 0)) {
       
  2098 		if (unlikely(status & (RxFIFOOver | RxOverflow))) {
       
  2099 			tp->stats.rx_errors++;
       
  2100 			if (status & RxFIFOOver)
       
  2101 				tp->stats.rx_fifo_errors++;
       
  2102 		}
       
  2103 		RTL_W16_F (IntrStatus, RxAckBits);
       
  2104 	}
       
  2105 }
       
  2106 
       
  2107 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
       
  2108 		      int budget)
       
  2109 {
       
  2110 	void __iomem *ioaddr = tp->mmio_addr;
       
  2111 	int received = 0;
       
  2112 	unsigned char *rx_ring = tp->rx_ring;
       
  2113 	unsigned int cur_rx = tp->cur_rx;
       
  2114 	unsigned int rx_size = 0;
       
  2115 
       
  2116 	DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
       
  2117 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx,
       
  2118 		 RTL_R16 (RxBufAddr),
       
  2119 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
       
  2120 
       
  2121 
       
  2122 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2123 
       
  2124 	while ((dev == rtl_ec_net_dev || netif_running(dev))
       
  2125 	       && received < budget
       
  2126 	       && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
       
  2127 
       
  2128 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2129 
       
  2130 		u32 ring_offset = cur_rx % RX_BUF_LEN;
       
  2131 		u32 rx_status;
       
  2132 		unsigned int pkt_size;
       
  2133 		struct sk_buff *skb;
       
  2134 
       
  2135 		rmb();
       
  2136 
       
  2137 		/* read size+status of next frame from DMA ring buffer */
       
  2138 		rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset));
       
  2139 		rx_size = rx_status >> 16;
       
  2140 		pkt_size = rx_size - 4;
       
  2141 
       
  2142 		/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2143 
       
  2144 		if (dev != rtl_ec_net_dev) {
       
  2145 			if (netif_msg_rx_status(tp))
       
  2146 				printk(KERN_DEBUG "%s:  rtl8139_rx() status %4.4x, size %4.4x,"
       
  2147 				       " cur %4.4x.\n", dev->name, rx_status,
       
  2148 				       rx_size, cur_rx);
       
  2149 		}
       
  2150 
       
  2151 		/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2152 
       
  2153 #if RTL8139_DEBUG > 2
       
  2154 		{
       
  2155 			int i;
       
  2156 			DPRINTK ("%s: Frame contents ", dev->name);
       
  2157 			for (i = 0; i < 70; i++)
       
  2158 				printk (" %2.2x",
       
  2159 					rx_ring[ring_offset + i]);
       
  2160 			printk (".\n");
       
  2161 		}
       
  2162 #endif
       
  2163 
       
  2164 		/* Packet copy from FIFO still in progress.
       
  2165 		 * Theoretically, this should never happen
       
  2166 		 * since EarlyRx is disabled.
       
  2167 		 */
       
  2168 		if (unlikely(rx_size == 0xfff0)) {
       
  2169 			if (!tp->fifo_copy_timeout)
       
  2170 				tp->fifo_copy_timeout = jiffies + 2;
       
  2171 			else if (time_after(jiffies, tp->fifo_copy_timeout)) {
       
  2172 				DPRINTK ("%s: hung FIFO. Reset.", dev->name);
       
  2173 				rx_size = 0;
       
  2174 				goto no_early_rx;
       
  2175 			}
       
  2176 			if (netif_msg_intr(tp)) {
       
  2177 				printk(KERN_DEBUG "%s: fifo copy in progress.",
       
  2178 				       dev->name);
       
  2179 			}
       
  2180 			tp->xstats.early_rx++;
       
  2181 			break;
       
  2182 		}
       
  2183 
       
  2184 no_early_rx:
       
  2185 		tp->fifo_copy_timeout = 0;
       
  2186 
       
  2187 		/* If Rx err or invalid rx_size/rx_status received
       
  2188 		 * (which happens if we get lost in the ring),
       
  2189 		 * Rx process gets reset, so we abort any further
       
  2190 		 * Rx processing.
       
  2191 		 */
       
  2192 		if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
       
  2193 			     (rx_size < 8) ||
       
  2194 			     (!(rx_status & RxStatusOK)))) {
       
  2195 			rtl8139_rx_err (rx_status, dev, tp, ioaddr);
       
  2196 			received = -1;
       
  2197 			goto out;
       
  2198 		}
       
  2199 
       
  2200 		/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2201 
       
  2202 		if (dev != rtl_ec_net_dev) {
       
  2203 			/* Malloc up new buffer, compatible with net-2e. */
       
  2204 			/* Omit the four octet CRC from the length. */
       
  2205 
       
  2206 			skb = dev_alloc_skb (pkt_size + 2);
       
  2207 			if (likely(skb)) {
       
  2208 				skb->dev = dev;
       
  2209 				skb_reserve (skb, 2);	/* 16 byte align the IP fields. */
       
  2210 #if RX_BUF_IDX == 3
       
  2211 				wrap_copy(skb, rx_ring, ring_offset+4, pkt_size);
       
  2212 #else
       
  2213 				eth_copy_and_sum (skb, &rx_ring[ring_offset + 4], pkt_size, 0);
       
  2214 #endif
       
  2215 				skb_put (skb, pkt_size);
       
  2216 
       
  2217 				skb->protocol = eth_type_trans (skb, dev);
       
  2218 
       
  2219 				dev->last_rx = jiffies;
       
  2220 				tp->stats.rx_bytes += pkt_size;
       
  2221 				tp->stats.rx_packets++;
       
  2222 
       
  2223 				netif_receive_skb (skb);
       
  2224 			} else {
       
  2225 				if (net_ratelimit())
       
  2226 					printk(KERN_WARNING
       
  2227 					       "%s: Memory squeeze, dropping packet.\n",
       
  2228 					       dev->name);
       
  2229 				tp->stats.rx_dropped++;
       
  2230 			}
       
  2231 		} else {
       
  2232 			ecdev_receive(rtl_ec_dev,
       
  2233 			              &rx_ring[ring_offset + 4], pkt_size);
       
  2234 			dev->last_rx = jiffies;
       
  2235 			tp->stats.rx_bytes += pkt_size;
       
  2236 			tp->stats.rx_packets++;
       
  2237 		}
       
  2238 
       
  2239 		/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2240 
       
  2241 		received++;
       
  2242 
       
  2243 		cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
       
  2244 		RTL_W16 (RxBufPtr, (u16) (cur_rx - 16));
       
  2245 
       
  2246 		rtl8139_isr_ack(tp);
       
  2247 	}
       
  2248 
       
  2249 	if (unlikely(!received || rx_size == 0xfff0))
       
  2250 		rtl8139_isr_ack(tp);
       
  2251 
       
  2252 #if RTL8139_DEBUG > 1
       
  2253 	DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
       
  2254 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
       
  2255 		 RTL_R16 (RxBufAddr),
       
  2256 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
       
  2257 #endif
       
  2258 
       
  2259 	tp->cur_rx = cur_rx;
       
  2260 
       
  2261 	/*
       
  2262 	 * The receive buffer should be mostly empty.
       
  2263 	 * Tell NAPI to reenable the Rx irq.
       
  2264 	 */
       
  2265 	if (tp->fifo_copy_timeout)
       
  2266 		received = budget;
       
  2267 
       
  2268 out:
       
  2269 	return received;
       
  2270 }
       
  2271 
       
  2272 
       
  2273 static void rtl8139_weird_interrupt (struct net_device *dev,
       
  2274 				     struct rtl8139_private *tp,
       
  2275 				     void __iomem *ioaddr,
       
  2276 				     int status, int link_changed)
       
  2277 {
       
  2278 	DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n",
       
  2279 		 dev->name, status);
       
  2280 
       
  2281 	assert (dev != NULL);
       
  2282 	assert (tp != NULL);
       
  2283 	assert (ioaddr != NULL);
       
  2284 
       
  2285 	/* Update the error count. */
       
  2286 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2287 	RTL_W32 (RxMissed, 0);
       
  2288 
       
  2289 	if ((status & RxUnderrun) && link_changed &&
       
  2290 	    (tp->drv_flags & HAS_LNK_CHNG)) {
       
  2291 		rtl_check_media(dev, 0);
       
  2292 		status &= ~RxUnderrun;
       
  2293 	}
       
  2294 
       
  2295 	if (status & (RxUnderrun | RxErr))
       
  2296 		tp->stats.rx_errors++;
       
  2297 
       
  2298 	if (status & PCSTimeout)
       
  2299 		tp->stats.rx_length_errors++;
       
  2300 	if (status & RxUnderrun)
       
  2301 		tp->stats.rx_fifo_errors++;
       
  2302 	if (status & PCIErr) {
       
  2303 		u16 pci_cmd_status;
       
  2304 		pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
       
  2305 		pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
       
  2306 
       
  2307 		printk (KERN_ERR "%s: PCI Bus error %4.4x.\n",
       
  2308 			dev->name, pci_cmd_status);
       
  2309 	}
       
  2310 }
       
  2311 
       
  2312 static int rtl8139_poll(struct net_device *dev, int *budget)
       
  2313 {
       
  2314 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2315 	void __iomem *ioaddr = tp->mmio_addr;
       
  2316 	int orig_budget = min(*budget, dev->quota);
       
  2317 	int done = 1;
       
  2318 
       
  2319 	spin_lock(&tp->rx_lock);
       
  2320 	if (likely(RTL_R16(IntrStatus) & RxAckBits)) {
       
  2321 		int work_done;
       
  2322 
       
  2323 		work_done = rtl8139_rx(dev, tp, orig_budget);
       
  2324 		if (likely(work_done > 0)) {
       
  2325 			*budget -= work_done;
       
  2326 			dev->quota -= work_done;
       
  2327 			done = (work_done < orig_budget);
       
  2328 		}
       
  2329 	}
       
  2330 
       
  2331 	if (done) {
       
  2332 		/*
       
  2333 		 * Order is important since data can get interrupted
       
  2334 		 * again when we think we are done.
       
  2335 		 */
       
  2336 		local_irq_disable();
       
  2337 		RTL_W16_F(IntrMask, rtl8139_intr_mask);
       
  2338 		__netif_rx_complete(dev);
       
  2339 		local_irq_enable();
       
  2340 	}
       
  2341 	spin_unlock(&tp->rx_lock);
       
  2342 
       
  2343 	return !done;
       
  2344 }
       
  2345 
       
  2346 /* The interrupt handler does all of the Rx thread work and cleans up
       
  2347    after the Tx thread. */
       
  2348 irqreturn_t rtl8139_interrupt (int irq, void *dev_instance,
       
  2349                                struct pt_regs *regs)
       
  2350 {
       
  2351 	struct net_device *dev = (struct net_device *) dev_instance;
       
  2352 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2353 	void __iomem *ioaddr = tp->mmio_addr;
       
  2354 	u16 status, ackstat;
       
  2355 	int link_changed = 0; /* avoid bogus "uninit" warning */
       
  2356 	int handled = 0;
       
  2357 
       
  2358 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2359 
       
  2360 	if (dev != rtl_ec_net_dev) {
       
  2361 		spin_lock (&tp->lock);
       
  2362 		status = RTL_R16 (IntrStatus);
       
  2363 
       
  2364 		/* shared irq? */
       
  2365 		if (unlikely((status & rtl8139_intr_mask) == 0))
       
  2366 			goto out;
       
  2367 	} else {
       
  2368 		status = RTL_R16 (IntrStatus);
       
  2369 	}
       
  2370 
       
  2371 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2372 
       
  2373 	handled = 1;
       
  2374 
       
  2375 	/* h/w no longer present (hotplug?) or major error, bail */
       
  2376 	if (unlikely(status == 0xFFFF)) 
       
  2377 		goto out;
       
  2378 
       
  2379 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2380 
       
  2381 	if (dev != rtl_ec_net_dev) {
       
  2382 		/* close possible race's with dev_close */
       
  2383 		if (unlikely(!netif_running(dev))) {
       
  2384 			RTL_W16 (IntrMask, 0);
       
  2385 			goto out;
       
  2386 		}
       
  2387 	}
       
  2388 
       
  2389 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2390 
       
  2391 	/* Acknowledge all of the current interrupt sources ASAP, but
       
  2392 	   an first get an additional status bit from CSCR. */
       
  2393 	if (unlikely(status & RxUnderrun))
       
  2394 		link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
       
  2395 
       
  2396 	ackstat = status & ~(RxAckBits | TxErr);
       
  2397 	if (ackstat)
       
  2398 		RTL_W16 (IntrStatus, ackstat);
       
  2399 
       
  2400 	/* Receive packets are processed by poll routine.
       
  2401 	   If not running start it now. */
       
  2402 
       
  2403 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2404 
       
  2405 	if (status & RxAckBits){
       
  2406 		if (dev != rtl_ec_net_dev) {
       
  2407 			/* Mark for polling */
       
  2408 			if (netif_rx_schedule_prep(dev)) {
       
  2409 				RTL_W16_F (IntrMask, rtl8139_norx_intr_mask);
       
  2410 				__netif_rx_schedule (dev);
       
  2411 			}
       
  2412 		} else {
       
  2413 			/* EtherCAT device: Just receive all frames */
       
  2414 			rtl8139_rx(dev, tp, 100); // FIXME
       
  2415 		}
       
  2416 	}
       
  2417 
       
  2418 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2419 
       
  2420 	/* Check uncommon events with one test. */
       
  2421 	if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr)))
       
  2422 		rtl8139_weird_interrupt (dev, tp, ioaddr,
       
  2423 					 status, link_changed);
       
  2424 
       
  2425 	if (status & (TxOK | TxErr)) {
       
  2426 		rtl8139_tx_interrupt (dev, tp, ioaddr);
       
  2427 		if (status & TxErr)
       
  2428 			RTL_W16 (IntrStatus, TxErr);
       
  2429 	}
       
  2430  out:
       
  2431 
       
  2432 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2433 
       
  2434 	if (dev != rtl_ec_net_dev) {
       
  2435 		spin_unlock (&tp->lock);
       
  2436 	}
       
  2437 
       
  2438 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2439 
       
  2440 	DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n",
       
  2441 		 dev->name, RTL_R16 (IntrStatus));
       
  2442 	return IRQ_RETVAL(handled);
       
  2443 }
       
  2444 
       
  2445 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  2446 /*
       
  2447  * Polling receive - used by netconsole and other diagnostic tools
       
  2448  * to allow network i/o with interrupts disabled.
       
  2449  */
       
  2450 static void rtl8139_poll_controller(struct net_device *dev)
       
  2451 {
       
  2452 	disable_irq(dev->irq);
       
  2453 	rtl8139_interrupt(dev->irq, dev, NULL);
       
  2454 	enable_irq(dev->irq);
       
  2455 }
       
  2456 #endif
       
  2457 
       
  2458 static int rtl8139_close (struct net_device *dev)
       
  2459 {
       
  2460 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2461 	void __iomem *ioaddr = tp->mmio_addr;
       
  2462 	unsigned long flags;
       
  2463 
       
  2464 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2465 
       
  2466 	if (dev != rtl_ec_net_dev) {
       
  2467 		netif_stop_queue (dev);
       
  2468 
       
  2469 		rtl8139_stop_thread(tp);
       
  2470 
       
  2471 		if (netif_msg_ifdown(tp))
       
  2472 			printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n",
       
  2473 			       dev->name, RTL_R16 (IntrStatus));
       
  2474 
       
  2475 		spin_lock_irqsave (&tp->lock, flags);
       
  2476 
       
  2477 		/* Stop the chip's Tx and Rx DMA processes. */
       
  2478 		RTL_W8 (ChipCmd, 0);
       
  2479 
       
  2480 		/* Disable interrupts by clearing the interrupt mask. */
       
  2481 		RTL_W16 (IntrMask, 0);
       
  2482 
       
  2483 		/* Update the error counts. */
       
  2484 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2485 		RTL_W32 (RxMissed, 0);
       
  2486 
       
  2487 		spin_unlock_irqrestore (&tp->lock, flags);
       
  2488 
       
  2489 		synchronize_irq (dev->irq);	/* racy, but that's ok here */
       
  2490 		free_irq (dev->irq, dev);
       
  2491 	} else {
       
  2492 		/* Stop the chip's Tx and Rx DMA processes. */
       
  2493 		RTL_W8 (ChipCmd, 0);
       
  2494 
       
  2495 		/* Disable interrupts by clearing the interrupt mask. */
       
  2496 		RTL_W16 (IntrMask, 0);
       
  2497 
       
  2498 		/* Update the error counts. */
       
  2499 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2500 		RTL_W32 (RxMissed, 0);
       
  2501 	}
       
  2502 
       
  2503 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2504 
       
  2505 	rtl8139_tx_clear (tp);
       
  2506 
       
  2507 	pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  2508 			    tp->rx_ring, tp->rx_ring_dma);
       
  2509 	pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  2510 			    tp->tx_bufs, tp->tx_bufs_dma);
       
  2511 	tp->rx_ring = NULL;
       
  2512 	tp->tx_bufs = NULL;
       
  2513 
       
  2514 	/* Green! Put the chip in low-power mode. */
       
  2515 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2516 
       
  2517 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  2518 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  2519 
       
  2520 	return 0;
       
  2521 }
       
  2522 
       
  2523 
       
  2524 /* Get the ethtool Wake-on-LAN settings.  Assumes that wol points to
       
  2525    kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
       
  2526    other threads or interrupts aren't messing with the 8139.  */
       
  2527 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2528 {
       
  2529 	struct rtl8139_private *np = netdev_priv(dev);
       
  2530 	void __iomem *ioaddr = np->mmio_addr;
       
  2531 
       
  2532 	spin_lock_irq(&np->lock);
       
  2533 	if (rtl_chip_info[np->chipset].flags & HasLWake) {
       
  2534 		u8 cfg3 = RTL_R8 (Config3);
       
  2535 		u8 cfg5 = RTL_R8 (Config5);
       
  2536 
       
  2537 		wol->supported = WAKE_PHY | WAKE_MAGIC
       
  2538 			| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
       
  2539 
       
  2540 		wol->wolopts = 0;
       
  2541 		if (cfg3 & Cfg3_LinkUp)
       
  2542 			wol->wolopts |= WAKE_PHY;
       
  2543 		if (cfg3 & Cfg3_Magic)
       
  2544 			wol->wolopts |= WAKE_MAGIC;
       
  2545 		/* (KON)FIXME: See how netdev_set_wol() handles the
       
  2546 		   following constants.  */
       
  2547 		if (cfg5 & Cfg5_UWF)
       
  2548 			wol->wolopts |= WAKE_UCAST;
       
  2549 		if (cfg5 & Cfg5_MWF)
       
  2550 			wol->wolopts |= WAKE_MCAST;
       
  2551 		if (cfg5 & Cfg5_BWF)
       
  2552 			wol->wolopts |= WAKE_BCAST;
       
  2553 	}
       
  2554 	spin_unlock_irq(&np->lock);
       
  2555 }
       
  2556 
       
  2557 
       
  2558 /* Set the ethtool Wake-on-LAN settings.  Return 0 or -errno.  Assumes
       
  2559    that wol points to kernel memory and other threads or interrupts
       
  2560    aren't messing with the 8139.  */
       
  2561 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2562 {
       
  2563 	struct rtl8139_private *np = netdev_priv(dev);
       
  2564 	void __iomem *ioaddr = np->mmio_addr;
       
  2565 	u32 support;
       
  2566 	u8 cfg3, cfg5;
       
  2567 
       
  2568 	support = ((rtl_chip_info[np->chipset].flags & HasLWake)
       
  2569 		   ? (WAKE_PHY | WAKE_MAGIC
       
  2570 		      | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
       
  2571 		   : 0);
       
  2572 	if (wol->wolopts & ~support)
       
  2573 		return -EINVAL;
       
  2574 
       
  2575 	spin_lock_irq(&np->lock);
       
  2576 	cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
       
  2577 	if (wol->wolopts & WAKE_PHY)
       
  2578 		cfg3 |= Cfg3_LinkUp;
       
  2579 	if (wol->wolopts & WAKE_MAGIC)
       
  2580 		cfg3 |= Cfg3_Magic;
       
  2581 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2582 	RTL_W8 (Config3, cfg3);
       
  2583 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  2584 
       
  2585 	cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
       
  2586 	/* (KON)FIXME: These are untested.  We may have to set the
       
  2587 	   CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
       
  2588 	   documentation.  */
       
  2589 	if (wol->wolopts & WAKE_UCAST)
       
  2590 		cfg5 |= Cfg5_UWF;
       
  2591 	if (wol->wolopts & WAKE_MCAST)
       
  2592 		cfg5 |= Cfg5_MWF;
       
  2593 	if (wol->wolopts & WAKE_BCAST)
       
  2594 		cfg5 |= Cfg5_BWF;
       
  2595 	RTL_W8 (Config5, cfg5);	/* need not unlock via Cfg9346 */
       
  2596 	spin_unlock_irq(&np->lock);
       
  2597 
       
  2598 	return 0;
       
  2599 }
       
  2600 
       
  2601 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
       
  2602 {
       
  2603 	struct rtl8139_private *np = netdev_priv(dev);
       
  2604 	strcpy(info->driver, DRV_NAME);
       
  2605 	strcpy(info->version, DRV_VERSION);
       
  2606 	strcpy(info->bus_info, pci_name(np->pci_dev));
       
  2607 	info->regdump_len = np->regs_len;
       
  2608 }
       
  2609 
       
  2610 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2611 {
       
  2612 	struct rtl8139_private *np = netdev_priv(dev);
       
  2613 	spin_lock_irq(&np->lock);
       
  2614 	mii_ethtool_gset(&np->mii, cmd);
       
  2615 	spin_unlock_irq(&np->lock);
       
  2616 	return 0;
       
  2617 }
       
  2618 
       
  2619 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2620 {
       
  2621 	struct rtl8139_private *np = netdev_priv(dev);
       
  2622 	int rc;
       
  2623 	spin_lock_irq(&np->lock);
       
  2624 	rc = mii_ethtool_sset(&np->mii, cmd);
       
  2625 	spin_unlock_irq(&np->lock);
       
  2626 	return rc;
       
  2627 }
       
  2628 
       
  2629 static int rtl8139_nway_reset(struct net_device *dev)
       
  2630 {
       
  2631 	struct rtl8139_private *np = netdev_priv(dev);
       
  2632 	return mii_nway_restart(&np->mii);
       
  2633 }
       
  2634 
       
  2635 static u32 rtl8139_get_link(struct net_device *dev)
       
  2636 {
       
  2637 	struct rtl8139_private *np = netdev_priv(dev);
       
  2638 	return mii_link_ok(&np->mii);
       
  2639 }
       
  2640 
       
  2641 static u32 rtl8139_get_msglevel(struct net_device *dev)
       
  2642 {
       
  2643 	struct rtl8139_private *np = netdev_priv(dev);
       
  2644 	return np->msg_enable;
       
  2645 }
       
  2646 
       
  2647 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
       
  2648 {
       
  2649 	struct rtl8139_private *np = netdev_priv(dev);
       
  2650 	np->msg_enable = datum;
       
  2651 }
       
  2652 
       
  2653 /* TODO: we are too slack to do reg dumping for pio, for now */
       
  2654 #ifdef CONFIG_8139TOO_PIO
       
  2655 #define rtl8139_get_regs_len	NULL
       
  2656 #define rtl8139_get_regs	NULL
       
  2657 #else
       
  2658 static int rtl8139_get_regs_len(struct net_device *dev)
       
  2659 {
       
  2660 	struct rtl8139_private *np = netdev_priv(dev);
       
  2661 	return np->regs_len;
       
  2662 }
       
  2663 
       
  2664 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
       
  2665 {
       
  2666 	struct rtl8139_private *np = netdev_priv(dev);
       
  2667 
       
  2668 	regs->version = RTL_REGS_VER;
       
  2669 
       
  2670 	spin_lock_irq(&np->lock);
       
  2671 	memcpy_fromio(regbuf, np->mmio_addr, regs->len);
       
  2672 	spin_unlock_irq(&np->lock);
       
  2673 }
       
  2674 #endif /* CONFIG_8139TOO_MMIO */
       
  2675 
       
  2676 static int rtl8139_get_stats_count(struct net_device *dev)
       
  2677 {
       
  2678 	return RTL_NUM_STATS;
       
  2679 }
       
  2680 
       
  2681 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
       
  2682 {
       
  2683 	struct rtl8139_private *np = netdev_priv(dev);
       
  2684 
       
  2685 	data[0] = np->xstats.early_rx;
       
  2686 	data[1] = np->xstats.tx_buf_mapped;
       
  2687 	data[2] = np->xstats.tx_timeouts;
       
  2688 	data[3] = np->xstats.rx_lost_in_ring;
       
  2689 }
       
  2690 
       
  2691 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
       
  2692 {
       
  2693 	memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
       
  2694 }
       
  2695 
       
  2696 static struct ethtool_ops rtl8139_ethtool_ops = {
       
  2697 	.get_drvinfo		= rtl8139_get_drvinfo,
       
  2698 	.get_settings		= rtl8139_get_settings,
       
  2699 	.set_settings		= rtl8139_set_settings,
       
  2700 	.get_regs_len		= rtl8139_get_regs_len,
       
  2701 	.get_regs		= rtl8139_get_regs,
       
  2702 	.nway_reset		= rtl8139_nway_reset,
       
  2703 	.get_link		= rtl8139_get_link,
       
  2704 	.get_msglevel		= rtl8139_get_msglevel,
       
  2705 	.set_msglevel		= rtl8139_set_msglevel,
       
  2706 	.get_wol		= rtl8139_get_wol,
       
  2707 	.set_wol		= rtl8139_set_wol,
       
  2708 	.get_strings		= rtl8139_get_strings,
       
  2709 	.get_stats_count	= rtl8139_get_stats_count,
       
  2710 	.get_ethtool_stats	= rtl8139_get_ethtool_stats,
       
  2711 	.get_perm_addr		= ethtool_op_get_perm_addr,
       
  2712 };
       
  2713 
       
  2714 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
       
  2715 {
       
  2716 	struct rtl8139_private *np = netdev_priv(dev);
       
  2717 	int rc;
       
  2718 
       
  2719 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2720 
       
  2721 	if (dev == rtl_ec_net_dev || !netif_running(dev))
       
  2722 		return -EINVAL;
       
  2723 
       
  2724 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2725 
       
  2726 	spin_lock_irq(&np->lock);
       
  2727 	rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL);
       
  2728 	spin_unlock_irq(&np->lock);
       
  2729 
       
  2730 	return rc;
       
  2731 }
       
  2732 
       
  2733 
       
  2734 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev)
       
  2735 {
       
  2736 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2737 	void __iomem *ioaddr = tp->mmio_addr;
       
  2738 	unsigned long flags;
       
  2739 
       
  2740 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2741 
       
  2742 	if (dev == rtl_ec_net_dev || netif_running(dev)) {
       
  2743 		spin_lock_irqsave (&tp->lock, flags);
       
  2744 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2745 		RTL_W32 (RxMissed, 0);
       
  2746 		spin_unlock_irqrestore (&tp->lock, flags);
       
  2747 	}
       
  2748 
       
  2749 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2750 
       
  2751 	return &tp->stats;
       
  2752 }
       
  2753 
       
  2754 /* Set or clear the multicast filter for this adaptor.
       
  2755    This routine is not state sensitive and need not be SMP locked. */
       
  2756 
       
  2757 static void __set_rx_mode (struct net_device *dev)
       
  2758 {
       
  2759 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2760 	void __iomem *ioaddr = tp->mmio_addr;
       
  2761 	u32 mc_filter[2];	/* Multicast hash filter */
       
  2762 	int i, rx_mode;
       
  2763 	u32 tmp;
       
  2764 
       
  2765 	DPRINTK ("%s:   rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
       
  2766 			dev->name, dev->flags, RTL_R32 (RxConfig));
       
  2767 
       
  2768 	/* Note: do not reorder, GCC is clever about common statements. */
       
  2769 	if (dev->flags & IFF_PROMISC) {
       
  2770 		/* Unconditionally log net taps. */
       
  2771 		printk (KERN_NOTICE "%s: Promiscuous mode enabled.\n",
       
  2772 			dev->name);
       
  2773 		rx_mode =
       
  2774 		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
       
  2775 		    AcceptAllPhys;
       
  2776 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2777 	} else if ((dev->mc_count > multicast_filter_limit)
       
  2778 		   || (dev->flags & IFF_ALLMULTI)) {
       
  2779 		/* Too many to filter perfectly -- accept all multicasts. */
       
  2780 		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
       
  2781 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2782 	} else {
       
  2783 		struct dev_mc_list *mclist;
       
  2784 		rx_mode = AcceptBroadcast | AcceptMyPhys;
       
  2785 		mc_filter[1] = mc_filter[0] = 0;
       
  2786 		for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
       
  2787 		     i++, mclist = mclist->next) {
       
  2788 			int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
       
  2789 
       
  2790 			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
       
  2791 			rx_mode |= AcceptMulticast;
       
  2792 		}
       
  2793 	}
       
  2794 
       
  2795 	/* We can safely update without stopping the chip. */
       
  2796 	tmp = rtl8139_rx_config | rx_mode;
       
  2797 	if (tp->rx_config != tmp) {
       
  2798 		RTL_W32_F (RxConfig, tmp);
       
  2799 		tp->rx_config = tmp;
       
  2800 	}
       
  2801 	RTL_W32_F (MAR0 + 0, mc_filter[0]);
       
  2802 	RTL_W32_F (MAR0 + 4, mc_filter[1]);
       
  2803 }
       
  2804 
       
  2805 static void rtl8139_set_rx_mode (struct net_device *dev)
       
  2806 {
       
  2807 	unsigned long flags;
       
  2808 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2809 
       
  2810 	spin_lock_irqsave (&tp->lock, flags);
       
  2811 	__set_rx_mode(dev);
       
  2812 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2813 }
       
  2814 
       
  2815 #ifdef CONFIG_PM
       
  2816 
       
  2817 static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state)
       
  2818 {
       
  2819 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2820 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2821 	void __iomem *ioaddr = tp->mmio_addr;
       
  2822 	unsigned long flags;
       
  2823 
       
  2824 	pci_save_state (pdev);
       
  2825 
       
  2826 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2827 
       
  2828 	if (dev == rtl_ec_net_dev || !netif_running (dev))
       
  2829 		return 0;
       
  2830 
       
  2831 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2832 
       
  2833 	netif_device_detach (dev);
       
  2834 
       
  2835 	spin_lock_irqsave (&tp->lock, flags);
       
  2836 
       
  2837 	/* Disable interrupts, stop Tx and Rx. */
       
  2838 	RTL_W16 (IntrMask, 0);
       
  2839 	RTL_W8 (ChipCmd, 0);
       
  2840 
       
  2841 	/* Update the error counts. */
       
  2842 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2843 	RTL_W32 (RxMissed, 0);
       
  2844 
       
  2845 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2846 
       
  2847 	pci_set_power_state (pdev, PCI_D3hot);
       
  2848 
       
  2849 	return 0;
       
  2850 }
       
  2851 
       
  2852 
       
  2853 static int rtl8139_resume (struct pci_dev *pdev)
       
  2854 {
       
  2855 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2856 
       
  2857 	pci_restore_state (pdev);
       
  2858 
       
  2859 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2860 
       
  2861 	if (dev == rtl_ec_net_dev || !netif_running (dev))
       
  2862 		return 0;
       
  2863 
       
  2864 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2865 
       
  2866 	pci_set_power_state (pdev, PCI_D0);
       
  2867 	rtl8139_init_ring (dev);
       
  2868 	rtl8139_hw_start (dev);
       
  2869 	netif_device_attach (dev);
       
  2870 	return 0;
       
  2871 }
       
  2872 
       
  2873 #endif /* CONFIG_PM */
       
  2874 
       
  2875 
       
  2876 static struct pci_driver rtl8139_pci_driver = {
       
  2877 	.name		= DRV_NAME,
       
  2878 	.id_table	= rtl8139_pci_tbl,
       
  2879 	.probe		= rtl8139_init_one,
       
  2880 	.remove		= __devexit_p(rtl8139_remove_one),
       
  2881 #ifdef CONFIG_PM
       
  2882 	.suspend	= rtl8139_suspend,
       
  2883 	.resume		= rtl8139_resume,
       
  2884 #endif /* CONFIG_PM */
       
  2885 };
       
  2886 
       
  2887 
       
  2888 static int __init rtl8139_init_module (void)
       
  2889 {
       
  2890 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2891 
       
  2892 	printk(KERN_INFO RTL8139_DRIVER_NAME "\n");
       
  2893 	printk(KERN_INFO "ec_device_index is %i\n", ec_device_index);
       
  2894 
       
  2895 	if (pci_module_init(&rtl8139_pci_driver) < 0) {
       
  2896 		printk(KERN_ERR "Failed to init PCI module.\n");
       
  2897 		goto out_return;
       
  2898 	}
       
  2899 
       
  2900 	if (rtl_ec_net_dev) {
       
  2901 		printk(KERN_INFO "Registering EtherCAT device...\n");
       
  2902 		if (!(rtl_ec_dev = ecdev_register(ec_device_master_index,
       
  2903 			rtl_ec_net_dev, rtl8139_interrupt, THIS_MODULE))) {
       
  2904 			printk(KERN_ERR "Failed to register EtherCAT device!\n");
       
  2905 			goto out_pci;
       
  2906 		}
       
  2907 
       
  2908 		printk(KERN_INFO "Starting EtherCAT device...\n");
       
  2909 		if (ecdev_start(ec_device_master_index)) {
       
  2910 			printk(KERN_ERR "Failed to start EtherCAT device!\n");
       
  2911 			goto out_unregister;
       
  2912 		}
       
  2913 	} else {
       
  2914 		printk(KERN_WARNING "No EtherCAT device registered!\n");
       
  2915 	}
       
  2916 
       
  2917 	return 0;
       
  2918 
       
  2919     out_unregister:
       
  2920 	ecdev_unregister(ec_device_master_index, rtl_ec_dev);
       
  2921     out_pci:
       
  2922 	pci_unregister_driver(&rtl8139_pci_driver);
       
  2923     out_return:
       
  2924 	return -1;
       
  2925 
       
  2926 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2927 }
       
  2928 
       
  2929 
       
  2930 static void __exit rtl8139_cleanup_module (void)
       
  2931 {
       
  2932 	/* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
       
  2933 
       
  2934 	printk(KERN_INFO "Cleaning up RTL8139-EtherCAT module...\n");
       
  2935 
       
  2936 	if (rtl_ec_net_dev) {
       
  2937 		printk(KERN_INFO "Stopping device...\n");
       
  2938 		ecdev_stop(ec_device_master_index);
       
  2939 		printk(KERN_INFO "Unregistering device...\n");
       
  2940 		ecdev_unregister(ec_device_master_index, rtl_ec_dev);
       
  2941 		rtl_ec_dev = NULL;
       
  2942 	}
       
  2943 
       
  2944 	pci_unregister_driver(&rtl8139_pci_driver);
       
  2945 
       
  2946 	printk(KERN_INFO "RTL8139-EtherCAT module cleaned up.\n");
       
  2947 
       
  2948 	/* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
       
  2949 }
       
  2950 
       
  2951 
       
  2952 module_init(rtl8139_init_module);
       
  2953 module_exit(rtl8139_cleanup_module);