devices/e1000/e1000_osdep-3.4-ethercat.h
branchstable-1.5
changeset 2494 d1bd39013a32
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2493:fcd918d2122f 2494:d1bd39013a32
       
     1 /*******************************************************************************
       
     2 
       
     3   Intel PRO/1000 Linux driver
       
     4   Copyright(c) 1999 - 2006 Intel Corporation.
       
     5 
       
     6   This program is free software; you can redistribute it and/or modify it
       
     7   under the terms and conditions of the GNU General Public License,
       
     8   version 2, as published by the Free Software Foundation.
       
     9 
       
    10   This program is distributed in the hope it will be useful, but WITHOUT
       
    11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
       
    12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
       
    13   more details.
       
    14 
       
    15   You should have received a copy of the GNU General Public License along with
       
    16   this program; if not, write to the Free Software Foundation, Inc.,
       
    17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
       
    18 
       
    19   The full GNU General Public License is included in this distribution in
       
    20   the file called "COPYING".
       
    21 
       
    22   Contact Information:
       
    23   Linux NICS <linux.nics@intel.com>
       
    24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
       
    25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
       
    26 
       
    27 *******************************************************************************/
       
    28 
       
    29 
       
    30 /* glue for the OS independent part of e1000
       
    31  * includes register access macros
       
    32  */
       
    33 
       
    34 #ifndef _E1000_OSDEP_H_
       
    35 #define _E1000_OSDEP_H_
       
    36 
       
    37 #include <asm/io.h>
       
    38 
       
    39 #define CONFIG_RAM_BASE         0x60000
       
    40 #define GBE_CONFIG_OFFSET       0x0
       
    41 
       
    42 #define GBE_CONFIG_RAM_BASE \
       
    43 	((unsigned int)(CONFIG_RAM_BASE + GBE_CONFIG_OFFSET))
       
    44 
       
    45 #define GBE_CONFIG_BASE_VIRT \
       
    46 	((void __iomem *)phys_to_virt(GBE_CONFIG_RAM_BASE))
       
    47 
       
    48 #define GBE_CONFIG_FLASH_WRITE(base, offset, count, data) \
       
    49 	(iowrite16_rep(base + offset, data, count))
       
    50 
       
    51 #define GBE_CONFIG_FLASH_READ(base, offset, count, data) \
       
    52 	(ioread16_rep(base + (offset << 1), data, count))
       
    53 
       
    54 #define er32(reg)							\
       
    55 	(readl(hw->hw_addr + ((hw->mac_type >= e1000_82543)		\
       
    56 			       ? E1000_##reg : E1000_82542_##reg)))
       
    57 
       
    58 #define ew32(reg, value)						\
       
    59 	(writel((value), (hw->hw_addr + ((hw->mac_type >= e1000_82543)	\
       
    60 					 ? E1000_##reg : E1000_82542_##reg))))
       
    61 
       
    62 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \
       
    63     writel((value), ((a)->hw_addr + \
       
    64         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
       
    65         ((offset) << 2))))
       
    66 
       
    67 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
       
    68     readl((a)->hw_addr + \
       
    69         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
       
    70         ((offset) << 2)))
       
    71 
       
    72 #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
       
    73 #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
       
    74 
       
    75 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
       
    76     writew((value), ((a)->hw_addr + \
       
    77         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
       
    78         ((offset) << 1))))
       
    79 
       
    80 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
       
    81     readw((a)->hw_addr + \
       
    82         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
       
    83         ((offset) << 1)))
       
    84 
       
    85 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
       
    86     writeb((value), ((a)->hw_addr + \
       
    87         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
       
    88         (offset))))
       
    89 
       
    90 #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
       
    91     readb((a)->hw_addr + \
       
    92         (((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \
       
    93         (offset)))
       
    94 
       
    95 #define E1000_WRITE_FLUSH() er32(STATUS)
       
    96 
       
    97 #define E1000_WRITE_ICH_FLASH_REG(a, reg, value) ( \
       
    98     writel((value), ((a)->flash_address + reg)))
       
    99 
       
   100 #define E1000_READ_ICH_FLASH_REG(a, reg) ( \
       
   101     readl((a)->flash_address + reg))
       
   102 
       
   103 #define E1000_WRITE_ICH_FLASH_REG16(a, reg, value) ( \
       
   104     writew((value), ((a)->flash_address + reg)))
       
   105 
       
   106 #define E1000_READ_ICH_FLASH_REG16(a, reg) ( \
       
   107     readw((a)->flash_address + reg))
       
   108 
       
   109 #endif /* _E1000_OSDEP_H_ */