1 #FIG 3.2 |
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2 Portrait |
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3 Center |
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4 Metric |
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5 A4 |
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6 100.00 |
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7 Single |
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8 -2 |
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9 1200 2 |
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10 0 32 #8e8e8e |
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11 2 1 0 1 0 7 100 0 -1 0.000 0 0 -1 0 0 2 |
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12 450 765 3240 765 |
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13 2 1 0 1 0 7 100 0 -1 0.000 0 0 -1 0 0 2 |
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14 450 5220 3240 5220 |
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15 2 2 0 1 0 7 110 -1 20 0.000 0 0 -1 0 0 5 |
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16 450 450 3240 450 3240 7380 450 7380 450 450 |
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17 4 0 0 100 0 16 12 0.0000 4 150 1320 540 675 ec_eoe_t\001 |
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18 4 0 0 100 0 16 12 0.0000 4 150 2670 540 990 list: struct list_head\001 |
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19 4 0 0 100 -1 16 12 0.0000 4 150 2655 540 1170 slave: ec_slave_t *\001 |
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20 4 0 0 100 -1 16 12 0.0000 4 165 3600 540 1350 datagram: ec_datagram_t\001 |
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21 4 0 0 100 -1 16 12 0.0000 4 165 3555 540 1530 state: void (*)(ec_eoe_t *)\001 |
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22 4 0 0 100 -1 16 12 0.0000 4 150 3270 540 1710 dev: struct net_device *\001 |
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23 4 0 0 100 -1 16 12 0.0000 4 150 4050 540 1890 stats: struct net_device_stats\001 |
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24 4 0 0 100 -1 16 12 0.0000 4 165 2955 540 2070 opened: unsigned int\001 |
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25 4 0 0 100 -1 16 12 0.0000 4 165 2070 540 2250 t_last: cycles_t\001 |
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26 4 0 0 100 -1 16 12 0.0000 4 150 3165 540 2430 rx_skb: struct sk_buff *\001 |
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27 4 0 0 100 -1 16 12 0.0000 4 150 2625 540 2610 rx_skb_offset: off_t\001 |
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28 4 0 0 100 -1 16 12 0.0000 4 150 2715 540 2790 rx_skb_size: size_t\001 |
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29 4 0 0 100 -1 16 12 0.0000 4 165 4260 540 2970 rx_expected_fragment: uint8_t\001 |
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30 4 0 0 100 -1 16 12 0.0000 4 150 2790 540 3150 rx_counter: uint32_t\001 |
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31 4 0 0 100 -1 16 12 0.0000 4 150 2265 540 3330 rx_rate: uint32_t\001 |
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32 4 0 0 100 -1 16 12 0.0000 4 150 3600 540 3510 tx_queue: struct list_head\001 |
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33 4 0 0 100 -1 16 12 0.0000 4 165 4215 540 3690 tx_queue_active: unsigned int\001 |
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34 4 0 0 100 -1 16 12 0.0000 4 165 4515 540 3870 tx_queued_frames: unsigned int\001 |
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35 4 0 0 100 -1 16 12 0.0000 4 150 3675 540 4050 tx_queue_lock: spinlock_t\001 |
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36 4 0 0 100 -1 16 12 0.0000 4 150 3660 540 4230 tx_frame: ec_eoe_frame_t\001 |
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37 4 0 0 100 -1 16 12 0.0000 4 150 3570 540 4410 tx_frame_number: uint8_t\001 |
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38 4 0 0 100 -1 16 12 0.0000 4 165 4005 540 4590 tx_fragment_number: uint8_t\001 |
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39 4 0 0 100 -1 16 12 0.0000 4 150 2160 540 4770 tx_offset: size_t\001 |
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40 4 0 0 100 -1 16 12 0.0000 4 150 2760 540 4950 tx_counter: uint32_t\001 |
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41 4 0 0 100 -1 16 12 0.0000 4 150 2235 540 5130 tx_rate: uint32_t\001 |
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42 4 0 0 100 -1 16 12 0.0000 4 165 2595 540 5445 + ec_eoe_init(): int\001 |
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43 4 0 0 100 -1 16 12 0.0000 4 165 2415 540 5625 + ec_eoe_clear()\001 |
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44 4 0 0 100 -1 16 12 0.0000 4 165 2175 540 5805 + ec_eoe_run()\001 |
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45 4 0 0 100 -1 16 12 0.0000 4 165 3030 540 5985 + ec_eoe_active(): int\001 |
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46 4 0 0 100 -1 16 12 0.0000 4 165 2310 540 6165 - ec_eoe_flush()\001 |
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47 4 0 0 100 -1 16 12 0.0000 4 165 2340 540 6345 - ec_eoe_send()\001 |
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48 4 0 0 100 -1 16 12 0.0000 4 165 3540 540 6525 - ec_eoe_state_rx_start()\001 |
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49 4 0 0 100 -1 16 12 0.0000 4 165 3795 540 6705 - ec_eoe_state_rx_check()\001 |
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50 4 0 0 100 -1 16 12 0.0000 4 165 3615 540 6885 - ec_eoe_state_rx_fetch()\001 |
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51 4 0 0 100 -1 16 12 0.0000 4 165 3510 540 7065 - ec_eoe_state_tx_start()\001 |
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52 4 0 0 100 -1 16 12 0.0000 4 165 3510 540 7245 - ec_eoe_state_tx_sent()\001 |
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