1640 } |
1640 } |
1641 } |
1641 } |
1642 |
1642 |
1643 mii_check_link(&nic->mii); |
1643 mii_check_link(&nic->mii); |
1644 |
1644 |
1645 /* Software generated interrupt to recover from (rare) Rx |
1645 if (!nic->ecdev) { |
1646 * allocation failure. |
1646 /* Software generated interrupt to recover from (rare) Rx |
1647 * Unfortunately have to use a spinlock to not re-enable interrupts |
1647 * allocation failure. |
1648 * accidentally, due to hardware that shares a register between the |
1648 * Unfortunately have to use a spinlock to not re-enable interrupts |
1649 * interrupt mask bit and the SW Interrupt generation bit */ |
1649 * accidentally, due to hardware that shares a register between the |
1650 if (!nic->ecdev) |
1650 * interrupt mask bit and the SW Interrupt generation bit */ |
1651 spin_lock_irq(&nic->cmd_lock); |
1651 spin_lock_irq(&nic->cmd_lock); |
1652 writeb(readb(&nic->csr->scb.cmd_hi) | irq_sw_gen,&nic->csr->scb.cmd_hi); |
1652 writeb(readb(&nic->csr->scb.cmd_hi) | irq_sw_gen,&nic->csr->scb.cmd_hi); |
1653 e100_write_flush(nic); |
1653 e100_write_flush(nic); |
1654 if (!nic->ecdev) |
|
1655 spin_unlock_irq(&nic->cmd_lock); |
1654 spin_unlock_irq(&nic->cmd_lock); |
|
1655 } |
1656 |
1656 |
1657 e100_update_stats(nic); |
1657 e100_update_stats(nic); |
1658 e100_adjust_adaptive_ifs(nic, cmd.speed, cmd.duplex); |
1658 e100_adjust_adaptive_ifs(nic, cmd.speed, cmd.duplex); |
1659 |
1659 |
1660 if(nic->mac <= mac_82557_D100_C) |
1660 if(nic->mac <= mac_82557_D100_C) |