41 |
41 |
42 #define PFX "ec_mini: " |
42 #define PFX "ec_mini: " |
43 |
43 |
44 #define FREQUENCY 100 |
44 #define FREQUENCY 100 |
45 |
45 |
46 //#define KBUS |
46 #define CONFIGURE_MAPPING |
47 #define PDOS |
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48 #define MAPPING |
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49 #define EXTERNAL_MEMORY |
47 #define EXTERNAL_MEMORY |
50 |
48 |
51 /*****************************************************************************/ |
49 /*****************************************************************************/ |
52 |
50 |
53 static struct timer_list timer; |
51 static struct timer_list timer; |
54 |
52 |
55 // EtherCAT |
53 // EtherCAT |
56 static ec_master_t *master = NULL; |
54 static ec_master_t *master = NULL; |
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55 static ec_master_state_t master_state = {}; |
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56 spinlock_t master_lock = SPIN_LOCK_UNLOCKED; |
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57 |
57 static ec_domain_t *domain1 = NULL; |
58 static ec_domain_t *domain1 = NULL; |
58 spinlock_t master_lock = SPIN_LOCK_UNLOCKED; |
59 static ec_domain_state_t domain1_state = {}; |
59 static ec_master_state_t master_state, old_state = {}; |
60 |
60 |
61 #ifdef CONFIGURE_MAPPING |
61 // data fields |
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62 #ifdef KBUS |
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63 static void *r_inputs; |
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64 static void *r_outputs; |
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65 #endif |
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66 |
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67 #ifdef MAPPING |
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68 const ec_pdo_entry_info_t el3162_channel1[] = { |
62 const ec_pdo_entry_info_t el3162_channel1[] = { |
69 {0x3101, 1, 8}, // status |
63 {0x3101, 1, 8}, // status |
70 {0x3101, 2, 16} // value |
64 {0x3101, 2, 16} // value |
71 }; |
65 }; |
72 |
66 |
93 {EC_DIR_OUTPUT, 0x1602, 1, &el2004_channels[2]}, |
87 {EC_DIR_OUTPUT, 0x1602, 1, &el2004_channels[2]}, |
94 {EC_DIR_OUTPUT, 0x1603, 1, &el2004_channels[3]}, |
88 {EC_DIR_OUTPUT, 0x1603, 1, &el2004_channels[3]}, |
95 }; |
89 }; |
96 #endif |
90 #endif |
97 |
91 |
98 #ifdef PDOS |
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99 static uint8_t *pd; /**< Process data. */ |
92 static uint8_t *pd; /**< Process data. */ |
100 static unsigned int off_ana_in; |
93 static unsigned int off_ana_in; |
101 static unsigned int off_dig_out; |
94 static unsigned int off_dig_out; |
102 |
95 |
103 const static ec_pdo_entry_reg_t domain1_regs[] = { |
96 const static ec_pdo_entry_reg_t domain1_regs[] = { |
104 {0, 1, Beckhoff_EL3162, 0x3101, 2, &off_ana_in}, |
97 {0, 1, Beckhoff_EL3162, 0x3101, 2, &off_ana_in}, |
105 {0, 3, Beckhoff_EL2004, 0x3001, 1, &off_dig_out}, |
98 {0, 3, Beckhoff_EL2004, 0x3001, 1, &off_dig_out}, |
106 {} |
99 {} |
107 }; |
100 }; |
108 #endif |
101 |
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102 /*****************************************************************************/ |
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103 |
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104 void check_domain1_state(void) |
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105 { |
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106 ec_domain_state_t ds; |
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107 |
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108 ecrt_domain_state(domain1, &ds); |
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109 if (ds.working_counter != domain1_state.working_counter) |
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110 printk(KERN_INFO PFX "domain1 working_counter changed to %u.\n", |
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111 ds.working_counter); |
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112 |
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113 if (ds.wc_state != domain1_state.wc_state) |
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114 printk(KERN_INFO PFX "domain1 wc_state changed to %u.\n", |
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115 ds.wc_state); |
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116 |
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117 domain1_state = ds; |
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118 } |
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119 |
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120 /*****************************************************************************/ |
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121 |
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122 void check_master_state(void) |
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123 { |
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124 ec_master_state_t ms; |
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125 |
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126 spin_lock(&master_lock); |
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127 ecrt_master_state(master, &ms); |
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128 spin_unlock(&master_lock); |
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129 |
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130 if (ms.bus_state != master_state.bus_state) { |
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131 printk(KERN_INFO PFX "bus state changed to %i.\n", ms.bus_state); |
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132 } |
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133 if (ms.bus_tainted != master_state.bus_tainted) { |
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134 printk(KERN_INFO PFX "tainted flag changed to %u.\n", |
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135 ms.bus_tainted); |
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136 } |
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137 if (ms.slaves_responding != master_state.slaves_responding) { |
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138 printk(KERN_INFO PFX "slaves_responding changed to %u.\n", |
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139 ms.slaves_responding); |
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140 } |
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141 |
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142 master_state = ms; |
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143 } |
109 |
144 |
110 /*****************************************************************************/ |
145 /*****************************************************************************/ |
111 |
146 |
112 void run(unsigned long data) |
147 void run(unsigned long data) |
113 { |
148 { |
114 static unsigned int counter = 0; |
149 static unsigned int counter = 0; |
115 static unsigned int blink = 0; |
150 static unsigned int blink = 0; |
116 |
151 |
117 // receive |
152 // receive process data |
118 spin_lock(&master_lock); |
153 spin_lock(&master_lock); |
119 ecrt_master_receive(master); |
154 ecrt_master_receive(master); |
120 ecrt_domain_process(domain1); |
155 ecrt_domain_process(domain1); |
121 spin_unlock(&master_lock); |
156 spin_unlock(&master_lock); |
122 |
157 |
123 // process data |
158 // check process data state (optional) |
124 EC_WRITE_U8(pd + off_dig_out, blink ? 0x0F : 0x00); |
159 check_domain1_state(); |
125 |
160 |
126 if (counter) { |
161 if (counter) { |
127 counter--; |
162 counter--; |
128 } |
163 } else { // do this at FREQUENCY |
129 else { |
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130 counter = FREQUENCY; |
164 counter = FREQUENCY; |
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165 |
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166 // calculate new process data |
131 blink = !blink; |
167 blink = !blink; |
132 |
168 |
133 spin_lock(&master_lock); |
169 // check for master state (optional) |
134 ecrt_master_state(master, &master_state); |
170 check_master_state(); |
135 spin_unlock(&master_lock); |
171 } |
136 |
172 |
137 if (master_state.bus_state != old_state.bus_state) { |
173 // write process data |
138 printk(KERN_INFO PFX "bus state changed to %i.\n", |
174 EC_WRITE_U8(pd + off_dig_out, blink ? 0x0F : 0x00); |
139 master_state.bus_state); |
175 |
140 } |
176 // send process data |
141 if (master_state.bus_tainted != old_state.bus_tainted) { |
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142 printk(KERN_INFO PFX "tainted flag changed to %u.\n", |
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143 master_state.bus_tainted); |
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144 } |
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145 if (master_state.slaves_responding != |
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146 old_state.slaves_responding) { |
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147 printk(KERN_INFO PFX "slaves_responding changed to %u.\n", |
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148 master_state.slaves_responding); |
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149 } |
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150 |
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151 old_state = master_state; |
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152 } |
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153 |
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154 #ifdef KBUS |
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155 EC_WRITE_U8(r_outputs + 2, blink ? 0xFF : 0x00); |
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156 #endif |
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157 |
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158 // send |
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159 spin_lock(&master_lock); |
177 spin_lock(&master_lock); |
160 ecrt_domain_queue(domain1); |
178 ecrt_domain_queue(domain1); |
161 spin_unlock(&master_lock); |
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162 |
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163 spin_lock(&master_lock); |
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164 ecrt_master_send(master); |
179 ecrt_master_send(master); |
165 spin_unlock(&master_lock); |
180 spin_unlock(&master_lock); |
166 |
181 |
167 // restart timer |
182 // restart timer |
168 timer.expires += HZ / FREQUENCY; |
183 timer.expires += HZ / FREQUENCY; |