461 struct timer_list timer; |
474 struct timer_list timer; |
462 u16 cp_cmd; |
475 u16 cp_cmd; |
463 u16 intr_event; |
476 u16 intr_event; |
464 u16 napi_event; |
477 u16 napi_event; |
465 u16 intr_mask; |
478 u16 intr_mask; |
466 int phy_auto_nego_reg; |
|
467 int phy_1000_ctrl_reg; |
479 int phy_1000_ctrl_reg; |
468 #ifdef CONFIG_R8169_VLAN |
480 #ifdef CONFIG_R8169_VLAN |
469 struct vlan_group *vlgrp; |
481 struct vlan_group *vlgrp; |
470 #endif |
482 #endif |
471 int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex); |
483 int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex); |
472 int (*get_settings)(struct net_device *, struct ethtool_cmd *); |
484 int (*get_settings)(struct net_device *, struct ethtool_cmd *); |
473 void (*phy_reset_enable)(void __iomem *); |
485 void (*phy_reset_enable)(void __iomem *); |
474 void (*hw_start)(struct net_device *); |
486 void (*hw_start)(struct net_device *); |
475 unsigned int (*phy_reset_pending)(void __iomem *); |
487 unsigned int (*phy_reset_pending)(void __iomem *); |
476 unsigned int (*link_ok)(void __iomem *); |
488 unsigned int (*link_ok)(void __iomem *); |
|
489 int (*do_ioctl)(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd); |
477 int pcie_cap; |
490 int pcie_cap; |
478 struct delayed_work task; |
491 struct delayed_work task; |
479 unsigned features; |
492 unsigned features; |
480 |
493 |
481 struct mii_if_info mii; |
494 struct mii_if_info mii; |
|
495 struct rtl8169_counters counters; |
482 }; |
496 }; |
483 |
497 |
484 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>"); |
498 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>"); |
485 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver"); |
499 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver"); |
486 module_param(rx_copybreak, int, 0); |
500 module_param(rx_copybreak, int, 0); |
824 static int rtl8169_set_speed_xmii(struct net_device *dev, |
838 static int rtl8169_set_speed_xmii(struct net_device *dev, |
825 u8 autoneg, u16 speed, u8 duplex) |
839 u8 autoneg, u16 speed, u8 duplex) |
826 { |
840 { |
827 struct rtl8169_private *tp = netdev_priv(dev); |
841 struct rtl8169_private *tp = netdev_priv(dev); |
828 void __iomem *ioaddr = tp->mmio_addr; |
842 void __iomem *ioaddr = tp->mmio_addr; |
829 int auto_nego, giga_ctrl; |
843 int giga_ctrl, bmcr; |
830 |
|
831 auto_nego = mdio_read(ioaddr, MII_ADVERTISE); |
|
832 auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | |
|
833 ADVERTISE_100HALF | ADVERTISE_100FULL); |
|
834 giga_ctrl = mdio_read(ioaddr, MII_CTRL1000); |
|
835 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); |
|
836 |
844 |
837 if (autoneg == AUTONEG_ENABLE) { |
845 if (autoneg == AUTONEG_ENABLE) { |
|
846 int auto_nego; |
|
847 |
|
848 auto_nego = mdio_read(ioaddr, MII_ADVERTISE); |
838 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL | |
849 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL | |
839 ADVERTISE_100HALF | ADVERTISE_100FULL); |
850 ADVERTISE_100HALF | ADVERTISE_100FULL); |
840 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; |
851 auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
841 } else { |
852 |
842 if (speed == SPEED_10) |
853 giga_ctrl = mdio_read(ioaddr, MII_CTRL1000); |
843 auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL; |
854 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); |
844 else if (speed == SPEED_100) |
855 |
845 auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL; |
856 /* The 8100e/8101e/8102e do Fast Ethernet only. */ |
846 else if (speed == SPEED_1000) |
857 if ((tp->mac_version != RTL_GIGA_MAC_VER_07) && |
|
858 (tp->mac_version != RTL_GIGA_MAC_VER_08) && |
|
859 (tp->mac_version != RTL_GIGA_MAC_VER_09) && |
|
860 (tp->mac_version != RTL_GIGA_MAC_VER_10) && |
|
861 (tp->mac_version != RTL_GIGA_MAC_VER_13) && |
|
862 (tp->mac_version != RTL_GIGA_MAC_VER_14) && |
|
863 (tp->mac_version != RTL_GIGA_MAC_VER_15) && |
|
864 (tp->mac_version != RTL_GIGA_MAC_VER_16)) { |
847 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; |
865 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; |
848 |
866 } else if (netif_msg_link(tp)) { |
849 if (duplex == DUPLEX_HALF) |
|
850 auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL); |
|
851 |
|
852 if (duplex == DUPLEX_FULL) |
|
853 auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF); |
|
854 |
|
855 /* This tweak comes straight from Realtek's driver. */ |
|
856 if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) && |
|
857 ((tp->mac_version == RTL_GIGA_MAC_VER_13) || |
|
858 (tp->mac_version == RTL_GIGA_MAC_VER_16))) { |
|
859 auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA; |
|
860 } |
|
861 } |
|
862 |
|
863 /* The 8100e/8101e/8102e do Fast Ethernet only. */ |
|
864 if ((tp->mac_version == RTL_GIGA_MAC_VER_07) || |
|
865 (tp->mac_version == RTL_GIGA_MAC_VER_08) || |
|
866 (tp->mac_version == RTL_GIGA_MAC_VER_09) || |
|
867 (tp->mac_version == RTL_GIGA_MAC_VER_10) || |
|
868 (tp->mac_version == RTL_GIGA_MAC_VER_13) || |
|
869 (tp->mac_version == RTL_GIGA_MAC_VER_14) || |
|
870 (tp->mac_version == RTL_GIGA_MAC_VER_15) || |
|
871 (tp->mac_version == RTL_GIGA_MAC_VER_16)) { |
|
872 if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) && |
|
873 netif_msg_link(tp)) { |
|
874 printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n", |
867 printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n", |
875 dev->name); |
868 dev->name); |
876 } |
869 } |
877 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); |
870 |
878 } |
871 bmcr = BMCR_ANENABLE | BMCR_ANRESTART; |
879 |
872 |
880 auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
873 if ((tp->mac_version == RTL_GIGA_MAC_VER_11) || |
881 |
874 (tp->mac_version == RTL_GIGA_MAC_VER_12) || |
882 if ((tp->mac_version == RTL_GIGA_MAC_VER_11) || |
875 (tp->mac_version >= RTL_GIGA_MAC_VER_17)) { |
883 (tp->mac_version == RTL_GIGA_MAC_VER_12) || |
876 /* |
884 (tp->mac_version >= RTL_GIGA_MAC_VER_17)) { |
877 * Wake up the PHY. |
885 /* |
878 * Vendor specific (0x1f) and reserved (0x0e) MII |
886 * Wake up the PHY. |
879 * registers. |
887 * Vendor specific (0x1f) and reserved (0x0e) MII registers. |
880 */ |
888 */ |
881 mdio_write(ioaddr, 0x1f, 0x0000); |
|
882 mdio_write(ioaddr, 0x0e, 0x0000); |
|
883 } |
|
884 |
|
885 mdio_write(ioaddr, MII_ADVERTISE, auto_nego); |
|
886 mdio_write(ioaddr, MII_CTRL1000, giga_ctrl); |
|
887 } else { |
|
888 giga_ctrl = 0; |
|
889 |
|
890 if (speed == SPEED_10) |
|
891 bmcr = 0; |
|
892 else if (speed == SPEED_100) |
|
893 bmcr = BMCR_SPEED100; |
|
894 else |
|
895 return -EINVAL; |
|
896 |
|
897 if (duplex == DUPLEX_FULL) |
|
898 bmcr |= BMCR_FULLDPLX; |
|
899 |
889 mdio_write(ioaddr, 0x1f, 0x0000); |
900 mdio_write(ioaddr, 0x1f, 0x0000); |
890 mdio_write(ioaddr, 0x0e, 0x0000); |
901 } |
891 } |
902 |
892 |
|
893 tp->phy_auto_nego_reg = auto_nego; |
|
894 tp->phy_1000_ctrl_reg = giga_ctrl; |
903 tp->phy_1000_ctrl_reg = giga_ctrl; |
895 |
904 |
896 mdio_write(ioaddr, MII_ADVERTISE, auto_nego); |
905 mdio_write(ioaddr, MII_BMCR, bmcr); |
897 mdio_write(ioaddr, MII_CTRL1000, giga_ctrl); |
906 |
898 mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); |
907 if ((tp->mac_version == RTL_GIGA_MAC_VER_02) || |
|
908 (tp->mac_version == RTL_GIGA_MAC_VER_03)) { |
|
909 if ((speed == SPEED_100) && (autoneg != AUTONEG_ENABLE)) { |
|
910 mdio_write(ioaddr, 0x17, 0x2138); |
|
911 mdio_write(ioaddr, 0x0e, 0x0260); |
|
912 } else { |
|
913 mdio_write(ioaddr, 0x17, 0x2108); |
|
914 mdio_write(ioaddr, 0x0e, 0x0000); |
|
915 } |
|
916 } |
|
917 |
899 return 0; |
918 return 0; |
900 } |
919 } |
901 |
920 |
902 static int rtl8169_set_speed(struct net_device *dev, |
921 static int rtl8169_set_speed(struct net_device *dev, |
903 u8 autoneg, u16 speed, u8 duplex) |
922 u8 autoneg, u16 speed, u8 duplex) |
1097 "multicast", |
1116 "multicast", |
1098 "tx_aborted", |
1117 "tx_aborted", |
1099 "tx_underrun", |
1118 "tx_underrun", |
1100 }; |
1119 }; |
1101 |
1120 |
1102 struct rtl8169_counters { |
|
1103 __le64 tx_packets; |
|
1104 __le64 rx_packets; |
|
1105 __le64 tx_errors; |
|
1106 __le32 rx_errors; |
|
1107 __le16 rx_missed; |
|
1108 __le16 align_errors; |
|
1109 __le32 tx_one_collision; |
|
1110 __le32 tx_multi_collision; |
|
1111 __le64 rx_unicast; |
|
1112 __le64 rx_broadcast; |
|
1113 __le32 rx_multicast; |
|
1114 __le16 tx_aborted; |
|
1115 __le16 tx_underun; |
|
1116 }; |
|
1117 |
|
1118 static int rtl8169_get_sset_count(struct net_device *dev, int sset) |
1121 static int rtl8169_get_sset_count(struct net_device *dev, int sset) |
1119 { |
1122 { |
1120 switch (sset) { |
1123 switch (sset) { |
1121 case ETH_SS_STATS: |
1124 case ETH_SS_STATS: |
1122 return ARRAY_SIZE(rtl8169_gstrings); |
1125 return ARRAY_SIZE(rtl8169_gstrings); |
1123 default: |
1126 default: |
1124 return -EOPNOTSUPP; |
1127 return -EOPNOTSUPP; |
1125 } |
1128 } |
1126 } |
1129 } |
1127 |
1130 |
1128 static void rtl8169_get_ethtool_stats(struct net_device *dev, |
1131 static void rtl8169_update_counters(struct net_device *dev) |
1129 struct ethtool_stats *stats, u64 *data) |
|
1130 { |
1132 { |
1131 struct rtl8169_private *tp = netdev_priv(dev); |
1133 struct rtl8169_private *tp = netdev_priv(dev); |
1132 void __iomem *ioaddr = tp->mmio_addr; |
1134 void __iomem *ioaddr = tp->mmio_addr; |
1133 struct rtl8169_counters *counters; |
1135 struct rtl8169_counters *counters; |
1134 dma_addr_t paddr; |
1136 dma_addr_t paddr; |
1135 u32 cmd; |
1137 u32 cmd; |
1136 |
1138 int wait = 1000; |
1137 ASSERT_RTNL(); |
1139 |
|
1140 /* |
|
1141 * Some chips are unable to dump tally counters when the receiver |
|
1142 * is disabled. |
|
1143 */ |
|
1144 if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0) |
|
1145 return; |
1138 |
1146 |
1139 counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr); |
1147 counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr); |
1140 if (!counters) |
1148 if (!counters) |
1141 return; |
1149 return; |
1142 |
1150 |
1143 RTL_W32(CounterAddrHigh, (u64)paddr >> 32); |
1151 RTL_W32(CounterAddrHigh, (u64)paddr >> 32); |
1144 cmd = (u64)paddr & DMA_32BIT_MASK; |
1152 cmd = (u64)paddr & DMA_BIT_MASK(32); |
1145 RTL_W32(CounterAddrLow, cmd); |
1153 RTL_W32(CounterAddrLow, cmd); |
1146 RTL_W32(CounterAddrLow, cmd | CounterDump); |
1154 RTL_W32(CounterAddrLow, cmd | CounterDump); |
1147 |
1155 |
1148 while (RTL_R32(CounterAddrLow) & CounterDump) { |
1156 while (wait--) { |
1149 if (msleep_interruptible(1)) |
1157 if ((RTL_R32(CounterAddrLow) & CounterDump) == 0) { |
|
1158 /* copy updated counters */ |
|
1159 memcpy(&tp->counters, counters, sizeof(*counters)); |
1150 break; |
1160 break; |
|
1161 } |
|
1162 udelay(10); |
1151 } |
1163 } |
1152 |
1164 |
1153 RTL_W32(CounterAddrLow, 0); |
1165 RTL_W32(CounterAddrLow, 0); |
1154 RTL_W32(CounterAddrHigh, 0); |
1166 RTL_W32(CounterAddrHigh, 0); |
1155 |
1167 |
1156 data[0] = le64_to_cpu(counters->tx_packets); |
|
1157 data[1] = le64_to_cpu(counters->rx_packets); |
|
1158 data[2] = le64_to_cpu(counters->tx_errors); |
|
1159 data[3] = le32_to_cpu(counters->rx_errors); |
|
1160 data[4] = le16_to_cpu(counters->rx_missed); |
|
1161 data[5] = le16_to_cpu(counters->align_errors); |
|
1162 data[6] = le32_to_cpu(counters->tx_one_collision); |
|
1163 data[7] = le32_to_cpu(counters->tx_multi_collision); |
|
1164 data[8] = le64_to_cpu(counters->rx_unicast); |
|
1165 data[9] = le64_to_cpu(counters->rx_broadcast); |
|
1166 data[10] = le32_to_cpu(counters->rx_multicast); |
|
1167 data[11] = le16_to_cpu(counters->tx_aborted); |
|
1168 data[12] = le16_to_cpu(counters->tx_underun); |
|
1169 |
|
1170 pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr); |
1168 pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr); |
|
1169 } |
|
1170 |
|
1171 static void rtl8169_get_ethtool_stats(struct net_device *dev, |
|
1172 struct ethtool_stats *stats, u64 *data) |
|
1173 { |
|
1174 struct rtl8169_private *tp = netdev_priv(dev); |
|
1175 |
|
1176 ASSERT_RTNL(); |
|
1177 |
|
1178 rtl8169_update_counters(dev); |
|
1179 |
|
1180 data[0] = le64_to_cpu(tp->counters.tx_packets); |
|
1181 data[1] = le64_to_cpu(tp->counters.rx_packets); |
|
1182 data[2] = le64_to_cpu(tp->counters.tx_errors); |
|
1183 data[3] = le32_to_cpu(tp->counters.rx_errors); |
|
1184 data[4] = le16_to_cpu(tp->counters.rx_missed); |
|
1185 data[5] = le16_to_cpu(tp->counters.align_errors); |
|
1186 data[6] = le32_to_cpu(tp->counters.tx_one_collision); |
|
1187 data[7] = le32_to_cpu(tp->counters.tx_multi_collision); |
|
1188 data[8] = le64_to_cpu(tp->counters.rx_unicast); |
|
1189 data[9] = le64_to_cpu(tp->counters.rx_broadcast); |
|
1190 data[10] = le32_to_cpu(tp->counters.rx_multicast); |
|
1191 data[11] = le16_to_cpu(tp->counters.tx_aborted); |
|
1192 data[12] = le16_to_cpu(tp->counters.tx_underun); |
1171 } |
1193 } |
1172 |
1194 |
1173 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data) |
1195 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data) |
1174 { |
1196 { |
1175 switch(stringset) { |
1197 switch(stringset) { |
1273 { 0xfc800000, 0x10000000, RTL_GIGA_MAC_VER_04 }, |
1295 { 0xfc800000, 0x10000000, RTL_GIGA_MAC_VER_04 }, |
1274 { 0xfc800000, 0x04000000, RTL_GIGA_MAC_VER_03 }, |
1296 { 0xfc800000, 0x04000000, RTL_GIGA_MAC_VER_03 }, |
1275 { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02 }, |
1297 { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02 }, |
1276 { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01 }, |
1298 { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01 }, |
1277 |
1299 |
1278 { 0x00000000, 0x00000000, RTL_GIGA_MAC_VER_01 } /* Catch-all */ |
1300 /* Catch-all */ |
|
1301 { 0x00000000, 0x00000000, RTL_GIGA_MAC_NONE } |
1279 }, *p = mac_info; |
1302 }, *p = mac_info; |
1280 u32 reg; |
1303 u32 reg; |
1281 |
1304 |
1282 reg = RTL_R32(TxConfig); |
1305 reg = RTL_R32(TxConfig); |
1283 while ((reg & p->mask) != p->val) |
1306 while ((reg & p->mask) != p->val) |
1284 p++; |
1307 p++; |
1285 tp->mac_version = p->mac_version; |
1308 tp->mac_version = p->mac_version; |
1286 |
|
1287 if (p->mask == 0x00000000) { |
|
1288 struct pci_dev *pdev = tp->pci_dev; |
|
1289 |
|
1290 dev_info(&pdev->dev, "unknown MAC (%08x)\n", reg); |
|
1291 } |
|
1292 } |
1309 } |
1293 |
1310 |
1294 static void rtl8169_print_mac_version(struct rtl8169_private *tp) |
1311 static void rtl8169_print_mac_version(struct rtl8169_private *tp) |
1295 { |
1312 { |
1296 dprintk("mac_version = 0x%02x\n", tp->mac_version); |
1313 dprintk("mac_version = 0x%02x\n", tp->mac_version); |
1845 if (!capable(CAP_NET_ADMIN)) |
1864 if (!capable(CAP_NET_ADMIN)) |
1846 return -EPERM; |
1865 return -EPERM; |
1847 mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in); |
1866 mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in); |
1848 return 0; |
1867 return 0; |
1849 } |
1868 } |
|
1869 return -EOPNOTSUPP; |
|
1870 } |
|
1871 |
|
1872 static int rtl_tbi_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd) |
|
1873 { |
1850 return -EOPNOTSUPP; |
1874 return -EOPNOTSUPP; |
1851 } |
1875 } |
1852 |
1876 |
1853 static const struct rtl_cfg_info { |
1877 static const struct rtl_cfg_info { |
1854 void (*hw_start)(struct net_device *); |
1878 void (*hw_start)(struct net_device *); |
1855 unsigned int region; |
1879 unsigned int region; |
1856 unsigned int align; |
1880 unsigned int align; |
1857 u16 intr_event; |
1881 u16 intr_event; |
1858 u16 napi_event; |
1882 u16 napi_event; |
1859 unsigned features; |
1883 unsigned features; |
|
1884 u8 default_ver; |
1860 } rtl_cfg_infos [] = { |
1885 } rtl_cfg_infos [] = { |
1861 [RTL_CFG_0] = { |
1886 [RTL_CFG_0] = { |
1862 .hw_start = rtl_hw_start_8169, |
1887 .hw_start = rtl_hw_start_8169, |
1863 .region = 1, |
1888 .region = 1, |
1864 .align = 0, |
1889 .align = 0, |
1865 .intr_event = SYSErr | LinkChg | RxOverflow | |
1890 .intr_event = SYSErr | LinkChg | RxOverflow | |
1866 RxFIFOOver | TxErr | TxOK | RxOK | RxErr, |
1891 RxFIFOOver | TxErr | TxOK | RxOK | RxErr, |
1867 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, |
1892 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, |
1868 .features = RTL_FEATURE_GMII |
1893 .features = RTL_FEATURE_GMII, |
|
1894 .default_ver = RTL_GIGA_MAC_VER_01, |
1869 }, |
1895 }, |
1870 [RTL_CFG_1] = { |
1896 [RTL_CFG_1] = { |
1871 .hw_start = rtl_hw_start_8168, |
1897 .hw_start = rtl_hw_start_8168, |
1872 .region = 2, |
1898 .region = 2, |
1873 .align = 8, |
1899 .align = 8, |
1874 .intr_event = SYSErr | LinkChg | RxOverflow | |
1900 .intr_event = SYSErr | LinkChg | RxOverflow | |
1875 TxErr | TxOK | RxOK | RxErr, |
1901 TxErr | TxOK | RxOK | RxErr, |
1876 .napi_event = TxErr | TxOK | RxOK | RxOverflow, |
1902 .napi_event = TxErr | TxOK | RxOK | RxOverflow, |
1877 .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI |
1903 .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI, |
|
1904 .default_ver = RTL_GIGA_MAC_VER_11, |
1878 }, |
1905 }, |
1879 [RTL_CFG_2] = { |
1906 [RTL_CFG_2] = { |
1880 .hw_start = rtl_hw_start_8101, |
1907 .hw_start = rtl_hw_start_8101, |
1881 .region = 2, |
1908 .region = 2, |
1882 .align = 8, |
1909 .align = 8, |
1883 .intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout | |
1910 .intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout | |
1884 RxFIFOOver | TxErr | TxOK | RxOK | RxErr, |
1911 RxFIFOOver | TxErr | TxOK | RxOK | RxErr, |
1885 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, |
1912 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, |
1886 .features = RTL_FEATURE_MSI |
1913 .features = RTL_FEATURE_MSI, |
|
1914 .default_ver = RTL_GIGA_MAC_VER_13, |
1887 } |
1915 } |
1888 }; |
1916 }; |
1889 |
1917 |
1890 /* Cfg9346_Unlock assumed. */ |
1918 /* Cfg9346_Unlock assumed. */ |
1891 static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, |
1919 static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, |
1913 pci_disable_msi(pdev); |
1941 pci_disable_msi(pdev); |
1914 tp->features &= ~RTL_FEATURE_MSI; |
1942 tp->features &= ~RTL_FEATURE_MSI; |
1915 } |
1943 } |
1916 } |
1944 } |
1917 |
1945 |
|
1946 static const struct net_device_ops rtl8169_netdev_ops = { |
|
1947 .ndo_open = rtl8169_open, |
|
1948 .ndo_stop = rtl8169_close, |
|
1949 .ndo_get_stats = rtl8169_get_stats, |
|
1950 .ndo_start_xmit = rtl8169_start_xmit, |
|
1951 .ndo_tx_timeout = rtl8169_tx_timeout, |
|
1952 .ndo_validate_addr = eth_validate_addr, |
|
1953 .ndo_change_mtu = rtl8169_change_mtu, |
|
1954 .ndo_set_mac_address = rtl_set_mac_address, |
|
1955 .ndo_do_ioctl = rtl8169_ioctl, |
|
1956 .ndo_set_multicast_list = rtl_set_rx_mode, |
|
1957 #ifdef CONFIG_R8169_VLAN |
|
1958 .ndo_vlan_rx_register = rtl8169_vlan_rx_register, |
|
1959 #endif |
|
1960 #ifdef CONFIG_NET_POLL_CONTROLLER |
|
1961 .ndo_poll_controller = rtl8169_netpoll, |
|
1962 #endif |
|
1963 |
|
1964 }; |
|
1965 |
1918 static int __devinit |
1966 static int __devinit |
1919 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
1967 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
1920 { |
1968 { |
1921 const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data; |
1969 const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data; |
1922 const unsigned int region = cfg->region; |
1970 const unsigned int region = cfg->region; |
1995 } |
2044 } |
1996 |
2045 |
1997 tp->cp_cmd = PCIMulRW | RxChkSum; |
2046 tp->cp_cmd = PCIMulRW | RxChkSum; |
1998 |
2047 |
1999 if ((sizeof(dma_addr_t) > 4) && |
2048 if ((sizeof(dma_addr_t) > 4) && |
2000 !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) { |
2049 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) { |
2001 tp->cp_cmd |= PCIDAC; |
2050 tp->cp_cmd |= PCIDAC; |
2002 dev->features |= NETIF_F_HIGHDMA; |
2051 dev->features |= NETIF_F_HIGHDMA; |
2003 } else { |
2052 } else { |
2004 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
2053 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
2005 if (rc < 0) { |
2054 if (rc < 0) { |
2006 if (netif_msg_probe(tp)) { |
2055 if (netif_msg_probe(tp)) { |
2007 dev_err(&pdev->dev, |
2056 dev_err(&pdev->dev, |
2008 "DMA configuration failed.\n"); |
2057 "DMA configuration failed.\n"); |
2009 } |
2058 } |
2010 goto err_out_free_res_4; |
2059 goto err_out_free_res_4; |
2011 } |
2060 } |
2012 } |
2061 } |
2013 |
2062 |
2014 pci_set_master(pdev); |
|
2015 |
|
2016 /* ioremap MMIO region */ |
2063 /* ioremap MMIO region */ |
2017 ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE); |
2064 ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE); |
2018 if (!ioaddr) { |
2065 if (!ioaddr) { |
2019 if (netif_msg_probe(tp)) |
2066 if (netif_msg_probe(tp)) |
2020 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); |
2067 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); |
2038 msleep_interruptible(1); |
2085 msleep_interruptible(1); |
2039 } |
2086 } |
2040 |
2087 |
2041 RTL_W16(IntrStatus, 0xffff); |
2088 RTL_W16(IntrStatus, 0xffff); |
2042 |
2089 |
|
2090 pci_set_master(pdev); |
|
2091 |
2043 /* Identify chip attached to board */ |
2092 /* Identify chip attached to board */ |
2044 rtl8169_get_mac_version(tp, ioaddr); |
2093 rtl8169_get_mac_version(tp, ioaddr); |
|
2094 |
|
2095 /* Use appropriate default if unknown */ |
|
2096 if (tp->mac_version == RTL_GIGA_MAC_NONE) { |
|
2097 if (netif_msg_probe(tp)) { |
|
2098 dev_notice(&pdev->dev, |
|
2099 "unknown MAC, using family default\n"); |
|
2100 } |
|
2101 tp->mac_version = cfg->default_ver; |
|
2102 } |
2045 |
2103 |
2046 rtl8169_print_mac_version(tp); |
2104 rtl8169_print_mac_version(tp); |
2047 |
2105 |
2048 for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) { |
2106 for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) { |
2049 if (tp->mac_version == rtl_chip_info[i].mac_version) |
2107 if (tp->mac_version == rtl_chip_info[i].mac_version) |
2050 break; |
2108 break; |
2051 } |
2109 } |
2052 if (i == ARRAY_SIZE(rtl_chip_info)) { |
2110 if (i == ARRAY_SIZE(rtl_chip_info)) { |
2053 /* Unknown chip: assume array element #0, original RTL-8169 */ |
2111 dev_err(&pdev->dev, |
2054 if (netif_msg_probe(tp)) { |
2112 "driver bug, MAC version not found in rtl_chip_info\n"); |
2055 dev_printk(KERN_DEBUG, &pdev->dev, |
2113 goto err_out_msi_5; |
2056 "unknown chip version, assuming %s\n", |
|
2057 rtl_chip_info[0].name); |
|
2058 } |
|
2059 i = 0; |
|
2060 } |
2114 } |
2061 tp->chipset = i; |
2115 tp->chipset = i; |
2062 |
2116 |
2063 RTL_W8(Cfg9346, Cfg9346_Unlock); |
2117 RTL_W8(Cfg9346, Cfg9346_Unlock); |
2064 RTL_W8(Config1, RTL_R8(Config1) | PMEnable); |
2118 RTL_W8(Config1, RTL_R8(Config1) | PMEnable); |
2075 tp->set_speed = rtl8169_set_speed_tbi; |
2129 tp->set_speed = rtl8169_set_speed_tbi; |
2076 tp->get_settings = rtl8169_gset_tbi; |
2130 tp->get_settings = rtl8169_gset_tbi; |
2077 tp->phy_reset_enable = rtl8169_tbi_reset_enable; |
2131 tp->phy_reset_enable = rtl8169_tbi_reset_enable; |
2078 tp->phy_reset_pending = rtl8169_tbi_reset_pending; |
2132 tp->phy_reset_pending = rtl8169_tbi_reset_pending; |
2079 tp->link_ok = rtl8169_tbi_link_ok; |
2133 tp->link_ok = rtl8169_tbi_link_ok; |
|
2134 tp->do_ioctl = rtl_tbi_ioctl; |
2080 |
2135 |
2081 tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */ |
2136 tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */ |
2082 } else { |
2137 } else { |
2083 tp->set_speed = rtl8169_set_speed_xmii; |
2138 tp->set_speed = rtl8169_set_speed_xmii; |
2084 tp->get_settings = rtl8169_gset_xmii; |
2139 tp->get_settings = rtl8169_gset_xmii; |
2085 tp->phy_reset_enable = rtl8169_xmii_reset_enable; |
2140 tp->phy_reset_enable = rtl8169_xmii_reset_enable; |
2086 tp->phy_reset_pending = rtl8169_xmii_reset_pending; |
2141 tp->phy_reset_pending = rtl8169_xmii_reset_pending; |
2087 tp->link_ok = rtl8169_xmii_link_ok; |
2142 tp->link_ok = rtl8169_xmii_link_ok; |
2088 |
2143 tp->do_ioctl = rtl_xmii_ioctl; |
2089 dev->do_ioctl = rtl8169_ioctl; |
|
2090 } |
2144 } |
2091 |
2145 |
2092 spin_lock_init(&tp->lock); |
2146 spin_lock_init(&tp->lock); |
2093 |
2147 |
2094 tp->mmio_addr = ioaddr; |
2148 tp->mmio_addr = ioaddr; |
2096 /* Get MAC address */ |
2150 /* Get MAC address */ |
2097 for (i = 0; i < MAC_ADDR_LEN; i++) |
2151 for (i = 0; i < MAC_ADDR_LEN; i++) |
2098 dev->dev_addr[i] = RTL_R8(MAC0 + i); |
2152 dev->dev_addr[i] = RTL_R8(MAC0 + i); |
2099 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
2153 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
2100 |
2154 |
2101 dev->open = rtl8169_open; |
|
2102 dev->hard_start_xmit = rtl8169_start_xmit; |
|
2103 dev->get_stats = rtl8169_get_stats; |
|
2104 SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops); |
2155 SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops); |
2105 dev->stop = rtl8169_close; |
|
2106 dev->tx_timeout = rtl8169_tx_timeout; |
|
2107 dev->set_multicast_list = rtl_set_rx_mode; |
|
2108 dev->watchdog_timeo = RTL8169_TX_TIMEOUT; |
2156 dev->watchdog_timeo = RTL8169_TX_TIMEOUT; |
2109 dev->irq = pdev->irq; |
2157 dev->irq = pdev->irq; |
2110 dev->base_addr = (unsigned long) ioaddr; |
2158 dev->base_addr = (unsigned long) ioaddr; |
2111 dev->change_mtu = rtl8169_change_mtu; |
|
2112 dev->set_mac_address = rtl_set_mac_address; |
|
2113 |
2159 |
2114 netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT); |
2160 netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT); |
2115 |
2161 |
2116 #ifdef CONFIG_R8169_VLAN |
2162 #ifdef CONFIG_R8169_VLAN |
2117 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; |
2163 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; |
2118 dev->vlan_rx_register = rtl8169_vlan_rx_register; |
|
2119 #endif |
|
2120 |
|
2121 #ifdef CONFIG_NET_POLL_CONTROLLER |
|
2122 dev->poll_controller = rtl8169_netpoll; |
|
2123 #endif |
2164 #endif |
2124 |
2165 |
2125 tp->intr_mask = 0xffff; |
2166 tp->intr_mask = 0xffff; |
2126 tp->align = cfg->align; |
2167 tp->align = cfg->align; |
2127 tp->hw_start = cfg->hw_start; |
2168 tp->hw_start = cfg->hw_start; |
3525 struct rtl8169_private *tp = netdev_priv(dev); |
3555 struct rtl8169_private *tp = netdev_priv(dev); |
3526 void __iomem *ioaddr = tp->mmio_addr; |
3556 void __iomem *ioaddr = tp->mmio_addr; |
3527 int handled = 0; |
3557 int handled = 0; |
3528 int status; |
3558 int status; |
3529 |
3559 |
|
3560 /* loop handling interrupts until we have no new ones or |
|
3561 * we hit a invalid/hotplug case. |
|
3562 */ |
3530 status = RTL_R16(IntrStatus); |
3563 status = RTL_R16(IntrStatus); |
3531 |
3564 while (status && status != 0xffff) { |
3532 /* hotplug/major error/no more work/shared irq */ |
3565 handled = 1; |
3533 if ((status == 0xffff) || !status) |
3566 |
3534 goto out; |
3567 /* Handle all of the error cases first. These will reset |
3535 |
3568 * the chip, so just exit the loop. |
3536 handled = 1; |
3569 */ |
3537 |
3570 if (unlikely(!netif_running(dev))) { |
3538 if (unlikely(!netif_running(dev))) { |
3571 rtl8169_asic_down(ioaddr); |
3539 rtl8169_asic_down(ioaddr); |
3572 break; |
3540 goto out; |
|
3541 } |
|
3542 |
|
3543 status &= tp->intr_mask; |
|
3544 RTL_W16(IntrStatus, |
|
3545 (status & RxFIFOOver) ? (status | RxOverflow) : status); |
|
3546 |
|
3547 if (!(status & tp->intr_event)) |
|
3548 goto out; |
|
3549 |
|
3550 /* Work around for rx fifo overflow */ |
|
3551 if (unlikely(status & RxFIFOOver) && |
|
3552 (tp->mac_version == RTL_GIGA_MAC_VER_11)) { |
|
3553 netif_stop_queue(dev); |
|
3554 rtl8169_tx_timeout(dev); |
|
3555 goto out; |
|
3556 } |
|
3557 |
|
3558 if (unlikely(status & SYSErr)) { |
|
3559 rtl8169_pcierr_interrupt(dev); |
|
3560 goto out; |
|
3561 } |
|
3562 |
|
3563 if (status & LinkChg) |
|
3564 rtl8169_check_link_status(dev, tp, ioaddr); |
|
3565 |
|
3566 if (status & tp->napi_event) { |
|
3567 RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event); |
|
3568 tp->intr_mask = ~tp->napi_event; |
|
3569 |
|
3570 if (likely(netif_rx_schedule_prep(dev, &tp->napi))) |
|
3571 __netif_rx_schedule(dev, &tp->napi); |
|
3572 else if (netif_msg_intr(tp)) { |
|
3573 printk(KERN_INFO "%s: interrupt %04x in poll\n", |
|
3574 dev->name, status); |
|
3575 } |
3573 } |
3576 } |
3574 |
3577 out: |
3575 /* Work around for rx fifo overflow */ |
|
3576 if (unlikely(status & RxFIFOOver) && |
|
3577 (tp->mac_version == RTL_GIGA_MAC_VER_11)) { |
|
3578 netif_stop_queue(dev); |
|
3579 rtl8169_tx_timeout(dev); |
|
3580 break; |
|
3581 } |
|
3582 |
|
3583 if (unlikely(status & SYSErr)) { |
|
3584 rtl8169_pcierr_interrupt(dev); |
|
3585 break; |
|
3586 } |
|
3587 |
|
3588 if (status & LinkChg) |
|
3589 rtl8169_check_link_status(dev, tp, ioaddr); |
|
3590 |
|
3591 /* We need to see the lastest version of tp->intr_mask to |
|
3592 * avoid ignoring an MSI interrupt and having to wait for |
|
3593 * another event which may never come. |
|
3594 */ |
|
3595 smp_rmb(); |
|
3596 if (status & tp->intr_mask & tp->napi_event) { |
|
3597 RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event); |
|
3598 tp->intr_mask = ~tp->napi_event; |
|
3599 |
|
3600 if (likely(napi_schedule_prep(&tp->napi))) |
|
3601 __napi_schedule(&tp->napi); |
|
3602 else if (netif_msg_intr(tp)) { |
|
3603 printk(KERN_INFO "%s: interrupt %04x in poll\n", |
|
3604 dev->name, status); |
|
3605 } |
|
3606 } |
|
3607 |
|
3608 /* We only get a new MSI interrupt when all active irq |
|
3609 * sources on the chip have been acknowledged. So, ack |
|
3610 * everything we've seen and check if new sources have become |
|
3611 * active to avoid blocking all interrupts from the chip. |
|
3612 */ |
|
3613 RTL_W16(IntrStatus, |
|
3614 (status & RxFIFOOver) ? (status | RxOverflow) : status); |
|
3615 status = RTL_R16(IntrStatus); |
|
3616 } |
|
3617 |
3578 return IRQ_RETVAL(handled); |
3618 return IRQ_RETVAL(handled); |
3579 } |
3619 } |
3580 |
3620 |
3581 static int rtl8169_poll(struct napi_struct *napi, int budget) |
3621 static int rtl8169_poll(struct napi_struct *napi, int budget) |
3582 { |
3622 { |
3587 |
3627 |
3588 work_done = rtl8169_rx_interrupt(dev, tp, ioaddr, (u32) budget); |
3628 work_done = rtl8169_rx_interrupt(dev, tp, ioaddr, (u32) budget); |
3589 rtl8169_tx_interrupt(dev, tp, ioaddr); |
3629 rtl8169_tx_interrupt(dev, tp, ioaddr); |
3590 |
3630 |
3591 if (work_done < budget) { |
3631 if (work_done < budget) { |
3592 netif_rx_complete(dev, napi); |
3632 napi_complete(napi); |
|
3633 |
|
3634 /* We need for force the visibility of tp->intr_mask |
|
3635 * for other CPUs, as we can loose an MSI interrupt |
|
3636 * and potentially wait for a retransmit timeout if we don't. |
|
3637 * The posted write to IntrMask is safe, as it will |
|
3638 * eventually make it to the chip and we won't loose anything |
|
3639 * until it does. |
|
3640 */ |
3593 tp->intr_mask = 0xffff; |
3641 tp->intr_mask = 0xffff; |
3594 /* |
|
3595 * 20040426: the barrier is not strictly required but the |
|
3596 * behavior of the irq handler could be less predictable |
|
3597 * without it. Btw, the lack of flush for the posted pci |
|
3598 * write is safe - FR |
|
3599 */ |
|
3600 smp_wmb(); |
3642 smp_wmb(); |
3601 RTL_W16(IntrMask, tp->intr_event); |
3643 RTL_W16(IntrMask, tp->intr_event); |
3602 } |
3644 } |
3603 |
3645 |
3604 return work_done; |
3646 return work_done; |
3759 } |
3804 } |
3760 |
3805 |
3761 return &dev->stats; |
3806 return &dev->stats; |
3762 } |
3807 } |
3763 |
3808 |
3764 #ifdef CONFIG_PM |
3809 static void rtl8169_net_suspend(struct net_device *dev) |
3765 |
3810 { |
3766 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state) |
|
3767 { |
|
3768 struct net_device *dev = pci_get_drvdata(pdev); |
|
3769 struct rtl8169_private *tp = netdev_priv(dev); |
|
3770 void __iomem *ioaddr = tp->mmio_addr; |
|
3771 |
|
3772 if (!netif_running(dev)) |
3811 if (!netif_running(dev)) |
3773 goto out_pci_suspend; |
3812 return; |
3774 |
3813 |
3775 netif_device_detach(dev); |
3814 netif_device_detach(dev); |
3776 netif_stop_queue(dev); |
3815 netif_stop_queue(dev); |
3777 |
3816 } |
3778 spin_lock_irq(&tp->lock); |
3817 |
3779 |
3818 #ifdef CONFIG_PM |
3780 rtl8169_asic_down(ioaddr); |
3819 |
3781 |
3820 static int rtl8169_suspend(struct device *device) |
3782 rtl8169_rx_missed(dev, ioaddr); |
3821 { |
3783 |
3822 struct pci_dev *pdev = to_pci_dev(device); |
3784 spin_unlock_irq(&tp->lock); |
3823 struct net_device *dev = pci_get_drvdata(pdev); |
3785 |
3824 |
3786 out_pci_suspend: |
3825 rtl8169_net_suspend(dev); |
3787 pci_save_state(pdev); |
|
3788 pci_enable_wake(pdev, pci_choose_state(pdev, state), |
|
3789 (tp->features & RTL_FEATURE_WOL) ? 1 : 0); |
|
3790 pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
|
3791 |
3826 |
3792 return 0; |
3827 return 0; |
3793 } |
3828 } |
3794 |
3829 |
3795 static int rtl8169_resume(struct pci_dev *pdev) |
3830 static int rtl8169_resume(struct device *device) |
3796 { |
3831 { |
|
3832 struct pci_dev *pdev = to_pci_dev(device); |
3797 struct net_device *dev = pci_get_drvdata(pdev); |
3833 struct net_device *dev = pci_get_drvdata(pdev); |
3798 |
|
3799 pci_set_power_state(pdev, PCI_D0); |
|
3800 pci_restore_state(pdev); |
|
3801 pci_enable_wake(pdev, PCI_D0, 0); |
|
3802 |
3834 |
3803 if (!netif_running(dev)) |
3835 if (!netif_running(dev)) |
3804 goto out; |
3836 goto out; |
3805 |
3837 |
3806 netif_device_attach(dev); |
3838 netif_device_attach(dev); |
3808 rtl8169_schedule_work(dev, rtl8169_reset_task); |
3840 rtl8169_schedule_work(dev, rtl8169_reset_task); |
3809 out: |
3841 out: |
3810 return 0; |
3842 return 0; |
3811 } |
3843 } |
3812 |
3844 |
|
3845 static struct dev_pm_ops rtl8169_pm_ops = { |
|
3846 .suspend = rtl8169_suspend, |
|
3847 .resume = rtl8169_resume, |
|
3848 .freeze = rtl8169_suspend, |
|
3849 .thaw = rtl8169_resume, |
|
3850 .poweroff = rtl8169_suspend, |
|
3851 .restore = rtl8169_resume, |
|
3852 }; |
|
3853 |
|
3854 #define RTL8169_PM_OPS (&rtl8169_pm_ops) |
|
3855 |
|
3856 #else /* !CONFIG_PM */ |
|
3857 |
|
3858 #define RTL8169_PM_OPS NULL |
|
3859 |
|
3860 #endif /* !CONFIG_PM */ |
|
3861 |
3813 static void rtl_shutdown(struct pci_dev *pdev) |
3862 static void rtl_shutdown(struct pci_dev *pdev) |
3814 { |
3863 { |
3815 rtl8169_suspend(pdev, PMSG_SUSPEND); |
3864 struct net_device *dev = pci_get_drvdata(pdev); |
3816 } |
3865 struct rtl8169_private *tp = netdev_priv(dev); |
3817 |
3866 void __iomem *ioaddr = tp->mmio_addr; |
3818 #endif /* CONFIG_PM */ |
3867 |
|
3868 rtl8169_net_suspend(dev); |
|
3869 |
|
3870 spin_lock_irq(&tp->lock); |
|
3871 |
|
3872 rtl8169_asic_down(ioaddr); |
|
3873 |
|
3874 spin_unlock_irq(&tp->lock); |
|
3875 |
|
3876 if (system_state == SYSTEM_POWER_OFF) { |
|
3877 /* WoL fails with some 8168 when the receiver is disabled. */ |
|
3878 if (tp->features & RTL_FEATURE_WOL) { |
|
3879 pci_clear_master(pdev); |
|
3880 |
|
3881 RTL_W8(ChipCmd, CmdRxEnb); |
|
3882 /* PCI commit */ |
|
3883 RTL_R8(ChipCmd); |
|
3884 } |
|
3885 |
|
3886 pci_wake_from_d3(pdev, true); |
|
3887 pci_set_power_state(pdev, PCI_D3hot); |
|
3888 } |
|
3889 } |
3819 |
3890 |
3820 static struct pci_driver rtl8169_pci_driver = { |
3891 static struct pci_driver rtl8169_pci_driver = { |
3821 .name = MODULENAME, |
3892 .name = MODULENAME, |
3822 .id_table = rtl8169_pci_tbl, |
3893 .id_table = rtl8169_pci_tbl, |
3823 .probe = rtl8169_init_one, |
3894 .probe = rtl8169_init_one, |
3824 .remove = __devexit_p(rtl8169_remove_one), |
3895 .remove = __devexit_p(rtl8169_remove_one), |
3825 #ifdef CONFIG_PM |
|
3826 .suspend = rtl8169_suspend, |
|
3827 .resume = rtl8169_resume, |
|
3828 .shutdown = rtl_shutdown, |
3896 .shutdown = rtl_shutdown, |
3829 #endif |
3897 .driver.pm = RTL8169_PM_OPS, |
3830 }; |
3898 }; |
3831 |
3899 |
3832 static int __init rtl8169_init_module(void) |
3900 static int __init rtl8169_init_module(void) |
3833 { |
3901 { |
3834 return pci_register_driver(&rtl8169_pci_driver); |
3902 return pci_register_driver(&rtl8169_pci_driver); |