devices/e1000/e1000_main-2.6.35-ethercat.c
branchstable-1.5
changeset 2288 af008c10823b
parent 2287 fda70486f179
child 2421 bc2d4bf9cbe5
child 2589 2b9c78543663
equal deleted inserted replaced
2287:fda70486f179 2288:af008c10823b
  2296 			ew32(TCTL, tctl);
  2296 			ew32(TCTL, tctl);
  2297 			E1000_WRITE_FLUSH();
  2297 			E1000_WRITE_FLUSH();
  2298 
  2298 
  2299 			adapter->tx_fifo_head = 0;
  2299 			adapter->tx_fifo_head = 0;
  2300 			atomic_set(&adapter->tx_fifo_stall, 0);
  2300 			atomic_set(&adapter->tx_fifo_stall, 0);
  2301 			if (!adapter->ecdev) netif_wake_queue(netdev);
  2301 			if (!adapter->ecdev)
       
  2302 				netif_wake_queue(netdev);
  2302 		} else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
  2303 		} else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
  2303 			if (!adapter->ecdev) 
  2304 			if (!adapter->ecdev) 
  2304 				mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  2305 				mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  2305 		}
  2306 		}
  2306 	}
  2307 	}
  2473 
  2474 
  2474 	/* Cause software interrupt to ensure rx ring is cleaned */
  2475 	/* Cause software interrupt to ensure rx ring is cleaned */
  2475 	ew32(ICS, E1000_ICS_RXDMT0);
  2476 	ew32(ICS, E1000_ICS_RXDMT0);
  2476 
  2477 
  2477 	/* Force detection of hung controller every watchdog period */
  2478 	/* Force detection of hung controller every watchdog period */
  2478 	if (!adapter->ecdev) adapter->detect_tx_hung = true;
  2479 	if (!adapter->ecdev)
       
  2480 		adapter->detect_tx_hung = true;
  2479 
  2481 
  2480 	/* Reset the timer */
  2482 	/* Reset the timer */
  2481 	if (!adapter->ecdev) {
  2483 	if (!adapter->ecdev) {
  2482 		if (!test_bit(__E1000_DOWN, &adapter->flags))
  2484 		if (!test_bit(__E1000_DOWN, &adapter->flags))
  2483 			mod_timer(&adapter->watchdog_timer,
  2485 			mod_timer(&adapter->watchdog_timer,
  3159 			/* Make sure there is space in the ring for the next send. */
  3161 			/* Make sure there is space in the ring for the next send. */
  3160 			e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
  3162 			e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
  3161 		}
  3163 		}
  3162 
  3164 
  3163 	} else {
  3165 	} else {
  3164 		if (!adapter->ecdev) dev_kfree_skb_any(skb);
  3166 		if (!adapter->ecdev)
       
  3167 			dev_kfree_skb_any(skb);
  3165 		tx_ring->buffer_info[first].time_stamp = 0;
  3168 		tx_ring->buffer_info[first].time_stamp = 0;
  3166 		tx_ring->next_to_use = first;
  3169 		tx_ring->next_to_use = first;
  3167 	}
  3170 	}
  3168 
  3171 
  3169 	return NETDEV_TX_OK;
  3172 	return NETDEV_TX_OK;
  3749 		(*work_done)++;
  3752 		(*work_done)++;
  3750 		rmb(); /* read descriptor and rx_buffer_info after status DD */
  3753 		rmb(); /* read descriptor and rx_buffer_info after status DD */
  3751 
  3754 
  3752 		status = rx_desc->status;
  3755 		status = rx_desc->status;
  3753 		skb = buffer_info->skb;
  3756 		skb = buffer_info->skb;
  3754 		if (!adapter->ecdev) buffer_info->skb = NULL;
  3757 		if (!adapter->ecdev)
       
  3758 			buffer_info->skb = NULL;
  3755 
  3759 
  3756 		if (++i == rx_ring->count) i = 0;
  3760 		if (++i == rx_ring->count) i = 0;
  3757 		next_rxd = E1000_RX_DESC(*rx_ring, i);
  3761 		next_rxd = E1000_RX_DESC(*rx_ring, i);
  3758 		prefetch(next_rxd);
  3762 		prefetch(next_rxd);
  3759 
  3763 
  3968 		(*work_done)++;
  3972 		(*work_done)++;
  3969 		rmb(); /* read descriptor and rx_buffer_info after status DD */
  3973 		rmb(); /* read descriptor and rx_buffer_info after status DD */
  3970 
  3974 
  3971 		status = rx_desc->status;
  3975 		status = rx_desc->status;
  3972 		skb = buffer_info->skb;
  3976 		skb = buffer_info->skb;
  3973 		if (!adapter->ecdev) buffer_info->skb = NULL;
  3977 		if (!adapter->ecdev)
       
  3978 			buffer_info->skb = NULL;
  3974 
  3979 
  3975 		prefetch(skb->data - NET_IP_ALIGN);
  3980 		prefetch(skb->data - NET_IP_ALIGN);
  3976 
  3981 
  3977 		if (++i == rx_ring->count) i = 0;
  3982 		if (++i == rx_ring->count) i = 0;
  3978 		next_rxd = E1000_RX_DESC(*rx_ring, i);
  3983 		next_rxd = E1000_RX_DESC(*rx_ring, i);
  4408 	switch (cmd) {
  4413 	switch (cmd) {
  4409 	case SIOCGMIIPHY:
  4414 	case SIOCGMIIPHY:
  4410 		data->phy_id = hw->phy_addr;
  4415 		data->phy_id = hw->phy_addr;
  4411 		break;
  4416 		break;
  4412 	case SIOCGMIIREG:
  4417 	case SIOCGMIIREG:
  4413 		if (adapter->ecdev) return -EPERM;
  4418 		if (adapter->ecdev)
       
  4419 			return -EPERM;
  4414 		spin_lock_irqsave(&adapter->stats_lock, flags);
  4420 		spin_lock_irqsave(&adapter->stats_lock, flags);
  4415 		if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
  4421 		if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
  4416 				   &data->val_out)) {
  4422 				   &data->val_out)) {
  4417 			spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4423 			spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4418 			return -EIO;
  4424 			return -EIO;
  4419 		}
  4425 		}
  4420 		spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4426 		spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4421 		break;
  4427 		break;
  4422 	case SIOCSMIIREG:
  4428 	case SIOCSMIIREG:
  4423 		if (adapter->ecdev) return -EPERM;
  4429 		if (adapter->ecdev)
       
  4430 			return -EPERM;
  4424 		if (data->reg_num & ~(0x1F))
  4431 		if (data->reg_num & ~(0x1F))
  4425 			return -EFAULT;
  4432 			return -EFAULT;
  4426 		mii_reg = data->val_in;
  4433 		mii_reg = data->val_in;
  4427 		spin_lock_irqsave(&adapter->stats_lock, flags);
  4434 		spin_lock_irqsave(&adapter->stats_lock, flags);
  4428 		if (e1000_write_phy_reg(hw, data->reg_num,
  4435 		if (e1000_write_phy_reg(hw, data->reg_num,
  4794 	e1000_init_manageability(adapter);
  4801 	e1000_init_manageability(adapter);
  4795 
  4802 
  4796 	if (netif_running(netdev))
  4803 	if (netif_running(netdev))
  4797 		e1000_up(adapter);
  4804 		e1000_up(adapter);
  4798 
  4805 
  4799 	if (!adapter->ecdev) netif_device_attach(netdev);
  4806 	if (!adapter->ecdev)
       
  4807 		netif_device_attach(netdev);
  4800 
  4808 
  4801 	return 0;
  4809 	return 0;
  4802 }
  4810 }
  4803 #endif
  4811 #endif
  4804 
  4812