devices/r8169-2.6.31-orig.c
changeset 1980 a89e2bedf004
parent 1979 2c22f3bea8ba
parent 1898 ecfc3f747a3b
child 1995 7d748d9cf9e8
equal deleted inserted replaced
1979:2c22f3bea8ba 1980:a89e2bedf004
    49 	(NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
    49 	(NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
    50 
    50 
    51 #define TX_BUFFS_AVAIL(tp) \
    51 #define TX_BUFFS_AVAIL(tp) \
    52 	(tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
    52 	(tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1)
    53 
    53 
       
    54 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
       
    55 static const int max_interrupt_work = 20;
       
    56 
    54 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
    57 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
    55    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
    58    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
    56 static const int multicast_filter_limit = 32;
    59 static const int multicast_filter_limit = 32;
    57 
    60 
    58 /* MAC address length */
    61 /* MAC address length */
    61 #define MAX_READ_REQUEST_SHIFT	12
    64 #define MAX_READ_REQUEST_SHIFT	12
    62 #define RX_FIFO_THRESH	7	/* 7 means NO threshold, Rx buffer level before first PCI xfer. */
    65 #define RX_FIFO_THRESH	7	/* 7 means NO threshold, Rx buffer level before first PCI xfer. */
    63 #define RX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
    66 #define RX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
    64 #define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
    67 #define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
    65 #define EarlyTxThld	0x3F	/* 0x3F means NO early transmit */
    68 #define EarlyTxThld	0x3F	/* 0x3F means NO early transmit */
       
    69 #define RxPacketMaxSize	0x3FE8	/* 16K - 1 - ETH_HLEN - VLAN - CRC... */
    66 #define SafeMtu		0x1c20	/* ... actually life sucks beyond ~7k */
    70 #define SafeMtu		0x1c20	/* ... actually life sucks beyond ~7k */
    67 #define InterFrameGap	0x03	/* 3 means InterFrameGap = the shortest one */
    71 #define InterFrameGap	0x03	/* 3 means InterFrameGap = the shortest one */
    68 
    72 
    69 #define R8169_REGS_SIZE		256
    73 #define R8169_REGS_SIZE		256
    70 #define R8169_NAPI_WEIGHT	64
    74 #define R8169_NAPI_WEIGHT	64
    88 #define RTL_R8(reg)		readb (ioaddr + (reg))
    92 #define RTL_R8(reg)		readb (ioaddr + (reg))
    89 #define RTL_R16(reg)		readw (ioaddr + (reg))
    93 #define RTL_R16(reg)		readw (ioaddr + (reg))
    90 #define RTL_R32(reg)		((unsigned long) readl (ioaddr + (reg)))
    94 #define RTL_R32(reg)		((unsigned long) readl (ioaddr + (reg)))
    91 
    95 
    92 enum mac_version {
    96 enum mac_version {
    93 	RTL_GIGA_MAC_NONE   = 0x00,
       
    94 	RTL_GIGA_MAC_VER_01 = 0x01, // 8169
    97 	RTL_GIGA_MAC_VER_01 = 0x01, // 8169
    95 	RTL_GIGA_MAC_VER_02 = 0x02, // 8169S
    98 	RTL_GIGA_MAC_VER_02 = 0x02, // 8169S
    96 	RTL_GIGA_MAC_VER_03 = 0x03, // 8110S
    99 	RTL_GIGA_MAC_VER_03 = 0x03, // 8110S
    97 	RTL_GIGA_MAC_VER_04 = 0x04, // 8169SB
   100 	RTL_GIGA_MAC_VER_04 = 0x04, // 8169SB
    98 	RTL_GIGA_MAC_VER_05 = 0x05, // 8110SCd
   101 	RTL_GIGA_MAC_VER_05 = 0x05, // 8110SCd
   432 	RTL_FEATURE_WOL		= (1 << 0),
   435 	RTL_FEATURE_WOL		= (1 << 0),
   433 	RTL_FEATURE_MSI		= (1 << 1),
   436 	RTL_FEATURE_MSI		= (1 << 1),
   434 	RTL_FEATURE_GMII	= (1 << 2),
   437 	RTL_FEATURE_GMII	= (1 << 2),
   435 };
   438 };
   436 
   439 
   437 struct rtl8169_counters {
       
   438 	__le64	tx_packets;
       
   439 	__le64	rx_packets;
       
   440 	__le64	tx_errors;
       
   441 	__le32	rx_errors;
       
   442 	__le16	rx_missed;
       
   443 	__le16	align_errors;
       
   444 	__le32	tx_one_collision;
       
   445 	__le32	tx_multi_collision;
       
   446 	__le64	rx_unicast;
       
   447 	__le64	rx_broadcast;
       
   448 	__le32	rx_multicast;
       
   449 	__le16	tx_aborted;
       
   450 	__le16	tx_underun;
       
   451 };
       
   452 
       
   453 struct rtl8169_private {
   440 struct rtl8169_private {
   454 	void __iomem *mmio_addr;	/* memory map physical address */
   441 	void __iomem *mmio_addr;	/* memory map physical address */
   455 	struct pci_dev *pci_dev;	/* Index of PCI device */
   442 	struct pci_dev *pci_dev;	/* Index of PCI device */
   456 	struct net_device *dev;
   443 	struct net_device *dev;
   457 	struct napi_struct napi;
   444 	struct napi_struct napi;
   474 	struct timer_list timer;
   461 	struct timer_list timer;
   475 	u16 cp_cmd;
   462 	u16 cp_cmd;
   476 	u16 intr_event;
   463 	u16 intr_event;
   477 	u16 napi_event;
   464 	u16 napi_event;
   478 	u16 intr_mask;
   465 	u16 intr_mask;
       
   466 	int phy_auto_nego_reg;
   479 	int phy_1000_ctrl_reg;
   467 	int phy_1000_ctrl_reg;
   480 #ifdef CONFIG_R8169_VLAN
   468 #ifdef CONFIG_R8169_VLAN
   481 	struct vlan_group *vlgrp;
   469 	struct vlan_group *vlgrp;
   482 #endif
   470 #endif
   483 	int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
   471 	int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex);
   484 	int (*get_settings)(struct net_device *, struct ethtool_cmd *);
   472 	int (*get_settings)(struct net_device *, struct ethtool_cmd *);
   485 	void (*phy_reset_enable)(void __iomem *);
   473 	void (*phy_reset_enable)(void __iomem *);
   486 	void (*hw_start)(struct net_device *);
   474 	void (*hw_start)(struct net_device *);
   487 	unsigned int (*phy_reset_pending)(void __iomem *);
   475 	unsigned int (*phy_reset_pending)(void __iomem *);
   488 	unsigned int (*link_ok)(void __iomem *);
   476 	unsigned int (*link_ok)(void __iomem *);
   489 	int (*do_ioctl)(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd);
       
   490 	int pcie_cap;
   477 	int pcie_cap;
   491 	struct delayed_work task;
   478 	struct delayed_work task;
   492 	unsigned features;
   479 	unsigned features;
   493 
   480 
   494 	struct mii_if_info mii;
   481 	struct mii_if_info mii;
   495 	struct rtl8169_counters counters;
       
   496 };
   482 };
   497 
   483 
   498 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
   484 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
   499 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
   485 MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver");
   500 module_param(rx_copybreak, int, 0);
   486 module_param(rx_copybreak, int, 0);
   838 static int rtl8169_set_speed_xmii(struct net_device *dev,
   824 static int rtl8169_set_speed_xmii(struct net_device *dev,
   839 				  u8 autoneg, u16 speed, u8 duplex)
   825 				  u8 autoneg, u16 speed, u8 duplex)
   840 {
   826 {
   841 	struct rtl8169_private *tp = netdev_priv(dev);
   827 	struct rtl8169_private *tp = netdev_priv(dev);
   842 	void __iomem *ioaddr = tp->mmio_addr;
   828 	void __iomem *ioaddr = tp->mmio_addr;
   843 	int giga_ctrl, bmcr;
   829 	int auto_nego, giga_ctrl;
       
   830 
       
   831 	auto_nego = mdio_read(ioaddr, MII_ADVERTISE);
       
   832 	auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
       
   833 		       ADVERTISE_100HALF | ADVERTISE_100FULL);
       
   834 	giga_ctrl = mdio_read(ioaddr, MII_CTRL1000);
       
   835 	giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
   844 
   836 
   845 	if (autoneg == AUTONEG_ENABLE) {
   837 	if (autoneg == AUTONEG_ENABLE) {
   846 		int auto_nego;
       
   847 
       
   848 		auto_nego = mdio_read(ioaddr, MII_ADVERTISE);
       
   849 		auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
   838 		auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL |
   850 			      ADVERTISE_100HALF | ADVERTISE_100FULL);
   839 			      ADVERTISE_100HALF | ADVERTISE_100FULL);
   851 		auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
   840 		giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
   852 
   841 	} else {
   853 		giga_ctrl = mdio_read(ioaddr, MII_CTRL1000);
   842 		if (speed == SPEED_10)
   854 		giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
   843 			auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL;
   855 
   844 		else if (speed == SPEED_100)
   856 		/* The 8100e/8101e/8102e do Fast Ethernet only. */
   845 			auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL;
   857 		if ((tp->mac_version != RTL_GIGA_MAC_VER_07) &&
   846 		else if (speed == SPEED_1000)
   858 		    (tp->mac_version != RTL_GIGA_MAC_VER_08) &&
       
   859 		    (tp->mac_version != RTL_GIGA_MAC_VER_09) &&
       
   860 		    (tp->mac_version != RTL_GIGA_MAC_VER_10) &&
       
   861 		    (tp->mac_version != RTL_GIGA_MAC_VER_13) &&
       
   862 		    (tp->mac_version != RTL_GIGA_MAC_VER_14) &&
       
   863 		    (tp->mac_version != RTL_GIGA_MAC_VER_15) &&
       
   864 		    (tp->mac_version != RTL_GIGA_MAC_VER_16)) {
       
   865 			giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
   847 			giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
   866 		} else if (netif_msg_link(tp)) {
   848 
       
   849 		if (duplex == DUPLEX_HALF)
       
   850 			auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL);
       
   851 
       
   852 		if (duplex == DUPLEX_FULL)
       
   853 			auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF);
       
   854 
       
   855 		/* This tweak comes straight from Realtek's driver. */
       
   856 		if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) &&
       
   857 		    ((tp->mac_version == RTL_GIGA_MAC_VER_13) ||
       
   858 		     (tp->mac_version == RTL_GIGA_MAC_VER_16))) {
       
   859 			auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA;
       
   860 		}
       
   861 	}
       
   862 
       
   863 	/* The 8100e/8101e/8102e do Fast Ethernet only. */
       
   864 	if ((tp->mac_version == RTL_GIGA_MAC_VER_07) ||
       
   865 	    (tp->mac_version == RTL_GIGA_MAC_VER_08) ||
       
   866 	    (tp->mac_version == RTL_GIGA_MAC_VER_09) ||
       
   867 	    (tp->mac_version == RTL_GIGA_MAC_VER_10) ||
       
   868 	    (tp->mac_version == RTL_GIGA_MAC_VER_13) ||
       
   869 	    (tp->mac_version == RTL_GIGA_MAC_VER_14) ||
       
   870 	    (tp->mac_version == RTL_GIGA_MAC_VER_15) ||
       
   871 	    (tp->mac_version == RTL_GIGA_MAC_VER_16)) {
       
   872 		if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) &&
       
   873 		    netif_msg_link(tp)) {
   867 			printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n",
   874 			printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n",
   868 			       dev->name);
   875 			       dev->name);
   869 		}
   876 		}
   870 
   877 		giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
   871 		bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
   878 	}
   872 
   879 
   873 		if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
   880 	auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
   874 		    (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
   881 
   875 		    (tp->mac_version >= RTL_GIGA_MAC_VER_17)) {
   882 	if ((tp->mac_version == RTL_GIGA_MAC_VER_11) ||
   876 			/*
   883 	    (tp->mac_version == RTL_GIGA_MAC_VER_12) ||
   877 			 * Wake up the PHY.
   884 	    (tp->mac_version >= RTL_GIGA_MAC_VER_17)) {
   878 			 * Vendor specific (0x1f) and reserved (0x0e) MII
   885 		/*
   879 			 * registers.
   886 		 * Wake up the PHY.
   880 			 */
   887 		 * Vendor specific (0x1f) and reserved (0x0e) MII registers.
   881 			mdio_write(ioaddr, 0x1f, 0x0000);
   888 		 */
   882 			mdio_write(ioaddr, 0x0e, 0x0000);
       
   883 		}
       
   884 
       
   885 		mdio_write(ioaddr, MII_ADVERTISE, auto_nego);
       
   886 		mdio_write(ioaddr, MII_CTRL1000, giga_ctrl);
       
   887 	} else {
       
   888 		giga_ctrl = 0;
       
   889 
       
   890 		if (speed == SPEED_10)
       
   891 			bmcr = 0;
       
   892 		else if (speed == SPEED_100)
       
   893 			bmcr = BMCR_SPEED100;
       
   894 		else
       
   895 			return -EINVAL;
       
   896 
       
   897 		if (duplex == DUPLEX_FULL)
       
   898 			bmcr |= BMCR_FULLDPLX;
       
   899 
       
   900 		mdio_write(ioaddr, 0x1f, 0x0000);
   889 		mdio_write(ioaddr, 0x1f, 0x0000);
   901 	}
   890 		mdio_write(ioaddr, 0x0e, 0x0000);
   902 
   891 	}
       
   892 
       
   893 	tp->phy_auto_nego_reg = auto_nego;
   903 	tp->phy_1000_ctrl_reg = giga_ctrl;
   894 	tp->phy_1000_ctrl_reg = giga_ctrl;
   904 
   895 
   905 	mdio_write(ioaddr, MII_BMCR, bmcr);
   896 	mdio_write(ioaddr, MII_ADVERTISE, auto_nego);
   906 
   897 	mdio_write(ioaddr, MII_CTRL1000, giga_ctrl);
   907 	if ((tp->mac_version == RTL_GIGA_MAC_VER_02) ||
   898 	mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
   908 	    (tp->mac_version == RTL_GIGA_MAC_VER_03)) {
       
   909 		if ((speed == SPEED_100) && (autoneg != AUTONEG_ENABLE)) {
       
   910 			mdio_write(ioaddr, 0x17, 0x2138);
       
   911 			mdio_write(ioaddr, 0x0e, 0x0260);
       
   912 		} else {
       
   913 			mdio_write(ioaddr, 0x17, 0x2108);
       
   914 			mdio_write(ioaddr, 0x0e, 0x0000);
       
   915 		}
       
   916 	}
       
   917 
       
   918 	return 0;
   899 	return 0;
   919 }
   900 }
   920 
   901 
   921 static int rtl8169_set_speed(struct net_device *dev,
   902 static int rtl8169_set_speed(struct net_device *dev,
   922 			     u8 autoneg, u16 speed, u8 duplex)
   903 			     u8 autoneg, u16 speed, u8 duplex)
  1116 	"multicast",
  1097 	"multicast",
  1117 	"tx_aborted",
  1098 	"tx_aborted",
  1118 	"tx_underrun",
  1099 	"tx_underrun",
  1119 };
  1100 };
  1120 
  1101 
       
  1102 struct rtl8169_counters {
       
  1103 	__le64	tx_packets;
       
  1104 	__le64	rx_packets;
       
  1105 	__le64	tx_errors;
       
  1106 	__le32	rx_errors;
       
  1107 	__le16	rx_missed;
       
  1108 	__le16	align_errors;
       
  1109 	__le32	tx_one_collision;
       
  1110 	__le32	tx_multi_collision;
       
  1111 	__le64	rx_unicast;
       
  1112 	__le64	rx_broadcast;
       
  1113 	__le32	rx_multicast;
       
  1114 	__le16	tx_aborted;
       
  1115 	__le16	tx_underun;
       
  1116 };
       
  1117 
  1121 static int rtl8169_get_sset_count(struct net_device *dev, int sset)
  1118 static int rtl8169_get_sset_count(struct net_device *dev, int sset)
  1122 {
  1119 {
  1123 	switch (sset) {
  1120 	switch (sset) {
  1124 	case ETH_SS_STATS:
  1121 	case ETH_SS_STATS:
  1125 		return ARRAY_SIZE(rtl8169_gstrings);
  1122 		return ARRAY_SIZE(rtl8169_gstrings);
  1126 	default:
  1123 	default:
  1127 		return -EOPNOTSUPP;
  1124 		return -EOPNOTSUPP;
  1128 	}
  1125 	}
  1129 }
  1126 }
  1130 
  1127 
  1131 static void rtl8169_update_counters(struct net_device *dev)
  1128 static void rtl8169_get_ethtool_stats(struct net_device *dev,
       
  1129 				      struct ethtool_stats *stats, u64 *data)
  1132 {
  1130 {
  1133 	struct rtl8169_private *tp = netdev_priv(dev);
  1131 	struct rtl8169_private *tp = netdev_priv(dev);
  1134 	void __iomem *ioaddr = tp->mmio_addr;
  1132 	void __iomem *ioaddr = tp->mmio_addr;
  1135 	struct rtl8169_counters *counters;
  1133 	struct rtl8169_counters *counters;
  1136 	dma_addr_t paddr;
  1134 	dma_addr_t paddr;
  1137 	u32 cmd;
  1135 	u32 cmd;
  1138 	int wait = 1000;
  1136 
  1139 
  1137 	ASSERT_RTNL();
  1140 	/*
       
  1141 	 * Some chips are unable to dump tally counters when the receiver
       
  1142 	 * is disabled.
       
  1143 	 */
       
  1144 	if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0)
       
  1145 		return;
       
  1146 
  1138 
  1147 	counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
  1139 	counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
  1148 	if (!counters)
  1140 	if (!counters)
  1149 		return;
  1141 		return;
  1150 
  1142 
  1151 	RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
  1143 	RTL_W32(CounterAddrHigh, (u64)paddr >> 32);
  1152 	cmd = (u64)paddr & DMA_BIT_MASK(32);
  1144 	cmd = (u64)paddr & DMA_32BIT_MASK;
  1153 	RTL_W32(CounterAddrLow, cmd);
  1145 	RTL_W32(CounterAddrLow, cmd);
  1154 	RTL_W32(CounterAddrLow, cmd | CounterDump);
  1146 	RTL_W32(CounterAddrLow, cmd | CounterDump);
  1155 
  1147 
  1156 	while (wait--) {
  1148 	while (RTL_R32(CounterAddrLow) & CounterDump) {
  1157 		if ((RTL_R32(CounterAddrLow) & CounterDump) == 0) {
  1149 		if (msleep_interruptible(1))
  1158 			/* copy updated counters */
       
  1159 			memcpy(&tp->counters, counters, sizeof(*counters));
       
  1160 			break;
  1150 			break;
  1161 		}
       
  1162 		udelay(10);
       
  1163 	}
  1151 	}
  1164 
  1152 
  1165 	RTL_W32(CounterAddrLow, 0);
  1153 	RTL_W32(CounterAddrLow, 0);
  1166 	RTL_W32(CounterAddrHigh, 0);
  1154 	RTL_W32(CounterAddrHigh, 0);
  1167 
  1155 
       
  1156 	data[0] = le64_to_cpu(counters->tx_packets);
       
  1157 	data[1] = le64_to_cpu(counters->rx_packets);
       
  1158 	data[2] = le64_to_cpu(counters->tx_errors);
       
  1159 	data[3] = le32_to_cpu(counters->rx_errors);
       
  1160 	data[4] = le16_to_cpu(counters->rx_missed);
       
  1161 	data[5] = le16_to_cpu(counters->align_errors);
       
  1162 	data[6] = le32_to_cpu(counters->tx_one_collision);
       
  1163 	data[7] = le32_to_cpu(counters->tx_multi_collision);
       
  1164 	data[8] = le64_to_cpu(counters->rx_unicast);
       
  1165 	data[9] = le64_to_cpu(counters->rx_broadcast);
       
  1166 	data[10] = le32_to_cpu(counters->rx_multicast);
       
  1167 	data[11] = le16_to_cpu(counters->tx_aborted);
       
  1168 	data[12] = le16_to_cpu(counters->tx_underun);
       
  1169 
  1168 	pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
  1170 	pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
  1169 }
       
  1170 
       
  1171 static void rtl8169_get_ethtool_stats(struct net_device *dev,
       
  1172 				      struct ethtool_stats *stats, u64 *data)
       
  1173 {
       
  1174 	struct rtl8169_private *tp = netdev_priv(dev);
       
  1175 
       
  1176 	ASSERT_RTNL();
       
  1177 
       
  1178 	rtl8169_update_counters(dev);
       
  1179 
       
  1180 	data[0] = le64_to_cpu(tp->counters.tx_packets);
       
  1181 	data[1] = le64_to_cpu(tp->counters.rx_packets);
       
  1182 	data[2] = le64_to_cpu(tp->counters.tx_errors);
       
  1183 	data[3] = le32_to_cpu(tp->counters.rx_errors);
       
  1184 	data[4] = le16_to_cpu(tp->counters.rx_missed);
       
  1185 	data[5] = le16_to_cpu(tp->counters.align_errors);
       
  1186 	data[6] = le32_to_cpu(tp->counters.tx_one_collision);
       
  1187 	data[7] = le32_to_cpu(tp->counters.tx_multi_collision);
       
  1188 	data[8] = le64_to_cpu(tp->counters.rx_unicast);
       
  1189 	data[9] = le64_to_cpu(tp->counters.rx_broadcast);
       
  1190 	data[10] = le32_to_cpu(tp->counters.rx_multicast);
       
  1191 	data[11] = le16_to_cpu(tp->counters.tx_aborted);
       
  1192 	data[12] = le16_to_cpu(tp->counters.tx_underun);
       
  1193 }
  1171 }
  1194 
  1172 
  1195 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  1173 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  1196 {
  1174 {
  1197 	switch(stringset) {
  1175 	switch(stringset) {
  1295 		{ 0xfc800000, 0x10000000,	RTL_GIGA_MAC_VER_04 },
  1273 		{ 0xfc800000, 0x10000000,	RTL_GIGA_MAC_VER_04 },
  1296 		{ 0xfc800000, 0x04000000,	RTL_GIGA_MAC_VER_03 },
  1274 		{ 0xfc800000, 0x04000000,	RTL_GIGA_MAC_VER_03 },
  1297 		{ 0xfc800000, 0x00800000,	RTL_GIGA_MAC_VER_02 },
  1275 		{ 0xfc800000, 0x00800000,	RTL_GIGA_MAC_VER_02 },
  1298 		{ 0xfc800000, 0x00000000,	RTL_GIGA_MAC_VER_01 },
  1276 		{ 0xfc800000, 0x00000000,	RTL_GIGA_MAC_VER_01 },
  1299 
  1277 
  1300 		/* Catch-all */
  1278 		{ 0x00000000, 0x00000000,	RTL_GIGA_MAC_VER_01 }	/* Catch-all */
  1301 		{ 0x00000000, 0x00000000,	RTL_GIGA_MAC_NONE   }
       
  1302 	}, *p = mac_info;
  1279 	}, *p = mac_info;
  1303 	u32 reg;
  1280 	u32 reg;
  1304 
  1281 
  1305 	reg = RTL_R32(TxConfig);
  1282 	reg = RTL_R32(TxConfig);
  1306 	while ((reg & p->mask) != p->val)
  1283 	while ((reg & p->mask) != p->val)
  1307 		p++;
  1284 		p++;
  1308 	tp->mac_version = p->mac_version;
  1285 	tp->mac_version = p->mac_version;
       
  1286 
       
  1287 	if (p->mask == 0x00000000) {
       
  1288 		struct pci_dev *pdev = tp->pci_dev;
       
  1289 
       
  1290 		dev_info(&pdev->dev, "unknown MAC (%08x)\n", reg);
       
  1291 	}
  1309 }
  1292 }
  1310 
  1293 
  1311 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
  1294 static void rtl8169_print_mac_version(struct rtl8169_private *tp)
  1312 {
  1295 {
  1313 	dprintk("mac_version = 0x%02x\n", tp->mac_version);
  1296 	dprintk("mac_version = 0x%02x\n", tp->mac_version);
  1844 static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1827 static int rtl8169_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1845 {
  1828 {
  1846 	struct rtl8169_private *tp = netdev_priv(dev);
  1829 	struct rtl8169_private *tp = netdev_priv(dev);
  1847 	struct mii_ioctl_data *data = if_mii(ifr);
  1830 	struct mii_ioctl_data *data = if_mii(ifr);
  1848 
  1831 
  1849 	return netif_running(dev) ? tp->do_ioctl(tp, data, cmd) : -ENODEV;
  1832 	if (!netif_running(dev))
  1850 }
  1833 		return -ENODEV;
  1851 
  1834 
  1852 static int rtl_xmii_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd)
       
  1853 {
       
  1854 	switch (cmd) {
  1835 	switch (cmd) {
  1855 	case SIOCGMIIPHY:
  1836 	case SIOCGMIIPHY:
  1856 		data->phy_id = 32; /* Internal PHY */
  1837 		data->phy_id = 32; /* Internal PHY */
  1857 		return 0;
  1838 		return 0;
  1858 
  1839 
  1864 		if (!capable(CAP_NET_ADMIN))
  1845 		if (!capable(CAP_NET_ADMIN))
  1865 			return -EPERM;
  1846 			return -EPERM;
  1866 		mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in);
  1847 		mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in);
  1867 		return 0;
  1848 		return 0;
  1868 	}
  1849 	}
  1869 	return -EOPNOTSUPP;
       
  1870 }
       
  1871 
       
  1872 static int rtl_tbi_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd)
       
  1873 {
       
  1874 	return -EOPNOTSUPP;
  1850 	return -EOPNOTSUPP;
  1875 }
  1851 }
  1876 
  1852 
  1877 static const struct rtl_cfg_info {
  1853 static const struct rtl_cfg_info {
  1878 	void (*hw_start)(struct net_device *);
  1854 	void (*hw_start)(struct net_device *);
  1879 	unsigned int region;
  1855 	unsigned int region;
  1880 	unsigned int align;
  1856 	unsigned int align;
  1881 	u16 intr_event;
  1857 	u16 intr_event;
  1882 	u16 napi_event;
  1858 	u16 napi_event;
  1883 	unsigned features;
  1859 	unsigned features;
  1884 	u8 default_ver;
       
  1885 } rtl_cfg_infos [] = {
  1860 } rtl_cfg_infos [] = {
  1886 	[RTL_CFG_0] = {
  1861 	[RTL_CFG_0] = {
  1887 		.hw_start	= rtl_hw_start_8169,
  1862 		.hw_start	= rtl_hw_start_8169,
  1888 		.region		= 1,
  1863 		.region		= 1,
  1889 		.align		= 0,
  1864 		.align		= 0,
  1890 		.intr_event	= SYSErr | LinkChg | RxOverflow |
  1865 		.intr_event	= SYSErr | LinkChg | RxOverflow |
  1891 				  RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
  1866 				  RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
  1892 		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
  1867 		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
  1893 		.features	= RTL_FEATURE_GMII,
  1868 		.features	= RTL_FEATURE_GMII
  1894 		.default_ver	= RTL_GIGA_MAC_VER_01,
       
  1895 	},
  1869 	},
  1896 	[RTL_CFG_1] = {
  1870 	[RTL_CFG_1] = {
  1897 		.hw_start	= rtl_hw_start_8168,
  1871 		.hw_start	= rtl_hw_start_8168,
  1898 		.region		= 2,
  1872 		.region		= 2,
  1899 		.align		= 8,
  1873 		.align		= 8,
  1900 		.intr_event	= SYSErr | LinkChg | RxOverflow |
  1874 		.intr_event	= SYSErr | LinkChg | RxOverflow |
  1901 				  TxErr | TxOK | RxOK | RxErr,
  1875 				  TxErr | TxOK | RxOK | RxErr,
  1902 		.napi_event	= TxErr | TxOK | RxOK | RxOverflow,
  1876 		.napi_event	= TxErr | TxOK | RxOK | RxOverflow,
  1903 		.features	= RTL_FEATURE_GMII | RTL_FEATURE_MSI,
  1877 		.features	= RTL_FEATURE_GMII | RTL_FEATURE_MSI
  1904 		.default_ver	= RTL_GIGA_MAC_VER_11,
       
  1905 	},
  1878 	},
  1906 	[RTL_CFG_2] = {
  1879 	[RTL_CFG_2] = {
  1907 		.hw_start	= rtl_hw_start_8101,
  1880 		.hw_start	= rtl_hw_start_8101,
  1908 		.region		= 2,
  1881 		.region		= 2,
  1909 		.align		= 8,
  1882 		.align		= 8,
  1910 		.intr_event	= SYSErr | LinkChg | RxOverflow | PCSTimeout |
  1883 		.intr_event	= SYSErr | LinkChg | RxOverflow | PCSTimeout |
  1911 				  RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
  1884 				  RxFIFOOver | TxErr | TxOK | RxOK | RxErr,
  1912 		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
  1885 		.napi_event	= RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow,
  1913 		.features	= RTL_FEATURE_MSI,
  1886 		.features	= RTL_FEATURE_MSI
  1914 		.default_ver	= RTL_GIGA_MAC_VER_13,
       
  1915 	}
  1887 	}
  1916 };
  1888 };
  1917 
  1889 
  1918 /* Cfg9346_Unlock assumed. */
  1890 /* Cfg9346_Unlock assumed. */
  1919 static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr,
  1891 static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr,
  1941 		pci_disable_msi(pdev);
  1913 		pci_disable_msi(pdev);
  1942 		tp->features &= ~RTL_FEATURE_MSI;
  1914 		tp->features &= ~RTL_FEATURE_MSI;
  1943 	}
  1915 	}
  1944 }
  1916 }
  1945 
  1917 
  1946 static const struct net_device_ops rtl8169_netdev_ops = {
       
  1947 	.ndo_open		= rtl8169_open,
       
  1948 	.ndo_stop		= rtl8169_close,
       
  1949 	.ndo_get_stats		= rtl8169_get_stats,
       
  1950 	.ndo_start_xmit		= rtl8169_start_xmit,
       
  1951 	.ndo_tx_timeout		= rtl8169_tx_timeout,
       
  1952 	.ndo_validate_addr	= eth_validate_addr,
       
  1953 	.ndo_change_mtu		= rtl8169_change_mtu,
       
  1954 	.ndo_set_mac_address	= rtl_set_mac_address,
       
  1955 	.ndo_do_ioctl		= rtl8169_ioctl,
       
  1956 	.ndo_set_multicast_list	= rtl_set_rx_mode,
       
  1957 #ifdef CONFIG_R8169_VLAN
       
  1958 	.ndo_vlan_rx_register	= rtl8169_vlan_rx_register,
       
  1959 #endif
       
  1960 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  1961 	.ndo_poll_controller	= rtl8169_netpoll,
       
  1962 #endif
       
  1963 
       
  1964 };
       
  1965 
       
  1966 static int __devinit
  1918 static int __devinit
  1967 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  1919 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  1968 {
  1920 {
  1969 	const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
  1921 	const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
  1970 	const unsigned int region = cfg->region;
  1922 	const unsigned int region = cfg->region;
  1987 		rc = -ENOMEM;
  1939 		rc = -ENOMEM;
  1988 		goto out;
  1940 		goto out;
  1989 	}
  1941 	}
  1990 
  1942 
  1991 	SET_NETDEV_DEV(dev, &pdev->dev);
  1943 	SET_NETDEV_DEV(dev, &pdev->dev);
  1992 	dev->netdev_ops = &rtl8169_netdev_ops;
       
  1993 	tp = netdev_priv(dev);
  1944 	tp = netdev_priv(dev);
  1994 	tp->dev = dev;
  1945 	tp->dev = dev;
  1995 	tp->pci_dev = pdev;
  1946 	tp->pci_dev = pdev;
  1996 	tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
  1947 	tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
  1997 
  1948 
  2044 	}
  1995 	}
  2045 
  1996 
  2046 	tp->cp_cmd = PCIMulRW | RxChkSum;
  1997 	tp->cp_cmd = PCIMulRW | RxChkSum;
  2047 
  1998 
  2048 	if ((sizeof(dma_addr_t) > 4) &&
  1999 	if ((sizeof(dma_addr_t) > 4) &&
  2049 	    !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) {
  2000 	    !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) {
  2050 		tp->cp_cmd |= PCIDAC;
  2001 		tp->cp_cmd |= PCIDAC;
  2051 		dev->features |= NETIF_F_HIGHDMA;
  2002 		dev->features |= NETIF_F_HIGHDMA;
  2052 	} else {
  2003 	} else {
  2053 		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  2004 		rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  2054 		if (rc < 0) {
  2005 		if (rc < 0) {
  2055 			if (netif_msg_probe(tp)) {
  2006 			if (netif_msg_probe(tp)) {
  2056 				dev_err(&pdev->dev,
  2007 				dev_err(&pdev->dev,
  2057 					"DMA configuration failed.\n");
  2008 					"DMA configuration failed.\n");
  2058 			}
  2009 			}
  2059 			goto err_out_free_res_4;
  2010 			goto err_out_free_res_4;
  2060 		}
  2011 		}
  2061 	}
  2012 	}
  2062 
  2013 
       
  2014 	pci_set_master(pdev);
       
  2015 
  2063 	/* ioremap MMIO region */
  2016 	/* ioremap MMIO region */
  2064 	ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
  2017 	ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
  2065 	if (!ioaddr) {
  2018 	if (!ioaddr) {
  2066 		if (netif_msg_probe(tp))
  2019 		if (netif_msg_probe(tp))
  2067 			dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
  2020 			dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
  2085 		msleep_interruptible(1);
  2038 		msleep_interruptible(1);
  2086 	}
  2039 	}
  2087 
  2040 
  2088 	RTL_W16(IntrStatus, 0xffff);
  2041 	RTL_W16(IntrStatus, 0xffff);
  2089 
  2042 
  2090 	pci_set_master(pdev);
       
  2091 
       
  2092 	/* Identify chip attached to board */
  2043 	/* Identify chip attached to board */
  2093 	rtl8169_get_mac_version(tp, ioaddr);
  2044 	rtl8169_get_mac_version(tp, ioaddr);
  2094 
       
  2095 	/* Use appropriate default if unknown */
       
  2096 	if (tp->mac_version == RTL_GIGA_MAC_NONE) {
       
  2097 		if (netif_msg_probe(tp)) {
       
  2098 			dev_notice(&pdev->dev,
       
  2099 				   "unknown MAC, using family default\n");
       
  2100 		}
       
  2101 		tp->mac_version = cfg->default_ver;
       
  2102 	}
       
  2103 
  2045 
  2104 	rtl8169_print_mac_version(tp);
  2046 	rtl8169_print_mac_version(tp);
  2105 
  2047 
  2106 	for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) {
  2048 	for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) {
  2107 		if (tp->mac_version == rtl_chip_info[i].mac_version)
  2049 		if (tp->mac_version == rtl_chip_info[i].mac_version)
  2108 			break;
  2050 			break;
  2109 	}
  2051 	}
  2110 	if (i == ARRAY_SIZE(rtl_chip_info)) {
  2052 	if (i == ARRAY_SIZE(rtl_chip_info)) {
  2111 		dev_err(&pdev->dev,
  2053 		/* Unknown chip: assume array element #0, original RTL-8169 */
  2112 			"driver bug, MAC version not found in rtl_chip_info\n");
  2054 		if (netif_msg_probe(tp)) {
  2113 		goto err_out_msi_5;
  2055 			dev_printk(KERN_DEBUG, &pdev->dev,
       
  2056 				"unknown chip version, assuming %s\n",
       
  2057 				rtl_chip_info[0].name);
       
  2058 		}
       
  2059 		i = 0;
  2114 	}
  2060 	}
  2115 	tp->chipset = i;
  2061 	tp->chipset = i;
  2116 
  2062 
  2117 	RTL_W8(Cfg9346, Cfg9346_Unlock);
  2063 	RTL_W8(Cfg9346, Cfg9346_Unlock);
  2118 	RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
  2064 	RTL_W8(Config1, RTL_R8(Config1) | PMEnable);
  2129 		tp->set_speed = rtl8169_set_speed_tbi;
  2075 		tp->set_speed = rtl8169_set_speed_tbi;
  2130 		tp->get_settings = rtl8169_gset_tbi;
  2076 		tp->get_settings = rtl8169_gset_tbi;
  2131 		tp->phy_reset_enable = rtl8169_tbi_reset_enable;
  2077 		tp->phy_reset_enable = rtl8169_tbi_reset_enable;
  2132 		tp->phy_reset_pending = rtl8169_tbi_reset_pending;
  2078 		tp->phy_reset_pending = rtl8169_tbi_reset_pending;
  2133 		tp->link_ok = rtl8169_tbi_link_ok;
  2079 		tp->link_ok = rtl8169_tbi_link_ok;
  2134 		tp->do_ioctl = rtl_tbi_ioctl;
       
  2135 
  2080 
  2136 		tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */
  2081 		tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */
  2137 	} else {
  2082 	} else {
  2138 		tp->set_speed = rtl8169_set_speed_xmii;
  2083 		tp->set_speed = rtl8169_set_speed_xmii;
  2139 		tp->get_settings = rtl8169_gset_xmii;
  2084 		tp->get_settings = rtl8169_gset_xmii;
  2140 		tp->phy_reset_enable = rtl8169_xmii_reset_enable;
  2085 		tp->phy_reset_enable = rtl8169_xmii_reset_enable;
  2141 		tp->phy_reset_pending = rtl8169_xmii_reset_pending;
  2086 		tp->phy_reset_pending = rtl8169_xmii_reset_pending;
  2142 		tp->link_ok = rtl8169_xmii_link_ok;
  2087 		tp->link_ok = rtl8169_xmii_link_ok;
  2143 		tp->do_ioctl = rtl_xmii_ioctl;
  2088 
       
  2089 		dev->do_ioctl = rtl8169_ioctl;
  2144 	}
  2090 	}
  2145 
  2091 
  2146 	spin_lock_init(&tp->lock);
  2092 	spin_lock_init(&tp->lock);
  2147 
  2093 
  2148 	tp->mmio_addr = ioaddr;
  2094 	tp->mmio_addr = ioaddr;
  2150 	/* Get MAC address */
  2096 	/* Get MAC address */
  2151 	for (i = 0; i < MAC_ADDR_LEN; i++)
  2097 	for (i = 0; i < MAC_ADDR_LEN; i++)
  2152 		dev->dev_addr[i] = RTL_R8(MAC0 + i);
  2098 		dev->dev_addr[i] = RTL_R8(MAC0 + i);
  2153 	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
  2099 	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
  2154 
  2100 
       
  2101 	dev->open = rtl8169_open;
       
  2102 	dev->hard_start_xmit = rtl8169_start_xmit;
       
  2103 	dev->get_stats = rtl8169_get_stats;
  2155 	SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
  2104 	SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops);
       
  2105 	dev->stop = rtl8169_close;
       
  2106 	dev->tx_timeout = rtl8169_tx_timeout;
       
  2107 	dev->set_multicast_list = rtl_set_rx_mode;
  2156 	dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
  2108 	dev->watchdog_timeo = RTL8169_TX_TIMEOUT;
  2157 	dev->irq = pdev->irq;
  2109 	dev->irq = pdev->irq;
  2158 	dev->base_addr = (unsigned long) ioaddr;
  2110 	dev->base_addr = (unsigned long) ioaddr;
       
  2111 	dev->change_mtu = rtl8169_change_mtu;
       
  2112 	dev->set_mac_address = rtl_set_mac_address;
  2159 
  2113 
  2160 	netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT);
  2114 	netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT);
  2161 
  2115 
  2162 #ifdef CONFIG_R8169_VLAN
  2116 #ifdef CONFIG_R8169_VLAN
  2163 	dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
  2117 	dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
       
  2118 	dev->vlan_rx_register = rtl8169_vlan_rx_register;
       
  2119 #endif
       
  2120 
       
  2121 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  2122 	dev->poll_controller = rtl8169_netpoll;
  2164 #endif
  2123 #endif
  2165 
  2124 
  2166 	tp->intr_mask = 0xffff;
  2125 	tp->intr_mask = 0xffff;
  2167 	tp->align = cfg->align;
  2126 	tp->align = cfg->align;
  2168 	tp->hw_start = cfg->hw_start;
  2127 	tp->hw_start = cfg->hw_start;
  2346 	 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
  2305 	 * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh
  2347 	 * register to be written before TxDescAddrLow to work.
  2306 	 * register to be written before TxDescAddrLow to work.
  2348 	 * Switching from MMIO to I/O access fixes the issue as well.
  2307 	 * Switching from MMIO to I/O access fixes the issue as well.
  2349 	 */
  2308 	 */
  2350 	RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32);
  2309 	RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr) >> 32);
  2351 	RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_BIT_MASK(32));
  2310 	RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr) & DMA_32BIT_MASK);
  2352 	RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32);
  2311 	RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr) >> 32);
  2353 	RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_BIT_MASK(32));
  2312 	RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr) & DMA_32BIT_MASK);
  2354 }
  2313 }
  2355 
  2314 
  2356 static u16 rtl_rw_cpluscmd(void __iomem *ioaddr)
  2315 static u16 rtl_rw_cpluscmd(void __iomem *ioaddr)
  2357 {
  2316 {
  2358 	u16 cmd;
  2317 	u16 cmd;
  2360 	cmd = RTL_R16(CPlusCmd);
  2319 	cmd = RTL_R16(CPlusCmd);
  2361 	RTL_W16(CPlusCmd, cmd);
  2320 	RTL_W16(CPlusCmd, cmd);
  2362 	return cmd;
  2321 	return cmd;
  2363 }
  2322 }
  2364 
  2323 
  2365 static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz)
  2324 static void rtl_set_rx_max_size(void __iomem *ioaddr)
  2366 {
  2325 {
  2367 	/* Low hurts. Let's disable the filtering. */
  2326 	/* Low hurts. Let's disable the filtering. */
  2368 	RTL_W16(RxMaxSize, rx_buf_sz);
  2327 	RTL_W16(RxMaxSize, 16383);
  2369 }
  2328 }
  2370 
  2329 
  2371 static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version)
  2330 static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version)
  2372 {
  2331 {
  2373 	struct {
  2332 	struct {
  2410 	    (tp->mac_version == RTL_GIGA_MAC_VER_04))
  2369 	    (tp->mac_version == RTL_GIGA_MAC_VER_04))
  2411 		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
  2370 		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
  2412 
  2371 
  2413 	RTL_W8(EarlyTxThres, EarlyTxThld);
  2372 	RTL_W8(EarlyTxThres, EarlyTxThld);
  2414 
  2373 
  2415 	rtl_set_rx_max_size(ioaddr, tp->rx_buf_sz);
  2374 	rtl_set_rx_max_size(ioaddr);
  2416 
  2375 
  2417 	if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
  2376 	if ((tp->mac_version == RTL_GIGA_MAC_VER_01) ||
  2418 	    (tp->mac_version == RTL_GIGA_MAC_VER_02) ||
  2377 	    (tp->mac_version == RTL_GIGA_MAC_VER_02) ||
  2419 	    (tp->mac_version == RTL_GIGA_MAC_VER_03) ||
  2378 	    (tp->mac_version == RTL_GIGA_MAC_VER_03) ||
  2420 	    (tp->mac_version == RTL_GIGA_MAC_VER_04))
  2379 	    (tp->mac_version == RTL_GIGA_MAC_VER_04))
  2671 
  2630 
  2672 	RTL_W8(Cfg9346, Cfg9346_Unlock);
  2631 	RTL_W8(Cfg9346, Cfg9346_Unlock);
  2673 
  2632 
  2674 	RTL_W8(EarlyTxThres, EarlyTxThld);
  2633 	RTL_W8(EarlyTxThres, EarlyTxThld);
  2675 
  2634 
  2676 	rtl_set_rx_max_size(ioaddr, tp->rx_buf_sz);
  2635 	rtl_set_rx_max_size(ioaddr);
  2677 
  2636 
  2678 	tp->cp_cmd |= RTL_R16(CPlusCmd) | PktCntrDisable | INTT_1;
  2637 	tp->cp_cmd |= RTL_R16(CPlusCmd) | PktCntrDisable | INTT_1;
  2679 
  2638 
  2680 	RTL_W16(CPlusCmd, tp->cp_cmd);
  2639 	RTL_W16(CPlusCmd, tp->cp_cmd);
  2681 
  2640 
  2849 
  2808 
  2850 	RTL_W8(Cfg9346, Cfg9346_Unlock);
  2809 	RTL_W8(Cfg9346, Cfg9346_Unlock);
  2851 
  2810 
  2852 	RTL_W8(EarlyTxThres, EarlyTxThld);
  2811 	RTL_W8(EarlyTxThres, EarlyTxThld);
  2853 
  2812 
  2854 	rtl_set_rx_max_size(ioaddr, tp->rx_buf_sz);
  2813 	rtl_set_rx_max_size(ioaddr);
  2855 
  2814 
  2856 	tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
  2815 	tp->cp_cmd |= rtl_rw_cpluscmd(ioaddr) | PCIMulRW;
  2857 
  2816 
  2858 	RTL_W16(CPlusCmd, tp->cp_cmd);
  2817 	RTL_W16(CPlusCmd, tp->cp_cmd);
  2859 
  2818 
  3257 	if (frags) {
  3216 	if (frags) {
  3258 		len = skb_headlen(skb);
  3217 		len = skb_headlen(skb);
  3259 		opts1 |= FirstFrag;
  3218 		opts1 |= FirstFrag;
  3260 	} else {
  3219 	} else {
  3261 		len = skb->len;
  3220 		len = skb->len;
       
  3221 
       
  3222 		if (unlikely(len < ETH_ZLEN)) {
       
  3223 			if (skb_padto(skb, ETH_ZLEN))
       
  3224 				goto err_update_stats;
       
  3225 			len = ETH_ZLEN;
       
  3226 		}
       
  3227 
  3262 		opts1 |= FirstFrag | LastFrag;
  3228 		opts1 |= FirstFrag | LastFrag;
  3263 		tp->tx_skb[entry].skb = skb;
  3229 		tp->tx_skb[entry].skb = skb;
  3264 	}
  3230 	}
  3265 
  3231 
  3266 	mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
  3232 	mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE);
  3272 	wmb();
  3238 	wmb();
  3273 
  3239 
  3274 	/* anti gcc 2.95.3 bugware (sic) */
  3240 	/* anti gcc 2.95.3 bugware (sic) */
  3275 	status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
  3241 	status = opts1 | len | (RingEnd * !((entry + 1) % NUM_TX_DESC));
  3276 	txd->opts1 = cpu_to_le32(status);
  3242 	txd->opts1 = cpu_to_le32(status);
       
  3243 
       
  3244 	dev->trans_start = jiffies;
  3277 
  3245 
  3278 	tp->cur_tx += frags + 1;
  3246 	tp->cur_tx += frags + 1;
  3279 
  3247 
  3280 	smp_wmb();
  3248 	smp_wmb();
  3281 
  3249 
  3292 	return ret;
  3260 	return ret;
  3293 
  3261 
  3294 err_stop:
  3262 err_stop:
  3295 	netif_stop_queue(dev);
  3263 	netif_stop_queue(dev);
  3296 	ret = NETDEV_TX_BUSY;
  3264 	ret = NETDEV_TX_BUSY;
       
  3265 err_update_stats:
  3297 	dev->stats.tx_dropped++;
  3266 	dev->stats.tx_dropped++;
  3298 	goto out;
  3267 	goto out;
  3299 }
  3268 }
  3300 
  3269 
  3301 static void rtl8169_pcierr_interrupt(struct net_device *dev)
  3270 static void rtl8169_pcierr_interrupt(struct net_device *dev)
  3373 		dev->stats.tx_packets++;
  3342 		dev->stats.tx_packets++;
  3374 
  3343 
  3375 		rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
  3344 		rtl8169_unmap_tx_skb(tp->pci_dev, tx_skb, tp->TxDescArray + entry);
  3376 
  3345 
  3377 		if (status & LastFrag) {
  3346 		if (status & LastFrag) {
  3378 			dev_kfree_skb(tx_skb->skb);
  3347 			dev_kfree_skb_irq(tx_skb->skb);
  3379 			tx_skb->skb = NULL;
  3348 			tx_skb->skb = NULL;
  3380 		}
  3349 		}
  3381 		dirty_tx++;
  3350 		dirty_tx++;
  3382 		tx_left--;
  3351 		tx_left--;
  3383 	}
  3352 	}
  3514 			skb->protocol = eth_type_trans(skb, dev);
  3483 			skb->protocol = eth_type_trans(skb, dev);
  3515 
  3484 
  3516 			if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
  3485 			if (rtl8169_rx_vlan_skb(tp, desc, skb) < 0)
  3517 				netif_receive_skb(skb);
  3486 				netif_receive_skb(skb);
  3518 
  3487 
       
  3488 			dev->last_rx = jiffies;
  3519 			dev->stats.rx_bytes += pkt_size;
  3489 			dev->stats.rx_bytes += pkt_size;
  3520 			dev->stats.rx_packets++;
  3490 			dev->stats.rx_packets++;
  3521 		}
  3491 		}
  3522 
  3492 
  3523 		/* Work around for AMD plateform. */
  3493 		/* Work around for AMD plateform. */
  3555 	struct rtl8169_private *tp = netdev_priv(dev);
  3525 	struct rtl8169_private *tp = netdev_priv(dev);
  3556 	void __iomem *ioaddr = tp->mmio_addr;
  3526 	void __iomem *ioaddr = tp->mmio_addr;
  3557 	int handled = 0;
  3527 	int handled = 0;
  3558 	int status;
  3528 	int status;
  3559 
  3529 
  3560 	/* loop handling interrupts until we have no new ones or
       
  3561 	 * we hit a invalid/hotplug case.
       
  3562 	 */
       
  3563 	status = RTL_R16(IntrStatus);
  3530 	status = RTL_R16(IntrStatus);
  3564 	while (status && status != 0xffff) {
  3531 
  3565 		handled = 1;
  3532 	/* hotplug/major error/no more work/shared irq */
  3566 
  3533 	if ((status == 0xffff) || !status)
  3567 		/* Handle all of the error cases first. These will reset
  3534 		goto out;
  3568 		 * the chip, so just exit the loop.
  3535 
  3569 		 */
  3536 	handled = 1;
  3570 		if (unlikely(!netif_running(dev))) {
  3537 
  3571 			rtl8169_asic_down(ioaddr);
  3538 	if (unlikely(!netif_running(dev))) {
  3572 			break;
  3539 		rtl8169_asic_down(ioaddr);
       
  3540 		goto out;
       
  3541 	}
       
  3542 
       
  3543 	status &= tp->intr_mask;
       
  3544 	RTL_W16(IntrStatus,
       
  3545 		(status & RxFIFOOver) ? (status | RxOverflow) : status);
       
  3546 
       
  3547 	if (!(status & tp->intr_event))
       
  3548 		goto out;
       
  3549 
       
  3550 	/* Work around for rx fifo overflow */
       
  3551 	if (unlikely(status & RxFIFOOver) &&
       
  3552 	    (tp->mac_version == RTL_GIGA_MAC_VER_11)) {
       
  3553 		netif_stop_queue(dev);
       
  3554 		rtl8169_tx_timeout(dev);
       
  3555 		goto out;
       
  3556 	}
       
  3557 
       
  3558 	if (unlikely(status & SYSErr)) {
       
  3559 		rtl8169_pcierr_interrupt(dev);
       
  3560 		goto out;
       
  3561 	}
       
  3562 
       
  3563 	if (status & LinkChg)
       
  3564 		rtl8169_check_link_status(dev, tp, ioaddr);
       
  3565 
       
  3566 	if (status & tp->napi_event) {
       
  3567 		RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event);
       
  3568 		tp->intr_mask = ~tp->napi_event;
       
  3569 
       
  3570 		if (likely(netif_rx_schedule_prep(dev, &tp->napi)))
       
  3571 			__netif_rx_schedule(dev, &tp->napi);
       
  3572 		else if (netif_msg_intr(tp)) {
       
  3573 			printk(KERN_INFO "%s: interrupt %04x in poll\n",
       
  3574 			       dev->name, status);
  3573 		}
  3575 		}
  3574 
  3576 	}
  3575 		/* Work around for rx fifo overflow */
  3577 out:
  3576 		if (unlikely(status & RxFIFOOver) &&
       
  3577 		(tp->mac_version == RTL_GIGA_MAC_VER_11)) {
       
  3578 			netif_stop_queue(dev);
       
  3579 			rtl8169_tx_timeout(dev);
       
  3580 			break;
       
  3581 		}
       
  3582 
       
  3583 		if (unlikely(status & SYSErr)) {
       
  3584 			rtl8169_pcierr_interrupt(dev);
       
  3585 			break;
       
  3586 		}
       
  3587 
       
  3588 		if (status & LinkChg)
       
  3589 			rtl8169_check_link_status(dev, tp, ioaddr);
       
  3590 
       
  3591 		/* We need to see the lastest version of tp->intr_mask to
       
  3592 		 * avoid ignoring an MSI interrupt and having to wait for
       
  3593 		 * another event which may never come.
       
  3594 		 */
       
  3595 		smp_rmb();
       
  3596 		if (status & tp->intr_mask & tp->napi_event) {
       
  3597 			RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event);
       
  3598 			tp->intr_mask = ~tp->napi_event;
       
  3599 
       
  3600 			if (likely(napi_schedule_prep(&tp->napi)))
       
  3601 				__napi_schedule(&tp->napi);
       
  3602 			else if (netif_msg_intr(tp)) {
       
  3603 				printk(KERN_INFO "%s: interrupt %04x in poll\n",
       
  3604 				dev->name, status);
       
  3605 			}
       
  3606 		}
       
  3607 
       
  3608 		/* We only get a new MSI interrupt when all active irq
       
  3609 		 * sources on the chip have been acknowledged. So, ack
       
  3610 		 * everything we've seen and check if new sources have become
       
  3611 		 * active to avoid blocking all interrupts from the chip.
       
  3612 		 */
       
  3613 		RTL_W16(IntrStatus,
       
  3614 			(status & RxFIFOOver) ? (status | RxOverflow) : status);
       
  3615 		status = RTL_R16(IntrStatus);
       
  3616 	}
       
  3617 
       
  3618 	return IRQ_RETVAL(handled);
  3578 	return IRQ_RETVAL(handled);
  3619 }
  3579 }
  3620 
  3580 
  3621 static int rtl8169_poll(struct napi_struct *napi, int budget)
  3581 static int rtl8169_poll(struct napi_struct *napi, int budget)
  3622 {
  3582 {
  3627 
  3587 
  3628 	work_done = rtl8169_rx_interrupt(dev, tp, ioaddr, (u32) budget);
  3588 	work_done = rtl8169_rx_interrupt(dev, tp, ioaddr, (u32) budget);
  3629 	rtl8169_tx_interrupt(dev, tp, ioaddr);
  3589 	rtl8169_tx_interrupt(dev, tp, ioaddr);
  3630 
  3590 
  3631 	if (work_done < budget) {
  3591 	if (work_done < budget) {
  3632 		napi_complete(napi);
  3592 		netif_rx_complete(dev, napi);
  3633 
  3593 		tp->intr_mask = 0xffff;
  3634 		/* We need for force the visibility of tp->intr_mask
  3594 		/*
  3635 		 * for other CPUs, as we can loose an MSI interrupt
  3595 		 * 20040426: the barrier is not strictly required but the
  3636 		 * and potentially wait for a retransmit timeout if we don't.
  3596 		 * behavior of the irq handler could be less predictable
  3637 		 * The posted write to IntrMask is safe, as it will
  3597 		 * without it. Btw, the lack of flush for the posted pci
  3638 		 * eventually make it to the chip and we won't loose anything
  3598 		 * write is safe - FR
  3639 		 * until it does.
       
  3640 		 */
  3599 		 */
  3641 		tp->intr_mask = 0xffff;
       
  3642 		smp_wmb();
  3600 		smp_wmb();
  3643 		RTL_W16(IntrMask, tp->intr_event);
  3601 		RTL_W16(IntrMask, tp->intr_event);
  3644 	}
  3602 	}
  3645 
  3603 
  3646 	return work_done;
  3604 	return work_done;
  3707 
  3665 
  3708 static int rtl8169_close(struct net_device *dev)
  3666 static int rtl8169_close(struct net_device *dev)
  3709 {
  3667 {
  3710 	struct rtl8169_private *tp = netdev_priv(dev);
  3668 	struct rtl8169_private *tp = netdev_priv(dev);
  3711 	struct pci_dev *pdev = tp->pci_dev;
  3669 	struct pci_dev *pdev = tp->pci_dev;
  3712 
       
  3713 	/* update counters before going down */
       
  3714 	rtl8169_update_counters(dev);
       
  3715 
  3670 
  3716 	rtl8169_down(dev);
  3671 	rtl8169_down(dev);
  3717 
  3672 
  3718 	free_irq(dev->irq, dev);
  3673 	free_irq(dev->irq, dev);
  3719 
  3674 
  3804 	}
  3759 	}
  3805 
  3760 
  3806 	return &dev->stats;
  3761 	return &dev->stats;
  3807 }
  3762 }
  3808 
  3763 
  3809 static void rtl8169_net_suspend(struct net_device *dev)
  3764 #ifdef CONFIG_PM
  3810 {
  3765 
       
  3766 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state)
       
  3767 {
       
  3768 	struct net_device *dev = pci_get_drvdata(pdev);
       
  3769 	struct rtl8169_private *tp = netdev_priv(dev);
       
  3770 	void __iomem *ioaddr = tp->mmio_addr;
       
  3771 
  3811 	if (!netif_running(dev))
  3772 	if (!netif_running(dev))
  3812 		return;
  3773 		goto out_pci_suspend;
  3813 
  3774 
  3814 	netif_device_detach(dev);
  3775 	netif_device_detach(dev);
  3815 	netif_stop_queue(dev);
  3776 	netif_stop_queue(dev);
  3816 }
  3777 
  3817 
  3778 	spin_lock_irq(&tp->lock);
  3818 #ifdef CONFIG_PM
  3779 
  3819 
  3780 	rtl8169_asic_down(ioaddr);
  3820 static int rtl8169_suspend(struct device *device)
  3781 
  3821 {
  3782 	rtl8169_rx_missed(dev, ioaddr);
  3822 	struct pci_dev *pdev = to_pci_dev(device);
  3783 
       
  3784 	spin_unlock_irq(&tp->lock);
       
  3785 
       
  3786 out_pci_suspend:
       
  3787 	pci_save_state(pdev);
       
  3788 	pci_enable_wake(pdev, pci_choose_state(pdev, state),
       
  3789 		(tp->features & RTL_FEATURE_WOL) ? 1 : 0);
       
  3790 	pci_set_power_state(pdev, pci_choose_state(pdev, state));
       
  3791 
       
  3792 	return 0;
       
  3793 }
       
  3794 
       
  3795 static int rtl8169_resume(struct pci_dev *pdev)
       
  3796 {
  3823 	struct net_device *dev = pci_get_drvdata(pdev);
  3797 	struct net_device *dev = pci_get_drvdata(pdev);
  3824 
  3798 
  3825 	rtl8169_net_suspend(dev);
  3799 	pci_set_power_state(pdev, PCI_D0);
  3826 
  3800 	pci_restore_state(pdev);
  3827 	return 0;
  3801 	pci_enable_wake(pdev, PCI_D0, 0);
  3828 }
       
  3829 
       
  3830 static int rtl8169_resume(struct device *device)
       
  3831 {
       
  3832 	struct pci_dev *pdev = to_pci_dev(device);
       
  3833 	struct net_device *dev = pci_get_drvdata(pdev);
       
  3834 
  3802 
  3835 	if (!netif_running(dev))
  3803 	if (!netif_running(dev))
  3836 		goto out;
  3804 		goto out;
  3837 
  3805 
  3838 	netif_device_attach(dev);
  3806 	netif_device_attach(dev);
  3840 	rtl8169_schedule_work(dev, rtl8169_reset_task);
  3808 	rtl8169_schedule_work(dev, rtl8169_reset_task);
  3841 out:
  3809 out:
  3842 	return 0;
  3810 	return 0;
  3843 }
  3811 }
  3844 
  3812 
  3845 static struct dev_pm_ops rtl8169_pm_ops = {
       
  3846 	.suspend = rtl8169_suspend,
       
  3847 	.resume = rtl8169_resume,
       
  3848 	.freeze = rtl8169_suspend,
       
  3849 	.thaw = rtl8169_resume,
       
  3850 	.poweroff = rtl8169_suspend,
       
  3851 	.restore = rtl8169_resume,
       
  3852 };
       
  3853 
       
  3854 #define RTL8169_PM_OPS	(&rtl8169_pm_ops)
       
  3855 
       
  3856 #else /* !CONFIG_PM */
       
  3857 
       
  3858 #define RTL8169_PM_OPS	NULL
       
  3859 
       
  3860 #endif /* !CONFIG_PM */
       
  3861 
       
  3862 static void rtl_shutdown(struct pci_dev *pdev)
  3813 static void rtl_shutdown(struct pci_dev *pdev)
  3863 {
  3814 {
  3864 	struct net_device *dev = pci_get_drvdata(pdev);
  3815 	rtl8169_suspend(pdev, PMSG_SUSPEND);
  3865 	struct rtl8169_private *tp = netdev_priv(dev);
  3816 }
  3866 	void __iomem *ioaddr = tp->mmio_addr;
  3817 
  3867 
  3818 #endif /* CONFIG_PM */
  3868 	rtl8169_net_suspend(dev);
       
  3869 
       
  3870 	spin_lock_irq(&tp->lock);
       
  3871 
       
  3872 	rtl8169_asic_down(ioaddr);
       
  3873 
       
  3874 	spin_unlock_irq(&tp->lock);
       
  3875 
       
  3876 	if (system_state == SYSTEM_POWER_OFF) {
       
  3877 		/* WoL fails with some 8168 when the receiver is disabled. */
       
  3878 		if (tp->features & RTL_FEATURE_WOL) {
       
  3879 			pci_clear_master(pdev);
       
  3880 
       
  3881 			RTL_W8(ChipCmd, CmdRxEnb);
       
  3882 			/* PCI commit */
       
  3883 			RTL_R8(ChipCmd);
       
  3884 		}
       
  3885 
       
  3886 		pci_wake_from_d3(pdev, true);
       
  3887 		pci_set_power_state(pdev, PCI_D3hot);
       
  3888 	}
       
  3889 }
       
  3890 
  3819 
  3891 static struct pci_driver rtl8169_pci_driver = {
  3820 static struct pci_driver rtl8169_pci_driver = {
  3892 	.name		= MODULENAME,
  3821 	.name		= MODULENAME,
  3893 	.id_table	= rtl8169_pci_tbl,
  3822 	.id_table	= rtl8169_pci_tbl,
  3894 	.probe		= rtl8169_init_one,
  3823 	.probe		= rtl8169_init_one,
  3895 	.remove		= __devexit_p(rtl8169_remove_one),
  3824 	.remove		= __devexit_p(rtl8169_remove_one),
       
  3825 #ifdef CONFIG_PM
       
  3826 	.suspend	= rtl8169_suspend,
       
  3827 	.resume		= rtl8169_resume,
  3896 	.shutdown	= rtl_shutdown,
  3828 	.shutdown	= rtl_shutdown,
  3897 	.driver.pm	= RTL8169_PM_OPS,
  3829 #endif
  3898 };
  3830 };
  3899 
  3831 
  3900 static int __init rtl8169_init_module(void)
  3832 static int __init rtl8169_init_module(void)
  3901 {
  3833 {
  3902 	return pci_register_driver(&rtl8169_pci_driver);
  3834 	return pci_register_driver(&rtl8169_pci_driver);