master/sync.c
changeset 1509 a864688e7de5
parent 1363 11c0b2caa253
child 1801 31af610f1639
equal deleted inserted replaced
1508:60a116ed3897 1509:a864688e7de5
    93  */
    93  */
    94 void ec_sync_page(
    94 void ec_sync_page(
    95         const ec_sync_t *sync, /**< Sync manager. */
    95         const ec_sync_t *sync, /**< Sync manager. */
    96         uint8_t sync_index, /**< Index of the sync manager. */
    96         uint8_t sync_index, /**< Index of the sync manager. */
    97         uint16_t data_size, /**< Data size. */
    97         uint16_t data_size, /**< Data size. */
    98         ec_direction_t dir, /**< Direction (overrides the control byte,
    98         const ec_sync_config_t *sync_config, /**< Configuration. */
    99                               if set to EC_DIR_INPUT or EC_DIR_OUTPUT). */
       
   100         uint8_t *data /**> Configuration memory. */
    99         uint8_t *data /**> Configuration memory. */
   101         )
   100         )
   102 {
   101 {
   103     // enable only if SII enable is set and size is > 0.
   102     // enable only if SII enable is set and size is > 0.
   104     uint16_t enable = sync->enable && data_size;
   103     uint16_t enable = sync->enable && data_size;
   105     uint8_t control = sync->control_register;
   104     uint8_t control = sync->control_register;
   106 
   105 
   107     if (dir == EC_DIR_OUTPUT || dir == EC_DIR_INPUT) {
   106     if (sync_config) {
   108         // override sync manager direction bits with dir parameter
   107 
   109         EC_WRITE_BIT(&control, 2, dir == EC_DIR_OUTPUT ? 1 : 0);
   108         switch (sync_config->dir) {
   110         EC_WRITE_BIT(&control, 3, 0);
   109             case EC_DIR_OUTPUT:
       
   110             case EC_DIR_INPUT:
       
   111                 EC_WRITE_BIT(&control, 2,
       
   112                         sync_config->dir == EC_DIR_OUTPUT ? 1 : 0);
       
   113                 EC_WRITE_BIT(&control, 3, 0);
       
   114                 break;
       
   115             default:
       
   116                 break;
       
   117         }
       
   118 
       
   119         switch (sync_config->watchdog_mode) {
       
   120             case EC_WD_ENABLE:
       
   121             case EC_WD_DISABLE:
       
   122                 EC_WRITE_BIT(&control, 6,
       
   123                         sync_config->watchdog_mode == EC_WD_ENABLE);
       
   124                 break;
       
   125             default:
       
   126                 break;
       
   127         }
   111     }
   128     }
   112 
   129 
   113     if (sync->slave->master->debug_level)
   130     if (sync->slave->master->debug_level)
   114         EC_DBG("SM%u: Addr 0x%04X, Size %3u, Ctrl 0x%02X, En %u\n",
   131         EC_DBG("SM%u: Addr 0x%04X, Size %3u, Ctrl 0x%02X, En %u\n",
   115                sync_index, sync->physical_start_address,
   132                sync_index, sync->physical_start_address,