master/master.c
changeset 1408 91b35db64a24
parent 1399 f79d4bb5b23a
child 1410 fb6719008bf5
equal deleted inserted replaced
1407:e3974f72d31e 1408:91b35db64a24
   126     master->slaves = NULL;
   126     master->slaves = NULL;
   127     master->slave_count = 0;
   127     master->slave_count = 0;
   128     
   128     
   129     INIT_LIST_HEAD(&master->configs);
   129     INIT_LIST_HEAD(&master->configs);
   130 
   130 
       
   131 	master->app_time = 0ULL;
       
   132 
   131     master->scan_busy = 0;
   133     master->scan_busy = 0;
   132     master->allow_scan = 1;
   134     master->allow_scan = 1;
   133     init_MUTEX(&master->scan_sem);
   135     init_MUTEX(&master->scan_sem);
   134     init_waitqueue_head(&master->scan_queue);
   136     init_waitqueue_head(&master->scan_queue);
   135 
   137 
   210     }
   212     }
   211 
   213 
   212     // init sync datagram
   214     // init sync datagram
   213     ec_datagram_init(&master->sync_datagram);
   215     ec_datagram_init(&master->sync_datagram);
   214     snprintf(master->sync_datagram.name, EC_DATAGRAM_NAME_SIZE, "sync");
   216     snprintf(master->sync_datagram.name, EC_DATAGRAM_NAME_SIZE, "sync");
   215     ret = ec_datagram_armw(&master->sync_datagram, 0 /* FIXME */, 0x0910, 4);
   217     ret = ec_datagram_prealloc(&master->sync_datagram, 4);
   216     if (ret < 0) {
   218     if (ret < 0) {
   217         ec_datagram_clear(&master->sync_datagram);
   219         ec_datagram_clear(&master->sync_datagram);
   218         EC_ERR("Failed to allocate synchronisation datagram.\n");
   220         EC_ERR("Failed to allocate synchronisation datagram.\n");
   219         goto out_clear_ref_sync;
   221         goto out_clear_ref_sync;
   220     }
   222     }
       
   223 	ec_master_find_dc_ref_clock(master);
   221 
   224 
   222     // init character device
   225     // init character device
   223     ret = ec_cdev_init(&master->cdev, master, device_number);
   226     ret = ec_cdev_init(&master->cdev, master, device_number);
   224     if (ret)
   227     if (ret)
   225         goto out_clear_sync;
   228         goto out_clear_sync;
  1342     }
  1345     }
  1343 
  1346 
  1344     return 0;
  1347     return 0;
  1345 }
  1348 }
  1346 
  1349 
       
  1350 /*****************************************************************************/
       
  1351 
       
  1352 /** Finds the DC reference clock.
       
  1353  */
       
  1354 void ec_master_find_dc_ref_clock(
       
  1355         ec_master_t *master /**< EtherCAT master. */
       
  1356 		)
       
  1357 {
       
  1358 	ec_slave_t *slave;
       
  1359 	uint16_t ref_clock_addr = 0xffff;
       
  1360 
       
  1361     for (slave = master->slaves;
       
  1362             slave < master->slaves + master->slave_count;
       
  1363             slave++) {
       
  1364 		if (slave->base_dc_supported) {
       
  1365 			ref_clock_addr = slave->station_address;
       
  1366 			break;
       
  1367 		}
       
  1368     }
       
  1369 
       
  1370 	// This call always succeeds, because the datagram has been pre-allocated.
       
  1371 	ec_datagram_frmw(&master->sync_datagram, ref_clock_addr, 0x0910, 4);
       
  1372 }
       
  1373 
  1347 /******************************************************************************
  1374 /******************************************************************************
  1348  *  Application interface
  1375  *  Application interface
  1349  *****************************************************************************/
  1376  *****************************************************************************/
  1350 
  1377 
  1351 /** Same as ecrt_master_create_domain(), but with ERR_PTR() return value.
  1378 /** Same as ecrt_master_create_domain(), but with ERR_PTR() return value.