467 struct timer_list timer; |
480 struct timer_list timer; |
468 u16 cp_cmd; |
481 u16 cp_cmd; |
469 u16 intr_event; |
482 u16 intr_event; |
470 u16 napi_event; |
483 u16 napi_event; |
471 u16 intr_mask; |
484 u16 intr_mask; |
472 int phy_auto_nego_reg; |
|
473 int phy_1000_ctrl_reg; |
485 int phy_1000_ctrl_reg; |
474 #ifdef CONFIG_R8169_VLAN |
486 #ifdef CONFIG_R8169_VLAN |
475 struct vlan_group *vlgrp; |
487 struct vlan_group *vlgrp; |
476 #endif |
488 #endif |
477 int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex); |
489 int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex); |
478 int (*get_settings)(struct net_device *, struct ethtool_cmd *); |
490 int (*get_settings)(struct net_device *, struct ethtool_cmd *); |
479 void (*phy_reset_enable)(void __iomem *); |
491 void (*phy_reset_enable)(void __iomem *); |
480 void (*hw_start)(struct net_device *); |
492 void (*hw_start)(struct net_device *); |
481 unsigned int (*phy_reset_pending)(void __iomem *); |
493 unsigned int (*phy_reset_pending)(void __iomem *); |
482 unsigned int (*link_ok)(void __iomem *); |
494 unsigned int (*link_ok)(void __iomem *); |
|
495 int (*do_ioctl)(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd); |
483 int pcie_cap; |
496 int pcie_cap; |
484 struct delayed_work task; |
497 struct delayed_work task; |
485 unsigned features; |
498 unsigned features; |
486 |
499 |
487 struct mii_if_info mii; |
500 struct mii_if_info mii; |
|
501 struct rtl8169_counters counters; |
488 |
502 |
489 ec_device_t *ecdev; |
503 ec_device_t *ecdev; |
490 unsigned long ec_watchdog_jiffies; |
504 unsigned long ec_watchdog_jiffies; |
491 }; |
505 }; |
492 |
506 |
838 static int rtl8169_set_speed_xmii(struct net_device *dev, |
852 static int rtl8169_set_speed_xmii(struct net_device *dev, |
839 u8 autoneg, u16 speed, u8 duplex) |
853 u8 autoneg, u16 speed, u8 duplex) |
840 { |
854 { |
841 struct rtl8169_private *tp = netdev_priv(dev); |
855 struct rtl8169_private *tp = netdev_priv(dev); |
842 void __iomem *ioaddr = tp->mmio_addr; |
856 void __iomem *ioaddr = tp->mmio_addr; |
843 int auto_nego, giga_ctrl; |
857 int giga_ctrl, bmcr; |
844 |
|
845 auto_nego = mdio_read(ioaddr, MII_ADVERTISE); |
|
846 auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | |
|
847 ADVERTISE_100HALF | ADVERTISE_100FULL); |
|
848 giga_ctrl = mdio_read(ioaddr, MII_CTRL1000); |
|
849 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); |
|
850 |
858 |
851 if (autoneg == AUTONEG_ENABLE) { |
859 if (autoneg == AUTONEG_ENABLE) { |
|
860 int auto_nego; |
|
861 |
|
862 auto_nego = mdio_read(ioaddr, MII_ADVERTISE); |
852 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL | |
863 auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL | |
853 ADVERTISE_100HALF | ADVERTISE_100FULL); |
864 ADVERTISE_100HALF | ADVERTISE_100FULL); |
854 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; |
865 auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
855 } else { |
866 |
856 if (speed == SPEED_10) |
867 giga_ctrl = mdio_read(ioaddr, MII_CTRL1000); |
857 auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL; |
868 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); |
858 else if (speed == SPEED_100) |
869 |
859 auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL; |
870 /* The 8100e/8101e/8102e do Fast Ethernet only. */ |
860 else if (speed == SPEED_1000) |
871 if ((tp->mac_version != RTL_GIGA_MAC_VER_07) && |
|
872 (tp->mac_version != RTL_GIGA_MAC_VER_08) && |
|
873 (tp->mac_version != RTL_GIGA_MAC_VER_09) && |
|
874 (tp->mac_version != RTL_GIGA_MAC_VER_10) && |
|
875 (tp->mac_version != RTL_GIGA_MAC_VER_13) && |
|
876 (tp->mac_version != RTL_GIGA_MAC_VER_14) && |
|
877 (tp->mac_version != RTL_GIGA_MAC_VER_15) && |
|
878 (tp->mac_version != RTL_GIGA_MAC_VER_16)) { |
861 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; |
879 giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; |
862 |
880 } else if (netif_msg_link(tp)) { |
863 if (duplex == DUPLEX_HALF) |
|
864 auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL); |
|
865 |
|
866 if (duplex == DUPLEX_FULL) |
|
867 auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF); |
|
868 |
|
869 /* This tweak comes straight from Realtek's driver. */ |
|
870 if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) && |
|
871 ((tp->mac_version == RTL_GIGA_MAC_VER_13) || |
|
872 (tp->mac_version == RTL_GIGA_MAC_VER_16))) { |
|
873 auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA; |
|
874 } |
|
875 } |
|
876 |
|
877 /* The 8100e/8101e/8102e do Fast Ethernet only. */ |
|
878 if ((tp->mac_version == RTL_GIGA_MAC_VER_07) || |
|
879 (tp->mac_version == RTL_GIGA_MAC_VER_08) || |
|
880 (tp->mac_version == RTL_GIGA_MAC_VER_09) || |
|
881 (tp->mac_version == RTL_GIGA_MAC_VER_10) || |
|
882 (tp->mac_version == RTL_GIGA_MAC_VER_13) || |
|
883 (tp->mac_version == RTL_GIGA_MAC_VER_14) || |
|
884 (tp->mac_version == RTL_GIGA_MAC_VER_15) || |
|
885 (tp->mac_version == RTL_GIGA_MAC_VER_16)) { |
|
886 if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) && |
|
887 netif_msg_link(tp)) { |
|
888 printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n", |
881 printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n", |
889 dev->name); |
882 dev->name); |
890 } |
883 } |
891 giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); |
884 |
892 } |
885 bmcr = BMCR_ANENABLE | BMCR_ANRESTART; |
893 |
886 |
894 auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
887 if ((tp->mac_version == RTL_GIGA_MAC_VER_11) || |
895 |
888 (tp->mac_version == RTL_GIGA_MAC_VER_12) || |
896 if ((tp->mac_version == RTL_GIGA_MAC_VER_11) || |
889 (tp->mac_version >= RTL_GIGA_MAC_VER_17)) { |
897 (tp->mac_version == RTL_GIGA_MAC_VER_12) || |
890 /* |
898 (tp->mac_version >= RTL_GIGA_MAC_VER_17)) { |
891 * Wake up the PHY. |
899 /* |
892 * Vendor specific (0x1f) and reserved (0x0e) MII |
900 * Wake up the PHY. |
893 * registers. |
901 * Vendor specific (0x1f) and reserved (0x0e) MII registers. |
894 */ |
902 */ |
895 mdio_write(ioaddr, 0x1f, 0x0000); |
|
896 mdio_write(ioaddr, 0x0e, 0x0000); |
|
897 } |
|
898 |
|
899 mdio_write(ioaddr, MII_ADVERTISE, auto_nego); |
|
900 mdio_write(ioaddr, MII_CTRL1000, giga_ctrl); |
|
901 } else { |
|
902 giga_ctrl = 0; |
|
903 |
|
904 if (speed == SPEED_10) |
|
905 bmcr = 0; |
|
906 else if (speed == SPEED_100) |
|
907 bmcr = BMCR_SPEED100; |
|
908 else |
|
909 return -EINVAL; |
|
910 |
|
911 if (duplex == DUPLEX_FULL) |
|
912 bmcr |= BMCR_FULLDPLX; |
|
913 |
903 mdio_write(ioaddr, 0x1f, 0x0000); |
914 mdio_write(ioaddr, 0x1f, 0x0000); |
904 mdio_write(ioaddr, 0x0e, 0x0000); |
915 } |
905 } |
916 |
906 |
|
907 tp->phy_auto_nego_reg = auto_nego; |
|
908 tp->phy_1000_ctrl_reg = giga_ctrl; |
917 tp->phy_1000_ctrl_reg = giga_ctrl; |
909 |
918 |
910 mdio_write(ioaddr, MII_ADVERTISE, auto_nego); |
919 mdio_write(ioaddr, MII_BMCR, bmcr); |
911 mdio_write(ioaddr, MII_CTRL1000, giga_ctrl); |
920 |
912 mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); |
921 if ((tp->mac_version == RTL_GIGA_MAC_VER_02) || |
|
922 (tp->mac_version == RTL_GIGA_MAC_VER_03)) { |
|
923 if ((speed == SPEED_100) && (autoneg != AUTONEG_ENABLE)) { |
|
924 mdio_write(ioaddr, 0x17, 0x2138); |
|
925 mdio_write(ioaddr, 0x0e, 0x0260); |
|
926 } else { |
|
927 mdio_write(ioaddr, 0x17, 0x2108); |
|
928 mdio_write(ioaddr, 0x0e, 0x0000); |
|
929 } |
|
930 } |
|
931 |
913 return 0; |
932 return 0; |
914 } |
933 } |
915 |
934 |
916 static int rtl8169_set_speed(struct net_device *dev, |
935 static int rtl8169_set_speed(struct net_device *dev, |
917 u8 autoneg, u16 speed, u8 duplex) |
936 u8 autoneg, u16 speed, u8 duplex) |
1111 "multicast", |
1130 "multicast", |
1112 "tx_aborted", |
1131 "tx_aborted", |
1113 "tx_underrun", |
1132 "tx_underrun", |
1114 }; |
1133 }; |
1115 |
1134 |
1116 struct rtl8169_counters { |
|
1117 __le64 tx_packets; |
|
1118 __le64 rx_packets; |
|
1119 __le64 tx_errors; |
|
1120 __le32 rx_errors; |
|
1121 __le16 rx_missed; |
|
1122 __le16 align_errors; |
|
1123 __le32 tx_one_collision; |
|
1124 __le32 tx_multi_collision; |
|
1125 __le64 rx_unicast; |
|
1126 __le64 rx_broadcast; |
|
1127 __le32 rx_multicast; |
|
1128 __le16 tx_aborted; |
|
1129 __le16 tx_underun; |
|
1130 }; |
|
1131 |
|
1132 static int rtl8169_get_sset_count(struct net_device *dev, int sset) |
1135 static int rtl8169_get_sset_count(struct net_device *dev, int sset) |
1133 { |
1136 { |
1134 switch (sset) { |
1137 switch (sset) { |
1135 case ETH_SS_STATS: |
1138 case ETH_SS_STATS: |
1136 return ARRAY_SIZE(rtl8169_gstrings); |
1139 return ARRAY_SIZE(rtl8169_gstrings); |
1137 default: |
1140 default: |
1138 return -EOPNOTSUPP; |
1141 return -EOPNOTSUPP; |
1139 } |
1142 } |
1140 } |
1143 } |
1141 |
1144 |
1142 static void rtl8169_get_ethtool_stats(struct net_device *dev, |
1145 static void rtl8169_update_counters(struct net_device *dev) |
1143 struct ethtool_stats *stats, u64 *data) |
|
1144 { |
1146 { |
1145 struct rtl8169_private *tp = netdev_priv(dev); |
1147 struct rtl8169_private *tp = netdev_priv(dev); |
1146 void __iomem *ioaddr = tp->mmio_addr; |
1148 void __iomem *ioaddr = tp->mmio_addr; |
1147 struct rtl8169_counters *counters; |
1149 struct rtl8169_counters *counters; |
1148 dma_addr_t paddr; |
1150 dma_addr_t paddr; |
1149 u32 cmd; |
1151 u32 cmd; |
1150 |
1152 int wait = 1000; |
1151 ASSERT_RTNL(); |
1153 |
|
1154 /* |
|
1155 * Some chips are unable to dump tally counters when the receiver |
|
1156 * is disabled. |
|
1157 */ |
|
1158 if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0) |
|
1159 return; |
1152 |
1160 |
1153 counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr); |
1161 counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr); |
1154 if (!counters) |
1162 if (!counters) |
1155 return; |
1163 return; |
1156 |
1164 |
1157 RTL_W32(CounterAddrHigh, (u64)paddr >> 32); |
1165 RTL_W32(CounterAddrHigh, (u64)paddr >> 32); |
1158 cmd = (u64)paddr & DMA_32BIT_MASK; |
1166 cmd = (u64)paddr & DMA_BIT_MASK(32); |
1159 RTL_W32(CounterAddrLow, cmd); |
1167 RTL_W32(CounterAddrLow, cmd); |
1160 RTL_W32(CounterAddrLow, cmd | CounterDump); |
1168 RTL_W32(CounterAddrLow, cmd | CounterDump); |
1161 |
1169 |
1162 while (RTL_R32(CounterAddrLow) & CounterDump) { |
1170 while (wait--) { |
1163 if (msleep_interruptible(1)) |
1171 if ((RTL_R32(CounterAddrLow) & CounterDump) == 0) { |
|
1172 /* copy updated counters */ |
|
1173 memcpy(&tp->counters, counters, sizeof(*counters)); |
1164 break; |
1174 break; |
|
1175 } |
|
1176 udelay(10); |
1165 } |
1177 } |
1166 |
1178 |
1167 RTL_W32(CounterAddrLow, 0); |
1179 RTL_W32(CounterAddrLow, 0); |
1168 RTL_W32(CounterAddrHigh, 0); |
1180 RTL_W32(CounterAddrHigh, 0); |
1169 |
1181 |
1170 data[0] = le64_to_cpu(counters->tx_packets); |
|
1171 data[1] = le64_to_cpu(counters->rx_packets); |
|
1172 data[2] = le64_to_cpu(counters->tx_errors); |
|
1173 data[3] = le32_to_cpu(counters->rx_errors); |
|
1174 data[4] = le16_to_cpu(counters->rx_missed); |
|
1175 data[5] = le16_to_cpu(counters->align_errors); |
|
1176 data[6] = le32_to_cpu(counters->tx_one_collision); |
|
1177 data[7] = le32_to_cpu(counters->tx_multi_collision); |
|
1178 data[8] = le64_to_cpu(counters->rx_unicast); |
|
1179 data[9] = le64_to_cpu(counters->rx_broadcast); |
|
1180 data[10] = le32_to_cpu(counters->rx_multicast); |
|
1181 data[11] = le16_to_cpu(counters->tx_aborted); |
|
1182 data[12] = le16_to_cpu(counters->tx_underun); |
|
1183 |
|
1184 pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr); |
1182 pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr); |
|
1183 } |
|
1184 |
|
1185 static void rtl8169_get_ethtool_stats(struct net_device *dev, |
|
1186 struct ethtool_stats *stats, u64 *data) |
|
1187 { |
|
1188 struct rtl8169_private *tp = netdev_priv(dev); |
|
1189 |
|
1190 ASSERT_RTNL(); |
|
1191 |
|
1192 rtl8169_update_counters(dev); |
|
1193 |
|
1194 data[0] = le64_to_cpu(tp->counters.tx_packets); |
|
1195 data[1] = le64_to_cpu(tp->counters.rx_packets); |
|
1196 data[2] = le64_to_cpu(tp->counters.tx_errors); |
|
1197 data[3] = le32_to_cpu(tp->counters.rx_errors); |
|
1198 data[4] = le16_to_cpu(tp->counters.rx_missed); |
|
1199 data[5] = le16_to_cpu(tp->counters.align_errors); |
|
1200 data[6] = le32_to_cpu(tp->counters.tx_one_collision); |
|
1201 data[7] = le32_to_cpu(tp->counters.tx_multi_collision); |
|
1202 data[8] = le64_to_cpu(tp->counters.rx_unicast); |
|
1203 data[9] = le64_to_cpu(tp->counters.rx_broadcast); |
|
1204 data[10] = le32_to_cpu(tp->counters.rx_multicast); |
|
1205 data[11] = le16_to_cpu(tp->counters.tx_aborted); |
|
1206 data[12] = le16_to_cpu(tp->counters.tx_underun); |
1185 } |
1207 } |
1186 |
1208 |
1187 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data) |
1209 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data) |
1188 { |
1210 { |
1189 switch(stringset) { |
1211 switch(stringset) { |
1287 { 0xfc800000, 0x10000000, RTL_GIGA_MAC_VER_04 }, |
1309 { 0xfc800000, 0x10000000, RTL_GIGA_MAC_VER_04 }, |
1288 { 0xfc800000, 0x04000000, RTL_GIGA_MAC_VER_03 }, |
1310 { 0xfc800000, 0x04000000, RTL_GIGA_MAC_VER_03 }, |
1289 { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02 }, |
1311 { 0xfc800000, 0x00800000, RTL_GIGA_MAC_VER_02 }, |
1290 { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01 }, |
1312 { 0xfc800000, 0x00000000, RTL_GIGA_MAC_VER_01 }, |
1291 |
1313 |
1292 { 0x00000000, 0x00000000, RTL_GIGA_MAC_VER_01 } /* Catch-all */ |
1314 /* Catch-all */ |
|
1315 { 0x00000000, 0x00000000, RTL_GIGA_MAC_NONE } |
1293 }, *p = mac_info; |
1316 }, *p = mac_info; |
1294 u32 reg; |
1317 u32 reg; |
1295 |
1318 |
1296 reg = RTL_R32(TxConfig); |
1319 reg = RTL_R32(TxConfig); |
1297 while ((reg & p->mask) != p->val) |
1320 while ((reg & p->mask) != p->val) |
1298 p++; |
1321 p++; |
1299 tp->mac_version = p->mac_version; |
1322 tp->mac_version = p->mac_version; |
1300 |
|
1301 if (p->mask == 0x00000000) { |
|
1302 struct pci_dev *pdev = tp->pci_dev; |
|
1303 |
|
1304 dev_info(&pdev->dev, "unknown MAC (%08x)\n", reg); |
|
1305 } |
|
1306 } |
1323 } |
1307 |
1324 |
1308 static void rtl8169_print_mac_version(struct rtl8169_private *tp) |
1325 static void rtl8169_print_mac_version(struct rtl8169_private *tp) |
1309 { |
1326 { |
1310 dprintk("mac_version = 0x%02x\n", tp->mac_version); |
1327 dprintk("mac_version = 0x%02x\n", tp->mac_version); |
1862 if (!capable(CAP_NET_ADMIN)) |
1881 if (!capable(CAP_NET_ADMIN)) |
1863 return -EPERM; |
1882 return -EPERM; |
1864 mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in); |
1883 mdio_write(tp->mmio_addr, data->reg_num & 0x1f, data->val_in); |
1865 return 0; |
1884 return 0; |
1866 } |
1885 } |
|
1886 return -EOPNOTSUPP; |
|
1887 } |
|
1888 |
|
1889 static int rtl_tbi_ioctl(struct rtl8169_private *tp, struct mii_ioctl_data *data, int cmd) |
|
1890 { |
1867 return -EOPNOTSUPP; |
1891 return -EOPNOTSUPP; |
1868 } |
1892 } |
1869 |
1893 |
1870 static const struct rtl_cfg_info { |
1894 static const struct rtl_cfg_info { |
1871 void (*hw_start)(struct net_device *); |
1895 void (*hw_start)(struct net_device *); |
1872 unsigned int region; |
1896 unsigned int region; |
1873 unsigned int align; |
1897 unsigned int align; |
1874 u16 intr_event; |
1898 u16 intr_event; |
1875 u16 napi_event; |
1899 u16 napi_event; |
1876 unsigned features; |
1900 unsigned features; |
|
1901 u8 default_ver; |
1877 } rtl_cfg_infos [] = { |
1902 } rtl_cfg_infos [] = { |
1878 [RTL_CFG_0] = { |
1903 [RTL_CFG_0] = { |
1879 .hw_start = rtl_hw_start_8169, |
1904 .hw_start = rtl_hw_start_8169, |
1880 .region = 1, |
1905 .region = 1, |
1881 .align = 0, |
1906 .align = 0, |
1882 .intr_event = SYSErr | LinkChg | RxOverflow | |
1907 .intr_event = SYSErr | LinkChg | RxOverflow | |
1883 RxFIFOOver | TxErr | TxOK | RxOK | RxErr, |
1908 RxFIFOOver | TxErr | TxOK | RxOK | RxErr, |
1884 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, |
1909 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, |
1885 .features = RTL_FEATURE_GMII |
1910 .features = RTL_FEATURE_GMII, |
|
1911 .default_ver = RTL_GIGA_MAC_VER_01, |
1886 }, |
1912 }, |
1887 [RTL_CFG_1] = { |
1913 [RTL_CFG_1] = { |
1888 .hw_start = rtl_hw_start_8168, |
1914 .hw_start = rtl_hw_start_8168, |
1889 .region = 2, |
1915 .region = 2, |
1890 .align = 8, |
1916 .align = 8, |
1891 .intr_event = SYSErr | LinkChg | RxOverflow | |
1917 .intr_event = SYSErr | LinkChg | RxOverflow | |
1892 TxErr | TxOK | RxOK | RxErr, |
1918 TxErr | TxOK | RxOK | RxErr, |
1893 .napi_event = TxErr | TxOK | RxOK | RxOverflow, |
1919 .napi_event = TxErr | TxOK | RxOK | RxOverflow, |
1894 .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI |
1920 .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI, |
|
1921 .default_ver = RTL_GIGA_MAC_VER_11, |
1895 }, |
1922 }, |
1896 [RTL_CFG_2] = { |
1923 [RTL_CFG_2] = { |
1897 .hw_start = rtl_hw_start_8101, |
1924 .hw_start = rtl_hw_start_8101, |
1898 .region = 2, |
1925 .region = 2, |
1899 .align = 8, |
1926 .align = 8, |
1900 .intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout | |
1927 .intr_event = SYSErr | LinkChg | RxOverflow | PCSTimeout | |
1901 RxFIFOOver | TxErr | TxOK | RxOK | RxErr, |
1928 RxFIFOOver | TxErr | TxOK | RxOK | RxErr, |
1902 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, |
1929 .napi_event = RxFIFOOver | TxErr | TxOK | RxOK | RxOverflow, |
1903 .features = RTL_FEATURE_MSI |
1930 .features = RTL_FEATURE_MSI, |
|
1931 .default_ver = RTL_GIGA_MAC_VER_13, |
1904 } |
1932 } |
1905 }; |
1933 }; |
1906 |
1934 |
1907 /* Cfg9346_Unlock assumed. */ |
1935 /* Cfg9346_Unlock assumed. */ |
1908 static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, |
1936 static unsigned rtl_try_msi(struct pci_dev *pdev, void __iomem *ioaddr, |
1930 pci_disable_msi(pdev); |
1958 pci_disable_msi(pdev); |
1931 tp->features &= ~RTL_FEATURE_MSI; |
1959 tp->features &= ~RTL_FEATURE_MSI; |
1932 } |
1960 } |
1933 } |
1961 } |
1934 |
1962 |
|
1963 static const struct net_device_ops rtl8169_netdev_ops = { |
|
1964 .ndo_open = rtl8169_open, |
|
1965 .ndo_stop = rtl8169_close, |
|
1966 .ndo_get_stats = rtl8169_get_stats, |
|
1967 .ndo_start_xmit = rtl8169_start_xmit, |
|
1968 .ndo_tx_timeout = rtl8169_tx_timeout, |
|
1969 .ndo_validate_addr = eth_validate_addr, |
|
1970 .ndo_change_mtu = rtl8169_change_mtu, |
|
1971 .ndo_set_mac_address = rtl_set_mac_address, |
|
1972 .ndo_do_ioctl = rtl8169_ioctl, |
|
1973 .ndo_set_multicast_list = rtl_set_rx_mode, |
|
1974 #ifdef CONFIG_R8169_VLAN |
|
1975 .ndo_vlan_rx_register = rtl8169_vlan_rx_register, |
|
1976 #endif |
|
1977 #ifdef CONFIG_NET_POLL_CONTROLLER |
|
1978 .ndo_poll_controller = rtl8169_netpoll, |
|
1979 #endif |
|
1980 |
|
1981 }; |
|
1982 |
1935 static int __devinit |
1983 static int __devinit |
1936 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
1984 rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
1937 { |
1985 { |
1938 const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data; |
1986 const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data; |
1939 const unsigned int region = cfg->region; |
1987 const unsigned int region = cfg->region; |
2012 } |
2061 } |
2013 |
2062 |
2014 tp->cp_cmd = PCIMulRW | RxChkSum; |
2063 tp->cp_cmd = PCIMulRW | RxChkSum; |
2015 |
2064 |
2016 if ((sizeof(dma_addr_t) > 4) && |
2065 if ((sizeof(dma_addr_t) > 4) && |
2017 !pci_set_dma_mask(pdev, DMA_64BIT_MASK) && use_dac) { |
2066 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && use_dac) { |
2018 tp->cp_cmd |= PCIDAC; |
2067 tp->cp_cmd |= PCIDAC; |
2019 dev->features |= NETIF_F_HIGHDMA; |
2068 dev->features |= NETIF_F_HIGHDMA; |
2020 } else { |
2069 } else { |
2021 rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
2070 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
2022 if (rc < 0) { |
2071 if (rc < 0) { |
2023 if (netif_msg_probe(tp)) { |
2072 if (netif_msg_probe(tp)) { |
2024 dev_err(&pdev->dev, |
2073 dev_err(&pdev->dev, |
2025 "DMA configuration failed.\n"); |
2074 "DMA configuration failed.\n"); |
2026 } |
2075 } |
2027 goto err_out_free_res_4; |
2076 goto err_out_free_res_4; |
2028 } |
2077 } |
2029 } |
2078 } |
2030 |
2079 |
2031 pci_set_master(pdev); |
|
2032 |
|
2033 /* ioremap MMIO region */ |
2080 /* ioremap MMIO region */ |
2034 ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE); |
2081 ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE); |
2035 if (!ioaddr) { |
2082 if (!ioaddr) { |
2036 if (netif_msg_probe(tp)) |
2083 if (netif_msg_probe(tp)) |
2037 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); |
2084 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); |
2055 msleep_interruptible(1); |
2102 msleep_interruptible(1); |
2056 } |
2103 } |
2057 |
2104 |
2058 RTL_W16(IntrStatus, 0xffff); |
2105 RTL_W16(IntrStatus, 0xffff); |
2059 |
2106 |
|
2107 pci_set_master(pdev); |
|
2108 |
2060 /* Identify chip attached to board */ |
2109 /* Identify chip attached to board */ |
2061 rtl8169_get_mac_version(tp, ioaddr); |
2110 rtl8169_get_mac_version(tp, ioaddr); |
|
2111 |
|
2112 /* Use appropriate default if unknown */ |
|
2113 if (tp->mac_version == RTL_GIGA_MAC_NONE) { |
|
2114 if (netif_msg_probe(tp)) { |
|
2115 dev_notice(&pdev->dev, |
|
2116 "unknown MAC, using family default\n"); |
|
2117 } |
|
2118 tp->mac_version = cfg->default_ver; |
|
2119 } |
2062 |
2120 |
2063 rtl8169_print_mac_version(tp); |
2121 rtl8169_print_mac_version(tp); |
2064 |
2122 |
2065 for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) { |
2123 for (i = 0; i < ARRAY_SIZE(rtl_chip_info); i++) { |
2066 if (tp->mac_version == rtl_chip_info[i].mac_version) |
2124 if (tp->mac_version == rtl_chip_info[i].mac_version) |
2067 break; |
2125 break; |
2068 } |
2126 } |
2069 if (i == ARRAY_SIZE(rtl_chip_info)) { |
2127 if (i == ARRAY_SIZE(rtl_chip_info)) { |
2070 /* Unknown chip: assume array element #0, original RTL-8169 */ |
2128 dev_err(&pdev->dev, |
2071 if (netif_msg_probe(tp)) { |
2129 "driver bug, MAC version not found in rtl_chip_info\n"); |
2072 dev_printk(KERN_DEBUG, &pdev->dev, |
2130 goto err_out_msi_5; |
2073 "unknown chip version, assuming %s\n", |
|
2074 rtl_chip_info[0].name); |
|
2075 } |
|
2076 i = 0; |
|
2077 } |
2131 } |
2078 tp->chipset = i; |
2132 tp->chipset = i; |
2079 |
2133 |
2080 RTL_W8(Cfg9346, Cfg9346_Unlock); |
2134 RTL_W8(Cfg9346, Cfg9346_Unlock); |
2081 RTL_W8(Config1, RTL_R8(Config1) | PMEnable); |
2135 RTL_W8(Config1, RTL_R8(Config1) | PMEnable); |
2092 tp->set_speed = rtl8169_set_speed_tbi; |
2146 tp->set_speed = rtl8169_set_speed_tbi; |
2093 tp->get_settings = rtl8169_gset_tbi; |
2147 tp->get_settings = rtl8169_gset_tbi; |
2094 tp->phy_reset_enable = rtl8169_tbi_reset_enable; |
2148 tp->phy_reset_enable = rtl8169_tbi_reset_enable; |
2095 tp->phy_reset_pending = rtl8169_tbi_reset_pending; |
2149 tp->phy_reset_pending = rtl8169_tbi_reset_pending; |
2096 tp->link_ok = rtl8169_tbi_link_ok; |
2150 tp->link_ok = rtl8169_tbi_link_ok; |
|
2151 tp->do_ioctl = rtl_tbi_ioctl; |
2097 |
2152 |
2098 tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */ |
2153 tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */ |
2099 } else { |
2154 } else { |
2100 tp->set_speed = rtl8169_set_speed_xmii; |
2155 tp->set_speed = rtl8169_set_speed_xmii; |
2101 tp->get_settings = rtl8169_gset_xmii; |
2156 tp->get_settings = rtl8169_gset_xmii; |
2102 tp->phy_reset_enable = rtl8169_xmii_reset_enable; |
2157 tp->phy_reset_enable = rtl8169_xmii_reset_enable; |
2103 tp->phy_reset_pending = rtl8169_xmii_reset_pending; |
2158 tp->phy_reset_pending = rtl8169_xmii_reset_pending; |
2104 tp->link_ok = rtl8169_xmii_link_ok; |
2159 tp->link_ok = rtl8169_xmii_link_ok; |
2105 |
2160 tp->do_ioctl = rtl_xmii_ioctl; |
2106 dev->do_ioctl = rtl8169_ioctl; |
|
2107 } |
2161 } |
2108 |
2162 |
2109 spin_lock_init(&tp->lock); |
2163 spin_lock_init(&tp->lock); |
2110 |
2164 |
2111 tp->mmio_addr = ioaddr; |
2165 tp->mmio_addr = ioaddr; |
2113 /* Get MAC address */ |
2167 /* Get MAC address */ |
2114 for (i = 0; i < MAC_ADDR_LEN; i++) |
2168 for (i = 0; i < MAC_ADDR_LEN; i++) |
2115 dev->dev_addr[i] = RTL_R8(MAC0 + i); |
2169 dev->dev_addr[i] = RTL_R8(MAC0 + i); |
2116 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
2170 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
2117 |
2171 |
2118 dev->open = rtl8169_open; |
|
2119 dev->hard_start_xmit = rtl8169_start_xmit; |
|
2120 dev->get_stats = rtl8169_get_stats; |
|
2121 SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops); |
2172 SET_ETHTOOL_OPS(dev, &rtl8169_ethtool_ops); |
2122 dev->stop = rtl8169_close; |
|
2123 dev->tx_timeout = rtl8169_tx_timeout; |
|
2124 dev->set_multicast_list = rtl_set_rx_mode; |
|
2125 dev->watchdog_timeo = RTL8169_TX_TIMEOUT; |
2173 dev->watchdog_timeo = RTL8169_TX_TIMEOUT; |
2126 dev->irq = pdev->irq; |
2174 dev->irq = pdev->irq; |
2127 dev->base_addr = (unsigned long) ioaddr; |
2175 dev->base_addr = (unsigned long) ioaddr; |
2128 dev->change_mtu = rtl8169_change_mtu; |
|
2129 dev->set_mac_address = rtl_set_mac_address; |
|
2130 |
2176 |
2131 netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT); |
2177 netif_napi_add(dev, &tp->napi, rtl8169_poll, R8169_NAPI_WEIGHT); |
2132 |
2178 |
2133 #ifdef CONFIG_R8169_VLAN |
2179 #ifdef CONFIG_R8169_VLAN |
2134 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; |
2180 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; |
2135 dev->vlan_rx_register = rtl8169_vlan_rx_register; |
|
2136 #endif |
|
2137 |
|
2138 #ifdef CONFIG_NET_POLL_CONTROLLER |
|
2139 dev->poll_controller = rtl8169_netpoll; |
|
2140 #endif |
2181 #endif |
2141 |
2182 |
2142 tp->intr_mask = 0xffff; |
2183 tp->intr_mask = 0xffff; |
2143 tp->align = cfg->align; |
2184 tp->align = cfg->align; |
2144 tp->hw_start = cfg->hw_start; |
2185 tp->hw_start = cfg->hw_start; |
3592 struct rtl8169_private *tp = netdev_priv(dev); |
3622 struct rtl8169_private *tp = netdev_priv(dev); |
3593 void __iomem *ioaddr = tp->mmio_addr; |
3623 void __iomem *ioaddr = tp->mmio_addr; |
3594 int handled = 0; |
3624 int handled = 0; |
3595 int status; |
3625 int status; |
3596 |
3626 |
|
3627 /* loop handling interrupts until we have no new ones or |
|
3628 * we hit a invalid/hotplug case. |
|
3629 */ |
3597 status = RTL_R16(IntrStatus); |
3630 status = RTL_R16(IntrStatus); |
3598 |
3631 while (status && status != 0xffff) { |
3599 /* hotplug/major error/no more work/shared irq */ |
3632 handled = 1; |
3600 if ((status == 0xffff) || !status) |
3633 |
3601 goto out; |
3634 /* Handle all of the error cases first. These will reset |
3602 |
3635 * the chip, so just exit the loop. |
3603 handled = 1; |
3636 */ |
3604 |
3637 if (unlikely(!tp->ecdev && !netif_running(dev))) { |
3605 if (unlikely(!tp->ecdev && !netif_running(dev))) { |
3638 rtl8169_asic_down(ioaddr); |
3606 rtl8169_asic_down(ioaddr); |
3639 break; |
3607 goto out; |
|
3608 } |
|
3609 |
|
3610 status &= tp->intr_mask; |
|
3611 RTL_W16(IntrStatus, |
|
3612 (status & RxFIFOOver) ? (status | RxOverflow) : status); |
|
3613 |
|
3614 if (!(status & tp->intr_event)) |
|
3615 goto out; |
|
3616 |
|
3617 /* Work around for rx fifo overflow */ |
|
3618 if (unlikely(status & RxFIFOOver) && |
|
3619 (tp->mac_version == RTL_GIGA_MAC_VER_11)) { |
|
3620 netif_stop_queue(dev); |
|
3621 rtl8169_tx_timeout(dev); |
|
3622 goto out; |
|
3623 } |
|
3624 |
|
3625 if (unlikely(status & SYSErr)) { |
|
3626 rtl8169_pcierr_interrupt(dev); |
|
3627 goto out; |
|
3628 } |
|
3629 |
|
3630 if (status & LinkChg) |
|
3631 rtl8169_check_link_status(dev, tp, ioaddr); |
|
3632 |
|
3633 if (status & tp->napi_event) { |
|
3634 RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event); |
|
3635 tp->intr_mask = ~tp->napi_event; |
|
3636 |
|
3637 if (likely(netif_rx_schedule_prep(dev, &tp->napi))) |
|
3638 __netif_rx_schedule(dev, &tp->napi); |
|
3639 else if (netif_msg_intr(tp)) { |
|
3640 printk(KERN_INFO "%s: interrupt %04x in poll\n", |
|
3641 dev->name, status); |
|
3642 } |
3640 } |
3643 } |
3641 |
3644 out: |
3642 /* Work around for rx fifo overflow */ |
|
3643 if (unlikely(status & RxFIFOOver) && |
|
3644 (tp->mac_version == RTL_GIGA_MAC_VER_11)) { |
|
3645 netif_stop_queue(dev); |
|
3646 rtl8169_tx_timeout(dev); |
|
3647 break; |
|
3648 } |
|
3649 |
|
3650 if (unlikely(status & SYSErr)) { |
|
3651 rtl8169_pcierr_interrupt(dev); |
|
3652 break; |
|
3653 } |
|
3654 |
|
3655 if (status & LinkChg) |
|
3656 rtl8169_check_link_status(dev, tp, ioaddr); |
|
3657 |
|
3658 /* We need to see the lastest version of tp->intr_mask to |
|
3659 * avoid ignoring an MSI interrupt and having to wait for |
|
3660 * another event which may never come. |
|
3661 */ |
|
3662 smp_rmb(); |
|
3663 if (status & tp->intr_mask & tp->napi_event) { |
|
3664 RTL_W16(IntrMask, tp->intr_event & ~tp->napi_event); |
|
3665 tp->intr_mask = ~tp->napi_event; |
|
3666 |
|
3667 if (likely(napi_schedule_prep(&tp->napi))) |
|
3668 __napi_schedule(&tp->napi); |
|
3669 else if (netif_msg_intr(tp)) { |
|
3670 printk(KERN_INFO "%s: interrupt %04x in poll\n", |
|
3671 dev->name, status); |
|
3672 } |
|
3673 } |
|
3674 |
|
3675 /* We only get a new MSI interrupt when all active irq |
|
3676 * sources on the chip have been acknowledged. So, ack |
|
3677 * everything we've seen and check if new sources have become |
|
3678 * active to avoid blocking all interrupts from the chip. |
|
3679 */ |
|
3680 RTL_W16(IntrStatus, |
|
3681 (status & RxFIFOOver) ? (status | RxOverflow) : status); |
|
3682 status = RTL_R16(IntrStatus); |
|
3683 } |
|
3684 |
3645 return IRQ_RETVAL(handled); |
3685 return IRQ_RETVAL(handled); |
3646 } |
3686 } |
3647 |
3687 |
3648 static void ec_poll(struct net_device *dev) |
3688 static void ec_poll(struct net_device *dev) |
3649 { |
3689 { |
3669 |
3709 |
3670 work_done = rtl8169_rx_interrupt(dev, tp, ioaddr, (u32) budget); |
3710 work_done = rtl8169_rx_interrupt(dev, tp, ioaddr, (u32) budget); |
3671 rtl8169_tx_interrupt(dev, tp, ioaddr); |
3711 rtl8169_tx_interrupt(dev, tp, ioaddr); |
3672 |
3712 |
3673 if (work_done < budget) { |
3713 if (work_done < budget) { |
3674 netif_rx_complete(dev, napi); |
3714 napi_complete(napi); |
|
3715 |
|
3716 /* We need for force the visibility of tp->intr_mask |
|
3717 * for other CPUs, as we can loose an MSI interrupt |
|
3718 * and potentially wait for a retransmit timeout if we don't. |
|
3719 * The posted write to IntrMask is safe, as it will |
|
3720 * eventually make it to the chip and we won't loose anything |
|
3721 * until it does. |
|
3722 */ |
3675 tp->intr_mask = 0xffff; |
3723 tp->intr_mask = 0xffff; |
3676 /* |
|
3677 * 20040426: the barrier is not strictly required but the |
|
3678 * behavior of the irq handler could be less predictable |
|
3679 * without it. Btw, the lack of flush for the posted pci |
|
3680 * write is safe - FR |
|
3681 */ |
|
3682 smp_wmb(); |
3724 smp_wmb(); |
3683 RTL_W16(IntrMask, tp->intr_event); |
3725 RTL_W16(IntrMask, tp->intr_event); |
3684 } |
3726 } |
3685 |
3727 |
3686 return work_done; |
3728 return work_done; |
3847 } |
3892 } |
3848 |
3893 |
3849 return &dev->stats; |
3894 return &dev->stats; |
3850 } |
3895 } |
3851 |
3896 |
|
3897 static void rtl8169_net_suspend(struct net_device *dev) |
|
3898 { |
|
3899 if (!netif_running(dev)) |
|
3900 return; |
|
3901 |
|
3902 netif_device_detach(dev); |
|
3903 netif_stop_queue(dev); |
|
3904 } |
|
3905 |
3852 #ifdef CONFIG_PM |
3906 #ifdef CONFIG_PM |
3853 |
3907 |
3854 static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state) |
3908 static int rtl8169_suspend(struct device *device) |
3855 { |
3909 { |
|
3910 struct pci_dev *pdev = to_pci_dev(device); |
3856 struct net_device *dev = pci_get_drvdata(pdev); |
3911 struct net_device *dev = pci_get_drvdata(pdev); |
3857 struct rtl8169_private *tp = netdev_priv(dev); |
3912 struct rtl8169_private *tp = netdev_priv(dev); |
3858 void __iomem *ioaddr = tp->mmio_addr; |
3913 |
3859 |
3914 if (tp->ecdev) |
|
3915 return -EBUSY; |
|
3916 |
|
3917 rtl8169_net_suspend(dev); |
|
3918 |
|
3919 return 0; |
|
3920 } |
|
3921 |
|
3922 static int rtl8169_resume(struct device *device) |
|
3923 { |
|
3924 struct pci_dev *pdev = to_pci_dev(device); |
|
3925 struct net_device *dev = pci_get_drvdata(pdev); |
|
3926 struct rtl8169_private *tp = netdev_priv(dev); |
|
3927 |
3860 if (tp->ecdev) |
3928 if (tp->ecdev) |
3861 return -EBUSY; |
3929 return -EBUSY; |
3862 |
|
3863 if (!netif_running(dev)) |
|
3864 goto out_pci_suspend; |
|
3865 |
|
3866 netif_device_detach(dev); |
|
3867 netif_stop_queue(dev); |
|
3868 |
|
3869 spin_lock_irq(&tp->lock); |
|
3870 |
|
3871 rtl8169_asic_down(ioaddr); |
|
3872 |
|
3873 rtl8169_rx_missed(dev, ioaddr); |
|
3874 |
|
3875 spin_unlock_irq(&tp->lock); |
|
3876 |
|
3877 out_pci_suspend: |
|
3878 pci_save_state(pdev); |
|
3879 pci_enable_wake(pdev, pci_choose_state(pdev, state), |
|
3880 (tp->features & RTL_FEATURE_WOL) ? 1 : 0); |
|
3881 pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
|
3882 |
|
3883 return 0; |
|
3884 } |
|
3885 |
|
3886 static int rtl8169_resume(struct pci_dev *pdev) |
|
3887 { |
|
3888 struct net_device *dev = pci_get_drvdata(pdev); |
|
3889 struct rtl8169_private *tp = netdev_priv(dev); |
|
3890 |
|
3891 if (tp->ecdev) |
|
3892 return -EBUSY; |
|
3893 |
|
3894 pci_set_power_state(pdev, PCI_D0); |
|
3895 pci_restore_state(pdev); |
|
3896 pci_enable_wake(pdev, PCI_D0, 0); |
|
3897 |
3930 |
3898 if (!netif_running(dev)) |
3931 if (!netif_running(dev)) |
3899 goto out; |
3932 goto out; |
3900 |
3933 |
3901 netif_device_attach(dev); |
3934 netif_device_attach(dev); |
3903 rtl8169_schedule_work(dev, rtl8169_reset_task); |
3936 rtl8169_schedule_work(dev, rtl8169_reset_task); |
3904 out: |
3937 out: |
3905 return 0; |
3938 return 0; |
3906 } |
3939 } |
3907 |
3940 |
|
3941 static struct dev_pm_ops rtl8169_pm_ops = { |
|
3942 .suspend = rtl8169_suspend, |
|
3943 .resume = rtl8169_resume, |
|
3944 .freeze = rtl8169_suspend, |
|
3945 .thaw = rtl8169_resume, |
|
3946 .poweroff = rtl8169_suspend, |
|
3947 .restore = rtl8169_resume, |
|
3948 }; |
|
3949 |
|
3950 #define RTL8169_PM_OPS (&rtl8169_pm_ops) |
|
3951 |
|
3952 #else /* !CONFIG_PM */ |
|
3953 |
|
3954 #define RTL8169_PM_OPS NULL |
|
3955 |
|
3956 #endif /* !CONFIG_PM */ |
|
3957 |
3908 static void rtl_shutdown(struct pci_dev *pdev) |
3958 static void rtl_shutdown(struct pci_dev *pdev) |
3909 { |
3959 { |
3910 rtl8169_suspend(pdev, PMSG_SUSPEND); |
3960 struct net_device *dev = pci_get_drvdata(pdev); |
3911 } |
3961 struct rtl8169_private *tp = netdev_priv(dev); |
3912 |
3962 void __iomem *ioaddr = tp->mmio_addr; |
3913 #endif /* CONFIG_PM */ |
3963 |
|
3964 rtl8169_net_suspend(dev); |
|
3965 |
|
3966 spin_lock_irq(&tp->lock); |
|
3967 |
|
3968 rtl8169_asic_down(ioaddr); |
|
3969 |
|
3970 spin_unlock_irq(&tp->lock); |
|
3971 |
|
3972 if (system_state == SYSTEM_POWER_OFF) { |
|
3973 /* WoL fails with some 8168 when the receiver is disabled. */ |
|
3974 if (tp->features & RTL_FEATURE_WOL) { |
|
3975 pci_clear_master(pdev); |
|
3976 |
|
3977 RTL_W8(ChipCmd, CmdRxEnb); |
|
3978 /* PCI commit */ |
|
3979 RTL_R8(ChipCmd); |
|
3980 } |
|
3981 |
|
3982 pci_wake_from_d3(pdev, true); |
|
3983 pci_set_power_state(pdev, PCI_D3hot); |
|
3984 } |
|
3985 } |
3914 |
3986 |
3915 static struct pci_driver rtl8169_pci_driver = { |
3987 static struct pci_driver rtl8169_pci_driver = { |
3916 .name = MODULENAME, |
3988 .name = MODULENAME, |
3917 .id_table = rtl8169_pci_tbl, |
3989 .id_table = rtl8169_pci_tbl, |
3918 .probe = rtl8169_init_one, |
3990 .probe = rtl8169_init_one, |
3919 .remove = __devexit_p(rtl8169_remove_one), |
3991 .remove = __devexit_p(rtl8169_remove_one), |
3920 #ifdef CONFIG_PM |
|
3921 .suspend = rtl8169_suspend, |
|
3922 .resume = rtl8169_resume, |
|
3923 .shutdown = rtl_shutdown, |
3992 .shutdown = rtl_shutdown, |
3924 #endif |
3993 .driver.pm = RTL8169_PM_OPS, |
3925 }; |
3994 }; |
3926 |
3995 |
3927 static int __init rtl8169_init_module(void) |
3996 static int __init rtl8169_init_module(void) |
3928 { |
3997 { |
3929 return pci_register_driver(&rtl8169_pci_driver); |
3998 return pci_register_driver(&rtl8169_pci_driver); |