devices/e1000e/netdev-3.16-orig.c
branchstable-1.5
changeset 2588 792892ab4806
equal deleted inserted replaced
2587:afd76ee3aa87 2588:792892ab4806
       
     1 /* Intel PRO/1000 Linux driver
       
     2  * Copyright(c) 1999 - 2014 Intel Corporation.
       
     3  *
       
     4  * This program is free software; you can redistribute it and/or modify it
       
     5  * under the terms and conditions of the GNU General Public License,
       
     6  * version 2, as published by the Free Software Foundation.
       
     7  *
       
     8  * This program is distributed in the hope it will be useful, but WITHOUT
       
     9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
       
    10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
       
    11  * more details.
       
    12  *
       
    13  * The full GNU General Public License is included in this distribution in
       
    14  * the file called "COPYING".
       
    15  *
       
    16  * Contact Information:
       
    17  * Linux NICS <linux.nics@intel.com>
       
    18  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
       
    19  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
       
    20  */
       
    21 
       
    22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
       
    23 
       
    24 #include <linux/module.h>
       
    25 #include <linux/types.h>
       
    26 #include <linux/init.h>
       
    27 #include <linux/pci.h>
       
    28 #include <linux/vmalloc.h>
       
    29 #include <linux/pagemap.h>
       
    30 #include <linux/delay.h>
       
    31 #include <linux/netdevice.h>
       
    32 #include <linux/interrupt.h>
       
    33 #include <linux/tcp.h>
       
    34 #include <linux/ipv6.h>
       
    35 #include <linux/slab.h>
       
    36 #include <net/checksum.h>
       
    37 #include <net/ip6_checksum.h>
       
    38 #include <linux/ethtool.h>
       
    39 #include <linux/if_vlan.h>
       
    40 #include <linux/cpu.h>
       
    41 #include <linux/smp.h>
       
    42 #include <linux/pm_qos.h>
       
    43 #include <linux/pm_runtime.h>
       
    44 #include <linux/aer.h>
       
    45 #include <linux/prefetch.h>
       
    46 
       
    47 #include "e1000.h"
       
    48 
       
    49 #define DRV_EXTRAVERSION "-k"
       
    50 
       
    51 #define DRV_VERSION "2.3.2" DRV_EXTRAVERSION
       
    52 char e1000e_driver_name[] = "e1000e";
       
    53 const char e1000e_driver_version[] = DRV_VERSION;
       
    54 
       
    55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
       
    56 static int debug = -1;
       
    57 module_param(debug, int, 0);
       
    58 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
       
    59 
       
    60 static const struct e1000_info *e1000_info_tbl[] = {
       
    61 	[board_82571]		= &e1000_82571_info,
       
    62 	[board_82572]		= &e1000_82572_info,
       
    63 	[board_82573]		= &e1000_82573_info,
       
    64 	[board_82574]		= &e1000_82574_info,
       
    65 	[board_82583]		= &e1000_82583_info,
       
    66 	[board_80003es2lan]	= &e1000_es2_info,
       
    67 	[board_ich8lan]		= &e1000_ich8_info,
       
    68 	[board_ich9lan]		= &e1000_ich9_info,
       
    69 	[board_ich10lan]	= &e1000_ich10_info,
       
    70 	[board_pchlan]		= &e1000_pch_info,
       
    71 	[board_pch2lan]		= &e1000_pch2_info,
       
    72 	[board_pch_lpt]		= &e1000_pch_lpt_info,
       
    73 };
       
    74 
       
    75 struct e1000_reg_info {
       
    76 	u32 ofs;
       
    77 	char *name;
       
    78 };
       
    79 
       
    80 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
       
    81 	/* General Registers */
       
    82 	{E1000_CTRL, "CTRL"},
       
    83 	{E1000_STATUS, "STATUS"},
       
    84 	{E1000_CTRL_EXT, "CTRL_EXT"},
       
    85 
       
    86 	/* Interrupt Registers */
       
    87 	{E1000_ICR, "ICR"},
       
    88 
       
    89 	/* Rx Registers */
       
    90 	{E1000_RCTL, "RCTL"},
       
    91 	{E1000_RDLEN(0), "RDLEN"},
       
    92 	{E1000_RDH(0), "RDH"},
       
    93 	{E1000_RDT(0), "RDT"},
       
    94 	{E1000_RDTR, "RDTR"},
       
    95 	{E1000_RXDCTL(0), "RXDCTL"},
       
    96 	{E1000_ERT, "ERT"},
       
    97 	{E1000_RDBAL(0), "RDBAL"},
       
    98 	{E1000_RDBAH(0), "RDBAH"},
       
    99 	{E1000_RDFH, "RDFH"},
       
   100 	{E1000_RDFT, "RDFT"},
       
   101 	{E1000_RDFHS, "RDFHS"},
       
   102 	{E1000_RDFTS, "RDFTS"},
       
   103 	{E1000_RDFPC, "RDFPC"},
       
   104 
       
   105 	/* Tx Registers */
       
   106 	{E1000_TCTL, "TCTL"},
       
   107 	{E1000_TDBAL(0), "TDBAL"},
       
   108 	{E1000_TDBAH(0), "TDBAH"},
       
   109 	{E1000_TDLEN(0), "TDLEN"},
       
   110 	{E1000_TDH(0), "TDH"},
       
   111 	{E1000_TDT(0), "TDT"},
       
   112 	{E1000_TIDV, "TIDV"},
       
   113 	{E1000_TXDCTL(0), "TXDCTL"},
       
   114 	{E1000_TADV, "TADV"},
       
   115 	{E1000_TARC(0), "TARC"},
       
   116 	{E1000_TDFH, "TDFH"},
       
   117 	{E1000_TDFT, "TDFT"},
       
   118 	{E1000_TDFHS, "TDFHS"},
       
   119 	{E1000_TDFTS, "TDFTS"},
       
   120 	{E1000_TDFPC, "TDFPC"},
       
   121 
       
   122 	/* List Terminator */
       
   123 	{0, NULL}
       
   124 };
       
   125 
       
   126 /**
       
   127  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
       
   128  * @hw: pointer to the HW structure
       
   129  *
       
   130  * When updating the MAC CSR registers, the Manageability Engine (ME) could
       
   131  * be accessing the registers at the same time.  Normally, this is handled in
       
   132  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
       
   133  * accesses later than it should which could result in the register to have
       
   134  * an incorrect value.  Workaround this by checking the FWSM register which
       
   135  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
       
   136  * and try again a number of times.
       
   137  **/
       
   138 s32 __ew32_prepare(struct e1000_hw *hw)
       
   139 {
       
   140 	s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
       
   141 
       
   142 	while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
       
   143 		udelay(50);
       
   144 
       
   145 	return i;
       
   146 }
       
   147 
       
   148 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
       
   149 {
       
   150 	if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
       
   151 		__ew32_prepare(hw);
       
   152 
       
   153 	writel(val, hw->hw_addr + reg);
       
   154 }
       
   155 
       
   156 /**
       
   157  * e1000_regdump - register printout routine
       
   158  * @hw: pointer to the HW structure
       
   159  * @reginfo: pointer to the register info table
       
   160  **/
       
   161 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
       
   162 {
       
   163 	int n = 0;
       
   164 	char rname[16];
       
   165 	u32 regs[8];
       
   166 
       
   167 	switch (reginfo->ofs) {
       
   168 	case E1000_RXDCTL(0):
       
   169 		for (n = 0; n < 2; n++)
       
   170 			regs[n] = __er32(hw, E1000_RXDCTL(n));
       
   171 		break;
       
   172 	case E1000_TXDCTL(0):
       
   173 		for (n = 0; n < 2; n++)
       
   174 			regs[n] = __er32(hw, E1000_TXDCTL(n));
       
   175 		break;
       
   176 	case E1000_TARC(0):
       
   177 		for (n = 0; n < 2; n++)
       
   178 			regs[n] = __er32(hw, E1000_TARC(n));
       
   179 		break;
       
   180 	default:
       
   181 		pr_info("%-15s %08x\n",
       
   182 			reginfo->name, __er32(hw, reginfo->ofs));
       
   183 		return;
       
   184 	}
       
   185 
       
   186 	snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
       
   187 	pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
       
   188 }
       
   189 
       
   190 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
       
   191 				 struct e1000_buffer *bi)
       
   192 {
       
   193 	int i;
       
   194 	struct e1000_ps_page *ps_page;
       
   195 
       
   196 	for (i = 0; i < adapter->rx_ps_pages; i++) {
       
   197 		ps_page = &bi->ps_pages[i];
       
   198 
       
   199 		if (ps_page->page) {
       
   200 			pr_info("packet dump for ps_page %d:\n", i);
       
   201 			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
       
   202 				       16, 1, page_address(ps_page->page),
       
   203 				       PAGE_SIZE, true);
       
   204 		}
       
   205 	}
       
   206 }
       
   207 
       
   208 /**
       
   209  * e1000e_dump - Print registers, Tx-ring and Rx-ring
       
   210  * @adapter: board private structure
       
   211  **/
       
   212 static void e1000e_dump(struct e1000_adapter *adapter)
       
   213 {
       
   214 	struct net_device *netdev = adapter->netdev;
       
   215 	struct e1000_hw *hw = &adapter->hw;
       
   216 	struct e1000_reg_info *reginfo;
       
   217 	struct e1000_ring *tx_ring = adapter->tx_ring;
       
   218 	struct e1000_tx_desc *tx_desc;
       
   219 	struct my_u0 {
       
   220 		__le64 a;
       
   221 		__le64 b;
       
   222 	} *u0;
       
   223 	struct e1000_buffer *buffer_info;
       
   224 	struct e1000_ring *rx_ring = adapter->rx_ring;
       
   225 	union e1000_rx_desc_packet_split *rx_desc_ps;
       
   226 	union e1000_rx_desc_extended *rx_desc;
       
   227 	struct my_u1 {
       
   228 		__le64 a;
       
   229 		__le64 b;
       
   230 		__le64 c;
       
   231 		__le64 d;
       
   232 	} *u1;
       
   233 	u32 staterr;
       
   234 	int i = 0;
       
   235 
       
   236 	if (!netif_msg_hw(adapter))
       
   237 		return;
       
   238 
       
   239 	/* Print netdevice Info */
       
   240 	if (netdev) {
       
   241 		dev_info(&adapter->pdev->dev, "Net device Info\n");
       
   242 		pr_info("Device Name     state            trans_start      last_rx\n");
       
   243 		pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
       
   244 			netdev->state, netdev->trans_start, netdev->last_rx);
       
   245 	}
       
   246 
       
   247 	/* Print Registers */
       
   248 	dev_info(&adapter->pdev->dev, "Register Dump\n");
       
   249 	pr_info(" Register Name   Value\n");
       
   250 	for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
       
   251 	     reginfo->name; reginfo++) {
       
   252 		e1000_regdump(hw, reginfo);
       
   253 	}
       
   254 
       
   255 	/* Print Tx Ring Summary */
       
   256 	if (!netdev || !netif_running(netdev))
       
   257 		return;
       
   258 
       
   259 	dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
       
   260 	pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
       
   261 	buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
       
   262 	pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
       
   263 		0, tx_ring->next_to_use, tx_ring->next_to_clean,
       
   264 		(unsigned long long)buffer_info->dma,
       
   265 		buffer_info->length,
       
   266 		buffer_info->next_to_watch,
       
   267 		(unsigned long long)buffer_info->time_stamp);
       
   268 
       
   269 	/* Print Tx Ring */
       
   270 	if (!netif_msg_tx_done(adapter))
       
   271 		goto rx_ring_summary;
       
   272 
       
   273 	dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
       
   274 
       
   275 	/* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
       
   276 	 *
       
   277 	 * Legacy Transmit Descriptor
       
   278 	 *   +--------------------------------------------------------------+
       
   279 	 * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
       
   280 	 *   +--------------------------------------------------------------+
       
   281 	 * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
       
   282 	 *   +--------------------------------------------------------------+
       
   283 	 *   63       48 47        36 35    32 31     24 23    16 15        0
       
   284 	 *
       
   285 	 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
       
   286 	 *   63      48 47    40 39       32 31             16 15    8 7      0
       
   287 	 *   +----------------------------------------------------------------+
       
   288 	 * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
       
   289 	 *   +----------------------------------------------------------------+
       
   290 	 * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
       
   291 	 *   +----------------------------------------------------------------+
       
   292 	 *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
       
   293 	 *
       
   294 	 * Extended Data Descriptor (DTYP=0x1)
       
   295 	 *   +----------------------------------------------------------------+
       
   296 	 * 0 |                     Buffer Address [63:0]                      |
       
   297 	 *   +----------------------------------------------------------------+
       
   298 	 * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
       
   299 	 *   +----------------------------------------------------------------+
       
   300 	 *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
       
   301 	 */
       
   302 	pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
       
   303 	pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
       
   304 	pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
       
   305 	for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
       
   306 		const char *next_desc;
       
   307 		tx_desc = E1000_TX_DESC(*tx_ring, i);
       
   308 		buffer_info = &tx_ring->buffer_info[i];
       
   309 		u0 = (struct my_u0 *)tx_desc;
       
   310 		if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
       
   311 			next_desc = " NTC/U";
       
   312 		else if (i == tx_ring->next_to_use)
       
   313 			next_desc = " NTU";
       
   314 		else if (i == tx_ring->next_to_clean)
       
   315 			next_desc = " NTC";
       
   316 		else
       
   317 			next_desc = "";
       
   318 		pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
       
   319 			(!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
       
   320 			 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
       
   321 			i,
       
   322 			(unsigned long long)le64_to_cpu(u0->a),
       
   323 			(unsigned long long)le64_to_cpu(u0->b),
       
   324 			(unsigned long long)buffer_info->dma,
       
   325 			buffer_info->length, buffer_info->next_to_watch,
       
   326 			(unsigned long long)buffer_info->time_stamp,
       
   327 			buffer_info->skb, next_desc);
       
   328 
       
   329 		if (netif_msg_pktdata(adapter) && buffer_info->skb)
       
   330 			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
       
   331 				       16, 1, buffer_info->skb->data,
       
   332 				       buffer_info->skb->len, true);
       
   333 	}
       
   334 
       
   335 	/* Print Rx Ring Summary */
       
   336 rx_ring_summary:
       
   337 	dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
       
   338 	pr_info("Queue [NTU] [NTC]\n");
       
   339 	pr_info(" %5d %5X %5X\n",
       
   340 		0, rx_ring->next_to_use, rx_ring->next_to_clean);
       
   341 
       
   342 	/* Print Rx Ring */
       
   343 	if (!netif_msg_rx_status(adapter))
       
   344 		return;
       
   345 
       
   346 	dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
       
   347 	switch (adapter->rx_ps_pages) {
       
   348 	case 1:
       
   349 	case 2:
       
   350 	case 3:
       
   351 		/* [Extended] Packet Split Receive Descriptor Format
       
   352 		 *
       
   353 		 *    +-----------------------------------------------------+
       
   354 		 *  0 |                Buffer Address 0 [63:0]              |
       
   355 		 *    +-----------------------------------------------------+
       
   356 		 *  8 |                Buffer Address 1 [63:0]              |
       
   357 		 *    +-----------------------------------------------------+
       
   358 		 * 16 |                Buffer Address 2 [63:0]              |
       
   359 		 *    +-----------------------------------------------------+
       
   360 		 * 24 |                Buffer Address 3 [63:0]              |
       
   361 		 *    +-----------------------------------------------------+
       
   362 		 */
       
   363 		pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
       
   364 		/* [Extended] Receive Descriptor (Write-Back) Format
       
   365 		 *
       
   366 		 *   63       48 47    32 31     13 12    8 7    4 3        0
       
   367 		 *   +------------------------------------------------------+
       
   368 		 * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
       
   369 		 *   | Checksum | Ident  |         | Queue |      |  Type   |
       
   370 		 *   +------------------------------------------------------+
       
   371 		 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
       
   372 		 *   +------------------------------------------------------+
       
   373 		 *   63       48 47    32 31            20 19               0
       
   374 		 */
       
   375 		pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
       
   376 		for (i = 0; i < rx_ring->count; i++) {
       
   377 			const char *next_desc;
       
   378 			buffer_info = &rx_ring->buffer_info[i];
       
   379 			rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
       
   380 			u1 = (struct my_u1 *)rx_desc_ps;
       
   381 			staterr =
       
   382 			    le32_to_cpu(rx_desc_ps->wb.middle.status_error);
       
   383 
       
   384 			if (i == rx_ring->next_to_use)
       
   385 				next_desc = " NTU";
       
   386 			else if (i == rx_ring->next_to_clean)
       
   387 				next_desc = " NTC";
       
   388 			else
       
   389 				next_desc = "";
       
   390 
       
   391 			if (staterr & E1000_RXD_STAT_DD) {
       
   392 				/* Descriptor Done */
       
   393 				pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
       
   394 					"RWB", i,
       
   395 					(unsigned long long)le64_to_cpu(u1->a),
       
   396 					(unsigned long long)le64_to_cpu(u1->b),
       
   397 					(unsigned long long)le64_to_cpu(u1->c),
       
   398 					(unsigned long long)le64_to_cpu(u1->d),
       
   399 					buffer_info->skb, next_desc);
       
   400 			} else {
       
   401 				pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
       
   402 					"R  ", i,
       
   403 					(unsigned long long)le64_to_cpu(u1->a),
       
   404 					(unsigned long long)le64_to_cpu(u1->b),
       
   405 					(unsigned long long)le64_to_cpu(u1->c),
       
   406 					(unsigned long long)le64_to_cpu(u1->d),
       
   407 					(unsigned long long)buffer_info->dma,
       
   408 					buffer_info->skb, next_desc);
       
   409 
       
   410 				if (netif_msg_pktdata(adapter))
       
   411 					e1000e_dump_ps_pages(adapter,
       
   412 							     buffer_info);
       
   413 			}
       
   414 		}
       
   415 		break;
       
   416 	default:
       
   417 	case 0:
       
   418 		/* Extended Receive Descriptor (Read) Format
       
   419 		 *
       
   420 		 *   +-----------------------------------------------------+
       
   421 		 * 0 |                Buffer Address [63:0]                |
       
   422 		 *   +-----------------------------------------------------+
       
   423 		 * 8 |                      Reserved                       |
       
   424 		 *   +-----------------------------------------------------+
       
   425 		 */
       
   426 		pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
       
   427 		/* Extended Receive Descriptor (Write-Back) Format
       
   428 		 *
       
   429 		 *   63       48 47    32 31    24 23            4 3        0
       
   430 		 *   +------------------------------------------------------+
       
   431 		 *   |     RSS Hash      |        |               |         |
       
   432 		 * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
       
   433 		 *   | Packet   | IP     |        |               |  Type   |
       
   434 		 *   | Checksum | Ident  |        |               |         |
       
   435 		 *   +------------------------------------------------------+
       
   436 		 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
       
   437 		 *   +------------------------------------------------------+
       
   438 		 *   63       48 47    32 31            20 19               0
       
   439 		 */
       
   440 		pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
       
   441 
       
   442 		for (i = 0; i < rx_ring->count; i++) {
       
   443 			const char *next_desc;
       
   444 
       
   445 			buffer_info = &rx_ring->buffer_info[i];
       
   446 			rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
       
   447 			u1 = (struct my_u1 *)rx_desc;
       
   448 			staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
       
   449 
       
   450 			if (i == rx_ring->next_to_use)
       
   451 				next_desc = " NTU";
       
   452 			else if (i == rx_ring->next_to_clean)
       
   453 				next_desc = " NTC";
       
   454 			else
       
   455 				next_desc = "";
       
   456 
       
   457 			if (staterr & E1000_RXD_STAT_DD) {
       
   458 				/* Descriptor Done */
       
   459 				pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
       
   460 					"RWB", i,
       
   461 					(unsigned long long)le64_to_cpu(u1->a),
       
   462 					(unsigned long long)le64_to_cpu(u1->b),
       
   463 					buffer_info->skb, next_desc);
       
   464 			} else {
       
   465 				pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
       
   466 					"R  ", i,
       
   467 					(unsigned long long)le64_to_cpu(u1->a),
       
   468 					(unsigned long long)le64_to_cpu(u1->b),
       
   469 					(unsigned long long)buffer_info->dma,
       
   470 					buffer_info->skb, next_desc);
       
   471 
       
   472 				if (netif_msg_pktdata(adapter) &&
       
   473 				    buffer_info->skb)
       
   474 					print_hex_dump(KERN_INFO, "",
       
   475 						       DUMP_PREFIX_ADDRESS, 16,
       
   476 						       1,
       
   477 						       buffer_info->skb->data,
       
   478 						       adapter->rx_buffer_len,
       
   479 						       true);
       
   480 			}
       
   481 		}
       
   482 	}
       
   483 }
       
   484 
       
   485 /**
       
   486  * e1000_desc_unused - calculate if we have unused descriptors
       
   487  **/
       
   488 static int e1000_desc_unused(struct e1000_ring *ring)
       
   489 {
       
   490 	if (ring->next_to_clean > ring->next_to_use)
       
   491 		return ring->next_to_clean - ring->next_to_use - 1;
       
   492 
       
   493 	return ring->count + ring->next_to_clean - ring->next_to_use - 1;
       
   494 }
       
   495 
       
   496 /**
       
   497  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
       
   498  * @adapter: board private structure
       
   499  * @hwtstamps: time stamp structure to update
       
   500  * @systim: unsigned 64bit system time value.
       
   501  *
       
   502  * Convert the system time value stored in the RX/TXSTMP registers into a
       
   503  * hwtstamp which can be used by the upper level time stamping functions.
       
   504  *
       
   505  * The 'systim_lock' spinlock is used to protect the consistency of the
       
   506  * system time value. This is needed because reading the 64 bit time
       
   507  * value involves reading two 32 bit registers. The first read latches the
       
   508  * value.
       
   509  **/
       
   510 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
       
   511 				      struct skb_shared_hwtstamps *hwtstamps,
       
   512 				      u64 systim)
       
   513 {
       
   514 	u64 ns;
       
   515 	unsigned long flags;
       
   516 
       
   517 	spin_lock_irqsave(&adapter->systim_lock, flags);
       
   518 	ns = timecounter_cyc2time(&adapter->tc, systim);
       
   519 	spin_unlock_irqrestore(&adapter->systim_lock, flags);
       
   520 
       
   521 	memset(hwtstamps, 0, sizeof(*hwtstamps));
       
   522 	hwtstamps->hwtstamp = ns_to_ktime(ns);
       
   523 }
       
   524 
       
   525 /**
       
   526  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
       
   527  * @adapter: board private structure
       
   528  * @status: descriptor extended error and status field
       
   529  * @skb: particular skb to include time stamp
       
   530  *
       
   531  * If the time stamp is valid, convert it into the timecounter ns value
       
   532  * and store that result into the shhwtstamps structure which is passed
       
   533  * up the network stack.
       
   534  **/
       
   535 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
       
   536 			       struct sk_buff *skb)
       
   537 {
       
   538 	struct e1000_hw *hw = &adapter->hw;
       
   539 	u64 rxstmp;
       
   540 
       
   541 	if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
       
   542 	    !(status & E1000_RXDEXT_STATERR_TST) ||
       
   543 	    !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
       
   544 		return;
       
   545 
       
   546 	/* The Rx time stamp registers contain the time stamp.  No other
       
   547 	 * received packet will be time stamped until the Rx time stamp
       
   548 	 * registers are read.  Because only one packet can be time stamped
       
   549 	 * at a time, the register values must belong to this packet and
       
   550 	 * therefore none of the other additional attributes need to be
       
   551 	 * compared.
       
   552 	 */
       
   553 	rxstmp = (u64)er32(RXSTMPL);
       
   554 	rxstmp |= (u64)er32(RXSTMPH) << 32;
       
   555 	e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
       
   556 
       
   557 	adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
       
   558 }
       
   559 
       
   560 /**
       
   561  * e1000_receive_skb - helper function to handle Rx indications
       
   562  * @adapter: board private structure
       
   563  * @staterr: descriptor extended error and status field as written by hardware
       
   564  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
       
   565  * @skb: pointer to sk_buff to be indicated to stack
       
   566  **/
       
   567 static void e1000_receive_skb(struct e1000_adapter *adapter,
       
   568 			      struct net_device *netdev, struct sk_buff *skb,
       
   569 			      u32 staterr, __le16 vlan)
       
   570 {
       
   571 	u16 tag = le16_to_cpu(vlan);
       
   572 
       
   573 	e1000e_rx_hwtstamp(adapter, staterr, skb);
       
   574 
       
   575 	skb->protocol = eth_type_trans(skb, netdev);
       
   576 
       
   577 	if (staterr & E1000_RXD_STAT_VP)
       
   578 		__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
       
   579 
       
   580 	napi_gro_receive(&adapter->napi, skb);
       
   581 }
       
   582 
       
   583 /**
       
   584  * e1000_rx_checksum - Receive Checksum Offload
       
   585  * @adapter: board private structure
       
   586  * @status_err: receive descriptor status and error fields
       
   587  * @csum: receive descriptor csum field
       
   588  * @sk_buff: socket buffer with received data
       
   589  **/
       
   590 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
       
   591 			      struct sk_buff *skb)
       
   592 {
       
   593 	u16 status = (u16)status_err;
       
   594 	u8 errors = (u8)(status_err >> 24);
       
   595 
       
   596 	skb_checksum_none_assert(skb);
       
   597 
       
   598 	/* Rx checksum disabled */
       
   599 	if (!(adapter->netdev->features & NETIF_F_RXCSUM))
       
   600 		return;
       
   601 
       
   602 	/* Ignore Checksum bit is set */
       
   603 	if (status & E1000_RXD_STAT_IXSM)
       
   604 		return;
       
   605 
       
   606 	/* TCP/UDP checksum error bit or IP checksum error bit is set */
       
   607 	if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
       
   608 		/* let the stack verify checksum errors */
       
   609 		adapter->hw_csum_err++;
       
   610 		return;
       
   611 	}
       
   612 
       
   613 	/* TCP/UDP Checksum has not been calculated */
       
   614 	if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
       
   615 		return;
       
   616 
       
   617 	/* It must be a TCP or UDP packet with a valid checksum */
       
   618 	skb->ip_summed = CHECKSUM_UNNECESSARY;
       
   619 	adapter->hw_csum_good++;
       
   620 }
       
   621 
       
   622 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
       
   623 {
       
   624 	struct e1000_adapter *adapter = rx_ring->adapter;
       
   625 	struct e1000_hw *hw = &adapter->hw;
       
   626 	s32 ret_val = __ew32_prepare(hw);
       
   627 
       
   628 	writel(i, rx_ring->tail);
       
   629 
       
   630 	if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
       
   631 		u32 rctl = er32(RCTL);
       
   632 
       
   633 		ew32(RCTL, rctl & ~E1000_RCTL_EN);
       
   634 		e_err("ME firmware caused invalid RDT - resetting\n");
       
   635 		schedule_work(&adapter->reset_task);
       
   636 	}
       
   637 }
       
   638 
       
   639 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
       
   640 {
       
   641 	struct e1000_adapter *adapter = tx_ring->adapter;
       
   642 	struct e1000_hw *hw = &adapter->hw;
       
   643 	s32 ret_val = __ew32_prepare(hw);
       
   644 
       
   645 	writel(i, tx_ring->tail);
       
   646 
       
   647 	if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
       
   648 		u32 tctl = er32(TCTL);
       
   649 
       
   650 		ew32(TCTL, tctl & ~E1000_TCTL_EN);
       
   651 		e_err("ME firmware caused invalid TDT - resetting\n");
       
   652 		schedule_work(&adapter->reset_task);
       
   653 	}
       
   654 }
       
   655 
       
   656 /**
       
   657  * e1000_alloc_rx_buffers - Replace used receive buffers
       
   658  * @rx_ring: Rx descriptor ring
       
   659  **/
       
   660 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
       
   661 				   int cleaned_count, gfp_t gfp)
       
   662 {
       
   663 	struct e1000_adapter *adapter = rx_ring->adapter;
       
   664 	struct net_device *netdev = adapter->netdev;
       
   665 	struct pci_dev *pdev = adapter->pdev;
       
   666 	union e1000_rx_desc_extended *rx_desc;
       
   667 	struct e1000_buffer *buffer_info;
       
   668 	struct sk_buff *skb;
       
   669 	unsigned int i;
       
   670 	unsigned int bufsz = adapter->rx_buffer_len;
       
   671 
       
   672 	i = rx_ring->next_to_use;
       
   673 	buffer_info = &rx_ring->buffer_info[i];
       
   674 
       
   675 	while (cleaned_count--) {
       
   676 		skb = buffer_info->skb;
       
   677 		if (skb) {
       
   678 			skb_trim(skb, 0);
       
   679 			goto map_skb;
       
   680 		}
       
   681 
       
   682 		skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
       
   683 		if (!skb) {
       
   684 			/* Better luck next round */
       
   685 			adapter->alloc_rx_buff_failed++;
       
   686 			break;
       
   687 		}
       
   688 
       
   689 		buffer_info->skb = skb;
       
   690 map_skb:
       
   691 		buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
       
   692 						  adapter->rx_buffer_len,
       
   693 						  DMA_FROM_DEVICE);
       
   694 		if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
       
   695 			dev_err(&pdev->dev, "Rx DMA map failed\n");
       
   696 			adapter->rx_dma_failed++;
       
   697 			break;
       
   698 		}
       
   699 
       
   700 		rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
       
   701 		rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
       
   702 
       
   703 		if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
       
   704 			/* Force memory writes to complete before letting h/w
       
   705 			 * know there are new descriptors to fetch.  (Only
       
   706 			 * applicable for weak-ordered memory model archs,
       
   707 			 * such as IA-64).
       
   708 			 */
       
   709 			wmb();
       
   710 			if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
       
   711 				e1000e_update_rdt_wa(rx_ring, i);
       
   712 			else
       
   713 				writel(i, rx_ring->tail);
       
   714 		}
       
   715 		i++;
       
   716 		if (i == rx_ring->count)
       
   717 			i = 0;
       
   718 		buffer_info = &rx_ring->buffer_info[i];
       
   719 	}
       
   720 
       
   721 	rx_ring->next_to_use = i;
       
   722 }
       
   723 
       
   724 /**
       
   725  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
       
   726  * @rx_ring: Rx descriptor ring
       
   727  **/
       
   728 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
       
   729 				      int cleaned_count, gfp_t gfp)
       
   730 {
       
   731 	struct e1000_adapter *adapter = rx_ring->adapter;
       
   732 	struct net_device *netdev = adapter->netdev;
       
   733 	struct pci_dev *pdev = adapter->pdev;
       
   734 	union e1000_rx_desc_packet_split *rx_desc;
       
   735 	struct e1000_buffer *buffer_info;
       
   736 	struct e1000_ps_page *ps_page;
       
   737 	struct sk_buff *skb;
       
   738 	unsigned int i, j;
       
   739 
       
   740 	i = rx_ring->next_to_use;
       
   741 	buffer_info = &rx_ring->buffer_info[i];
       
   742 
       
   743 	while (cleaned_count--) {
       
   744 		rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
       
   745 
       
   746 		for (j = 0; j < PS_PAGE_BUFFERS; j++) {
       
   747 			ps_page = &buffer_info->ps_pages[j];
       
   748 			if (j >= adapter->rx_ps_pages) {
       
   749 				/* all unused desc entries get hw null ptr */
       
   750 				rx_desc->read.buffer_addr[j + 1] =
       
   751 				    ~cpu_to_le64(0);
       
   752 				continue;
       
   753 			}
       
   754 			if (!ps_page->page) {
       
   755 				ps_page->page = alloc_page(gfp);
       
   756 				if (!ps_page->page) {
       
   757 					adapter->alloc_rx_buff_failed++;
       
   758 					goto no_buffers;
       
   759 				}
       
   760 				ps_page->dma = dma_map_page(&pdev->dev,
       
   761 							    ps_page->page,
       
   762 							    0, PAGE_SIZE,
       
   763 							    DMA_FROM_DEVICE);
       
   764 				if (dma_mapping_error(&pdev->dev,
       
   765 						      ps_page->dma)) {
       
   766 					dev_err(&adapter->pdev->dev,
       
   767 						"Rx DMA page map failed\n");
       
   768 					adapter->rx_dma_failed++;
       
   769 					goto no_buffers;
       
   770 				}
       
   771 			}
       
   772 			/* Refresh the desc even if buffer_addrs
       
   773 			 * didn't change because each write-back
       
   774 			 * erases this info.
       
   775 			 */
       
   776 			rx_desc->read.buffer_addr[j + 1] =
       
   777 			    cpu_to_le64(ps_page->dma);
       
   778 		}
       
   779 
       
   780 		skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
       
   781 						  gfp);
       
   782 
       
   783 		if (!skb) {
       
   784 			adapter->alloc_rx_buff_failed++;
       
   785 			break;
       
   786 		}
       
   787 
       
   788 		buffer_info->skb = skb;
       
   789 		buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
       
   790 						  adapter->rx_ps_bsize0,
       
   791 						  DMA_FROM_DEVICE);
       
   792 		if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
       
   793 			dev_err(&pdev->dev, "Rx DMA map failed\n");
       
   794 			adapter->rx_dma_failed++;
       
   795 			/* cleanup skb */
       
   796 			dev_kfree_skb_any(skb);
       
   797 			buffer_info->skb = NULL;
       
   798 			break;
       
   799 		}
       
   800 
       
   801 		rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
       
   802 
       
   803 		if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
       
   804 			/* Force memory writes to complete before letting h/w
       
   805 			 * know there are new descriptors to fetch.  (Only
       
   806 			 * applicable for weak-ordered memory model archs,
       
   807 			 * such as IA-64).
       
   808 			 */
       
   809 			wmb();
       
   810 			if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
       
   811 				e1000e_update_rdt_wa(rx_ring, i << 1);
       
   812 			else
       
   813 				writel(i << 1, rx_ring->tail);
       
   814 		}
       
   815 
       
   816 		i++;
       
   817 		if (i == rx_ring->count)
       
   818 			i = 0;
       
   819 		buffer_info = &rx_ring->buffer_info[i];
       
   820 	}
       
   821 
       
   822 no_buffers:
       
   823 	rx_ring->next_to_use = i;
       
   824 }
       
   825 
       
   826 /**
       
   827  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
       
   828  * @rx_ring: Rx descriptor ring
       
   829  * @cleaned_count: number of buffers to allocate this pass
       
   830  **/
       
   831 
       
   832 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
       
   833 					 int cleaned_count, gfp_t gfp)
       
   834 {
       
   835 	struct e1000_adapter *adapter = rx_ring->adapter;
       
   836 	struct net_device *netdev = adapter->netdev;
       
   837 	struct pci_dev *pdev = adapter->pdev;
       
   838 	union e1000_rx_desc_extended *rx_desc;
       
   839 	struct e1000_buffer *buffer_info;
       
   840 	struct sk_buff *skb;
       
   841 	unsigned int i;
       
   842 	unsigned int bufsz = 256 - 16;	/* for skb_reserve */
       
   843 
       
   844 	i = rx_ring->next_to_use;
       
   845 	buffer_info = &rx_ring->buffer_info[i];
       
   846 
       
   847 	while (cleaned_count--) {
       
   848 		skb = buffer_info->skb;
       
   849 		if (skb) {
       
   850 			skb_trim(skb, 0);
       
   851 			goto check_page;
       
   852 		}
       
   853 
       
   854 		skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
       
   855 		if (unlikely(!skb)) {
       
   856 			/* Better luck next round */
       
   857 			adapter->alloc_rx_buff_failed++;
       
   858 			break;
       
   859 		}
       
   860 
       
   861 		buffer_info->skb = skb;
       
   862 check_page:
       
   863 		/* allocate a new page if necessary */
       
   864 		if (!buffer_info->page) {
       
   865 			buffer_info->page = alloc_page(gfp);
       
   866 			if (unlikely(!buffer_info->page)) {
       
   867 				adapter->alloc_rx_buff_failed++;
       
   868 				break;
       
   869 			}
       
   870 		}
       
   871 
       
   872 		if (!buffer_info->dma) {
       
   873 			buffer_info->dma = dma_map_page(&pdev->dev,
       
   874 							buffer_info->page, 0,
       
   875 							PAGE_SIZE,
       
   876 							DMA_FROM_DEVICE);
       
   877 			if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
       
   878 				adapter->alloc_rx_buff_failed++;
       
   879 				break;
       
   880 			}
       
   881 		}
       
   882 
       
   883 		rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
       
   884 		rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
       
   885 
       
   886 		if (unlikely(++i == rx_ring->count))
       
   887 			i = 0;
       
   888 		buffer_info = &rx_ring->buffer_info[i];
       
   889 	}
       
   890 
       
   891 	if (likely(rx_ring->next_to_use != i)) {
       
   892 		rx_ring->next_to_use = i;
       
   893 		if (unlikely(i-- == 0))
       
   894 			i = (rx_ring->count - 1);
       
   895 
       
   896 		/* Force memory writes to complete before letting h/w
       
   897 		 * know there are new descriptors to fetch.  (Only
       
   898 		 * applicable for weak-ordered memory model archs,
       
   899 		 * such as IA-64).
       
   900 		 */
       
   901 		wmb();
       
   902 		if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
       
   903 			e1000e_update_rdt_wa(rx_ring, i);
       
   904 		else
       
   905 			writel(i, rx_ring->tail);
       
   906 	}
       
   907 }
       
   908 
       
   909 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
       
   910 				 struct sk_buff *skb)
       
   911 {
       
   912 	if (netdev->features & NETIF_F_RXHASH)
       
   913 		skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
       
   914 }
       
   915 
       
   916 /**
       
   917  * e1000_clean_rx_irq - Send received data up the network stack
       
   918  * @rx_ring: Rx descriptor ring
       
   919  *
       
   920  * the return value indicates whether actual cleaning was done, there
       
   921  * is no guarantee that everything was cleaned
       
   922  **/
       
   923 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
       
   924 			       int work_to_do)
       
   925 {
       
   926 	struct e1000_adapter *adapter = rx_ring->adapter;
       
   927 	struct net_device *netdev = adapter->netdev;
       
   928 	struct pci_dev *pdev = adapter->pdev;
       
   929 	struct e1000_hw *hw = &adapter->hw;
       
   930 	union e1000_rx_desc_extended *rx_desc, *next_rxd;
       
   931 	struct e1000_buffer *buffer_info, *next_buffer;
       
   932 	u32 length, staterr;
       
   933 	unsigned int i;
       
   934 	int cleaned_count = 0;
       
   935 	bool cleaned = false;
       
   936 	unsigned int total_rx_bytes = 0, total_rx_packets = 0;
       
   937 
       
   938 	i = rx_ring->next_to_clean;
       
   939 	rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
       
   940 	staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
       
   941 	buffer_info = &rx_ring->buffer_info[i];
       
   942 
       
   943 	while (staterr & E1000_RXD_STAT_DD) {
       
   944 		struct sk_buff *skb;
       
   945 
       
   946 		if (*work_done >= work_to_do)
       
   947 			break;
       
   948 		(*work_done)++;
       
   949 		rmb();	/* read descriptor and rx_buffer_info after status DD */
       
   950 
       
   951 		skb = buffer_info->skb;
       
   952 		buffer_info->skb = NULL;
       
   953 
       
   954 		prefetch(skb->data - NET_IP_ALIGN);
       
   955 
       
   956 		i++;
       
   957 		if (i == rx_ring->count)
       
   958 			i = 0;
       
   959 		next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
       
   960 		prefetch(next_rxd);
       
   961 
       
   962 		next_buffer = &rx_ring->buffer_info[i];
       
   963 
       
   964 		cleaned = true;
       
   965 		cleaned_count++;
       
   966 		dma_unmap_single(&pdev->dev, buffer_info->dma,
       
   967 				 adapter->rx_buffer_len, DMA_FROM_DEVICE);
       
   968 		buffer_info->dma = 0;
       
   969 
       
   970 		length = le16_to_cpu(rx_desc->wb.upper.length);
       
   971 
       
   972 		/* !EOP means multiple descriptors were used to store a single
       
   973 		 * packet, if that's the case we need to toss it.  In fact, we
       
   974 		 * need to toss every packet with the EOP bit clear and the
       
   975 		 * next frame that _does_ have the EOP bit set, as it is by
       
   976 		 * definition only a frame fragment
       
   977 		 */
       
   978 		if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
       
   979 			adapter->flags2 |= FLAG2_IS_DISCARDING;
       
   980 
       
   981 		if (adapter->flags2 & FLAG2_IS_DISCARDING) {
       
   982 			/* All receives must fit into a single buffer */
       
   983 			e_dbg("Receive packet consumed multiple buffers\n");
       
   984 			/* recycle */
       
   985 			buffer_info->skb = skb;
       
   986 			if (staterr & E1000_RXD_STAT_EOP)
       
   987 				adapter->flags2 &= ~FLAG2_IS_DISCARDING;
       
   988 			goto next_desc;
       
   989 		}
       
   990 
       
   991 		if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
       
   992 			     !(netdev->features & NETIF_F_RXALL))) {
       
   993 			/* recycle */
       
   994 			buffer_info->skb = skb;
       
   995 			goto next_desc;
       
   996 		}
       
   997 
       
   998 		/* adjust length to remove Ethernet CRC */
       
   999 		if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
       
  1000 			/* If configured to store CRC, don't subtract FCS,
       
  1001 			 * but keep the FCS bytes out of the total_rx_bytes
       
  1002 			 * counter
       
  1003 			 */
       
  1004 			if (netdev->features & NETIF_F_RXFCS)
       
  1005 				total_rx_bytes -= 4;
       
  1006 			else
       
  1007 				length -= 4;
       
  1008 		}
       
  1009 
       
  1010 		total_rx_bytes += length;
       
  1011 		total_rx_packets++;
       
  1012 
       
  1013 		/* code added for copybreak, this should improve
       
  1014 		 * performance for small packets with large amounts
       
  1015 		 * of reassembly being done in the stack
       
  1016 		 */
       
  1017 		if (length < copybreak) {
       
  1018 			struct sk_buff *new_skb =
       
  1019 			    netdev_alloc_skb_ip_align(netdev, length);
       
  1020 			if (new_skb) {
       
  1021 				skb_copy_to_linear_data_offset(new_skb,
       
  1022 							       -NET_IP_ALIGN,
       
  1023 							       (skb->data -
       
  1024 								NET_IP_ALIGN),
       
  1025 							       (length +
       
  1026 								NET_IP_ALIGN));
       
  1027 				/* save the skb in buffer_info as good */
       
  1028 				buffer_info->skb = skb;
       
  1029 				skb = new_skb;
       
  1030 			}
       
  1031 			/* else just continue with the old one */
       
  1032 		}
       
  1033 		/* end copybreak code */
       
  1034 		skb_put(skb, length);
       
  1035 
       
  1036 		/* Receive Checksum Offload */
       
  1037 		e1000_rx_checksum(adapter, staterr, skb);
       
  1038 
       
  1039 		e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
       
  1040 
       
  1041 		e1000_receive_skb(adapter, netdev, skb, staterr,
       
  1042 				  rx_desc->wb.upper.vlan);
       
  1043 
       
  1044 next_desc:
       
  1045 		rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
       
  1046 
       
  1047 		/* return some buffers to hardware, one at a time is too slow */
       
  1048 		if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
       
  1049 			adapter->alloc_rx_buf(rx_ring, cleaned_count,
       
  1050 					      GFP_ATOMIC);
       
  1051 			cleaned_count = 0;
       
  1052 		}
       
  1053 
       
  1054 		/* use prefetched values */
       
  1055 		rx_desc = next_rxd;
       
  1056 		buffer_info = next_buffer;
       
  1057 
       
  1058 		staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
       
  1059 	}
       
  1060 	rx_ring->next_to_clean = i;
       
  1061 
       
  1062 	cleaned_count = e1000_desc_unused(rx_ring);
       
  1063 	if (cleaned_count)
       
  1064 		adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
       
  1065 
       
  1066 	adapter->total_rx_bytes += total_rx_bytes;
       
  1067 	adapter->total_rx_packets += total_rx_packets;
       
  1068 	return cleaned;
       
  1069 }
       
  1070 
       
  1071 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
       
  1072 			    struct e1000_buffer *buffer_info)
       
  1073 {
       
  1074 	struct e1000_adapter *adapter = tx_ring->adapter;
       
  1075 
       
  1076 	if (buffer_info->dma) {
       
  1077 		if (buffer_info->mapped_as_page)
       
  1078 			dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
       
  1079 				       buffer_info->length, DMA_TO_DEVICE);
       
  1080 		else
       
  1081 			dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
       
  1082 					 buffer_info->length, DMA_TO_DEVICE);
       
  1083 		buffer_info->dma = 0;
       
  1084 	}
       
  1085 	if (buffer_info->skb) {
       
  1086 		dev_kfree_skb_any(buffer_info->skb);
       
  1087 		buffer_info->skb = NULL;
       
  1088 	}
       
  1089 	buffer_info->time_stamp = 0;
       
  1090 }
       
  1091 
       
  1092 static void e1000_print_hw_hang(struct work_struct *work)
       
  1093 {
       
  1094 	struct e1000_adapter *adapter = container_of(work,
       
  1095 						     struct e1000_adapter,
       
  1096 						     print_hang_task);
       
  1097 	struct net_device *netdev = adapter->netdev;
       
  1098 	struct e1000_ring *tx_ring = adapter->tx_ring;
       
  1099 	unsigned int i = tx_ring->next_to_clean;
       
  1100 	unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
       
  1101 	struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
       
  1102 	struct e1000_hw *hw = &adapter->hw;
       
  1103 	u16 phy_status, phy_1000t_status, phy_ext_status;
       
  1104 	u16 pci_status;
       
  1105 
       
  1106 	if (test_bit(__E1000_DOWN, &adapter->state))
       
  1107 		return;
       
  1108 
       
  1109 	if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
       
  1110 		/* May be block on write-back, flush and detect again
       
  1111 		 * flush pending descriptor writebacks to memory
       
  1112 		 */
       
  1113 		ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
       
  1114 		/* execute the writes immediately */
       
  1115 		e1e_flush();
       
  1116 		/* Due to rare timing issues, write to TIDV again to ensure
       
  1117 		 * the write is successful
       
  1118 		 */
       
  1119 		ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
       
  1120 		/* execute the writes immediately */
       
  1121 		e1e_flush();
       
  1122 		adapter->tx_hang_recheck = true;
       
  1123 		return;
       
  1124 	}
       
  1125 	adapter->tx_hang_recheck = false;
       
  1126 
       
  1127 	if (er32(TDH(0)) == er32(TDT(0))) {
       
  1128 		e_dbg("false hang detected, ignoring\n");
       
  1129 		return;
       
  1130 	}
       
  1131 
       
  1132 	/* Real hang detected */
       
  1133 	netif_stop_queue(netdev);
       
  1134 
       
  1135 	e1e_rphy(hw, MII_BMSR, &phy_status);
       
  1136 	e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
       
  1137 	e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
       
  1138 
       
  1139 	pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
       
  1140 
       
  1141 	/* detected Hardware unit hang */
       
  1142 	e_err("Detected Hardware Unit Hang:\n"
       
  1143 	      "  TDH                  <%x>\n"
       
  1144 	      "  TDT                  <%x>\n"
       
  1145 	      "  next_to_use          <%x>\n"
       
  1146 	      "  next_to_clean        <%x>\n"
       
  1147 	      "buffer_info[next_to_clean]:\n"
       
  1148 	      "  time_stamp           <%lx>\n"
       
  1149 	      "  next_to_watch        <%x>\n"
       
  1150 	      "  jiffies              <%lx>\n"
       
  1151 	      "  next_to_watch.status <%x>\n"
       
  1152 	      "MAC Status             <%x>\n"
       
  1153 	      "PHY Status             <%x>\n"
       
  1154 	      "PHY 1000BASE-T Status  <%x>\n"
       
  1155 	      "PHY Extended Status    <%x>\n"
       
  1156 	      "PCI Status             <%x>\n",
       
  1157 	      readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
       
  1158 	      tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
       
  1159 	      eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
       
  1160 	      phy_status, phy_1000t_status, phy_ext_status, pci_status);
       
  1161 
       
  1162 	e1000e_dump(adapter);
       
  1163 
       
  1164 	/* Suggest workaround for known h/w issue */
       
  1165 	if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
       
  1166 		e_err("Try turning off Tx pause (flow control) via ethtool\n");
       
  1167 }
       
  1168 
       
  1169 /**
       
  1170  * e1000e_tx_hwtstamp_work - check for Tx time stamp
       
  1171  * @work: pointer to work struct
       
  1172  *
       
  1173  * This work function polls the TSYNCTXCTL valid bit to determine when a
       
  1174  * timestamp has been taken for the current stored skb.  The timestamp must
       
  1175  * be for this skb because only one such packet is allowed in the queue.
       
  1176  */
       
  1177 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
       
  1178 {
       
  1179 	struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
       
  1180 						     tx_hwtstamp_work);
       
  1181 	struct e1000_hw *hw = &adapter->hw;
       
  1182 
       
  1183 	if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
       
  1184 		struct skb_shared_hwtstamps shhwtstamps;
       
  1185 		u64 txstmp;
       
  1186 
       
  1187 		txstmp = er32(TXSTMPL);
       
  1188 		txstmp |= (u64)er32(TXSTMPH) << 32;
       
  1189 
       
  1190 		e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
       
  1191 
       
  1192 		skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps);
       
  1193 		dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
       
  1194 		adapter->tx_hwtstamp_skb = NULL;
       
  1195 	} else if (time_after(jiffies, adapter->tx_hwtstamp_start
       
  1196 			      + adapter->tx_timeout_factor * HZ)) {
       
  1197 		dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
       
  1198 		adapter->tx_hwtstamp_skb = NULL;
       
  1199 		adapter->tx_hwtstamp_timeouts++;
       
  1200 		e_warn("clearing Tx timestamp hang\n");
       
  1201 	} else {
       
  1202 		/* reschedule to check later */
       
  1203 		schedule_work(&adapter->tx_hwtstamp_work);
       
  1204 	}
       
  1205 }
       
  1206 
       
  1207 /**
       
  1208  * e1000_clean_tx_irq - Reclaim resources after transmit completes
       
  1209  * @tx_ring: Tx descriptor ring
       
  1210  *
       
  1211  * the return value indicates whether actual cleaning was done, there
       
  1212  * is no guarantee that everything was cleaned
       
  1213  **/
       
  1214 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
       
  1215 {
       
  1216 	struct e1000_adapter *adapter = tx_ring->adapter;
       
  1217 	struct net_device *netdev = adapter->netdev;
       
  1218 	struct e1000_hw *hw = &adapter->hw;
       
  1219 	struct e1000_tx_desc *tx_desc, *eop_desc;
       
  1220 	struct e1000_buffer *buffer_info;
       
  1221 	unsigned int i, eop;
       
  1222 	unsigned int count = 0;
       
  1223 	unsigned int total_tx_bytes = 0, total_tx_packets = 0;
       
  1224 	unsigned int bytes_compl = 0, pkts_compl = 0;
       
  1225 
       
  1226 	i = tx_ring->next_to_clean;
       
  1227 	eop = tx_ring->buffer_info[i].next_to_watch;
       
  1228 	eop_desc = E1000_TX_DESC(*tx_ring, eop);
       
  1229 
       
  1230 	while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
       
  1231 	       (count < tx_ring->count)) {
       
  1232 		bool cleaned = false;
       
  1233 
       
  1234 		rmb();		/* read buffer_info after eop_desc */
       
  1235 		for (; !cleaned; count++) {
       
  1236 			tx_desc = E1000_TX_DESC(*tx_ring, i);
       
  1237 			buffer_info = &tx_ring->buffer_info[i];
       
  1238 			cleaned = (i == eop);
       
  1239 
       
  1240 			if (cleaned) {
       
  1241 				total_tx_packets += buffer_info->segs;
       
  1242 				total_tx_bytes += buffer_info->bytecount;
       
  1243 				if (buffer_info->skb) {
       
  1244 					bytes_compl += buffer_info->skb->len;
       
  1245 					pkts_compl++;
       
  1246 				}
       
  1247 			}
       
  1248 
       
  1249 			e1000_put_txbuf(tx_ring, buffer_info);
       
  1250 			tx_desc->upper.data = 0;
       
  1251 
       
  1252 			i++;
       
  1253 			if (i == tx_ring->count)
       
  1254 				i = 0;
       
  1255 		}
       
  1256 
       
  1257 		if (i == tx_ring->next_to_use)
       
  1258 			break;
       
  1259 		eop = tx_ring->buffer_info[i].next_to_watch;
       
  1260 		eop_desc = E1000_TX_DESC(*tx_ring, eop);
       
  1261 	}
       
  1262 
       
  1263 	tx_ring->next_to_clean = i;
       
  1264 
       
  1265 	netdev_completed_queue(netdev, pkts_compl, bytes_compl);
       
  1266 
       
  1267 #define TX_WAKE_THRESHOLD 32
       
  1268 	if (count && netif_carrier_ok(netdev) &&
       
  1269 	    e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
       
  1270 		/* Make sure that anybody stopping the queue after this
       
  1271 		 * sees the new next_to_clean.
       
  1272 		 */
       
  1273 		smp_mb();
       
  1274 
       
  1275 		if (netif_queue_stopped(netdev) &&
       
  1276 		    !(test_bit(__E1000_DOWN, &adapter->state))) {
       
  1277 			netif_wake_queue(netdev);
       
  1278 			++adapter->restart_queue;
       
  1279 		}
       
  1280 	}
       
  1281 
       
  1282 	if (adapter->detect_tx_hung) {
       
  1283 		/* Detect a transmit hang in hardware, this serializes the
       
  1284 		 * check with the clearing of time_stamp and movement of i
       
  1285 		 */
       
  1286 		adapter->detect_tx_hung = false;
       
  1287 		if (tx_ring->buffer_info[i].time_stamp &&
       
  1288 		    time_after(jiffies, tx_ring->buffer_info[i].time_stamp
       
  1289 			       + (adapter->tx_timeout_factor * HZ)) &&
       
  1290 		    !(er32(STATUS) & E1000_STATUS_TXOFF))
       
  1291 			schedule_work(&adapter->print_hang_task);
       
  1292 		else
       
  1293 			adapter->tx_hang_recheck = false;
       
  1294 	}
       
  1295 	adapter->total_tx_bytes += total_tx_bytes;
       
  1296 	adapter->total_tx_packets += total_tx_packets;
       
  1297 	return count < tx_ring->count;
       
  1298 }
       
  1299 
       
  1300 /**
       
  1301  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
       
  1302  * @rx_ring: Rx descriptor ring
       
  1303  *
       
  1304  * the return value indicates whether actual cleaning was done, there
       
  1305  * is no guarantee that everything was cleaned
       
  1306  **/
       
  1307 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
       
  1308 				  int work_to_do)
       
  1309 {
       
  1310 	struct e1000_adapter *adapter = rx_ring->adapter;
       
  1311 	struct e1000_hw *hw = &adapter->hw;
       
  1312 	union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
       
  1313 	struct net_device *netdev = adapter->netdev;
       
  1314 	struct pci_dev *pdev = adapter->pdev;
       
  1315 	struct e1000_buffer *buffer_info, *next_buffer;
       
  1316 	struct e1000_ps_page *ps_page;
       
  1317 	struct sk_buff *skb;
       
  1318 	unsigned int i, j;
       
  1319 	u32 length, staterr;
       
  1320 	int cleaned_count = 0;
       
  1321 	bool cleaned = false;
       
  1322 	unsigned int total_rx_bytes = 0, total_rx_packets = 0;
       
  1323 
       
  1324 	i = rx_ring->next_to_clean;
       
  1325 	rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
       
  1326 	staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
       
  1327 	buffer_info = &rx_ring->buffer_info[i];
       
  1328 
       
  1329 	while (staterr & E1000_RXD_STAT_DD) {
       
  1330 		if (*work_done >= work_to_do)
       
  1331 			break;
       
  1332 		(*work_done)++;
       
  1333 		skb = buffer_info->skb;
       
  1334 		rmb();	/* read descriptor and rx_buffer_info after status DD */
       
  1335 
       
  1336 		/* in the packet split case this is header only */
       
  1337 		prefetch(skb->data - NET_IP_ALIGN);
       
  1338 
       
  1339 		i++;
       
  1340 		if (i == rx_ring->count)
       
  1341 			i = 0;
       
  1342 		next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
       
  1343 		prefetch(next_rxd);
       
  1344 
       
  1345 		next_buffer = &rx_ring->buffer_info[i];
       
  1346 
       
  1347 		cleaned = true;
       
  1348 		cleaned_count++;
       
  1349 		dma_unmap_single(&pdev->dev, buffer_info->dma,
       
  1350 				 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
       
  1351 		buffer_info->dma = 0;
       
  1352 
       
  1353 		/* see !EOP comment in other Rx routine */
       
  1354 		if (!(staterr & E1000_RXD_STAT_EOP))
       
  1355 			adapter->flags2 |= FLAG2_IS_DISCARDING;
       
  1356 
       
  1357 		if (adapter->flags2 & FLAG2_IS_DISCARDING) {
       
  1358 			e_dbg("Packet Split buffers didn't pick up the full packet\n");
       
  1359 			dev_kfree_skb_irq(skb);
       
  1360 			if (staterr & E1000_RXD_STAT_EOP)
       
  1361 				adapter->flags2 &= ~FLAG2_IS_DISCARDING;
       
  1362 			goto next_desc;
       
  1363 		}
       
  1364 
       
  1365 		if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
       
  1366 			     !(netdev->features & NETIF_F_RXALL))) {
       
  1367 			dev_kfree_skb_irq(skb);
       
  1368 			goto next_desc;
       
  1369 		}
       
  1370 
       
  1371 		length = le16_to_cpu(rx_desc->wb.middle.length0);
       
  1372 
       
  1373 		if (!length) {
       
  1374 			e_dbg("Last part of the packet spanning multiple descriptors\n");
       
  1375 			dev_kfree_skb_irq(skb);
       
  1376 			goto next_desc;
       
  1377 		}
       
  1378 
       
  1379 		/* Good Receive */
       
  1380 		skb_put(skb, length);
       
  1381 
       
  1382 		{
       
  1383 			/* this looks ugly, but it seems compiler issues make
       
  1384 			 * it more efficient than reusing j
       
  1385 			 */
       
  1386 			int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
       
  1387 
       
  1388 			/* page alloc/put takes too long and effects small
       
  1389 			 * packet throughput, so unsplit small packets and
       
  1390 			 * save the alloc/put only valid in softirq (napi)
       
  1391 			 * context to call kmap_*
       
  1392 			 */
       
  1393 			if (l1 && (l1 <= copybreak) &&
       
  1394 			    ((length + l1) <= adapter->rx_ps_bsize0)) {
       
  1395 				u8 *vaddr;
       
  1396 
       
  1397 				ps_page = &buffer_info->ps_pages[0];
       
  1398 
       
  1399 				/* there is no documentation about how to call
       
  1400 				 * kmap_atomic, so we can't hold the mapping
       
  1401 				 * very long
       
  1402 				 */
       
  1403 				dma_sync_single_for_cpu(&pdev->dev,
       
  1404 							ps_page->dma,
       
  1405 							PAGE_SIZE,
       
  1406 							DMA_FROM_DEVICE);
       
  1407 				vaddr = kmap_atomic(ps_page->page);
       
  1408 				memcpy(skb_tail_pointer(skb), vaddr, l1);
       
  1409 				kunmap_atomic(vaddr);
       
  1410 				dma_sync_single_for_device(&pdev->dev,
       
  1411 							   ps_page->dma,
       
  1412 							   PAGE_SIZE,
       
  1413 							   DMA_FROM_DEVICE);
       
  1414 
       
  1415 				/* remove the CRC */
       
  1416 				if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
       
  1417 					if (!(netdev->features & NETIF_F_RXFCS))
       
  1418 						l1 -= 4;
       
  1419 				}
       
  1420 
       
  1421 				skb_put(skb, l1);
       
  1422 				goto copydone;
       
  1423 			}	/* if */
       
  1424 		}
       
  1425 
       
  1426 		for (j = 0; j < PS_PAGE_BUFFERS; j++) {
       
  1427 			length = le16_to_cpu(rx_desc->wb.upper.length[j]);
       
  1428 			if (!length)
       
  1429 				break;
       
  1430 
       
  1431 			ps_page = &buffer_info->ps_pages[j];
       
  1432 			dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
       
  1433 				       DMA_FROM_DEVICE);
       
  1434 			ps_page->dma = 0;
       
  1435 			skb_fill_page_desc(skb, j, ps_page->page, 0, length);
       
  1436 			ps_page->page = NULL;
       
  1437 			skb->len += length;
       
  1438 			skb->data_len += length;
       
  1439 			skb->truesize += PAGE_SIZE;
       
  1440 		}
       
  1441 
       
  1442 		/* strip the ethernet crc, problem is we're using pages now so
       
  1443 		 * this whole operation can get a little cpu intensive
       
  1444 		 */
       
  1445 		if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
       
  1446 			if (!(netdev->features & NETIF_F_RXFCS))
       
  1447 				pskb_trim(skb, skb->len - 4);
       
  1448 		}
       
  1449 
       
  1450 copydone:
       
  1451 		total_rx_bytes += skb->len;
       
  1452 		total_rx_packets++;
       
  1453 
       
  1454 		e1000_rx_checksum(adapter, staterr, skb);
       
  1455 
       
  1456 		e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
       
  1457 
       
  1458 		if (rx_desc->wb.upper.header_status &
       
  1459 		    cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
       
  1460 			adapter->rx_hdr_split++;
       
  1461 
       
  1462 		e1000_receive_skb(adapter, netdev, skb, staterr,
       
  1463 				  rx_desc->wb.middle.vlan);
       
  1464 
       
  1465 next_desc:
       
  1466 		rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
       
  1467 		buffer_info->skb = NULL;
       
  1468 
       
  1469 		/* return some buffers to hardware, one at a time is too slow */
       
  1470 		if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
       
  1471 			adapter->alloc_rx_buf(rx_ring, cleaned_count,
       
  1472 					      GFP_ATOMIC);
       
  1473 			cleaned_count = 0;
       
  1474 		}
       
  1475 
       
  1476 		/* use prefetched values */
       
  1477 		rx_desc = next_rxd;
       
  1478 		buffer_info = next_buffer;
       
  1479 
       
  1480 		staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
       
  1481 	}
       
  1482 	rx_ring->next_to_clean = i;
       
  1483 
       
  1484 	cleaned_count = e1000_desc_unused(rx_ring);
       
  1485 	if (cleaned_count)
       
  1486 		adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
       
  1487 
       
  1488 	adapter->total_rx_bytes += total_rx_bytes;
       
  1489 	adapter->total_rx_packets += total_rx_packets;
       
  1490 	return cleaned;
       
  1491 }
       
  1492 
       
  1493 /**
       
  1494  * e1000_consume_page - helper function
       
  1495  **/
       
  1496 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
       
  1497 			       u16 length)
       
  1498 {
       
  1499 	bi->page = NULL;
       
  1500 	skb->len += length;
       
  1501 	skb->data_len += length;
       
  1502 	skb->truesize += PAGE_SIZE;
       
  1503 }
       
  1504 
       
  1505 /**
       
  1506  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
       
  1507  * @adapter: board private structure
       
  1508  *
       
  1509  * the return value indicates whether actual cleaning was done, there
       
  1510  * is no guarantee that everything was cleaned
       
  1511  **/
       
  1512 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
       
  1513 				     int work_to_do)
       
  1514 {
       
  1515 	struct e1000_adapter *adapter = rx_ring->adapter;
       
  1516 	struct net_device *netdev = adapter->netdev;
       
  1517 	struct pci_dev *pdev = adapter->pdev;
       
  1518 	union e1000_rx_desc_extended *rx_desc, *next_rxd;
       
  1519 	struct e1000_buffer *buffer_info, *next_buffer;
       
  1520 	u32 length, staterr;
       
  1521 	unsigned int i;
       
  1522 	int cleaned_count = 0;
       
  1523 	bool cleaned = false;
       
  1524 	unsigned int total_rx_bytes = 0, total_rx_packets = 0;
       
  1525 	struct skb_shared_info *shinfo;
       
  1526 
       
  1527 	i = rx_ring->next_to_clean;
       
  1528 	rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
       
  1529 	staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
       
  1530 	buffer_info = &rx_ring->buffer_info[i];
       
  1531 
       
  1532 	while (staterr & E1000_RXD_STAT_DD) {
       
  1533 		struct sk_buff *skb;
       
  1534 
       
  1535 		if (*work_done >= work_to_do)
       
  1536 			break;
       
  1537 		(*work_done)++;
       
  1538 		rmb();	/* read descriptor and rx_buffer_info after status DD */
       
  1539 
       
  1540 		skb = buffer_info->skb;
       
  1541 		buffer_info->skb = NULL;
       
  1542 
       
  1543 		++i;
       
  1544 		if (i == rx_ring->count)
       
  1545 			i = 0;
       
  1546 		next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
       
  1547 		prefetch(next_rxd);
       
  1548 
       
  1549 		next_buffer = &rx_ring->buffer_info[i];
       
  1550 
       
  1551 		cleaned = true;
       
  1552 		cleaned_count++;
       
  1553 		dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
       
  1554 			       DMA_FROM_DEVICE);
       
  1555 		buffer_info->dma = 0;
       
  1556 
       
  1557 		length = le16_to_cpu(rx_desc->wb.upper.length);
       
  1558 
       
  1559 		/* errors is only valid for DD + EOP descriptors */
       
  1560 		if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
       
  1561 			     ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
       
  1562 			      !(netdev->features & NETIF_F_RXALL)))) {
       
  1563 			/* recycle both page and skb */
       
  1564 			buffer_info->skb = skb;
       
  1565 			/* an error means any chain goes out the window too */
       
  1566 			if (rx_ring->rx_skb_top)
       
  1567 				dev_kfree_skb_irq(rx_ring->rx_skb_top);
       
  1568 			rx_ring->rx_skb_top = NULL;
       
  1569 			goto next_desc;
       
  1570 		}
       
  1571 #define rxtop (rx_ring->rx_skb_top)
       
  1572 		if (!(staterr & E1000_RXD_STAT_EOP)) {
       
  1573 			/* this descriptor is only the beginning (or middle) */
       
  1574 			if (!rxtop) {
       
  1575 				/* this is the beginning of a chain */
       
  1576 				rxtop = skb;
       
  1577 				skb_fill_page_desc(rxtop, 0, buffer_info->page,
       
  1578 						   0, length);
       
  1579 			} else {
       
  1580 				/* this is the middle of a chain */
       
  1581 				shinfo = skb_shinfo(rxtop);
       
  1582 				skb_fill_page_desc(rxtop, shinfo->nr_frags,
       
  1583 						   buffer_info->page, 0,
       
  1584 						   length);
       
  1585 				/* re-use the skb, only consumed the page */
       
  1586 				buffer_info->skb = skb;
       
  1587 			}
       
  1588 			e1000_consume_page(buffer_info, rxtop, length);
       
  1589 			goto next_desc;
       
  1590 		} else {
       
  1591 			if (rxtop) {
       
  1592 				/* end of the chain */
       
  1593 				shinfo = skb_shinfo(rxtop);
       
  1594 				skb_fill_page_desc(rxtop, shinfo->nr_frags,
       
  1595 						   buffer_info->page, 0,
       
  1596 						   length);
       
  1597 				/* re-use the current skb, we only consumed the
       
  1598 				 * page
       
  1599 				 */
       
  1600 				buffer_info->skb = skb;
       
  1601 				skb = rxtop;
       
  1602 				rxtop = NULL;
       
  1603 				e1000_consume_page(buffer_info, skb, length);
       
  1604 			} else {
       
  1605 				/* no chain, got EOP, this buf is the packet
       
  1606 				 * copybreak to save the put_page/alloc_page
       
  1607 				 */
       
  1608 				if (length <= copybreak &&
       
  1609 				    skb_tailroom(skb) >= length) {
       
  1610 					u8 *vaddr;
       
  1611 					vaddr = kmap_atomic(buffer_info->page);
       
  1612 					memcpy(skb_tail_pointer(skb), vaddr,
       
  1613 					       length);
       
  1614 					kunmap_atomic(vaddr);
       
  1615 					/* re-use the page, so don't erase
       
  1616 					 * buffer_info->page
       
  1617 					 */
       
  1618 					skb_put(skb, length);
       
  1619 				} else {
       
  1620 					skb_fill_page_desc(skb, 0,
       
  1621 							   buffer_info->page, 0,
       
  1622 							   length);
       
  1623 					e1000_consume_page(buffer_info, skb,
       
  1624 							   length);
       
  1625 				}
       
  1626 			}
       
  1627 		}
       
  1628 
       
  1629 		/* Receive Checksum Offload */
       
  1630 		e1000_rx_checksum(adapter, staterr, skb);
       
  1631 
       
  1632 		e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
       
  1633 
       
  1634 		/* probably a little skewed due to removing CRC */
       
  1635 		total_rx_bytes += skb->len;
       
  1636 		total_rx_packets++;
       
  1637 
       
  1638 		/* eth type trans needs skb->data to point to something */
       
  1639 		if (!pskb_may_pull(skb, ETH_HLEN)) {
       
  1640 			e_err("pskb_may_pull failed.\n");
       
  1641 			dev_kfree_skb_irq(skb);
       
  1642 			goto next_desc;
       
  1643 		}
       
  1644 
       
  1645 		e1000_receive_skb(adapter, netdev, skb, staterr,
       
  1646 				  rx_desc->wb.upper.vlan);
       
  1647 
       
  1648 next_desc:
       
  1649 		rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
       
  1650 
       
  1651 		/* return some buffers to hardware, one at a time is too slow */
       
  1652 		if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
       
  1653 			adapter->alloc_rx_buf(rx_ring, cleaned_count,
       
  1654 					      GFP_ATOMIC);
       
  1655 			cleaned_count = 0;
       
  1656 		}
       
  1657 
       
  1658 		/* use prefetched values */
       
  1659 		rx_desc = next_rxd;
       
  1660 		buffer_info = next_buffer;
       
  1661 
       
  1662 		staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
       
  1663 	}
       
  1664 	rx_ring->next_to_clean = i;
       
  1665 
       
  1666 	cleaned_count = e1000_desc_unused(rx_ring);
       
  1667 	if (cleaned_count)
       
  1668 		adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
       
  1669 
       
  1670 	adapter->total_rx_bytes += total_rx_bytes;
       
  1671 	adapter->total_rx_packets += total_rx_packets;
       
  1672 	return cleaned;
       
  1673 }
       
  1674 
       
  1675 /**
       
  1676  * e1000_clean_rx_ring - Free Rx Buffers per Queue
       
  1677  * @rx_ring: Rx descriptor ring
       
  1678  **/
       
  1679 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
       
  1680 {
       
  1681 	struct e1000_adapter *adapter = rx_ring->adapter;
       
  1682 	struct e1000_buffer *buffer_info;
       
  1683 	struct e1000_ps_page *ps_page;
       
  1684 	struct pci_dev *pdev = adapter->pdev;
       
  1685 	unsigned int i, j;
       
  1686 
       
  1687 	/* Free all the Rx ring sk_buffs */
       
  1688 	for (i = 0; i < rx_ring->count; i++) {
       
  1689 		buffer_info = &rx_ring->buffer_info[i];
       
  1690 		if (buffer_info->dma) {
       
  1691 			if (adapter->clean_rx == e1000_clean_rx_irq)
       
  1692 				dma_unmap_single(&pdev->dev, buffer_info->dma,
       
  1693 						 adapter->rx_buffer_len,
       
  1694 						 DMA_FROM_DEVICE);
       
  1695 			else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
       
  1696 				dma_unmap_page(&pdev->dev, buffer_info->dma,
       
  1697 					       PAGE_SIZE, DMA_FROM_DEVICE);
       
  1698 			else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
       
  1699 				dma_unmap_single(&pdev->dev, buffer_info->dma,
       
  1700 						 adapter->rx_ps_bsize0,
       
  1701 						 DMA_FROM_DEVICE);
       
  1702 			buffer_info->dma = 0;
       
  1703 		}
       
  1704 
       
  1705 		if (buffer_info->page) {
       
  1706 			put_page(buffer_info->page);
       
  1707 			buffer_info->page = NULL;
       
  1708 		}
       
  1709 
       
  1710 		if (buffer_info->skb) {
       
  1711 			dev_kfree_skb(buffer_info->skb);
       
  1712 			buffer_info->skb = NULL;
       
  1713 		}
       
  1714 
       
  1715 		for (j = 0; j < PS_PAGE_BUFFERS; j++) {
       
  1716 			ps_page = &buffer_info->ps_pages[j];
       
  1717 			if (!ps_page->page)
       
  1718 				break;
       
  1719 			dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
       
  1720 				       DMA_FROM_DEVICE);
       
  1721 			ps_page->dma = 0;
       
  1722 			put_page(ps_page->page);
       
  1723 			ps_page->page = NULL;
       
  1724 		}
       
  1725 	}
       
  1726 
       
  1727 	/* there also may be some cached data from a chained receive */
       
  1728 	if (rx_ring->rx_skb_top) {
       
  1729 		dev_kfree_skb(rx_ring->rx_skb_top);
       
  1730 		rx_ring->rx_skb_top = NULL;
       
  1731 	}
       
  1732 
       
  1733 	/* Zero out the descriptor ring */
       
  1734 	memset(rx_ring->desc, 0, rx_ring->size);
       
  1735 
       
  1736 	rx_ring->next_to_clean = 0;
       
  1737 	rx_ring->next_to_use = 0;
       
  1738 	adapter->flags2 &= ~FLAG2_IS_DISCARDING;
       
  1739 
       
  1740 	writel(0, rx_ring->head);
       
  1741 	if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
       
  1742 		e1000e_update_rdt_wa(rx_ring, 0);
       
  1743 	else
       
  1744 		writel(0, rx_ring->tail);
       
  1745 }
       
  1746 
       
  1747 static void e1000e_downshift_workaround(struct work_struct *work)
       
  1748 {
       
  1749 	struct e1000_adapter *adapter = container_of(work,
       
  1750 						     struct e1000_adapter,
       
  1751 						     downshift_task);
       
  1752 
       
  1753 	if (test_bit(__E1000_DOWN, &adapter->state))
       
  1754 		return;
       
  1755 
       
  1756 	e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
       
  1757 }
       
  1758 
       
  1759 /**
       
  1760  * e1000_intr_msi - Interrupt Handler
       
  1761  * @irq: interrupt number
       
  1762  * @data: pointer to a network interface device structure
       
  1763  **/
       
  1764 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
       
  1765 {
       
  1766 	struct net_device *netdev = data;
       
  1767 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  1768 	struct e1000_hw *hw = &adapter->hw;
       
  1769 	u32 icr = er32(ICR);
       
  1770 
       
  1771 	/* read ICR disables interrupts using IAM */
       
  1772 	if (icr & E1000_ICR_LSC) {
       
  1773 		hw->mac.get_link_status = true;
       
  1774 		/* ICH8 workaround-- Call gig speed drop workaround on cable
       
  1775 		 * disconnect (LSC) before accessing any PHY registers
       
  1776 		 */
       
  1777 		if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
       
  1778 		    (!(er32(STATUS) & E1000_STATUS_LU)))
       
  1779 			schedule_work(&adapter->downshift_task);
       
  1780 
       
  1781 		/* 80003ES2LAN workaround-- For packet buffer work-around on
       
  1782 		 * link down event; disable receives here in the ISR and reset
       
  1783 		 * adapter in watchdog
       
  1784 		 */
       
  1785 		if (netif_carrier_ok(netdev) &&
       
  1786 		    adapter->flags & FLAG_RX_NEEDS_RESTART) {
       
  1787 			/* disable receives */
       
  1788 			u32 rctl = er32(RCTL);
       
  1789 
       
  1790 			ew32(RCTL, rctl & ~E1000_RCTL_EN);
       
  1791 			adapter->flags |= FLAG_RESTART_NOW;
       
  1792 		}
       
  1793 		/* guard against interrupt when we're going down */
       
  1794 		if (!test_bit(__E1000_DOWN, &adapter->state))
       
  1795 			mod_timer(&adapter->watchdog_timer, jiffies + 1);
       
  1796 	}
       
  1797 
       
  1798 	/* Reset on uncorrectable ECC error */
       
  1799 	if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
       
  1800 		u32 pbeccsts = er32(PBECCSTS);
       
  1801 
       
  1802 		adapter->corr_errors +=
       
  1803 		    pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
       
  1804 		adapter->uncorr_errors +=
       
  1805 		    (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
       
  1806 		    E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
       
  1807 
       
  1808 		/* Do the reset outside of interrupt context */
       
  1809 		schedule_work(&adapter->reset_task);
       
  1810 
       
  1811 		/* return immediately since reset is imminent */
       
  1812 		return IRQ_HANDLED;
       
  1813 	}
       
  1814 
       
  1815 	if (napi_schedule_prep(&adapter->napi)) {
       
  1816 		adapter->total_tx_bytes = 0;
       
  1817 		adapter->total_tx_packets = 0;
       
  1818 		adapter->total_rx_bytes = 0;
       
  1819 		adapter->total_rx_packets = 0;
       
  1820 		__napi_schedule(&adapter->napi);
       
  1821 	}
       
  1822 
       
  1823 	return IRQ_HANDLED;
       
  1824 }
       
  1825 
       
  1826 /**
       
  1827  * e1000_intr - Interrupt Handler
       
  1828  * @irq: interrupt number
       
  1829  * @data: pointer to a network interface device structure
       
  1830  **/
       
  1831 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
       
  1832 {
       
  1833 	struct net_device *netdev = data;
       
  1834 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  1835 	struct e1000_hw *hw = &adapter->hw;
       
  1836 	u32 rctl, icr = er32(ICR);
       
  1837 
       
  1838 	if (!icr || test_bit(__E1000_DOWN, &adapter->state))
       
  1839 		return IRQ_NONE;	/* Not our interrupt */
       
  1840 
       
  1841 	/* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
       
  1842 	 * not set, then the adapter didn't send an interrupt
       
  1843 	 */
       
  1844 	if (!(icr & E1000_ICR_INT_ASSERTED))
       
  1845 		return IRQ_NONE;
       
  1846 
       
  1847 	/* Interrupt Auto-Mask...upon reading ICR,
       
  1848 	 * interrupts are masked.  No need for the
       
  1849 	 * IMC write
       
  1850 	 */
       
  1851 
       
  1852 	if (icr & E1000_ICR_LSC) {
       
  1853 		hw->mac.get_link_status = true;
       
  1854 		/* ICH8 workaround-- Call gig speed drop workaround on cable
       
  1855 		 * disconnect (LSC) before accessing any PHY registers
       
  1856 		 */
       
  1857 		if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
       
  1858 		    (!(er32(STATUS) & E1000_STATUS_LU)))
       
  1859 			schedule_work(&adapter->downshift_task);
       
  1860 
       
  1861 		/* 80003ES2LAN workaround--
       
  1862 		 * For packet buffer work-around on link down event;
       
  1863 		 * disable receives here in the ISR and
       
  1864 		 * reset adapter in watchdog
       
  1865 		 */
       
  1866 		if (netif_carrier_ok(netdev) &&
       
  1867 		    (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
       
  1868 			/* disable receives */
       
  1869 			rctl = er32(RCTL);
       
  1870 			ew32(RCTL, rctl & ~E1000_RCTL_EN);
       
  1871 			adapter->flags |= FLAG_RESTART_NOW;
       
  1872 		}
       
  1873 		/* guard against interrupt when we're going down */
       
  1874 		if (!test_bit(__E1000_DOWN, &adapter->state))
       
  1875 			mod_timer(&adapter->watchdog_timer, jiffies + 1);
       
  1876 	}
       
  1877 
       
  1878 	/* Reset on uncorrectable ECC error */
       
  1879 	if ((icr & E1000_ICR_ECCER) && (hw->mac.type == e1000_pch_lpt)) {
       
  1880 		u32 pbeccsts = er32(PBECCSTS);
       
  1881 
       
  1882 		adapter->corr_errors +=
       
  1883 		    pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
       
  1884 		adapter->uncorr_errors +=
       
  1885 		    (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
       
  1886 		    E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
       
  1887 
       
  1888 		/* Do the reset outside of interrupt context */
       
  1889 		schedule_work(&adapter->reset_task);
       
  1890 
       
  1891 		/* return immediately since reset is imminent */
       
  1892 		return IRQ_HANDLED;
       
  1893 	}
       
  1894 
       
  1895 	if (napi_schedule_prep(&adapter->napi)) {
       
  1896 		adapter->total_tx_bytes = 0;
       
  1897 		adapter->total_tx_packets = 0;
       
  1898 		adapter->total_rx_bytes = 0;
       
  1899 		adapter->total_rx_packets = 0;
       
  1900 		__napi_schedule(&adapter->napi);
       
  1901 	}
       
  1902 
       
  1903 	return IRQ_HANDLED;
       
  1904 }
       
  1905 
       
  1906 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
       
  1907 {
       
  1908 	struct net_device *netdev = data;
       
  1909 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  1910 	struct e1000_hw *hw = &adapter->hw;
       
  1911 	u32 icr = er32(ICR);
       
  1912 
       
  1913 	if (!(icr & E1000_ICR_INT_ASSERTED)) {
       
  1914 		if (!test_bit(__E1000_DOWN, &adapter->state))
       
  1915 			ew32(IMS, E1000_IMS_OTHER);
       
  1916 		return IRQ_NONE;
       
  1917 	}
       
  1918 
       
  1919 	if (icr & adapter->eiac_mask)
       
  1920 		ew32(ICS, (icr & adapter->eiac_mask));
       
  1921 
       
  1922 	if (icr & E1000_ICR_OTHER) {
       
  1923 		if (!(icr & E1000_ICR_LSC))
       
  1924 			goto no_link_interrupt;
       
  1925 		hw->mac.get_link_status = true;
       
  1926 		/* guard against interrupt when we're going down */
       
  1927 		if (!test_bit(__E1000_DOWN, &adapter->state))
       
  1928 			mod_timer(&adapter->watchdog_timer, jiffies + 1);
       
  1929 	}
       
  1930 
       
  1931 no_link_interrupt:
       
  1932 	if (!test_bit(__E1000_DOWN, &adapter->state))
       
  1933 		ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
       
  1934 
       
  1935 	return IRQ_HANDLED;
       
  1936 }
       
  1937 
       
  1938 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
       
  1939 {
       
  1940 	struct net_device *netdev = data;
       
  1941 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  1942 	struct e1000_hw *hw = &adapter->hw;
       
  1943 	struct e1000_ring *tx_ring = adapter->tx_ring;
       
  1944 
       
  1945 	adapter->total_tx_bytes = 0;
       
  1946 	adapter->total_tx_packets = 0;
       
  1947 
       
  1948 	if (!e1000_clean_tx_irq(tx_ring))
       
  1949 		/* Ring was not completely cleaned, so fire another interrupt */
       
  1950 		ew32(ICS, tx_ring->ims_val);
       
  1951 
       
  1952 	return IRQ_HANDLED;
       
  1953 }
       
  1954 
       
  1955 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
       
  1956 {
       
  1957 	struct net_device *netdev = data;
       
  1958 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  1959 	struct e1000_ring *rx_ring = adapter->rx_ring;
       
  1960 
       
  1961 	/* Write the ITR value calculated at the end of the
       
  1962 	 * previous interrupt.
       
  1963 	 */
       
  1964 	if (rx_ring->set_itr) {
       
  1965 		writel(1000000000 / (rx_ring->itr_val * 256),
       
  1966 		       rx_ring->itr_register);
       
  1967 		rx_ring->set_itr = 0;
       
  1968 	}
       
  1969 
       
  1970 	if (napi_schedule_prep(&adapter->napi)) {
       
  1971 		adapter->total_rx_bytes = 0;
       
  1972 		adapter->total_rx_packets = 0;
       
  1973 		__napi_schedule(&adapter->napi);
       
  1974 	}
       
  1975 	return IRQ_HANDLED;
       
  1976 }
       
  1977 
       
  1978 /**
       
  1979  * e1000_configure_msix - Configure MSI-X hardware
       
  1980  *
       
  1981  * e1000_configure_msix sets up the hardware to properly
       
  1982  * generate MSI-X interrupts.
       
  1983  **/
       
  1984 static void e1000_configure_msix(struct e1000_adapter *adapter)
       
  1985 {
       
  1986 	struct e1000_hw *hw = &adapter->hw;
       
  1987 	struct e1000_ring *rx_ring = adapter->rx_ring;
       
  1988 	struct e1000_ring *tx_ring = adapter->tx_ring;
       
  1989 	int vector = 0;
       
  1990 	u32 ctrl_ext, ivar = 0;
       
  1991 
       
  1992 	adapter->eiac_mask = 0;
       
  1993 
       
  1994 	/* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
       
  1995 	if (hw->mac.type == e1000_82574) {
       
  1996 		u32 rfctl = er32(RFCTL);
       
  1997 
       
  1998 		rfctl |= E1000_RFCTL_ACK_DIS;
       
  1999 		ew32(RFCTL, rfctl);
       
  2000 	}
       
  2001 
       
  2002 	/* Configure Rx vector */
       
  2003 	rx_ring->ims_val = E1000_IMS_RXQ0;
       
  2004 	adapter->eiac_mask |= rx_ring->ims_val;
       
  2005 	if (rx_ring->itr_val)
       
  2006 		writel(1000000000 / (rx_ring->itr_val * 256),
       
  2007 		       rx_ring->itr_register);
       
  2008 	else
       
  2009 		writel(1, rx_ring->itr_register);
       
  2010 	ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
       
  2011 
       
  2012 	/* Configure Tx vector */
       
  2013 	tx_ring->ims_val = E1000_IMS_TXQ0;
       
  2014 	vector++;
       
  2015 	if (tx_ring->itr_val)
       
  2016 		writel(1000000000 / (tx_ring->itr_val * 256),
       
  2017 		       tx_ring->itr_register);
       
  2018 	else
       
  2019 		writel(1, tx_ring->itr_register);
       
  2020 	adapter->eiac_mask |= tx_ring->ims_val;
       
  2021 	ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
       
  2022 
       
  2023 	/* set vector for Other Causes, e.g. link changes */
       
  2024 	vector++;
       
  2025 	ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
       
  2026 	if (rx_ring->itr_val)
       
  2027 		writel(1000000000 / (rx_ring->itr_val * 256),
       
  2028 		       hw->hw_addr + E1000_EITR_82574(vector));
       
  2029 	else
       
  2030 		writel(1, hw->hw_addr + E1000_EITR_82574(vector));
       
  2031 
       
  2032 	/* Cause Tx interrupts on every write back */
       
  2033 	ivar |= (1 << 31);
       
  2034 
       
  2035 	ew32(IVAR, ivar);
       
  2036 
       
  2037 	/* enable MSI-X PBA support */
       
  2038 	ctrl_ext = er32(CTRL_EXT);
       
  2039 	ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
       
  2040 
       
  2041 	/* Auto-Mask Other interrupts upon ICR read */
       
  2042 	ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
       
  2043 	ctrl_ext |= E1000_CTRL_EXT_EIAME;
       
  2044 	ew32(CTRL_EXT, ctrl_ext);
       
  2045 	e1e_flush();
       
  2046 }
       
  2047 
       
  2048 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
       
  2049 {
       
  2050 	if (adapter->msix_entries) {
       
  2051 		pci_disable_msix(adapter->pdev);
       
  2052 		kfree(adapter->msix_entries);
       
  2053 		adapter->msix_entries = NULL;
       
  2054 	} else if (adapter->flags & FLAG_MSI_ENABLED) {
       
  2055 		pci_disable_msi(adapter->pdev);
       
  2056 		adapter->flags &= ~FLAG_MSI_ENABLED;
       
  2057 	}
       
  2058 }
       
  2059 
       
  2060 /**
       
  2061  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
       
  2062  *
       
  2063  * Attempt to configure interrupts using the best available
       
  2064  * capabilities of the hardware and kernel.
       
  2065  **/
       
  2066 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
       
  2067 {
       
  2068 	int err;
       
  2069 	int i;
       
  2070 
       
  2071 	switch (adapter->int_mode) {
       
  2072 	case E1000E_INT_MODE_MSIX:
       
  2073 		if (adapter->flags & FLAG_HAS_MSIX) {
       
  2074 			adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
       
  2075 			adapter->msix_entries = kcalloc(adapter->num_vectors,
       
  2076 							sizeof(struct
       
  2077 							       msix_entry),
       
  2078 							GFP_KERNEL);
       
  2079 			if (adapter->msix_entries) {
       
  2080 				struct e1000_adapter *a = adapter;
       
  2081 
       
  2082 				for (i = 0; i < adapter->num_vectors; i++)
       
  2083 					adapter->msix_entries[i].entry = i;
       
  2084 
       
  2085 				err = pci_enable_msix_range(a->pdev,
       
  2086 							    a->msix_entries,
       
  2087 							    a->num_vectors,
       
  2088 							    a->num_vectors);
       
  2089 				if (err > 0)
       
  2090 					return;
       
  2091 			}
       
  2092 			/* MSI-X failed, so fall through and try MSI */
       
  2093 			e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
       
  2094 			e1000e_reset_interrupt_capability(adapter);
       
  2095 		}
       
  2096 		adapter->int_mode = E1000E_INT_MODE_MSI;
       
  2097 		/* Fall through */
       
  2098 	case E1000E_INT_MODE_MSI:
       
  2099 		if (!pci_enable_msi(adapter->pdev)) {
       
  2100 			adapter->flags |= FLAG_MSI_ENABLED;
       
  2101 		} else {
       
  2102 			adapter->int_mode = E1000E_INT_MODE_LEGACY;
       
  2103 			e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
       
  2104 		}
       
  2105 		/* Fall through */
       
  2106 	case E1000E_INT_MODE_LEGACY:
       
  2107 		/* Don't do anything; this is the system default */
       
  2108 		break;
       
  2109 	}
       
  2110 
       
  2111 	/* store the number of vectors being used */
       
  2112 	adapter->num_vectors = 1;
       
  2113 }
       
  2114 
       
  2115 /**
       
  2116  * e1000_request_msix - Initialize MSI-X interrupts
       
  2117  *
       
  2118  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
       
  2119  * kernel.
       
  2120  **/
       
  2121 static int e1000_request_msix(struct e1000_adapter *adapter)
       
  2122 {
       
  2123 	struct net_device *netdev = adapter->netdev;
       
  2124 	int err = 0, vector = 0;
       
  2125 
       
  2126 	if (strlen(netdev->name) < (IFNAMSIZ - 5))
       
  2127 		snprintf(adapter->rx_ring->name,
       
  2128 			 sizeof(adapter->rx_ring->name) - 1,
       
  2129 			 "%s-rx-0", netdev->name);
       
  2130 	else
       
  2131 		memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
       
  2132 	err = request_irq(adapter->msix_entries[vector].vector,
       
  2133 			  e1000_intr_msix_rx, 0, adapter->rx_ring->name,
       
  2134 			  netdev);
       
  2135 	if (err)
       
  2136 		return err;
       
  2137 	adapter->rx_ring->itr_register = adapter->hw.hw_addr +
       
  2138 	    E1000_EITR_82574(vector);
       
  2139 	adapter->rx_ring->itr_val = adapter->itr;
       
  2140 	vector++;
       
  2141 
       
  2142 	if (strlen(netdev->name) < (IFNAMSIZ - 5))
       
  2143 		snprintf(adapter->tx_ring->name,
       
  2144 			 sizeof(adapter->tx_ring->name) - 1,
       
  2145 			 "%s-tx-0", netdev->name);
       
  2146 	else
       
  2147 		memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
       
  2148 	err = request_irq(adapter->msix_entries[vector].vector,
       
  2149 			  e1000_intr_msix_tx, 0, adapter->tx_ring->name,
       
  2150 			  netdev);
       
  2151 	if (err)
       
  2152 		return err;
       
  2153 	adapter->tx_ring->itr_register = adapter->hw.hw_addr +
       
  2154 	    E1000_EITR_82574(vector);
       
  2155 	adapter->tx_ring->itr_val = adapter->itr;
       
  2156 	vector++;
       
  2157 
       
  2158 	err = request_irq(adapter->msix_entries[vector].vector,
       
  2159 			  e1000_msix_other, 0, netdev->name, netdev);
       
  2160 	if (err)
       
  2161 		return err;
       
  2162 
       
  2163 	e1000_configure_msix(adapter);
       
  2164 
       
  2165 	return 0;
       
  2166 }
       
  2167 
       
  2168 /**
       
  2169  * e1000_request_irq - initialize interrupts
       
  2170  *
       
  2171  * Attempts to configure interrupts using the best available
       
  2172  * capabilities of the hardware and kernel.
       
  2173  **/
       
  2174 static int e1000_request_irq(struct e1000_adapter *adapter)
       
  2175 {
       
  2176 	struct net_device *netdev = adapter->netdev;
       
  2177 	int err;
       
  2178 
       
  2179 	if (adapter->msix_entries) {
       
  2180 		err = e1000_request_msix(adapter);
       
  2181 		if (!err)
       
  2182 			return err;
       
  2183 		/* fall back to MSI */
       
  2184 		e1000e_reset_interrupt_capability(adapter);
       
  2185 		adapter->int_mode = E1000E_INT_MODE_MSI;
       
  2186 		e1000e_set_interrupt_capability(adapter);
       
  2187 	}
       
  2188 	if (adapter->flags & FLAG_MSI_ENABLED) {
       
  2189 		err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
       
  2190 				  netdev->name, netdev);
       
  2191 		if (!err)
       
  2192 			return err;
       
  2193 
       
  2194 		/* fall back to legacy interrupt */
       
  2195 		e1000e_reset_interrupt_capability(adapter);
       
  2196 		adapter->int_mode = E1000E_INT_MODE_LEGACY;
       
  2197 	}
       
  2198 
       
  2199 	err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
       
  2200 			  netdev->name, netdev);
       
  2201 	if (err)
       
  2202 		e_err("Unable to allocate interrupt, Error: %d\n", err);
       
  2203 
       
  2204 	return err;
       
  2205 }
       
  2206 
       
  2207 static void e1000_free_irq(struct e1000_adapter *adapter)
       
  2208 {
       
  2209 	struct net_device *netdev = adapter->netdev;
       
  2210 
       
  2211 	if (adapter->msix_entries) {
       
  2212 		int vector = 0;
       
  2213 
       
  2214 		free_irq(adapter->msix_entries[vector].vector, netdev);
       
  2215 		vector++;
       
  2216 
       
  2217 		free_irq(adapter->msix_entries[vector].vector, netdev);
       
  2218 		vector++;
       
  2219 
       
  2220 		/* Other Causes interrupt vector */
       
  2221 		free_irq(adapter->msix_entries[vector].vector, netdev);
       
  2222 		return;
       
  2223 	}
       
  2224 
       
  2225 	free_irq(adapter->pdev->irq, netdev);
       
  2226 }
       
  2227 
       
  2228 /**
       
  2229  * e1000_irq_disable - Mask off interrupt generation on the NIC
       
  2230  **/
       
  2231 static void e1000_irq_disable(struct e1000_adapter *adapter)
       
  2232 {
       
  2233 	struct e1000_hw *hw = &adapter->hw;
       
  2234 
       
  2235 	ew32(IMC, ~0);
       
  2236 	if (adapter->msix_entries)
       
  2237 		ew32(EIAC_82574, 0);
       
  2238 	e1e_flush();
       
  2239 
       
  2240 	if (adapter->msix_entries) {
       
  2241 		int i;
       
  2242 
       
  2243 		for (i = 0; i < adapter->num_vectors; i++)
       
  2244 			synchronize_irq(adapter->msix_entries[i].vector);
       
  2245 	} else {
       
  2246 		synchronize_irq(adapter->pdev->irq);
       
  2247 	}
       
  2248 }
       
  2249 
       
  2250 /**
       
  2251  * e1000_irq_enable - Enable default interrupt generation settings
       
  2252  **/
       
  2253 static void e1000_irq_enable(struct e1000_adapter *adapter)
       
  2254 {
       
  2255 	struct e1000_hw *hw = &adapter->hw;
       
  2256 
       
  2257 	if (adapter->msix_entries) {
       
  2258 		ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
       
  2259 		ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
       
  2260 	} else if (hw->mac.type == e1000_pch_lpt) {
       
  2261 		ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
       
  2262 	} else {
       
  2263 		ew32(IMS, IMS_ENABLE_MASK);
       
  2264 	}
       
  2265 	e1e_flush();
       
  2266 }
       
  2267 
       
  2268 /**
       
  2269  * e1000e_get_hw_control - get control of the h/w from f/w
       
  2270  * @adapter: address of board private structure
       
  2271  *
       
  2272  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
       
  2273  * For ASF and Pass Through versions of f/w this means that
       
  2274  * the driver is loaded. For AMT version (only with 82573)
       
  2275  * of the f/w this means that the network i/f is open.
       
  2276  **/
       
  2277 void e1000e_get_hw_control(struct e1000_adapter *adapter)
       
  2278 {
       
  2279 	struct e1000_hw *hw = &adapter->hw;
       
  2280 	u32 ctrl_ext;
       
  2281 	u32 swsm;
       
  2282 
       
  2283 	/* Let firmware know the driver has taken over */
       
  2284 	if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
       
  2285 		swsm = er32(SWSM);
       
  2286 		ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
       
  2287 	} else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
       
  2288 		ctrl_ext = er32(CTRL_EXT);
       
  2289 		ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
       
  2290 	}
       
  2291 }
       
  2292 
       
  2293 /**
       
  2294  * e1000e_release_hw_control - release control of the h/w to f/w
       
  2295  * @adapter: address of board private structure
       
  2296  *
       
  2297  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
       
  2298  * For ASF and Pass Through versions of f/w this means that the
       
  2299  * driver is no longer loaded. For AMT version (only with 82573) i
       
  2300  * of the f/w this means that the network i/f is closed.
       
  2301  *
       
  2302  **/
       
  2303 void e1000e_release_hw_control(struct e1000_adapter *adapter)
       
  2304 {
       
  2305 	struct e1000_hw *hw = &adapter->hw;
       
  2306 	u32 ctrl_ext;
       
  2307 	u32 swsm;
       
  2308 
       
  2309 	/* Let firmware taken over control of h/w */
       
  2310 	if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
       
  2311 		swsm = er32(SWSM);
       
  2312 		ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
       
  2313 	} else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
       
  2314 		ctrl_ext = er32(CTRL_EXT);
       
  2315 		ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
       
  2316 	}
       
  2317 }
       
  2318 
       
  2319 /**
       
  2320  * e1000_alloc_ring_dma - allocate memory for a ring structure
       
  2321  **/
       
  2322 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
       
  2323 				struct e1000_ring *ring)
       
  2324 {
       
  2325 	struct pci_dev *pdev = adapter->pdev;
       
  2326 
       
  2327 	ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
       
  2328 					GFP_KERNEL);
       
  2329 	if (!ring->desc)
       
  2330 		return -ENOMEM;
       
  2331 
       
  2332 	return 0;
       
  2333 }
       
  2334 
       
  2335 /**
       
  2336  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
       
  2337  * @tx_ring: Tx descriptor ring
       
  2338  *
       
  2339  * Return 0 on success, negative on failure
       
  2340  **/
       
  2341 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
       
  2342 {
       
  2343 	struct e1000_adapter *adapter = tx_ring->adapter;
       
  2344 	int err = -ENOMEM, size;
       
  2345 
       
  2346 	size = sizeof(struct e1000_buffer) * tx_ring->count;
       
  2347 	tx_ring->buffer_info = vzalloc(size);
       
  2348 	if (!tx_ring->buffer_info)
       
  2349 		goto err;
       
  2350 
       
  2351 	/* round up to nearest 4K */
       
  2352 	tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
       
  2353 	tx_ring->size = ALIGN(tx_ring->size, 4096);
       
  2354 
       
  2355 	err = e1000_alloc_ring_dma(adapter, tx_ring);
       
  2356 	if (err)
       
  2357 		goto err;
       
  2358 
       
  2359 	tx_ring->next_to_use = 0;
       
  2360 	tx_ring->next_to_clean = 0;
       
  2361 
       
  2362 	return 0;
       
  2363 err:
       
  2364 	vfree(tx_ring->buffer_info);
       
  2365 	e_err("Unable to allocate memory for the transmit descriptor ring\n");
       
  2366 	return err;
       
  2367 }
       
  2368 
       
  2369 /**
       
  2370  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
       
  2371  * @rx_ring: Rx descriptor ring
       
  2372  *
       
  2373  * Returns 0 on success, negative on failure
       
  2374  **/
       
  2375 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
       
  2376 {
       
  2377 	struct e1000_adapter *adapter = rx_ring->adapter;
       
  2378 	struct e1000_buffer *buffer_info;
       
  2379 	int i, size, desc_len, err = -ENOMEM;
       
  2380 
       
  2381 	size = sizeof(struct e1000_buffer) * rx_ring->count;
       
  2382 	rx_ring->buffer_info = vzalloc(size);
       
  2383 	if (!rx_ring->buffer_info)
       
  2384 		goto err;
       
  2385 
       
  2386 	for (i = 0; i < rx_ring->count; i++) {
       
  2387 		buffer_info = &rx_ring->buffer_info[i];
       
  2388 		buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
       
  2389 						sizeof(struct e1000_ps_page),
       
  2390 						GFP_KERNEL);
       
  2391 		if (!buffer_info->ps_pages)
       
  2392 			goto err_pages;
       
  2393 	}
       
  2394 
       
  2395 	desc_len = sizeof(union e1000_rx_desc_packet_split);
       
  2396 
       
  2397 	/* Round up to nearest 4K */
       
  2398 	rx_ring->size = rx_ring->count * desc_len;
       
  2399 	rx_ring->size = ALIGN(rx_ring->size, 4096);
       
  2400 
       
  2401 	err = e1000_alloc_ring_dma(adapter, rx_ring);
       
  2402 	if (err)
       
  2403 		goto err_pages;
       
  2404 
       
  2405 	rx_ring->next_to_clean = 0;
       
  2406 	rx_ring->next_to_use = 0;
       
  2407 	rx_ring->rx_skb_top = NULL;
       
  2408 
       
  2409 	return 0;
       
  2410 
       
  2411 err_pages:
       
  2412 	for (i = 0; i < rx_ring->count; i++) {
       
  2413 		buffer_info = &rx_ring->buffer_info[i];
       
  2414 		kfree(buffer_info->ps_pages);
       
  2415 	}
       
  2416 err:
       
  2417 	vfree(rx_ring->buffer_info);
       
  2418 	e_err("Unable to allocate memory for the receive descriptor ring\n");
       
  2419 	return err;
       
  2420 }
       
  2421 
       
  2422 /**
       
  2423  * e1000_clean_tx_ring - Free Tx Buffers
       
  2424  * @tx_ring: Tx descriptor ring
       
  2425  **/
       
  2426 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
       
  2427 {
       
  2428 	struct e1000_adapter *adapter = tx_ring->adapter;
       
  2429 	struct e1000_buffer *buffer_info;
       
  2430 	unsigned long size;
       
  2431 	unsigned int i;
       
  2432 
       
  2433 	for (i = 0; i < tx_ring->count; i++) {
       
  2434 		buffer_info = &tx_ring->buffer_info[i];
       
  2435 		e1000_put_txbuf(tx_ring, buffer_info);
       
  2436 	}
       
  2437 
       
  2438 	netdev_reset_queue(adapter->netdev);
       
  2439 	size = sizeof(struct e1000_buffer) * tx_ring->count;
       
  2440 	memset(tx_ring->buffer_info, 0, size);
       
  2441 
       
  2442 	memset(tx_ring->desc, 0, tx_ring->size);
       
  2443 
       
  2444 	tx_ring->next_to_use = 0;
       
  2445 	tx_ring->next_to_clean = 0;
       
  2446 
       
  2447 	writel(0, tx_ring->head);
       
  2448 	if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
       
  2449 		e1000e_update_tdt_wa(tx_ring, 0);
       
  2450 	else
       
  2451 		writel(0, tx_ring->tail);
       
  2452 }
       
  2453 
       
  2454 /**
       
  2455  * e1000e_free_tx_resources - Free Tx Resources per Queue
       
  2456  * @tx_ring: Tx descriptor ring
       
  2457  *
       
  2458  * Free all transmit software resources
       
  2459  **/
       
  2460 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
       
  2461 {
       
  2462 	struct e1000_adapter *adapter = tx_ring->adapter;
       
  2463 	struct pci_dev *pdev = adapter->pdev;
       
  2464 
       
  2465 	e1000_clean_tx_ring(tx_ring);
       
  2466 
       
  2467 	vfree(tx_ring->buffer_info);
       
  2468 	tx_ring->buffer_info = NULL;
       
  2469 
       
  2470 	dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
       
  2471 			  tx_ring->dma);
       
  2472 	tx_ring->desc = NULL;
       
  2473 }
       
  2474 
       
  2475 /**
       
  2476  * e1000e_free_rx_resources - Free Rx Resources
       
  2477  * @rx_ring: Rx descriptor ring
       
  2478  *
       
  2479  * Free all receive software resources
       
  2480  **/
       
  2481 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
       
  2482 {
       
  2483 	struct e1000_adapter *adapter = rx_ring->adapter;
       
  2484 	struct pci_dev *pdev = adapter->pdev;
       
  2485 	int i;
       
  2486 
       
  2487 	e1000_clean_rx_ring(rx_ring);
       
  2488 
       
  2489 	for (i = 0; i < rx_ring->count; i++)
       
  2490 		kfree(rx_ring->buffer_info[i].ps_pages);
       
  2491 
       
  2492 	vfree(rx_ring->buffer_info);
       
  2493 	rx_ring->buffer_info = NULL;
       
  2494 
       
  2495 	dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
       
  2496 			  rx_ring->dma);
       
  2497 	rx_ring->desc = NULL;
       
  2498 }
       
  2499 
       
  2500 /**
       
  2501  * e1000_update_itr - update the dynamic ITR value based on statistics
       
  2502  * @adapter: pointer to adapter
       
  2503  * @itr_setting: current adapter->itr
       
  2504  * @packets: the number of packets during this measurement interval
       
  2505  * @bytes: the number of bytes during this measurement interval
       
  2506  *
       
  2507  *      Stores a new ITR value based on packets and byte
       
  2508  *      counts during the last interrupt.  The advantage of per interrupt
       
  2509  *      computation is faster updates and more accurate ITR for the current
       
  2510  *      traffic pattern.  Constants in this function were computed
       
  2511  *      based on theoretical maximum wire speed and thresholds were set based
       
  2512  *      on testing data as well as attempting to minimize response time
       
  2513  *      while increasing bulk throughput.  This functionality is controlled
       
  2514  *      by the InterruptThrottleRate module parameter.
       
  2515  **/
       
  2516 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
       
  2517 {
       
  2518 	unsigned int retval = itr_setting;
       
  2519 
       
  2520 	if (packets == 0)
       
  2521 		return itr_setting;
       
  2522 
       
  2523 	switch (itr_setting) {
       
  2524 	case lowest_latency:
       
  2525 		/* handle TSO and jumbo frames */
       
  2526 		if (bytes / packets > 8000)
       
  2527 			retval = bulk_latency;
       
  2528 		else if ((packets < 5) && (bytes > 512))
       
  2529 			retval = low_latency;
       
  2530 		break;
       
  2531 	case low_latency:	/* 50 usec aka 20000 ints/s */
       
  2532 		if (bytes > 10000) {
       
  2533 			/* this if handles the TSO accounting */
       
  2534 			if (bytes / packets > 8000)
       
  2535 				retval = bulk_latency;
       
  2536 			else if ((packets < 10) || ((bytes / packets) > 1200))
       
  2537 				retval = bulk_latency;
       
  2538 			else if ((packets > 35))
       
  2539 				retval = lowest_latency;
       
  2540 		} else if (bytes / packets > 2000) {
       
  2541 			retval = bulk_latency;
       
  2542 		} else if (packets <= 2 && bytes < 512) {
       
  2543 			retval = lowest_latency;
       
  2544 		}
       
  2545 		break;
       
  2546 	case bulk_latency:	/* 250 usec aka 4000 ints/s */
       
  2547 		if (bytes > 25000) {
       
  2548 			if (packets > 35)
       
  2549 				retval = low_latency;
       
  2550 		} else if (bytes < 6000) {
       
  2551 			retval = low_latency;
       
  2552 		}
       
  2553 		break;
       
  2554 	}
       
  2555 
       
  2556 	return retval;
       
  2557 }
       
  2558 
       
  2559 static void e1000_set_itr(struct e1000_adapter *adapter)
       
  2560 {
       
  2561 	u16 current_itr;
       
  2562 	u32 new_itr = adapter->itr;
       
  2563 
       
  2564 	/* for non-gigabit speeds, just fix the interrupt rate at 4000 */
       
  2565 	if (adapter->link_speed != SPEED_1000) {
       
  2566 		current_itr = 0;
       
  2567 		new_itr = 4000;
       
  2568 		goto set_itr_now;
       
  2569 	}
       
  2570 
       
  2571 	if (adapter->flags2 & FLAG2_DISABLE_AIM) {
       
  2572 		new_itr = 0;
       
  2573 		goto set_itr_now;
       
  2574 	}
       
  2575 
       
  2576 	adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
       
  2577 					   adapter->total_tx_packets,
       
  2578 					   adapter->total_tx_bytes);
       
  2579 	/* conservative mode (itr 3) eliminates the lowest_latency setting */
       
  2580 	if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
       
  2581 		adapter->tx_itr = low_latency;
       
  2582 
       
  2583 	adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
       
  2584 					   adapter->total_rx_packets,
       
  2585 					   adapter->total_rx_bytes);
       
  2586 	/* conservative mode (itr 3) eliminates the lowest_latency setting */
       
  2587 	if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
       
  2588 		adapter->rx_itr = low_latency;
       
  2589 
       
  2590 	current_itr = max(adapter->rx_itr, adapter->tx_itr);
       
  2591 
       
  2592 	/* counts and packets in update_itr are dependent on these numbers */
       
  2593 	switch (current_itr) {
       
  2594 	case lowest_latency:
       
  2595 		new_itr = 70000;
       
  2596 		break;
       
  2597 	case low_latency:
       
  2598 		new_itr = 20000;	/* aka hwitr = ~200 */
       
  2599 		break;
       
  2600 	case bulk_latency:
       
  2601 		new_itr = 4000;
       
  2602 		break;
       
  2603 	default:
       
  2604 		break;
       
  2605 	}
       
  2606 
       
  2607 set_itr_now:
       
  2608 	if (new_itr != adapter->itr) {
       
  2609 		/* this attempts to bias the interrupt rate towards Bulk
       
  2610 		 * by adding intermediate steps when interrupt rate is
       
  2611 		 * increasing
       
  2612 		 */
       
  2613 		new_itr = new_itr > adapter->itr ?
       
  2614 		    min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
       
  2615 		adapter->itr = new_itr;
       
  2616 		adapter->rx_ring->itr_val = new_itr;
       
  2617 		if (adapter->msix_entries)
       
  2618 			adapter->rx_ring->set_itr = 1;
       
  2619 		else
       
  2620 			e1000e_write_itr(adapter, new_itr);
       
  2621 	}
       
  2622 }
       
  2623 
       
  2624 /**
       
  2625  * e1000e_write_itr - write the ITR value to the appropriate registers
       
  2626  * @adapter: address of board private structure
       
  2627  * @itr: new ITR value to program
       
  2628  *
       
  2629  * e1000e_write_itr determines if the adapter is in MSI-X mode
       
  2630  * and, if so, writes the EITR registers with the ITR value.
       
  2631  * Otherwise, it writes the ITR value into the ITR register.
       
  2632  **/
       
  2633 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
       
  2634 {
       
  2635 	struct e1000_hw *hw = &adapter->hw;
       
  2636 	u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
       
  2637 
       
  2638 	if (adapter->msix_entries) {
       
  2639 		int vector;
       
  2640 
       
  2641 		for (vector = 0; vector < adapter->num_vectors; vector++)
       
  2642 			writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
       
  2643 	} else {
       
  2644 		ew32(ITR, new_itr);
       
  2645 	}
       
  2646 }
       
  2647 
       
  2648 /**
       
  2649  * e1000_alloc_queues - Allocate memory for all rings
       
  2650  * @adapter: board private structure to initialize
       
  2651  **/
       
  2652 static int e1000_alloc_queues(struct e1000_adapter *adapter)
       
  2653 {
       
  2654 	int size = sizeof(struct e1000_ring);
       
  2655 
       
  2656 	adapter->tx_ring = kzalloc(size, GFP_KERNEL);
       
  2657 	if (!adapter->tx_ring)
       
  2658 		goto err;
       
  2659 	adapter->tx_ring->count = adapter->tx_ring_count;
       
  2660 	adapter->tx_ring->adapter = adapter;
       
  2661 
       
  2662 	adapter->rx_ring = kzalloc(size, GFP_KERNEL);
       
  2663 	if (!adapter->rx_ring)
       
  2664 		goto err;
       
  2665 	adapter->rx_ring->count = adapter->rx_ring_count;
       
  2666 	adapter->rx_ring->adapter = adapter;
       
  2667 
       
  2668 	return 0;
       
  2669 err:
       
  2670 	e_err("Unable to allocate memory for queues\n");
       
  2671 	kfree(adapter->rx_ring);
       
  2672 	kfree(adapter->tx_ring);
       
  2673 	return -ENOMEM;
       
  2674 }
       
  2675 
       
  2676 /**
       
  2677  * e1000e_poll - NAPI Rx polling callback
       
  2678  * @napi: struct associated with this polling callback
       
  2679  * @weight: number of packets driver is allowed to process this poll
       
  2680  **/
       
  2681 static int e1000e_poll(struct napi_struct *napi, int weight)
       
  2682 {
       
  2683 	struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
       
  2684 						     napi);
       
  2685 	struct e1000_hw *hw = &adapter->hw;
       
  2686 	struct net_device *poll_dev = adapter->netdev;
       
  2687 	int tx_cleaned = 1, work_done = 0;
       
  2688 
       
  2689 	adapter = netdev_priv(poll_dev);
       
  2690 
       
  2691 	if (!adapter->msix_entries ||
       
  2692 	    (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
       
  2693 		tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
       
  2694 
       
  2695 	adapter->clean_rx(adapter->rx_ring, &work_done, weight);
       
  2696 
       
  2697 	if (!tx_cleaned)
       
  2698 		work_done = weight;
       
  2699 
       
  2700 	/* If weight not fully consumed, exit the polling mode */
       
  2701 	if (work_done < weight) {
       
  2702 		if (adapter->itr_setting & 3)
       
  2703 			e1000_set_itr(adapter);
       
  2704 		napi_complete(napi);
       
  2705 		if (!test_bit(__E1000_DOWN, &adapter->state)) {
       
  2706 			if (adapter->msix_entries)
       
  2707 				ew32(IMS, adapter->rx_ring->ims_val);
       
  2708 			else
       
  2709 				e1000_irq_enable(adapter);
       
  2710 		}
       
  2711 	}
       
  2712 
       
  2713 	return work_done;
       
  2714 }
       
  2715 
       
  2716 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
       
  2717 				 __always_unused __be16 proto, u16 vid)
       
  2718 {
       
  2719 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  2720 	struct e1000_hw *hw = &adapter->hw;
       
  2721 	u32 vfta, index;
       
  2722 
       
  2723 	/* don't update vlan cookie if already programmed */
       
  2724 	if ((adapter->hw.mng_cookie.status &
       
  2725 	     E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
       
  2726 	    (vid == adapter->mng_vlan_id))
       
  2727 		return 0;
       
  2728 
       
  2729 	/* add VID to filter table */
       
  2730 	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
       
  2731 		index = (vid >> 5) & 0x7F;
       
  2732 		vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
       
  2733 		vfta |= (1 << (vid & 0x1F));
       
  2734 		hw->mac.ops.write_vfta(hw, index, vfta);
       
  2735 	}
       
  2736 
       
  2737 	set_bit(vid, adapter->active_vlans);
       
  2738 
       
  2739 	return 0;
       
  2740 }
       
  2741 
       
  2742 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
       
  2743 				  __always_unused __be16 proto, u16 vid)
       
  2744 {
       
  2745 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  2746 	struct e1000_hw *hw = &adapter->hw;
       
  2747 	u32 vfta, index;
       
  2748 
       
  2749 	if ((adapter->hw.mng_cookie.status &
       
  2750 	     E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
       
  2751 	    (vid == adapter->mng_vlan_id)) {
       
  2752 		/* release control to f/w */
       
  2753 		e1000e_release_hw_control(adapter);
       
  2754 		return 0;
       
  2755 	}
       
  2756 
       
  2757 	/* remove VID from filter table */
       
  2758 	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
       
  2759 		index = (vid >> 5) & 0x7F;
       
  2760 		vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
       
  2761 		vfta &= ~(1 << (vid & 0x1F));
       
  2762 		hw->mac.ops.write_vfta(hw, index, vfta);
       
  2763 	}
       
  2764 
       
  2765 	clear_bit(vid, adapter->active_vlans);
       
  2766 
       
  2767 	return 0;
       
  2768 }
       
  2769 
       
  2770 /**
       
  2771  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
       
  2772  * @adapter: board private structure to initialize
       
  2773  **/
       
  2774 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
       
  2775 {
       
  2776 	struct net_device *netdev = adapter->netdev;
       
  2777 	struct e1000_hw *hw = &adapter->hw;
       
  2778 	u32 rctl;
       
  2779 
       
  2780 	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
       
  2781 		/* disable VLAN receive filtering */
       
  2782 		rctl = er32(RCTL);
       
  2783 		rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
       
  2784 		ew32(RCTL, rctl);
       
  2785 
       
  2786 		if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
       
  2787 			e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
       
  2788 					       adapter->mng_vlan_id);
       
  2789 			adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
       
  2790 		}
       
  2791 	}
       
  2792 }
       
  2793 
       
  2794 /**
       
  2795  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
       
  2796  * @adapter: board private structure to initialize
       
  2797  **/
       
  2798 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
       
  2799 {
       
  2800 	struct e1000_hw *hw = &adapter->hw;
       
  2801 	u32 rctl;
       
  2802 
       
  2803 	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
       
  2804 		/* enable VLAN receive filtering */
       
  2805 		rctl = er32(RCTL);
       
  2806 		rctl |= E1000_RCTL_VFE;
       
  2807 		rctl &= ~E1000_RCTL_CFIEN;
       
  2808 		ew32(RCTL, rctl);
       
  2809 	}
       
  2810 }
       
  2811 
       
  2812 /**
       
  2813  * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
       
  2814  * @adapter: board private structure to initialize
       
  2815  **/
       
  2816 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
       
  2817 {
       
  2818 	struct e1000_hw *hw = &adapter->hw;
       
  2819 	u32 ctrl;
       
  2820 
       
  2821 	/* disable VLAN tag insert/strip */
       
  2822 	ctrl = er32(CTRL);
       
  2823 	ctrl &= ~E1000_CTRL_VME;
       
  2824 	ew32(CTRL, ctrl);
       
  2825 }
       
  2826 
       
  2827 /**
       
  2828  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
       
  2829  * @adapter: board private structure to initialize
       
  2830  **/
       
  2831 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
       
  2832 {
       
  2833 	struct e1000_hw *hw = &adapter->hw;
       
  2834 	u32 ctrl;
       
  2835 
       
  2836 	/* enable VLAN tag insert/strip */
       
  2837 	ctrl = er32(CTRL);
       
  2838 	ctrl |= E1000_CTRL_VME;
       
  2839 	ew32(CTRL, ctrl);
       
  2840 }
       
  2841 
       
  2842 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
       
  2843 {
       
  2844 	struct net_device *netdev = adapter->netdev;
       
  2845 	u16 vid = adapter->hw.mng_cookie.vlan_id;
       
  2846 	u16 old_vid = adapter->mng_vlan_id;
       
  2847 
       
  2848 	if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
       
  2849 		e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
       
  2850 		adapter->mng_vlan_id = vid;
       
  2851 	}
       
  2852 
       
  2853 	if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
       
  2854 		e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
       
  2855 }
       
  2856 
       
  2857 static void e1000_restore_vlan(struct e1000_adapter *adapter)
       
  2858 {
       
  2859 	u16 vid;
       
  2860 
       
  2861 	e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
       
  2862 
       
  2863 	for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
       
  2864 	    e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
       
  2865 }
       
  2866 
       
  2867 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
       
  2868 {
       
  2869 	struct e1000_hw *hw = &adapter->hw;
       
  2870 	u32 manc, manc2h, mdef, i, j;
       
  2871 
       
  2872 	if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
       
  2873 		return;
       
  2874 
       
  2875 	manc = er32(MANC);
       
  2876 
       
  2877 	/* enable receiving management packets to the host. this will probably
       
  2878 	 * generate destination unreachable messages from the host OS, but
       
  2879 	 * the packets will be handled on SMBUS
       
  2880 	 */
       
  2881 	manc |= E1000_MANC_EN_MNG2HOST;
       
  2882 	manc2h = er32(MANC2H);
       
  2883 
       
  2884 	switch (hw->mac.type) {
       
  2885 	default:
       
  2886 		manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
       
  2887 		break;
       
  2888 	case e1000_82574:
       
  2889 	case e1000_82583:
       
  2890 		/* Check if IPMI pass-through decision filter already exists;
       
  2891 		 * if so, enable it.
       
  2892 		 */
       
  2893 		for (i = 0, j = 0; i < 8; i++) {
       
  2894 			mdef = er32(MDEF(i));
       
  2895 
       
  2896 			/* Ignore filters with anything other than IPMI ports */
       
  2897 			if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
       
  2898 				continue;
       
  2899 
       
  2900 			/* Enable this decision filter in MANC2H */
       
  2901 			if (mdef)
       
  2902 				manc2h |= (1 << i);
       
  2903 
       
  2904 			j |= mdef;
       
  2905 		}
       
  2906 
       
  2907 		if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
       
  2908 			break;
       
  2909 
       
  2910 		/* Create new decision filter in an empty filter */
       
  2911 		for (i = 0, j = 0; i < 8; i++)
       
  2912 			if (er32(MDEF(i)) == 0) {
       
  2913 				ew32(MDEF(i), (E1000_MDEF_PORT_623 |
       
  2914 					       E1000_MDEF_PORT_664));
       
  2915 				manc2h |= (1 << 1);
       
  2916 				j++;
       
  2917 				break;
       
  2918 			}
       
  2919 
       
  2920 		if (!j)
       
  2921 			e_warn("Unable to create IPMI pass-through filter\n");
       
  2922 		break;
       
  2923 	}
       
  2924 
       
  2925 	ew32(MANC2H, manc2h);
       
  2926 	ew32(MANC, manc);
       
  2927 }
       
  2928 
       
  2929 /**
       
  2930  * e1000_configure_tx - Configure Transmit Unit after Reset
       
  2931  * @adapter: board private structure
       
  2932  *
       
  2933  * Configure the Tx unit of the MAC after a reset.
       
  2934  **/
       
  2935 static void e1000_configure_tx(struct e1000_adapter *adapter)
       
  2936 {
       
  2937 	struct e1000_hw *hw = &adapter->hw;
       
  2938 	struct e1000_ring *tx_ring = adapter->tx_ring;
       
  2939 	u64 tdba;
       
  2940 	u32 tdlen, tctl, tarc;
       
  2941 
       
  2942 	/* Setup the HW Tx Head and Tail descriptor pointers */
       
  2943 	tdba = tx_ring->dma;
       
  2944 	tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
       
  2945 	ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
       
  2946 	ew32(TDBAH(0), (tdba >> 32));
       
  2947 	ew32(TDLEN(0), tdlen);
       
  2948 	ew32(TDH(0), 0);
       
  2949 	ew32(TDT(0), 0);
       
  2950 	tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
       
  2951 	tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
       
  2952 
       
  2953 	/* Set the Tx Interrupt Delay register */
       
  2954 	ew32(TIDV, adapter->tx_int_delay);
       
  2955 	/* Tx irq moderation */
       
  2956 	ew32(TADV, adapter->tx_abs_int_delay);
       
  2957 
       
  2958 	if (adapter->flags2 & FLAG2_DMA_BURST) {
       
  2959 		u32 txdctl = er32(TXDCTL(0));
       
  2960 
       
  2961 		txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
       
  2962 			    E1000_TXDCTL_WTHRESH);
       
  2963 		/* set up some performance related parameters to encourage the
       
  2964 		 * hardware to use the bus more efficiently in bursts, depends
       
  2965 		 * on the tx_int_delay to be enabled,
       
  2966 		 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
       
  2967 		 * hthresh = 1 ==> prefetch when one or more available
       
  2968 		 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
       
  2969 		 * BEWARE: this seems to work but should be considered first if
       
  2970 		 * there are Tx hangs or other Tx related bugs
       
  2971 		 */
       
  2972 		txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
       
  2973 		ew32(TXDCTL(0), txdctl);
       
  2974 	}
       
  2975 	/* erratum work around: set txdctl the same for both queues */
       
  2976 	ew32(TXDCTL(1), er32(TXDCTL(0)));
       
  2977 
       
  2978 	/* Program the Transmit Control Register */
       
  2979 	tctl = er32(TCTL);
       
  2980 	tctl &= ~E1000_TCTL_CT;
       
  2981 	tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
       
  2982 		(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
       
  2983 
       
  2984 	if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
       
  2985 		tarc = er32(TARC(0));
       
  2986 		/* set the speed mode bit, we'll clear it if we're not at
       
  2987 		 * gigabit link later
       
  2988 		 */
       
  2989 #define SPEED_MODE_BIT (1 << 21)
       
  2990 		tarc |= SPEED_MODE_BIT;
       
  2991 		ew32(TARC(0), tarc);
       
  2992 	}
       
  2993 
       
  2994 	/* errata: program both queues to unweighted RR */
       
  2995 	if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
       
  2996 		tarc = er32(TARC(0));
       
  2997 		tarc |= 1;
       
  2998 		ew32(TARC(0), tarc);
       
  2999 		tarc = er32(TARC(1));
       
  3000 		tarc |= 1;
       
  3001 		ew32(TARC(1), tarc);
       
  3002 	}
       
  3003 
       
  3004 	/* Setup Transmit Descriptor Settings for eop descriptor */
       
  3005 	adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
       
  3006 
       
  3007 	/* only set IDE if we are delaying interrupts using the timers */
       
  3008 	if (adapter->tx_int_delay)
       
  3009 		adapter->txd_cmd |= E1000_TXD_CMD_IDE;
       
  3010 
       
  3011 	/* enable Report Status bit */
       
  3012 	adapter->txd_cmd |= E1000_TXD_CMD_RS;
       
  3013 
       
  3014 	ew32(TCTL, tctl);
       
  3015 
       
  3016 	hw->mac.ops.config_collision_dist(hw);
       
  3017 }
       
  3018 
       
  3019 /**
       
  3020  * e1000_setup_rctl - configure the receive control registers
       
  3021  * @adapter: Board private structure
       
  3022  **/
       
  3023 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
       
  3024 			   (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
       
  3025 static void e1000_setup_rctl(struct e1000_adapter *adapter)
       
  3026 {
       
  3027 	struct e1000_hw *hw = &adapter->hw;
       
  3028 	u32 rctl, rfctl;
       
  3029 	u32 pages = 0;
       
  3030 
       
  3031 	/* Workaround Si errata on PCHx - configure jumbo frame flow.
       
  3032 	 * If jumbo frames not set, program related MAC/PHY registers
       
  3033 	 * to h/w defaults
       
  3034 	 */
       
  3035 	if (hw->mac.type >= e1000_pch2lan) {
       
  3036 		s32 ret_val;
       
  3037 
       
  3038 		if (adapter->netdev->mtu > ETH_DATA_LEN)
       
  3039 			ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
       
  3040 		else
       
  3041 			ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
       
  3042 
       
  3043 		if (ret_val)
       
  3044 			e_dbg("failed to enable|disable jumbo frame workaround mode\n");
       
  3045 	}
       
  3046 
       
  3047 	/* Program MC offset vector base */
       
  3048 	rctl = er32(RCTL);
       
  3049 	rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
       
  3050 	rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
       
  3051 	    E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
       
  3052 	    (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
       
  3053 
       
  3054 	/* Do not Store bad packets */
       
  3055 	rctl &= ~E1000_RCTL_SBP;
       
  3056 
       
  3057 	/* Enable Long Packet receive */
       
  3058 	if (adapter->netdev->mtu <= ETH_DATA_LEN)
       
  3059 		rctl &= ~E1000_RCTL_LPE;
       
  3060 	else
       
  3061 		rctl |= E1000_RCTL_LPE;
       
  3062 
       
  3063 	/* Some systems expect that the CRC is included in SMBUS traffic. The
       
  3064 	 * hardware strips the CRC before sending to both SMBUS (BMC) and to
       
  3065 	 * host memory when this is enabled
       
  3066 	 */
       
  3067 	if (adapter->flags2 & FLAG2_CRC_STRIPPING)
       
  3068 		rctl |= E1000_RCTL_SECRC;
       
  3069 
       
  3070 	/* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
       
  3071 	if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
       
  3072 		u16 phy_data;
       
  3073 
       
  3074 		e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
       
  3075 		phy_data &= 0xfff8;
       
  3076 		phy_data |= (1 << 2);
       
  3077 		e1e_wphy(hw, PHY_REG(770, 26), phy_data);
       
  3078 
       
  3079 		e1e_rphy(hw, 22, &phy_data);
       
  3080 		phy_data &= 0x0fff;
       
  3081 		phy_data |= (1 << 14);
       
  3082 		e1e_wphy(hw, 0x10, 0x2823);
       
  3083 		e1e_wphy(hw, 0x11, 0x0003);
       
  3084 		e1e_wphy(hw, 22, phy_data);
       
  3085 	}
       
  3086 
       
  3087 	/* Setup buffer sizes */
       
  3088 	rctl &= ~E1000_RCTL_SZ_4096;
       
  3089 	rctl |= E1000_RCTL_BSEX;
       
  3090 	switch (adapter->rx_buffer_len) {
       
  3091 	case 2048:
       
  3092 	default:
       
  3093 		rctl |= E1000_RCTL_SZ_2048;
       
  3094 		rctl &= ~E1000_RCTL_BSEX;
       
  3095 		break;
       
  3096 	case 4096:
       
  3097 		rctl |= E1000_RCTL_SZ_4096;
       
  3098 		break;
       
  3099 	case 8192:
       
  3100 		rctl |= E1000_RCTL_SZ_8192;
       
  3101 		break;
       
  3102 	case 16384:
       
  3103 		rctl |= E1000_RCTL_SZ_16384;
       
  3104 		break;
       
  3105 	}
       
  3106 
       
  3107 	/* Enable Extended Status in all Receive Descriptors */
       
  3108 	rfctl = er32(RFCTL);
       
  3109 	rfctl |= E1000_RFCTL_EXTEN;
       
  3110 	ew32(RFCTL, rfctl);
       
  3111 
       
  3112 	/* 82571 and greater support packet-split where the protocol
       
  3113 	 * header is placed in skb->data and the packet data is
       
  3114 	 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
       
  3115 	 * In the case of a non-split, skb->data is linearly filled,
       
  3116 	 * followed by the page buffers.  Therefore, skb->data is
       
  3117 	 * sized to hold the largest protocol header.
       
  3118 	 *
       
  3119 	 * allocations using alloc_page take too long for regular MTU
       
  3120 	 * so only enable packet split for jumbo frames
       
  3121 	 *
       
  3122 	 * Using pages when the page size is greater than 16k wastes
       
  3123 	 * a lot of memory, since we allocate 3 pages at all times
       
  3124 	 * per packet.
       
  3125 	 */
       
  3126 	pages = PAGE_USE_COUNT(adapter->netdev->mtu);
       
  3127 	if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
       
  3128 		adapter->rx_ps_pages = pages;
       
  3129 	else
       
  3130 		adapter->rx_ps_pages = 0;
       
  3131 
       
  3132 	if (adapter->rx_ps_pages) {
       
  3133 		u32 psrctl = 0;
       
  3134 
       
  3135 		/* Enable Packet split descriptors */
       
  3136 		rctl |= E1000_RCTL_DTYP_PS;
       
  3137 
       
  3138 		psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
       
  3139 
       
  3140 		switch (adapter->rx_ps_pages) {
       
  3141 		case 3:
       
  3142 			psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
       
  3143 			/* fall-through */
       
  3144 		case 2:
       
  3145 			psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
       
  3146 			/* fall-through */
       
  3147 		case 1:
       
  3148 			psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
       
  3149 			break;
       
  3150 		}
       
  3151 
       
  3152 		ew32(PSRCTL, psrctl);
       
  3153 	}
       
  3154 
       
  3155 	/* This is useful for sniffing bad packets. */
       
  3156 	if (adapter->netdev->features & NETIF_F_RXALL) {
       
  3157 		/* UPE and MPE will be handled by normal PROMISC logic
       
  3158 		 * in e1000e_set_rx_mode
       
  3159 		 */
       
  3160 		rctl |= (E1000_RCTL_SBP |	/* Receive bad packets */
       
  3161 			 E1000_RCTL_BAM |	/* RX All Bcast Pkts */
       
  3162 			 E1000_RCTL_PMCF);	/* RX All MAC Ctrl Pkts */
       
  3163 
       
  3164 		rctl &= ~(E1000_RCTL_VFE |	/* Disable VLAN filter */
       
  3165 			  E1000_RCTL_DPF |	/* Allow filtered pause */
       
  3166 			  E1000_RCTL_CFIEN);	/* Dis VLAN CFIEN Filter */
       
  3167 		/* Do not mess with E1000_CTRL_VME, it affects transmit as well,
       
  3168 		 * and that breaks VLANs.
       
  3169 		 */
       
  3170 	}
       
  3171 
       
  3172 	ew32(RCTL, rctl);
       
  3173 	/* just started the receive unit, no need to restart */
       
  3174 	adapter->flags &= ~FLAG_RESTART_NOW;
       
  3175 }
       
  3176 
       
  3177 /**
       
  3178  * e1000_configure_rx - Configure Receive Unit after Reset
       
  3179  * @adapter: board private structure
       
  3180  *
       
  3181  * Configure the Rx unit of the MAC after a reset.
       
  3182  **/
       
  3183 static void e1000_configure_rx(struct e1000_adapter *adapter)
       
  3184 {
       
  3185 	struct e1000_hw *hw = &adapter->hw;
       
  3186 	struct e1000_ring *rx_ring = adapter->rx_ring;
       
  3187 	u64 rdba;
       
  3188 	u32 rdlen, rctl, rxcsum, ctrl_ext;
       
  3189 
       
  3190 	if (adapter->rx_ps_pages) {
       
  3191 		/* this is a 32 byte descriptor */
       
  3192 		rdlen = rx_ring->count *
       
  3193 		    sizeof(union e1000_rx_desc_packet_split);
       
  3194 		adapter->clean_rx = e1000_clean_rx_irq_ps;
       
  3195 		adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
       
  3196 	} else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
       
  3197 		rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
       
  3198 		adapter->clean_rx = e1000_clean_jumbo_rx_irq;
       
  3199 		adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
       
  3200 	} else {
       
  3201 		rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
       
  3202 		adapter->clean_rx = e1000_clean_rx_irq;
       
  3203 		adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
       
  3204 	}
       
  3205 
       
  3206 	/* disable receives while setting up the descriptors */
       
  3207 	rctl = er32(RCTL);
       
  3208 	if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
       
  3209 		ew32(RCTL, rctl & ~E1000_RCTL_EN);
       
  3210 	e1e_flush();
       
  3211 	usleep_range(10000, 20000);
       
  3212 
       
  3213 	if (adapter->flags2 & FLAG2_DMA_BURST) {
       
  3214 		/* set the writeback threshold (only takes effect if the RDTR
       
  3215 		 * is set). set GRAN=1 and write back up to 0x4 worth, and
       
  3216 		 * enable prefetching of 0x20 Rx descriptors
       
  3217 		 * granularity = 01
       
  3218 		 * wthresh = 04,
       
  3219 		 * hthresh = 04,
       
  3220 		 * pthresh = 0x20
       
  3221 		 */
       
  3222 		ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
       
  3223 		ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
       
  3224 
       
  3225 		/* override the delay timers for enabling bursting, only if
       
  3226 		 * the value was not set by the user via module options
       
  3227 		 */
       
  3228 		if (adapter->rx_int_delay == DEFAULT_RDTR)
       
  3229 			adapter->rx_int_delay = BURST_RDTR;
       
  3230 		if (adapter->rx_abs_int_delay == DEFAULT_RADV)
       
  3231 			adapter->rx_abs_int_delay = BURST_RADV;
       
  3232 	}
       
  3233 
       
  3234 	/* set the Receive Delay Timer Register */
       
  3235 	ew32(RDTR, adapter->rx_int_delay);
       
  3236 
       
  3237 	/* irq moderation */
       
  3238 	ew32(RADV, adapter->rx_abs_int_delay);
       
  3239 	if ((adapter->itr_setting != 0) && (adapter->itr != 0))
       
  3240 		e1000e_write_itr(adapter, adapter->itr);
       
  3241 
       
  3242 	ctrl_ext = er32(CTRL_EXT);
       
  3243 	/* Auto-Mask interrupts upon ICR access */
       
  3244 	ctrl_ext |= E1000_CTRL_EXT_IAME;
       
  3245 	ew32(IAM, 0xffffffff);
       
  3246 	ew32(CTRL_EXT, ctrl_ext);
       
  3247 	e1e_flush();
       
  3248 
       
  3249 	/* Setup the HW Rx Head and Tail Descriptor Pointers and
       
  3250 	 * the Base and Length of the Rx Descriptor Ring
       
  3251 	 */
       
  3252 	rdba = rx_ring->dma;
       
  3253 	ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
       
  3254 	ew32(RDBAH(0), (rdba >> 32));
       
  3255 	ew32(RDLEN(0), rdlen);
       
  3256 	ew32(RDH(0), 0);
       
  3257 	ew32(RDT(0), 0);
       
  3258 	rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
       
  3259 	rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
       
  3260 
       
  3261 	/* Enable Receive Checksum Offload for TCP and UDP */
       
  3262 	rxcsum = er32(RXCSUM);
       
  3263 	if (adapter->netdev->features & NETIF_F_RXCSUM)
       
  3264 		rxcsum |= E1000_RXCSUM_TUOFL;
       
  3265 	else
       
  3266 		rxcsum &= ~E1000_RXCSUM_TUOFL;
       
  3267 	ew32(RXCSUM, rxcsum);
       
  3268 
       
  3269 	/* With jumbo frames, excessive C-state transition latencies result
       
  3270 	 * in dropped transactions.
       
  3271 	 */
       
  3272 	if (adapter->netdev->mtu > ETH_DATA_LEN) {
       
  3273 		u32 lat =
       
  3274 		    ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
       
  3275 		     adapter->max_frame_size) * 8 / 1000;
       
  3276 
       
  3277 		if (adapter->flags & FLAG_IS_ICH) {
       
  3278 			u32 rxdctl = er32(RXDCTL(0));
       
  3279 
       
  3280 			ew32(RXDCTL(0), rxdctl | 0x3);
       
  3281 		}
       
  3282 
       
  3283 		pm_qos_update_request(&adapter->netdev->pm_qos_req, lat);
       
  3284 	} else {
       
  3285 		pm_qos_update_request(&adapter->netdev->pm_qos_req,
       
  3286 				      PM_QOS_DEFAULT_VALUE);
       
  3287 	}
       
  3288 
       
  3289 	/* Enable Receives */
       
  3290 	ew32(RCTL, rctl);
       
  3291 }
       
  3292 
       
  3293 /**
       
  3294  * e1000e_write_mc_addr_list - write multicast addresses to MTA
       
  3295  * @netdev: network interface device structure
       
  3296  *
       
  3297  * Writes multicast address list to the MTA hash table.
       
  3298  * Returns: -ENOMEM on failure
       
  3299  *                0 on no addresses written
       
  3300  *                X on writing X addresses to MTA
       
  3301  */
       
  3302 static int e1000e_write_mc_addr_list(struct net_device *netdev)
       
  3303 {
       
  3304 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  3305 	struct e1000_hw *hw = &adapter->hw;
       
  3306 	struct netdev_hw_addr *ha;
       
  3307 	u8 *mta_list;
       
  3308 	int i;
       
  3309 
       
  3310 	if (netdev_mc_empty(netdev)) {
       
  3311 		/* nothing to program, so clear mc list */
       
  3312 		hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
       
  3313 		return 0;
       
  3314 	}
       
  3315 
       
  3316 	mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
       
  3317 	if (!mta_list)
       
  3318 		return -ENOMEM;
       
  3319 
       
  3320 	/* update_mc_addr_list expects a packed array of only addresses. */
       
  3321 	i = 0;
       
  3322 	netdev_for_each_mc_addr(ha, netdev)
       
  3323 	    memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
       
  3324 
       
  3325 	hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
       
  3326 	kfree(mta_list);
       
  3327 
       
  3328 	return netdev_mc_count(netdev);
       
  3329 }
       
  3330 
       
  3331 /**
       
  3332  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
       
  3333  * @netdev: network interface device structure
       
  3334  *
       
  3335  * Writes unicast address list to the RAR table.
       
  3336  * Returns: -ENOMEM on failure/insufficient address space
       
  3337  *                0 on no addresses written
       
  3338  *                X on writing X addresses to the RAR table
       
  3339  **/
       
  3340 static int e1000e_write_uc_addr_list(struct net_device *netdev)
       
  3341 {
       
  3342 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  3343 	struct e1000_hw *hw = &adapter->hw;
       
  3344 	unsigned int rar_entries;
       
  3345 	int count = 0;
       
  3346 
       
  3347 	rar_entries = hw->mac.ops.rar_get_count(hw);
       
  3348 
       
  3349 	/* save a rar entry for our hardware address */
       
  3350 	rar_entries--;
       
  3351 
       
  3352 	/* save a rar entry for the LAA workaround */
       
  3353 	if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
       
  3354 		rar_entries--;
       
  3355 
       
  3356 	/* return ENOMEM indicating insufficient memory for addresses */
       
  3357 	if (netdev_uc_count(netdev) > rar_entries)
       
  3358 		return -ENOMEM;
       
  3359 
       
  3360 	if (!netdev_uc_empty(netdev) && rar_entries) {
       
  3361 		struct netdev_hw_addr *ha;
       
  3362 
       
  3363 		/* write the addresses in reverse order to avoid write
       
  3364 		 * combining
       
  3365 		 */
       
  3366 		netdev_for_each_uc_addr(ha, netdev) {
       
  3367 			int rval;
       
  3368 
       
  3369 			if (!rar_entries)
       
  3370 				break;
       
  3371 			rval = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
       
  3372 			if (rval < 0)
       
  3373 				return -ENOMEM;
       
  3374 			count++;
       
  3375 		}
       
  3376 	}
       
  3377 
       
  3378 	/* zero out the remaining RAR entries not used above */
       
  3379 	for (; rar_entries > 0; rar_entries--) {
       
  3380 		ew32(RAH(rar_entries), 0);
       
  3381 		ew32(RAL(rar_entries), 0);
       
  3382 	}
       
  3383 	e1e_flush();
       
  3384 
       
  3385 	return count;
       
  3386 }
       
  3387 
       
  3388 /**
       
  3389  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
       
  3390  * @netdev: network interface device structure
       
  3391  *
       
  3392  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
       
  3393  * address list or the network interface flags are updated.  This routine is
       
  3394  * responsible for configuring the hardware for proper unicast, multicast,
       
  3395  * promiscuous mode, and all-multi behavior.
       
  3396  **/
       
  3397 static void e1000e_set_rx_mode(struct net_device *netdev)
       
  3398 {
       
  3399 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  3400 	struct e1000_hw *hw = &adapter->hw;
       
  3401 	u32 rctl;
       
  3402 
       
  3403 	if (pm_runtime_suspended(netdev->dev.parent))
       
  3404 		return;
       
  3405 
       
  3406 	/* Check for Promiscuous and All Multicast modes */
       
  3407 	rctl = er32(RCTL);
       
  3408 
       
  3409 	/* clear the affected bits */
       
  3410 	rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
       
  3411 
       
  3412 	if (netdev->flags & IFF_PROMISC) {
       
  3413 		rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
       
  3414 		/* Do not hardware filter VLANs in promisc mode */
       
  3415 		e1000e_vlan_filter_disable(adapter);
       
  3416 	} else {
       
  3417 		int count;
       
  3418 
       
  3419 		if (netdev->flags & IFF_ALLMULTI) {
       
  3420 			rctl |= E1000_RCTL_MPE;
       
  3421 		} else {
       
  3422 			/* Write addresses to the MTA, if the attempt fails
       
  3423 			 * then we should just turn on promiscuous mode so
       
  3424 			 * that we can at least receive multicast traffic
       
  3425 			 */
       
  3426 			count = e1000e_write_mc_addr_list(netdev);
       
  3427 			if (count < 0)
       
  3428 				rctl |= E1000_RCTL_MPE;
       
  3429 		}
       
  3430 		e1000e_vlan_filter_enable(adapter);
       
  3431 		/* Write addresses to available RAR registers, if there is not
       
  3432 		 * sufficient space to store all the addresses then enable
       
  3433 		 * unicast promiscuous mode
       
  3434 		 */
       
  3435 		count = e1000e_write_uc_addr_list(netdev);
       
  3436 		if (count < 0)
       
  3437 			rctl |= E1000_RCTL_UPE;
       
  3438 	}
       
  3439 
       
  3440 	ew32(RCTL, rctl);
       
  3441 
       
  3442 	if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
       
  3443 		e1000e_vlan_strip_enable(adapter);
       
  3444 	else
       
  3445 		e1000e_vlan_strip_disable(adapter);
       
  3446 }
       
  3447 
       
  3448 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
       
  3449 {
       
  3450 	struct e1000_hw *hw = &adapter->hw;
       
  3451 	u32 mrqc, rxcsum;
       
  3452 	int i;
       
  3453 	static const u32 rsskey[10] = {
       
  3454 		0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0,
       
  3455 		0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe
       
  3456 	};
       
  3457 
       
  3458 	/* Fill out hash function seed */
       
  3459 	for (i = 0; i < 10; i++)
       
  3460 		ew32(RSSRK(i), rsskey[i]);
       
  3461 
       
  3462 	/* Direct all traffic to queue 0 */
       
  3463 	for (i = 0; i < 32; i++)
       
  3464 		ew32(RETA(i), 0);
       
  3465 
       
  3466 	/* Disable raw packet checksumming so that RSS hash is placed in
       
  3467 	 * descriptor on writeback.
       
  3468 	 */
       
  3469 	rxcsum = er32(RXCSUM);
       
  3470 	rxcsum |= E1000_RXCSUM_PCSD;
       
  3471 
       
  3472 	ew32(RXCSUM, rxcsum);
       
  3473 
       
  3474 	mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
       
  3475 		E1000_MRQC_RSS_FIELD_IPV4_TCP |
       
  3476 		E1000_MRQC_RSS_FIELD_IPV6 |
       
  3477 		E1000_MRQC_RSS_FIELD_IPV6_TCP |
       
  3478 		E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
       
  3479 
       
  3480 	ew32(MRQC, mrqc);
       
  3481 }
       
  3482 
       
  3483 /**
       
  3484  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
       
  3485  * @adapter: board private structure
       
  3486  * @timinca: pointer to returned time increment attributes
       
  3487  *
       
  3488  * Get attributes for incrementing the System Time Register SYSTIML/H at
       
  3489  * the default base frequency, and set the cyclecounter shift value.
       
  3490  **/
       
  3491 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
       
  3492 {
       
  3493 	struct e1000_hw *hw = &adapter->hw;
       
  3494 	u32 incvalue, incperiod, shift;
       
  3495 
       
  3496 	/* Make sure clock is enabled on I217 before checking the frequency */
       
  3497 	if ((hw->mac.type == e1000_pch_lpt) &&
       
  3498 	    !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
       
  3499 	    !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
       
  3500 		u32 fextnvm7 = er32(FEXTNVM7);
       
  3501 
       
  3502 		if (!(fextnvm7 & (1 << 0))) {
       
  3503 			ew32(FEXTNVM7, fextnvm7 | (1 << 0));
       
  3504 			e1e_flush();
       
  3505 		}
       
  3506 	}
       
  3507 
       
  3508 	switch (hw->mac.type) {
       
  3509 	case e1000_pch2lan:
       
  3510 	case e1000_pch_lpt:
       
  3511 		/* On I217, the clock frequency is 25MHz or 96MHz as
       
  3512 		 * indicated by the System Clock Frequency Indication
       
  3513 		 */
       
  3514 		if ((hw->mac.type != e1000_pch_lpt) ||
       
  3515 		    (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
       
  3516 			/* Stable 96MHz frequency */
       
  3517 			incperiod = INCPERIOD_96MHz;
       
  3518 			incvalue = INCVALUE_96MHz;
       
  3519 			shift = INCVALUE_SHIFT_96MHz;
       
  3520 			adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
       
  3521 			break;
       
  3522 		}
       
  3523 		/* fall-through */
       
  3524 	case e1000_82574:
       
  3525 	case e1000_82583:
       
  3526 		/* Stable 25MHz frequency */
       
  3527 		incperiod = INCPERIOD_25MHz;
       
  3528 		incvalue = INCVALUE_25MHz;
       
  3529 		shift = INCVALUE_SHIFT_25MHz;
       
  3530 		adapter->cc.shift = shift;
       
  3531 		break;
       
  3532 	default:
       
  3533 		return -EINVAL;
       
  3534 	}
       
  3535 
       
  3536 	*timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
       
  3537 		    ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
       
  3538 
       
  3539 	return 0;
       
  3540 }
       
  3541 
       
  3542 /**
       
  3543  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
       
  3544  * @adapter: board private structure
       
  3545  *
       
  3546  * Outgoing time stamping can be enabled and disabled. Play nice and
       
  3547  * disable it when requested, although it shouldn't cause any overhead
       
  3548  * when no packet needs it. At most one packet in the queue may be
       
  3549  * marked for time stamping, otherwise it would be impossible to tell
       
  3550  * for sure to which packet the hardware time stamp belongs.
       
  3551  *
       
  3552  * Incoming time stamping has to be configured via the hardware filters.
       
  3553  * Not all combinations are supported, in particular event type has to be
       
  3554  * specified. Matching the kind of event packet is not supported, with the
       
  3555  * exception of "all V2 events regardless of level 2 or 4".
       
  3556  **/
       
  3557 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
       
  3558 				  struct hwtstamp_config *config)
       
  3559 {
       
  3560 	struct e1000_hw *hw = &adapter->hw;
       
  3561 	u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
       
  3562 	u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
       
  3563 	u32 rxmtrl = 0;
       
  3564 	u16 rxudp = 0;
       
  3565 	bool is_l4 = false;
       
  3566 	bool is_l2 = false;
       
  3567 	u32 regval;
       
  3568 	s32 ret_val;
       
  3569 
       
  3570 	if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
       
  3571 		return -EINVAL;
       
  3572 
       
  3573 	/* flags reserved for future extensions - must be zero */
       
  3574 	if (config->flags)
       
  3575 		return -EINVAL;
       
  3576 
       
  3577 	switch (config->tx_type) {
       
  3578 	case HWTSTAMP_TX_OFF:
       
  3579 		tsync_tx_ctl = 0;
       
  3580 		break;
       
  3581 	case HWTSTAMP_TX_ON:
       
  3582 		break;
       
  3583 	default:
       
  3584 		return -ERANGE;
       
  3585 	}
       
  3586 
       
  3587 	switch (config->rx_filter) {
       
  3588 	case HWTSTAMP_FILTER_NONE:
       
  3589 		tsync_rx_ctl = 0;
       
  3590 		break;
       
  3591 	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
       
  3592 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
       
  3593 		rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
       
  3594 		is_l4 = true;
       
  3595 		break;
       
  3596 	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
       
  3597 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
       
  3598 		rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
       
  3599 		is_l4 = true;
       
  3600 		break;
       
  3601 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
       
  3602 		/* Also time stamps V2 L2 Path Delay Request/Response */
       
  3603 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
       
  3604 		rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
       
  3605 		is_l2 = true;
       
  3606 		break;
       
  3607 	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
       
  3608 		/* Also time stamps V2 L2 Path Delay Request/Response. */
       
  3609 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
       
  3610 		rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
       
  3611 		is_l2 = true;
       
  3612 		break;
       
  3613 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
       
  3614 		/* Hardware cannot filter just V2 L4 Sync messages;
       
  3615 		 * fall-through to V2 (both L2 and L4) Sync.
       
  3616 		 */
       
  3617 	case HWTSTAMP_FILTER_PTP_V2_SYNC:
       
  3618 		/* Also time stamps V2 Path Delay Request/Response. */
       
  3619 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
       
  3620 		rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
       
  3621 		is_l2 = true;
       
  3622 		is_l4 = true;
       
  3623 		break;
       
  3624 	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
       
  3625 		/* Hardware cannot filter just V2 L4 Delay Request messages;
       
  3626 		 * fall-through to V2 (both L2 and L4) Delay Request.
       
  3627 		 */
       
  3628 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
       
  3629 		/* Also time stamps V2 Path Delay Request/Response. */
       
  3630 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
       
  3631 		rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
       
  3632 		is_l2 = true;
       
  3633 		is_l4 = true;
       
  3634 		break;
       
  3635 	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
       
  3636 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
       
  3637 		/* Hardware cannot filter just V2 L4 or L2 Event messages;
       
  3638 		 * fall-through to all V2 (both L2 and L4) Events.
       
  3639 		 */
       
  3640 	case HWTSTAMP_FILTER_PTP_V2_EVENT:
       
  3641 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
       
  3642 		config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
       
  3643 		is_l2 = true;
       
  3644 		is_l4 = true;
       
  3645 		break;
       
  3646 	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
       
  3647 		/* For V1, the hardware can only filter Sync messages or
       
  3648 		 * Delay Request messages but not both so fall-through to
       
  3649 		 * time stamp all packets.
       
  3650 		 */
       
  3651 	case HWTSTAMP_FILTER_ALL:
       
  3652 		is_l2 = true;
       
  3653 		is_l4 = true;
       
  3654 		tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
       
  3655 		config->rx_filter = HWTSTAMP_FILTER_ALL;
       
  3656 		break;
       
  3657 	default:
       
  3658 		return -ERANGE;
       
  3659 	}
       
  3660 
       
  3661 	adapter->hwtstamp_config = *config;
       
  3662 
       
  3663 	/* enable/disable Tx h/w time stamping */
       
  3664 	regval = er32(TSYNCTXCTL);
       
  3665 	regval &= ~E1000_TSYNCTXCTL_ENABLED;
       
  3666 	regval |= tsync_tx_ctl;
       
  3667 	ew32(TSYNCTXCTL, regval);
       
  3668 	if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
       
  3669 	    (regval & E1000_TSYNCTXCTL_ENABLED)) {
       
  3670 		e_err("Timesync Tx Control register not set as expected\n");
       
  3671 		return -EAGAIN;
       
  3672 	}
       
  3673 
       
  3674 	/* enable/disable Rx h/w time stamping */
       
  3675 	regval = er32(TSYNCRXCTL);
       
  3676 	regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
       
  3677 	regval |= tsync_rx_ctl;
       
  3678 	ew32(TSYNCRXCTL, regval);
       
  3679 	if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
       
  3680 				 E1000_TSYNCRXCTL_TYPE_MASK)) !=
       
  3681 	    (regval & (E1000_TSYNCRXCTL_ENABLED |
       
  3682 		       E1000_TSYNCRXCTL_TYPE_MASK))) {
       
  3683 		e_err("Timesync Rx Control register not set as expected\n");
       
  3684 		return -EAGAIN;
       
  3685 	}
       
  3686 
       
  3687 	/* L2: define ethertype filter for time stamped packets */
       
  3688 	if (is_l2)
       
  3689 		rxmtrl |= ETH_P_1588;
       
  3690 
       
  3691 	/* define which PTP packets get time stamped */
       
  3692 	ew32(RXMTRL, rxmtrl);
       
  3693 
       
  3694 	/* Filter by destination port */
       
  3695 	if (is_l4) {
       
  3696 		rxudp = PTP_EV_PORT;
       
  3697 		cpu_to_be16s(&rxudp);
       
  3698 	}
       
  3699 	ew32(RXUDP, rxudp);
       
  3700 
       
  3701 	e1e_flush();
       
  3702 
       
  3703 	/* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
       
  3704 	er32(RXSTMPH);
       
  3705 	er32(TXSTMPH);
       
  3706 
       
  3707 	/* Get and set the System Time Register SYSTIM base frequency */
       
  3708 	ret_val = e1000e_get_base_timinca(adapter, &regval);
       
  3709 	if (ret_val)
       
  3710 		return ret_val;
       
  3711 	ew32(TIMINCA, regval);
       
  3712 
       
  3713 	/* reset the ns time counter */
       
  3714 	timecounter_init(&adapter->tc, &adapter->cc,
       
  3715 			 ktime_to_ns(ktime_get_real()));
       
  3716 
       
  3717 	return 0;
       
  3718 }
       
  3719 
       
  3720 /**
       
  3721  * e1000_configure - configure the hardware for Rx and Tx
       
  3722  * @adapter: private board structure
       
  3723  **/
       
  3724 static void e1000_configure(struct e1000_adapter *adapter)
       
  3725 {
       
  3726 	struct e1000_ring *rx_ring = adapter->rx_ring;
       
  3727 
       
  3728 	e1000e_set_rx_mode(adapter->netdev);
       
  3729 
       
  3730 	e1000_restore_vlan(adapter);
       
  3731 	e1000_init_manageability_pt(adapter);
       
  3732 
       
  3733 	e1000_configure_tx(adapter);
       
  3734 
       
  3735 	if (adapter->netdev->features & NETIF_F_RXHASH)
       
  3736 		e1000e_setup_rss_hash(adapter);
       
  3737 	e1000_setup_rctl(adapter);
       
  3738 	e1000_configure_rx(adapter);
       
  3739 	adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
       
  3740 }
       
  3741 
       
  3742 /**
       
  3743  * e1000e_power_up_phy - restore link in case the phy was powered down
       
  3744  * @adapter: address of board private structure
       
  3745  *
       
  3746  * The phy may be powered down to save power and turn off link when the
       
  3747  * driver is unloaded and wake on lan is not enabled (among others)
       
  3748  * *** this routine MUST be followed by a call to e1000e_reset ***
       
  3749  **/
       
  3750 void e1000e_power_up_phy(struct e1000_adapter *adapter)
       
  3751 {
       
  3752 	if (adapter->hw.phy.ops.power_up)
       
  3753 		adapter->hw.phy.ops.power_up(&adapter->hw);
       
  3754 
       
  3755 	adapter->hw.mac.ops.setup_link(&adapter->hw);
       
  3756 }
       
  3757 
       
  3758 /**
       
  3759  * e1000_power_down_phy - Power down the PHY
       
  3760  *
       
  3761  * Power down the PHY so no link is implied when interface is down.
       
  3762  * The PHY cannot be powered down if management or WoL is active.
       
  3763  */
       
  3764 static void e1000_power_down_phy(struct e1000_adapter *adapter)
       
  3765 {
       
  3766 	if (adapter->hw.phy.ops.power_down)
       
  3767 		adapter->hw.phy.ops.power_down(&adapter->hw);
       
  3768 }
       
  3769 
       
  3770 /**
       
  3771  * e1000e_reset - bring the hardware into a known good state
       
  3772  *
       
  3773  * This function boots the hardware and enables some settings that
       
  3774  * require a configuration cycle of the hardware - those cannot be
       
  3775  * set/changed during runtime. After reset the device needs to be
       
  3776  * properly configured for Rx, Tx etc.
       
  3777  */
       
  3778 void e1000e_reset(struct e1000_adapter *adapter)
       
  3779 {
       
  3780 	struct e1000_mac_info *mac = &adapter->hw.mac;
       
  3781 	struct e1000_fc_info *fc = &adapter->hw.fc;
       
  3782 	struct e1000_hw *hw = &adapter->hw;
       
  3783 	u32 tx_space, min_tx_space, min_rx_space;
       
  3784 	u32 pba = adapter->pba;
       
  3785 	u16 hwm;
       
  3786 
       
  3787 	/* reset Packet Buffer Allocation to default */
       
  3788 	ew32(PBA, pba);
       
  3789 
       
  3790 	if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
       
  3791 		/* To maintain wire speed transmits, the Tx FIFO should be
       
  3792 		 * large enough to accommodate two full transmit packets,
       
  3793 		 * rounded up to the next 1KB and expressed in KB.  Likewise,
       
  3794 		 * the Rx FIFO should be large enough to accommodate at least
       
  3795 		 * one full receive packet and is similarly rounded up and
       
  3796 		 * expressed in KB.
       
  3797 		 */
       
  3798 		pba = er32(PBA);
       
  3799 		/* upper 16 bits has Tx packet buffer allocation size in KB */
       
  3800 		tx_space = pba >> 16;
       
  3801 		/* lower 16 bits has Rx packet buffer allocation size in KB */
       
  3802 		pba &= 0xffff;
       
  3803 		/* the Tx fifo also stores 16 bytes of information about the Tx
       
  3804 		 * but don't include ethernet FCS because hardware appends it
       
  3805 		 */
       
  3806 		min_tx_space = (adapter->max_frame_size +
       
  3807 				sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
       
  3808 		min_tx_space = ALIGN(min_tx_space, 1024);
       
  3809 		min_tx_space >>= 10;
       
  3810 		/* software strips receive CRC, so leave room for it */
       
  3811 		min_rx_space = adapter->max_frame_size;
       
  3812 		min_rx_space = ALIGN(min_rx_space, 1024);
       
  3813 		min_rx_space >>= 10;
       
  3814 
       
  3815 		/* If current Tx allocation is less than the min Tx FIFO size,
       
  3816 		 * and the min Tx FIFO size is less than the current Rx FIFO
       
  3817 		 * allocation, take space away from current Rx allocation
       
  3818 		 */
       
  3819 		if ((tx_space < min_tx_space) &&
       
  3820 		    ((min_tx_space - tx_space) < pba)) {
       
  3821 			pba -= min_tx_space - tx_space;
       
  3822 
       
  3823 			/* if short on Rx space, Rx wins and must trump Tx
       
  3824 			 * adjustment
       
  3825 			 */
       
  3826 			if (pba < min_rx_space)
       
  3827 				pba = min_rx_space;
       
  3828 		}
       
  3829 
       
  3830 		ew32(PBA, pba);
       
  3831 	}
       
  3832 
       
  3833 	/* flow control settings
       
  3834 	 *
       
  3835 	 * The high water mark must be low enough to fit one full frame
       
  3836 	 * (or the size used for early receive) above it in the Rx FIFO.
       
  3837 	 * Set it to the lower of:
       
  3838 	 * - 90% of the Rx FIFO size, and
       
  3839 	 * - the full Rx FIFO size minus one full frame
       
  3840 	 */
       
  3841 	if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
       
  3842 		fc->pause_time = 0xFFFF;
       
  3843 	else
       
  3844 		fc->pause_time = E1000_FC_PAUSE_TIME;
       
  3845 	fc->send_xon = true;
       
  3846 	fc->current_mode = fc->requested_mode;
       
  3847 
       
  3848 	switch (hw->mac.type) {
       
  3849 	case e1000_ich9lan:
       
  3850 	case e1000_ich10lan:
       
  3851 		if (adapter->netdev->mtu > ETH_DATA_LEN) {
       
  3852 			pba = 14;
       
  3853 			ew32(PBA, pba);
       
  3854 			fc->high_water = 0x2800;
       
  3855 			fc->low_water = fc->high_water - 8;
       
  3856 			break;
       
  3857 		}
       
  3858 		/* fall-through */
       
  3859 	default:
       
  3860 		hwm = min(((pba << 10) * 9 / 10),
       
  3861 			  ((pba << 10) - adapter->max_frame_size));
       
  3862 
       
  3863 		fc->high_water = hwm & E1000_FCRTH_RTH;	/* 8-byte granularity */
       
  3864 		fc->low_water = fc->high_water - 8;
       
  3865 		break;
       
  3866 	case e1000_pchlan:
       
  3867 		/* Workaround PCH LOM adapter hangs with certain network
       
  3868 		 * loads.  If hangs persist, try disabling Tx flow control.
       
  3869 		 */
       
  3870 		if (adapter->netdev->mtu > ETH_DATA_LEN) {
       
  3871 			fc->high_water = 0x3500;
       
  3872 			fc->low_water = 0x1500;
       
  3873 		} else {
       
  3874 			fc->high_water = 0x5000;
       
  3875 			fc->low_water = 0x3000;
       
  3876 		}
       
  3877 		fc->refresh_time = 0x1000;
       
  3878 		break;
       
  3879 	case e1000_pch2lan:
       
  3880 	case e1000_pch_lpt:
       
  3881 		fc->refresh_time = 0x0400;
       
  3882 
       
  3883 		if (adapter->netdev->mtu <= ETH_DATA_LEN) {
       
  3884 			fc->high_water = 0x05C20;
       
  3885 			fc->low_water = 0x05048;
       
  3886 			fc->pause_time = 0x0650;
       
  3887 			break;
       
  3888 		}
       
  3889 
       
  3890 		pba = 14;
       
  3891 		ew32(PBA, pba);
       
  3892 		fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
       
  3893 		fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
       
  3894 		break;
       
  3895 	}
       
  3896 
       
  3897 	/* Alignment of Tx data is on an arbitrary byte boundary with the
       
  3898 	 * maximum size per Tx descriptor limited only to the transmit
       
  3899 	 * allocation of the packet buffer minus 96 bytes with an upper
       
  3900 	 * limit of 24KB due to receive synchronization limitations.
       
  3901 	 */
       
  3902 	adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
       
  3903 				       24 << 10);
       
  3904 
       
  3905 	/* Disable Adaptive Interrupt Moderation if 2 full packets cannot
       
  3906 	 * fit in receive buffer.
       
  3907 	 */
       
  3908 	if (adapter->itr_setting & 0x3) {
       
  3909 		if ((adapter->max_frame_size * 2) > (pba << 10)) {
       
  3910 			if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
       
  3911 				dev_info(&adapter->pdev->dev,
       
  3912 					 "Interrupt Throttle Rate off\n");
       
  3913 				adapter->flags2 |= FLAG2_DISABLE_AIM;
       
  3914 				e1000e_write_itr(adapter, 0);
       
  3915 			}
       
  3916 		} else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
       
  3917 			dev_info(&adapter->pdev->dev,
       
  3918 				 "Interrupt Throttle Rate on\n");
       
  3919 			adapter->flags2 &= ~FLAG2_DISABLE_AIM;
       
  3920 			adapter->itr = 20000;
       
  3921 			e1000e_write_itr(adapter, adapter->itr);
       
  3922 		}
       
  3923 	}
       
  3924 
       
  3925 	/* Allow time for pending master requests to run */
       
  3926 	mac->ops.reset_hw(hw);
       
  3927 
       
  3928 	/* For parts with AMT enabled, let the firmware know
       
  3929 	 * that the network interface is in control
       
  3930 	 */
       
  3931 	if (adapter->flags & FLAG_HAS_AMT)
       
  3932 		e1000e_get_hw_control(adapter);
       
  3933 
       
  3934 	ew32(WUC, 0);
       
  3935 
       
  3936 	if (mac->ops.init_hw(hw))
       
  3937 		e_err("Hardware Error\n");
       
  3938 
       
  3939 	e1000_update_mng_vlan(adapter);
       
  3940 
       
  3941 	/* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
       
  3942 	ew32(VET, ETH_P_8021Q);
       
  3943 
       
  3944 	e1000e_reset_adaptive(hw);
       
  3945 
       
  3946 	/* initialize systim and reset the ns time counter */
       
  3947 	e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
       
  3948 
       
  3949 	/* Set EEE advertisement as appropriate */
       
  3950 	if (adapter->flags2 & FLAG2_HAS_EEE) {
       
  3951 		s32 ret_val;
       
  3952 		u16 adv_addr;
       
  3953 
       
  3954 		switch (hw->phy.type) {
       
  3955 		case e1000_phy_82579:
       
  3956 			adv_addr = I82579_EEE_ADVERTISEMENT;
       
  3957 			break;
       
  3958 		case e1000_phy_i217:
       
  3959 			adv_addr = I217_EEE_ADVERTISEMENT;
       
  3960 			break;
       
  3961 		default:
       
  3962 			dev_err(&adapter->pdev->dev,
       
  3963 				"Invalid PHY type setting EEE advertisement\n");
       
  3964 			return;
       
  3965 		}
       
  3966 
       
  3967 		ret_val = hw->phy.ops.acquire(hw);
       
  3968 		if (ret_val) {
       
  3969 			dev_err(&adapter->pdev->dev,
       
  3970 				"EEE advertisement - unable to acquire PHY\n");
       
  3971 			return;
       
  3972 		}
       
  3973 
       
  3974 		e1000_write_emi_reg_locked(hw, adv_addr,
       
  3975 					   hw->dev_spec.ich8lan.eee_disable ?
       
  3976 					   0 : adapter->eee_advert);
       
  3977 
       
  3978 		hw->phy.ops.release(hw);
       
  3979 	}
       
  3980 
       
  3981 	if (!netif_running(adapter->netdev) &&
       
  3982 	    !test_bit(__E1000_TESTING, &adapter->state))
       
  3983 		e1000_power_down_phy(adapter);
       
  3984 
       
  3985 	e1000_get_phy_info(hw);
       
  3986 
       
  3987 	if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
       
  3988 	    !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
       
  3989 		u16 phy_data = 0;
       
  3990 		/* speed up time to link by disabling smart power down, ignore
       
  3991 		 * the return value of this function because there is nothing
       
  3992 		 * different we would do if it failed
       
  3993 		 */
       
  3994 		e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
       
  3995 		phy_data &= ~IGP02E1000_PM_SPD;
       
  3996 		e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
       
  3997 	}
       
  3998 }
       
  3999 
       
  4000 int e1000e_up(struct e1000_adapter *adapter)
       
  4001 {
       
  4002 	struct e1000_hw *hw = &adapter->hw;
       
  4003 
       
  4004 	/* hardware has been reset, we need to reload some things */
       
  4005 	e1000_configure(adapter);
       
  4006 
       
  4007 	clear_bit(__E1000_DOWN, &adapter->state);
       
  4008 
       
  4009 	if (adapter->msix_entries)
       
  4010 		e1000_configure_msix(adapter);
       
  4011 	e1000_irq_enable(adapter);
       
  4012 
       
  4013 	netif_start_queue(adapter->netdev);
       
  4014 
       
  4015 	/* fire a link change interrupt to start the watchdog */
       
  4016 	if (adapter->msix_entries)
       
  4017 		ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
       
  4018 	else
       
  4019 		ew32(ICS, E1000_ICS_LSC);
       
  4020 
       
  4021 	return 0;
       
  4022 }
       
  4023 
       
  4024 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
       
  4025 {
       
  4026 	struct e1000_hw *hw = &adapter->hw;
       
  4027 
       
  4028 	if (!(adapter->flags2 & FLAG2_DMA_BURST))
       
  4029 		return;
       
  4030 
       
  4031 	/* flush pending descriptor writebacks to memory */
       
  4032 	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
       
  4033 	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
       
  4034 
       
  4035 	/* execute the writes immediately */
       
  4036 	e1e_flush();
       
  4037 
       
  4038 	/* due to rare timing issues, write to TIDV/RDTR again to ensure the
       
  4039 	 * write is successful
       
  4040 	 */
       
  4041 	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
       
  4042 	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
       
  4043 
       
  4044 	/* execute the writes immediately */
       
  4045 	e1e_flush();
       
  4046 }
       
  4047 
       
  4048 static void e1000e_update_stats(struct e1000_adapter *adapter);
       
  4049 
       
  4050 /**
       
  4051  * e1000e_down - quiesce the device and optionally reset the hardware
       
  4052  * @adapter: board private structure
       
  4053  * @reset: boolean flag to reset the hardware or not
       
  4054  */
       
  4055 void e1000e_down(struct e1000_adapter *adapter, bool reset)
       
  4056 {
       
  4057 	struct net_device *netdev = adapter->netdev;
       
  4058 	struct e1000_hw *hw = &adapter->hw;
       
  4059 	u32 tctl, rctl;
       
  4060 
       
  4061 	/* signal that we're down so the interrupt handler does not
       
  4062 	 * reschedule our watchdog timer
       
  4063 	 */
       
  4064 	set_bit(__E1000_DOWN, &adapter->state);
       
  4065 
       
  4066 	/* disable receives in the hardware */
       
  4067 	rctl = er32(RCTL);
       
  4068 	if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
       
  4069 		ew32(RCTL, rctl & ~E1000_RCTL_EN);
       
  4070 	/* flush and sleep below */
       
  4071 
       
  4072 	netif_stop_queue(netdev);
       
  4073 
       
  4074 	/* disable transmits in the hardware */
       
  4075 	tctl = er32(TCTL);
       
  4076 	tctl &= ~E1000_TCTL_EN;
       
  4077 	ew32(TCTL, tctl);
       
  4078 
       
  4079 	/* flush both disables and wait for them to finish */
       
  4080 	e1e_flush();
       
  4081 	usleep_range(10000, 20000);
       
  4082 
       
  4083 	e1000_irq_disable(adapter);
       
  4084 
       
  4085 	napi_synchronize(&adapter->napi);
       
  4086 
       
  4087 	del_timer_sync(&adapter->watchdog_timer);
       
  4088 	del_timer_sync(&adapter->phy_info_timer);
       
  4089 
       
  4090 	netif_carrier_off(netdev);
       
  4091 
       
  4092 	spin_lock(&adapter->stats64_lock);
       
  4093 	e1000e_update_stats(adapter);
       
  4094 	spin_unlock(&adapter->stats64_lock);
       
  4095 
       
  4096 	e1000e_flush_descriptors(adapter);
       
  4097 	e1000_clean_tx_ring(adapter->tx_ring);
       
  4098 	e1000_clean_rx_ring(adapter->rx_ring);
       
  4099 
       
  4100 	adapter->link_speed = 0;
       
  4101 	adapter->link_duplex = 0;
       
  4102 
       
  4103 	/* Disable Si errata workaround on PCHx for jumbo frame flow */
       
  4104 	if ((hw->mac.type >= e1000_pch2lan) &&
       
  4105 	    (adapter->netdev->mtu > ETH_DATA_LEN) &&
       
  4106 	    e1000_lv_jumbo_workaround_ich8lan(hw, false))
       
  4107 		e_dbg("failed to disable jumbo frame workaround mode\n");
       
  4108 
       
  4109 	if (reset && !pci_channel_offline(adapter->pdev))
       
  4110 		e1000e_reset(adapter);
       
  4111 }
       
  4112 
       
  4113 void e1000e_reinit_locked(struct e1000_adapter *adapter)
       
  4114 {
       
  4115 	might_sleep();
       
  4116 	while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
       
  4117 		usleep_range(1000, 2000);
       
  4118 	e1000e_down(adapter, true);
       
  4119 	e1000e_up(adapter);
       
  4120 	clear_bit(__E1000_RESETTING, &adapter->state);
       
  4121 }
       
  4122 
       
  4123 /**
       
  4124  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
       
  4125  * @cc: cyclecounter structure
       
  4126  **/
       
  4127 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
       
  4128 {
       
  4129 	struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
       
  4130 						     cc);
       
  4131 	struct e1000_hw *hw = &adapter->hw;
       
  4132 	cycle_t systim, systim_next;
       
  4133 
       
  4134 	/* latch SYSTIMH on read of SYSTIML */
       
  4135 	systim = (cycle_t)er32(SYSTIML);
       
  4136 	systim |= (cycle_t)er32(SYSTIMH) << 32;
       
  4137 
       
  4138 	if ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) {
       
  4139 		u64 incvalue, time_delta, rem, temp;
       
  4140 		int i;
       
  4141 
       
  4142 		/* errata for 82574/82583 possible bad bits read from SYSTIMH/L
       
  4143 		 * check to see that the time is incrementing at a reasonable
       
  4144 		 * rate and is a multiple of incvalue
       
  4145 		 */
       
  4146 		incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
       
  4147 		for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
       
  4148 			/* latch SYSTIMH on read of SYSTIML */
       
  4149 			systim_next = (cycle_t)er32(SYSTIML);
       
  4150 			systim_next |= (cycle_t)er32(SYSTIMH) << 32;
       
  4151 
       
  4152 			time_delta = systim_next - systim;
       
  4153 			temp = time_delta;
       
  4154 			rem = do_div(temp, incvalue);
       
  4155 
       
  4156 			systim = systim_next;
       
  4157 
       
  4158 			if ((time_delta < E1000_82574_SYSTIM_EPSILON) &&
       
  4159 			    (rem == 0))
       
  4160 				break;
       
  4161 		}
       
  4162 	}
       
  4163 	return systim;
       
  4164 }
       
  4165 
       
  4166 /**
       
  4167  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
       
  4168  * @adapter: board private structure to initialize
       
  4169  *
       
  4170  * e1000_sw_init initializes the Adapter private data structure.
       
  4171  * Fields are initialized based on PCI device information and
       
  4172  * OS network device settings (MTU size).
       
  4173  **/
       
  4174 static int e1000_sw_init(struct e1000_adapter *adapter)
       
  4175 {
       
  4176 	struct net_device *netdev = adapter->netdev;
       
  4177 
       
  4178 	adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
       
  4179 	adapter->rx_ps_bsize0 = 128;
       
  4180 	adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
       
  4181 	adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
       
  4182 	adapter->tx_ring_count = E1000_DEFAULT_TXD;
       
  4183 	adapter->rx_ring_count = E1000_DEFAULT_RXD;
       
  4184 
       
  4185 	spin_lock_init(&adapter->stats64_lock);
       
  4186 
       
  4187 	e1000e_set_interrupt_capability(adapter);
       
  4188 
       
  4189 	if (e1000_alloc_queues(adapter))
       
  4190 		return -ENOMEM;
       
  4191 
       
  4192 	/* Setup hardware time stamping cyclecounter */
       
  4193 	if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
       
  4194 		adapter->cc.read = e1000e_cyclecounter_read;
       
  4195 		adapter->cc.mask = CLOCKSOURCE_MASK(64);
       
  4196 		adapter->cc.mult = 1;
       
  4197 		/* cc.shift set in e1000e_get_base_tininca() */
       
  4198 
       
  4199 		spin_lock_init(&adapter->systim_lock);
       
  4200 		INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
       
  4201 	}
       
  4202 
       
  4203 	/* Explicitly disable IRQ since the NIC can be in any state. */
       
  4204 	e1000_irq_disable(adapter);
       
  4205 
       
  4206 	set_bit(__E1000_DOWN, &adapter->state);
       
  4207 	return 0;
       
  4208 }
       
  4209 
       
  4210 /**
       
  4211  * e1000_intr_msi_test - Interrupt Handler
       
  4212  * @irq: interrupt number
       
  4213  * @data: pointer to a network interface device structure
       
  4214  **/
       
  4215 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
       
  4216 {
       
  4217 	struct net_device *netdev = data;
       
  4218 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  4219 	struct e1000_hw *hw = &adapter->hw;
       
  4220 	u32 icr = er32(ICR);
       
  4221 
       
  4222 	e_dbg("icr is %08X\n", icr);
       
  4223 	if (icr & E1000_ICR_RXSEQ) {
       
  4224 		adapter->flags &= ~FLAG_MSI_TEST_FAILED;
       
  4225 		/* Force memory writes to complete before acknowledging the
       
  4226 		 * interrupt is handled.
       
  4227 		 */
       
  4228 		wmb();
       
  4229 	}
       
  4230 
       
  4231 	return IRQ_HANDLED;
       
  4232 }
       
  4233 
       
  4234 /**
       
  4235  * e1000_test_msi_interrupt - Returns 0 for successful test
       
  4236  * @adapter: board private struct
       
  4237  *
       
  4238  * code flow taken from tg3.c
       
  4239  **/
       
  4240 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
       
  4241 {
       
  4242 	struct net_device *netdev = adapter->netdev;
       
  4243 	struct e1000_hw *hw = &adapter->hw;
       
  4244 	int err;
       
  4245 
       
  4246 	/* poll_enable hasn't been called yet, so don't need disable */
       
  4247 	/* clear any pending events */
       
  4248 	er32(ICR);
       
  4249 
       
  4250 	/* free the real vector and request a test handler */
       
  4251 	e1000_free_irq(adapter);
       
  4252 	e1000e_reset_interrupt_capability(adapter);
       
  4253 
       
  4254 	/* Assume that the test fails, if it succeeds then the test
       
  4255 	 * MSI irq handler will unset this flag
       
  4256 	 */
       
  4257 	adapter->flags |= FLAG_MSI_TEST_FAILED;
       
  4258 
       
  4259 	err = pci_enable_msi(adapter->pdev);
       
  4260 	if (err)
       
  4261 		goto msi_test_failed;
       
  4262 
       
  4263 	err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
       
  4264 			  netdev->name, netdev);
       
  4265 	if (err) {
       
  4266 		pci_disable_msi(adapter->pdev);
       
  4267 		goto msi_test_failed;
       
  4268 	}
       
  4269 
       
  4270 	/* Force memory writes to complete before enabling and firing an
       
  4271 	 * interrupt.
       
  4272 	 */
       
  4273 	wmb();
       
  4274 
       
  4275 	e1000_irq_enable(adapter);
       
  4276 
       
  4277 	/* fire an unusual interrupt on the test handler */
       
  4278 	ew32(ICS, E1000_ICS_RXSEQ);
       
  4279 	e1e_flush();
       
  4280 	msleep(100);
       
  4281 
       
  4282 	e1000_irq_disable(adapter);
       
  4283 
       
  4284 	rmb();			/* read flags after interrupt has been fired */
       
  4285 
       
  4286 	if (adapter->flags & FLAG_MSI_TEST_FAILED) {
       
  4287 		adapter->int_mode = E1000E_INT_MODE_LEGACY;
       
  4288 		e_info("MSI interrupt test failed, using legacy interrupt.\n");
       
  4289 	} else {
       
  4290 		e_dbg("MSI interrupt test succeeded!\n");
       
  4291 	}
       
  4292 
       
  4293 	free_irq(adapter->pdev->irq, netdev);
       
  4294 	pci_disable_msi(adapter->pdev);
       
  4295 
       
  4296 msi_test_failed:
       
  4297 	e1000e_set_interrupt_capability(adapter);
       
  4298 	return e1000_request_irq(adapter);
       
  4299 }
       
  4300 
       
  4301 /**
       
  4302  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
       
  4303  * @adapter: board private struct
       
  4304  *
       
  4305  * code flow taken from tg3.c, called with e1000 interrupts disabled.
       
  4306  **/
       
  4307 static int e1000_test_msi(struct e1000_adapter *adapter)
       
  4308 {
       
  4309 	int err;
       
  4310 	u16 pci_cmd;
       
  4311 
       
  4312 	if (!(adapter->flags & FLAG_MSI_ENABLED))
       
  4313 		return 0;
       
  4314 
       
  4315 	/* disable SERR in case the MSI write causes a master abort */
       
  4316 	pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
       
  4317 	if (pci_cmd & PCI_COMMAND_SERR)
       
  4318 		pci_write_config_word(adapter->pdev, PCI_COMMAND,
       
  4319 				      pci_cmd & ~PCI_COMMAND_SERR);
       
  4320 
       
  4321 	err = e1000_test_msi_interrupt(adapter);
       
  4322 
       
  4323 	/* re-enable SERR */
       
  4324 	if (pci_cmd & PCI_COMMAND_SERR) {
       
  4325 		pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
       
  4326 		pci_cmd |= PCI_COMMAND_SERR;
       
  4327 		pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
       
  4328 	}
       
  4329 
       
  4330 	return err;
       
  4331 }
       
  4332 
       
  4333 /**
       
  4334  * e1000_open - Called when a network interface is made active
       
  4335  * @netdev: network interface device structure
       
  4336  *
       
  4337  * Returns 0 on success, negative value on failure
       
  4338  *
       
  4339  * The open entry point is called when a network interface is made
       
  4340  * active by the system (IFF_UP).  At this point all resources needed
       
  4341  * for transmit and receive operations are allocated, the interrupt
       
  4342  * handler is registered with the OS, the watchdog timer is started,
       
  4343  * and the stack is notified that the interface is ready.
       
  4344  **/
       
  4345 static int e1000_open(struct net_device *netdev)
       
  4346 {
       
  4347 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  4348 	struct e1000_hw *hw = &adapter->hw;
       
  4349 	struct pci_dev *pdev = adapter->pdev;
       
  4350 	int err;
       
  4351 
       
  4352 	/* disallow open during test */
       
  4353 	if (test_bit(__E1000_TESTING, &adapter->state))
       
  4354 		return -EBUSY;
       
  4355 
       
  4356 	pm_runtime_get_sync(&pdev->dev);
       
  4357 
       
  4358 	netif_carrier_off(netdev);
       
  4359 
       
  4360 	/* allocate transmit descriptors */
       
  4361 	err = e1000e_setup_tx_resources(adapter->tx_ring);
       
  4362 	if (err)
       
  4363 		goto err_setup_tx;
       
  4364 
       
  4365 	/* allocate receive descriptors */
       
  4366 	err = e1000e_setup_rx_resources(adapter->rx_ring);
       
  4367 	if (err)
       
  4368 		goto err_setup_rx;
       
  4369 
       
  4370 	/* If AMT is enabled, let the firmware know that the network
       
  4371 	 * interface is now open and reset the part to a known state.
       
  4372 	 */
       
  4373 	if (adapter->flags & FLAG_HAS_AMT) {
       
  4374 		e1000e_get_hw_control(adapter);
       
  4375 		e1000e_reset(adapter);
       
  4376 	}
       
  4377 
       
  4378 	e1000e_power_up_phy(adapter);
       
  4379 
       
  4380 	adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
       
  4381 	if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
       
  4382 		e1000_update_mng_vlan(adapter);
       
  4383 
       
  4384 	/* DMA latency requirement to workaround jumbo issue */
       
  4385 	pm_qos_add_request(&adapter->netdev->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
       
  4386 			   PM_QOS_DEFAULT_VALUE);
       
  4387 
       
  4388 	/* before we allocate an interrupt, we must be ready to handle it.
       
  4389 	 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
       
  4390 	 * as soon as we call pci_request_irq, so we have to setup our
       
  4391 	 * clean_rx handler before we do so.
       
  4392 	 */
       
  4393 	e1000_configure(adapter);
       
  4394 
       
  4395 	err = e1000_request_irq(adapter);
       
  4396 	if (err)
       
  4397 		goto err_req_irq;
       
  4398 
       
  4399 	/* Work around PCIe errata with MSI interrupts causing some chipsets to
       
  4400 	 * ignore e1000e MSI messages, which means we need to test our MSI
       
  4401 	 * interrupt now
       
  4402 	 */
       
  4403 	if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
       
  4404 		err = e1000_test_msi(adapter);
       
  4405 		if (err) {
       
  4406 			e_err("Interrupt allocation failed\n");
       
  4407 			goto err_req_irq;
       
  4408 		}
       
  4409 	}
       
  4410 
       
  4411 	/* From here on the code is the same as e1000e_up() */
       
  4412 	clear_bit(__E1000_DOWN, &adapter->state);
       
  4413 
       
  4414 	napi_enable(&adapter->napi);
       
  4415 
       
  4416 	e1000_irq_enable(adapter);
       
  4417 
       
  4418 	adapter->tx_hang_recheck = false;
       
  4419 	netif_start_queue(netdev);
       
  4420 
       
  4421 	hw->mac.get_link_status = true;
       
  4422 	pm_runtime_put(&pdev->dev);
       
  4423 
       
  4424 	/* fire a link status change interrupt to start the watchdog */
       
  4425 	if (adapter->msix_entries)
       
  4426 		ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
       
  4427 	else
       
  4428 		ew32(ICS, E1000_ICS_LSC);
       
  4429 
       
  4430 	return 0;
       
  4431 
       
  4432 err_req_irq:
       
  4433 	e1000e_release_hw_control(adapter);
       
  4434 	e1000_power_down_phy(adapter);
       
  4435 	e1000e_free_rx_resources(adapter->rx_ring);
       
  4436 err_setup_rx:
       
  4437 	e1000e_free_tx_resources(adapter->tx_ring);
       
  4438 err_setup_tx:
       
  4439 	e1000e_reset(adapter);
       
  4440 	pm_runtime_put_sync(&pdev->dev);
       
  4441 
       
  4442 	return err;
       
  4443 }
       
  4444 
       
  4445 /**
       
  4446  * e1000_close - Disables a network interface
       
  4447  * @netdev: network interface device structure
       
  4448  *
       
  4449  * Returns 0, this is not allowed to fail
       
  4450  *
       
  4451  * The close entry point is called when an interface is de-activated
       
  4452  * by the OS.  The hardware is still under the drivers control, but
       
  4453  * needs to be disabled.  A global MAC reset is issued to stop the
       
  4454  * hardware, and all transmit and receive resources are freed.
       
  4455  **/
       
  4456 static int e1000_close(struct net_device *netdev)
       
  4457 {
       
  4458 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  4459 	struct pci_dev *pdev = adapter->pdev;
       
  4460 	int count = E1000_CHECK_RESET_COUNT;
       
  4461 
       
  4462 	while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
       
  4463 		usleep_range(10000, 20000);
       
  4464 
       
  4465 	WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
       
  4466 
       
  4467 	pm_runtime_get_sync(&pdev->dev);
       
  4468 
       
  4469 	if (!test_bit(__E1000_DOWN, &adapter->state)) {
       
  4470 		e1000e_down(adapter, true);
       
  4471 		e1000_free_irq(adapter);
       
  4472 
       
  4473 		/* Link status message must follow this format */
       
  4474 		pr_info("%s NIC Link is Down\n", adapter->netdev->name);
       
  4475 	}
       
  4476 
       
  4477 	napi_disable(&adapter->napi);
       
  4478 
       
  4479 	e1000e_free_tx_resources(adapter->tx_ring);
       
  4480 	e1000e_free_rx_resources(adapter->rx_ring);
       
  4481 
       
  4482 	/* kill manageability vlan ID if supported, but not if a vlan with
       
  4483 	 * the same ID is registered on the host OS (let 8021q kill it)
       
  4484 	 */
       
  4485 	if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
       
  4486 		e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
       
  4487 				       adapter->mng_vlan_id);
       
  4488 
       
  4489 	/* If AMT is enabled, let the firmware know that the network
       
  4490 	 * interface is now closed
       
  4491 	 */
       
  4492 	if ((adapter->flags & FLAG_HAS_AMT) &&
       
  4493 	    !test_bit(__E1000_TESTING, &adapter->state))
       
  4494 		e1000e_release_hw_control(adapter);
       
  4495 
       
  4496 	pm_qos_remove_request(&adapter->netdev->pm_qos_req);
       
  4497 
       
  4498 	pm_runtime_put_sync(&pdev->dev);
       
  4499 
       
  4500 	return 0;
       
  4501 }
       
  4502 
       
  4503 /**
       
  4504  * e1000_set_mac - Change the Ethernet Address of the NIC
       
  4505  * @netdev: network interface device structure
       
  4506  * @p: pointer to an address structure
       
  4507  *
       
  4508  * Returns 0 on success, negative on failure
       
  4509  **/
       
  4510 static int e1000_set_mac(struct net_device *netdev, void *p)
       
  4511 {
       
  4512 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  4513 	struct e1000_hw *hw = &adapter->hw;
       
  4514 	struct sockaddr *addr = p;
       
  4515 
       
  4516 	if (!is_valid_ether_addr(addr->sa_data))
       
  4517 		return -EADDRNOTAVAIL;
       
  4518 
       
  4519 	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
       
  4520 	memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
       
  4521 
       
  4522 	hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
       
  4523 
       
  4524 	if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
       
  4525 		/* activate the work around */
       
  4526 		e1000e_set_laa_state_82571(&adapter->hw, 1);
       
  4527 
       
  4528 		/* Hold a copy of the LAA in RAR[14] This is done so that
       
  4529 		 * between the time RAR[0] gets clobbered  and the time it
       
  4530 		 * gets fixed (in e1000_watchdog), the actual LAA is in one
       
  4531 		 * of the RARs and no incoming packets directed to this port
       
  4532 		 * are dropped. Eventually the LAA will be in RAR[0] and
       
  4533 		 * RAR[14]
       
  4534 		 */
       
  4535 		hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
       
  4536 				    adapter->hw.mac.rar_entry_count - 1);
       
  4537 	}
       
  4538 
       
  4539 	return 0;
       
  4540 }
       
  4541 
       
  4542 /**
       
  4543  * e1000e_update_phy_task - work thread to update phy
       
  4544  * @work: pointer to our work struct
       
  4545  *
       
  4546  * this worker thread exists because we must acquire a
       
  4547  * semaphore to read the phy, which we could msleep while
       
  4548  * waiting for it, and we can't msleep in a timer.
       
  4549  **/
       
  4550 static void e1000e_update_phy_task(struct work_struct *work)
       
  4551 {
       
  4552 	struct e1000_adapter *adapter = container_of(work,
       
  4553 						     struct e1000_adapter,
       
  4554 						     update_phy_task);
       
  4555 	struct e1000_hw *hw = &adapter->hw;
       
  4556 
       
  4557 	if (test_bit(__E1000_DOWN, &adapter->state))
       
  4558 		return;
       
  4559 
       
  4560 	e1000_get_phy_info(hw);
       
  4561 
       
  4562 	/* Enable EEE on 82579 after link up */
       
  4563 	if (hw->phy.type >= e1000_phy_82579)
       
  4564 		e1000_set_eee_pchlan(hw);
       
  4565 }
       
  4566 
       
  4567 /**
       
  4568  * e1000_update_phy_info - timre call-back to update PHY info
       
  4569  * @data: pointer to adapter cast into an unsigned long
       
  4570  *
       
  4571  * Need to wait a few seconds after link up to get diagnostic information from
       
  4572  * the phy
       
  4573  **/
       
  4574 static void e1000_update_phy_info(unsigned long data)
       
  4575 {
       
  4576 	struct e1000_adapter *adapter = (struct e1000_adapter *)data;
       
  4577 
       
  4578 	if (test_bit(__E1000_DOWN, &adapter->state))
       
  4579 		return;
       
  4580 
       
  4581 	schedule_work(&adapter->update_phy_task);
       
  4582 }
       
  4583 
       
  4584 /**
       
  4585  * e1000e_update_phy_stats - Update the PHY statistics counters
       
  4586  * @adapter: board private structure
       
  4587  *
       
  4588  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
       
  4589  **/
       
  4590 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
       
  4591 {
       
  4592 	struct e1000_hw *hw = &adapter->hw;
       
  4593 	s32 ret_val;
       
  4594 	u16 phy_data;
       
  4595 
       
  4596 	ret_val = hw->phy.ops.acquire(hw);
       
  4597 	if (ret_val)
       
  4598 		return;
       
  4599 
       
  4600 	/* A page set is expensive so check if already on desired page.
       
  4601 	 * If not, set to the page with the PHY status registers.
       
  4602 	 */
       
  4603 	hw->phy.addr = 1;
       
  4604 	ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
       
  4605 					   &phy_data);
       
  4606 	if (ret_val)
       
  4607 		goto release;
       
  4608 	if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
       
  4609 		ret_val = hw->phy.ops.set_page(hw,
       
  4610 					       HV_STATS_PAGE << IGP_PAGE_SHIFT);
       
  4611 		if (ret_val)
       
  4612 			goto release;
       
  4613 	}
       
  4614 
       
  4615 	/* Single Collision Count */
       
  4616 	hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
       
  4617 	ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
       
  4618 	if (!ret_val)
       
  4619 		adapter->stats.scc += phy_data;
       
  4620 
       
  4621 	/* Excessive Collision Count */
       
  4622 	hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
       
  4623 	ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
       
  4624 	if (!ret_val)
       
  4625 		adapter->stats.ecol += phy_data;
       
  4626 
       
  4627 	/* Multiple Collision Count */
       
  4628 	hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
       
  4629 	ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
       
  4630 	if (!ret_val)
       
  4631 		adapter->stats.mcc += phy_data;
       
  4632 
       
  4633 	/* Late Collision Count */
       
  4634 	hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
       
  4635 	ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
       
  4636 	if (!ret_val)
       
  4637 		adapter->stats.latecol += phy_data;
       
  4638 
       
  4639 	/* Collision Count - also used for adaptive IFS */
       
  4640 	hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
       
  4641 	ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
       
  4642 	if (!ret_val)
       
  4643 		hw->mac.collision_delta = phy_data;
       
  4644 
       
  4645 	/* Defer Count */
       
  4646 	hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
       
  4647 	ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
       
  4648 	if (!ret_val)
       
  4649 		adapter->stats.dc += phy_data;
       
  4650 
       
  4651 	/* Transmit with no CRS */
       
  4652 	hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
       
  4653 	ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
       
  4654 	if (!ret_val)
       
  4655 		adapter->stats.tncrs += phy_data;
       
  4656 
       
  4657 release:
       
  4658 	hw->phy.ops.release(hw);
       
  4659 }
       
  4660 
       
  4661 /**
       
  4662  * e1000e_update_stats - Update the board statistics counters
       
  4663  * @adapter: board private structure
       
  4664  **/
       
  4665 static void e1000e_update_stats(struct e1000_adapter *adapter)
       
  4666 {
       
  4667 	struct net_device *netdev = adapter->netdev;
       
  4668 	struct e1000_hw *hw = &adapter->hw;
       
  4669 	struct pci_dev *pdev = adapter->pdev;
       
  4670 
       
  4671 	/* Prevent stats update while adapter is being reset, or if the pci
       
  4672 	 * connection is down.
       
  4673 	 */
       
  4674 	if (adapter->link_speed == 0)
       
  4675 		return;
       
  4676 	if (pci_channel_offline(pdev))
       
  4677 		return;
       
  4678 
       
  4679 	adapter->stats.crcerrs += er32(CRCERRS);
       
  4680 	adapter->stats.gprc += er32(GPRC);
       
  4681 	adapter->stats.gorc += er32(GORCL);
       
  4682 	er32(GORCH);		/* Clear gorc */
       
  4683 	adapter->stats.bprc += er32(BPRC);
       
  4684 	adapter->stats.mprc += er32(MPRC);
       
  4685 	adapter->stats.roc += er32(ROC);
       
  4686 
       
  4687 	adapter->stats.mpc += er32(MPC);
       
  4688 
       
  4689 	/* Half-duplex statistics */
       
  4690 	if (adapter->link_duplex == HALF_DUPLEX) {
       
  4691 		if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
       
  4692 			e1000e_update_phy_stats(adapter);
       
  4693 		} else {
       
  4694 			adapter->stats.scc += er32(SCC);
       
  4695 			adapter->stats.ecol += er32(ECOL);
       
  4696 			adapter->stats.mcc += er32(MCC);
       
  4697 			adapter->stats.latecol += er32(LATECOL);
       
  4698 			adapter->stats.dc += er32(DC);
       
  4699 
       
  4700 			hw->mac.collision_delta = er32(COLC);
       
  4701 
       
  4702 			if ((hw->mac.type != e1000_82574) &&
       
  4703 			    (hw->mac.type != e1000_82583))
       
  4704 				adapter->stats.tncrs += er32(TNCRS);
       
  4705 		}
       
  4706 		adapter->stats.colc += hw->mac.collision_delta;
       
  4707 	}
       
  4708 
       
  4709 	adapter->stats.xonrxc += er32(XONRXC);
       
  4710 	adapter->stats.xontxc += er32(XONTXC);
       
  4711 	adapter->stats.xoffrxc += er32(XOFFRXC);
       
  4712 	adapter->stats.xofftxc += er32(XOFFTXC);
       
  4713 	adapter->stats.gptc += er32(GPTC);
       
  4714 	adapter->stats.gotc += er32(GOTCL);
       
  4715 	er32(GOTCH);		/* Clear gotc */
       
  4716 	adapter->stats.rnbc += er32(RNBC);
       
  4717 	adapter->stats.ruc += er32(RUC);
       
  4718 
       
  4719 	adapter->stats.mptc += er32(MPTC);
       
  4720 	adapter->stats.bptc += er32(BPTC);
       
  4721 
       
  4722 	/* used for adaptive IFS */
       
  4723 
       
  4724 	hw->mac.tx_packet_delta = er32(TPT);
       
  4725 	adapter->stats.tpt += hw->mac.tx_packet_delta;
       
  4726 
       
  4727 	adapter->stats.algnerrc += er32(ALGNERRC);
       
  4728 	adapter->stats.rxerrc += er32(RXERRC);
       
  4729 	adapter->stats.cexterr += er32(CEXTERR);
       
  4730 	adapter->stats.tsctc += er32(TSCTC);
       
  4731 	adapter->stats.tsctfc += er32(TSCTFC);
       
  4732 
       
  4733 	/* Fill out the OS statistics structure */
       
  4734 	netdev->stats.multicast = adapter->stats.mprc;
       
  4735 	netdev->stats.collisions = adapter->stats.colc;
       
  4736 
       
  4737 	/* Rx Errors */
       
  4738 
       
  4739 	/* RLEC on some newer hardware can be incorrect so build
       
  4740 	 * our own version based on RUC and ROC
       
  4741 	 */
       
  4742 	netdev->stats.rx_errors = adapter->stats.rxerrc +
       
  4743 	    adapter->stats.crcerrs + adapter->stats.algnerrc +
       
  4744 	    adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
       
  4745 	netdev->stats.rx_length_errors = adapter->stats.ruc +
       
  4746 	    adapter->stats.roc;
       
  4747 	netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
       
  4748 	netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
       
  4749 	netdev->stats.rx_missed_errors = adapter->stats.mpc;
       
  4750 
       
  4751 	/* Tx Errors */
       
  4752 	netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
       
  4753 	netdev->stats.tx_aborted_errors = adapter->stats.ecol;
       
  4754 	netdev->stats.tx_window_errors = adapter->stats.latecol;
       
  4755 	netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
       
  4756 
       
  4757 	/* Tx Dropped needs to be maintained elsewhere */
       
  4758 
       
  4759 	/* Management Stats */
       
  4760 	adapter->stats.mgptc += er32(MGTPTC);
       
  4761 	adapter->stats.mgprc += er32(MGTPRC);
       
  4762 	adapter->stats.mgpdc += er32(MGTPDC);
       
  4763 
       
  4764 	/* Correctable ECC Errors */
       
  4765 	if (hw->mac.type == e1000_pch_lpt) {
       
  4766 		u32 pbeccsts = er32(PBECCSTS);
       
  4767 
       
  4768 		adapter->corr_errors +=
       
  4769 		    pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
       
  4770 		adapter->uncorr_errors +=
       
  4771 		    (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
       
  4772 		    E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
       
  4773 	}
       
  4774 }
       
  4775 
       
  4776 /**
       
  4777  * e1000_phy_read_status - Update the PHY register status snapshot
       
  4778  * @adapter: board private structure
       
  4779  **/
       
  4780 static void e1000_phy_read_status(struct e1000_adapter *adapter)
       
  4781 {
       
  4782 	struct e1000_hw *hw = &adapter->hw;
       
  4783 	struct e1000_phy_regs *phy = &adapter->phy_regs;
       
  4784 
       
  4785 	if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
       
  4786 	    (er32(STATUS) & E1000_STATUS_LU) &&
       
  4787 	    (adapter->hw.phy.media_type == e1000_media_type_copper)) {
       
  4788 		int ret_val;
       
  4789 
       
  4790 		ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
       
  4791 		ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
       
  4792 		ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
       
  4793 		ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
       
  4794 		ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
       
  4795 		ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
       
  4796 		ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
       
  4797 		ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
       
  4798 		if (ret_val)
       
  4799 			e_warn("Error reading PHY register\n");
       
  4800 	} else {
       
  4801 		/* Do not read PHY registers if link is not up
       
  4802 		 * Set values to typical power-on defaults
       
  4803 		 */
       
  4804 		phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
       
  4805 		phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
       
  4806 			     BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
       
  4807 			     BMSR_ERCAP);
       
  4808 		phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
       
  4809 				  ADVERTISE_ALL | ADVERTISE_CSMA);
       
  4810 		phy->lpa = 0;
       
  4811 		phy->expansion = EXPANSION_ENABLENPAGE;
       
  4812 		phy->ctrl1000 = ADVERTISE_1000FULL;
       
  4813 		phy->stat1000 = 0;
       
  4814 		phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
       
  4815 	}
       
  4816 }
       
  4817 
       
  4818 static void e1000_print_link_info(struct e1000_adapter *adapter)
       
  4819 {
       
  4820 	struct e1000_hw *hw = &adapter->hw;
       
  4821 	u32 ctrl = er32(CTRL);
       
  4822 
       
  4823 	/* Link status message must follow this format for user tools */
       
  4824 	pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
       
  4825 		adapter->netdev->name, adapter->link_speed,
       
  4826 		adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
       
  4827 		(ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
       
  4828 		(ctrl & E1000_CTRL_RFCE) ? "Rx" :
       
  4829 		(ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
       
  4830 }
       
  4831 
       
  4832 static bool e1000e_has_link(struct e1000_adapter *adapter)
       
  4833 {
       
  4834 	struct e1000_hw *hw = &adapter->hw;
       
  4835 	bool link_active = false;
       
  4836 	s32 ret_val = 0;
       
  4837 
       
  4838 	/* get_link_status is set on LSC (link status) interrupt or
       
  4839 	 * Rx sequence error interrupt.  get_link_status will stay
       
  4840 	 * false until the check_for_link establishes link
       
  4841 	 * for copper adapters ONLY
       
  4842 	 */
       
  4843 	switch (hw->phy.media_type) {
       
  4844 	case e1000_media_type_copper:
       
  4845 		if (hw->mac.get_link_status) {
       
  4846 			ret_val = hw->mac.ops.check_for_link(hw);
       
  4847 			link_active = !hw->mac.get_link_status;
       
  4848 		} else {
       
  4849 			link_active = true;
       
  4850 		}
       
  4851 		break;
       
  4852 	case e1000_media_type_fiber:
       
  4853 		ret_val = hw->mac.ops.check_for_link(hw);
       
  4854 		link_active = !!(er32(STATUS) & E1000_STATUS_LU);
       
  4855 		break;
       
  4856 	case e1000_media_type_internal_serdes:
       
  4857 		ret_val = hw->mac.ops.check_for_link(hw);
       
  4858 		link_active = adapter->hw.mac.serdes_has_link;
       
  4859 		break;
       
  4860 	default:
       
  4861 	case e1000_media_type_unknown:
       
  4862 		break;
       
  4863 	}
       
  4864 
       
  4865 	if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
       
  4866 	    (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
       
  4867 		/* See e1000_kmrn_lock_loss_workaround_ich8lan() */
       
  4868 		e_info("Gigabit has been disabled, downgrading speed\n");
       
  4869 	}
       
  4870 
       
  4871 	return link_active;
       
  4872 }
       
  4873 
       
  4874 static void e1000e_enable_receives(struct e1000_adapter *adapter)
       
  4875 {
       
  4876 	/* make sure the receive unit is started */
       
  4877 	if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
       
  4878 	    (adapter->flags & FLAG_RESTART_NOW)) {
       
  4879 		struct e1000_hw *hw = &adapter->hw;
       
  4880 		u32 rctl = er32(RCTL);
       
  4881 
       
  4882 		ew32(RCTL, rctl | E1000_RCTL_EN);
       
  4883 		adapter->flags &= ~FLAG_RESTART_NOW;
       
  4884 	}
       
  4885 }
       
  4886 
       
  4887 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
       
  4888 {
       
  4889 	struct e1000_hw *hw = &adapter->hw;
       
  4890 
       
  4891 	/* With 82574 controllers, PHY needs to be checked periodically
       
  4892 	 * for hung state and reset, if two calls return true
       
  4893 	 */
       
  4894 	if (e1000_check_phy_82574(hw))
       
  4895 		adapter->phy_hang_count++;
       
  4896 	else
       
  4897 		adapter->phy_hang_count = 0;
       
  4898 
       
  4899 	if (adapter->phy_hang_count > 1) {
       
  4900 		adapter->phy_hang_count = 0;
       
  4901 		e_dbg("PHY appears hung - resetting\n");
       
  4902 		schedule_work(&adapter->reset_task);
       
  4903 	}
       
  4904 }
       
  4905 
       
  4906 /**
       
  4907  * e1000_watchdog - Timer Call-back
       
  4908  * @data: pointer to adapter cast into an unsigned long
       
  4909  **/
       
  4910 static void e1000_watchdog(unsigned long data)
       
  4911 {
       
  4912 	struct e1000_adapter *adapter = (struct e1000_adapter *)data;
       
  4913 
       
  4914 	/* Do the rest outside of interrupt context */
       
  4915 	schedule_work(&adapter->watchdog_task);
       
  4916 
       
  4917 	/* TODO: make this use queue_delayed_work() */
       
  4918 }
       
  4919 
       
  4920 static void e1000_watchdog_task(struct work_struct *work)
       
  4921 {
       
  4922 	struct e1000_adapter *adapter = container_of(work,
       
  4923 						     struct e1000_adapter,
       
  4924 						     watchdog_task);
       
  4925 	struct net_device *netdev = adapter->netdev;
       
  4926 	struct e1000_mac_info *mac = &adapter->hw.mac;
       
  4927 	struct e1000_phy_info *phy = &adapter->hw.phy;
       
  4928 	struct e1000_ring *tx_ring = adapter->tx_ring;
       
  4929 	struct e1000_hw *hw = &adapter->hw;
       
  4930 	u32 link, tctl;
       
  4931 
       
  4932 	if (test_bit(__E1000_DOWN, &adapter->state))
       
  4933 		return;
       
  4934 
       
  4935 	link = e1000e_has_link(adapter);
       
  4936 	if ((netif_carrier_ok(netdev)) && link) {
       
  4937 		/* Cancel scheduled suspend requests. */
       
  4938 		pm_runtime_resume(netdev->dev.parent);
       
  4939 
       
  4940 		e1000e_enable_receives(adapter);
       
  4941 		goto link_up;
       
  4942 	}
       
  4943 
       
  4944 	if ((e1000e_enable_tx_pkt_filtering(hw)) &&
       
  4945 	    (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
       
  4946 		e1000_update_mng_vlan(adapter);
       
  4947 
       
  4948 	if (link) {
       
  4949 		if (!netif_carrier_ok(netdev)) {
       
  4950 			bool txb2b = true;
       
  4951 
       
  4952 			/* Cancel scheduled suspend requests. */
       
  4953 			pm_runtime_resume(netdev->dev.parent);
       
  4954 
       
  4955 			/* update snapshot of PHY registers on LSC */
       
  4956 			e1000_phy_read_status(adapter);
       
  4957 			mac->ops.get_link_up_info(&adapter->hw,
       
  4958 						  &adapter->link_speed,
       
  4959 						  &adapter->link_duplex);
       
  4960 			e1000_print_link_info(adapter);
       
  4961 
       
  4962 			/* check if SmartSpeed worked */
       
  4963 			e1000e_check_downshift(hw);
       
  4964 			if (phy->speed_downgraded)
       
  4965 				netdev_warn(netdev,
       
  4966 					    "Link Speed was downgraded by SmartSpeed\n");
       
  4967 
       
  4968 			/* On supported PHYs, check for duplex mismatch only
       
  4969 			 * if link has autonegotiated at 10/100 half
       
  4970 			 */
       
  4971 			if ((hw->phy.type == e1000_phy_igp_3 ||
       
  4972 			     hw->phy.type == e1000_phy_bm) &&
       
  4973 			    hw->mac.autoneg &&
       
  4974 			    (adapter->link_speed == SPEED_10 ||
       
  4975 			     adapter->link_speed == SPEED_100) &&
       
  4976 			    (adapter->link_duplex == HALF_DUPLEX)) {
       
  4977 				u16 autoneg_exp;
       
  4978 
       
  4979 				e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
       
  4980 
       
  4981 				if (!(autoneg_exp & EXPANSION_NWAY))
       
  4982 					e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
       
  4983 			}
       
  4984 
       
  4985 			/* adjust timeout factor according to speed/duplex */
       
  4986 			adapter->tx_timeout_factor = 1;
       
  4987 			switch (adapter->link_speed) {
       
  4988 			case SPEED_10:
       
  4989 				txb2b = false;
       
  4990 				adapter->tx_timeout_factor = 16;
       
  4991 				break;
       
  4992 			case SPEED_100:
       
  4993 				txb2b = false;
       
  4994 				adapter->tx_timeout_factor = 10;
       
  4995 				break;
       
  4996 			}
       
  4997 
       
  4998 			/* workaround: re-program speed mode bit after
       
  4999 			 * link-up event
       
  5000 			 */
       
  5001 			if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
       
  5002 			    !txb2b) {
       
  5003 				u32 tarc0;
       
  5004 
       
  5005 				tarc0 = er32(TARC(0));
       
  5006 				tarc0 &= ~SPEED_MODE_BIT;
       
  5007 				ew32(TARC(0), tarc0);
       
  5008 			}
       
  5009 
       
  5010 			/* disable TSO for pcie and 10/100 speeds, to avoid
       
  5011 			 * some hardware issues
       
  5012 			 */
       
  5013 			if (!(adapter->flags & FLAG_TSO_FORCE)) {
       
  5014 				switch (adapter->link_speed) {
       
  5015 				case SPEED_10:
       
  5016 				case SPEED_100:
       
  5017 					e_info("10/100 speed: disabling TSO\n");
       
  5018 					netdev->features &= ~NETIF_F_TSO;
       
  5019 					netdev->features &= ~NETIF_F_TSO6;
       
  5020 					break;
       
  5021 				case SPEED_1000:
       
  5022 					netdev->features |= NETIF_F_TSO;
       
  5023 					netdev->features |= NETIF_F_TSO6;
       
  5024 					break;
       
  5025 				default:
       
  5026 					/* oops */
       
  5027 					break;
       
  5028 				}
       
  5029 			}
       
  5030 
       
  5031 			/* enable transmits in the hardware, need to do this
       
  5032 			 * after setting TARC(0)
       
  5033 			 */
       
  5034 			tctl = er32(TCTL);
       
  5035 			tctl |= E1000_TCTL_EN;
       
  5036 			ew32(TCTL, tctl);
       
  5037 
       
  5038 			/* Perform any post-link-up configuration before
       
  5039 			 * reporting link up.
       
  5040 			 */
       
  5041 			if (phy->ops.cfg_on_link_up)
       
  5042 				phy->ops.cfg_on_link_up(hw);
       
  5043 
       
  5044 			netif_carrier_on(netdev);
       
  5045 
       
  5046 			if (!test_bit(__E1000_DOWN, &adapter->state))
       
  5047 				mod_timer(&adapter->phy_info_timer,
       
  5048 					  round_jiffies(jiffies + 2 * HZ));
       
  5049 		}
       
  5050 	} else {
       
  5051 		if (netif_carrier_ok(netdev)) {
       
  5052 			adapter->link_speed = 0;
       
  5053 			adapter->link_duplex = 0;
       
  5054 			/* Link status message must follow this format */
       
  5055 			pr_info("%s NIC Link is Down\n", adapter->netdev->name);
       
  5056 			netif_carrier_off(netdev);
       
  5057 			if (!test_bit(__E1000_DOWN, &adapter->state))
       
  5058 				mod_timer(&adapter->phy_info_timer,
       
  5059 					  round_jiffies(jiffies + 2 * HZ));
       
  5060 
       
  5061 			/* 8000ES2LAN requires a Rx packet buffer work-around
       
  5062 			 * on link down event; reset the controller to flush
       
  5063 			 * the Rx packet buffer.
       
  5064 			 */
       
  5065 			if (adapter->flags & FLAG_RX_NEEDS_RESTART)
       
  5066 				adapter->flags |= FLAG_RESTART_NOW;
       
  5067 			else
       
  5068 				pm_schedule_suspend(netdev->dev.parent,
       
  5069 						    LINK_TIMEOUT);
       
  5070 		}
       
  5071 	}
       
  5072 
       
  5073 link_up:
       
  5074 	spin_lock(&adapter->stats64_lock);
       
  5075 	e1000e_update_stats(adapter);
       
  5076 
       
  5077 	mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
       
  5078 	adapter->tpt_old = adapter->stats.tpt;
       
  5079 	mac->collision_delta = adapter->stats.colc - adapter->colc_old;
       
  5080 	adapter->colc_old = adapter->stats.colc;
       
  5081 
       
  5082 	adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
       
  5083 	adapter->gorc_old = adapter->stats.gorc;
       
  5084 	adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
       
  5085 	adapter->gotc_old = adapter->stats.gotc;
       
  5086 	spin_unlock(&adapter->stats64_lock);
       
  5087 
       
  5088 	/* If the link is lost the controller stops DMA, but
       
  5089 	 * if there is queued Tx work it cannot be done.  So
       
  5090 	 * reset the controller to flush the Tx packet buffers.
       
  5091 	 */
       
  5092 	if (!netif_carrier_ok(netdev) &&
       
  5093 	    (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
       
  5094 		adapter->flags |= FLAG_RESTART_NOW;
       
  5095 
       
  5096 	/* If reset is necessary, do it outside of interrupt context. */
       
  5097 	if (adapter->flags & FLAG_RESTART_NOW) {
       
  5098 		schedule_work(&adapter->reset_task);
       
  5099 		/* return immediately since reset is imminent */
       
  5100 		return;
       
  5101 	}
       
  5102 
       
  5103 	e1000e_update_adaptive(&adapter->hw);
       
  5104 
       
  5105 	/* Simple mode for Interrupt Throttle Rate (ITR) */
       
  5106 	if (adapter->itr_setting == 4) {
       
  5107 		/* Symmetric Tx/Rx gets a reduced ITR=2000;
       
  5108 		 * Total asymmetrical Tx or Rx gets ITR=8000;
       
  5109 		 * everyone else is between 2000-8000.
       
  5110 		 */
       
  5111 		u32 goc = (adapter->gotc + adapter->gorc) / 10000;
       
  5112 		u32 dif = (adapter->gotc > adapter->gorc ?
       
  5113 			   adapter->gotc - adapter->gorc :
       
  5114 			   adapter->gorc - adapter->gotc) / 10000;
       
  5115 		u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
       
  5116 
       
  5117 		e1000e_write_itr(adapter, itr);
       
  5118 	}
       
  5119 
       
  5120 	/* Cause software interrupt to ensure Rx ring is cleaned */
       
  5121 	if (adapter->msix_entries)
       
  5122 		ew32(ICS, adapter->rx_ring->ims_val);
       
  5123 	else
       
  5124 		ew32(ICS, E1000_ICS_RXDMT0);
       
  5125 
       
  5126 	/* flush pending descriptors to memory before detecting Tx hang */
       
  5127 	e1000e_flush_descriptors(adapter);
       
  5128 
       
  5129 	/* Force detection of hung controller every watchdog period */
       
  5130 	adapter->detect_tx_hung = true;
       
  5131 
       
  5132 	/* With 82571 controllers, LAA may be overwritten due to controller
       
  5133 	 * reset from the other port. Set the appropriate LAA in RAR[0]
       
  5134 	 */
       
  5135 	if (e1000e_get_laa_state_82571(hw))
       
  5136 		hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
       
  5137 
       
  5138 	if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
       
  5139 		e1000e_check_82574_phy_workaround(adapter);
       
  5140 
       
  5141 	/* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
       
  5142 	if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
       
  5143 		if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
       
  5144 		    (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
       
  5145 			er32(RXSTMPH);
       
  5146 			adapter->rx_hwtstamp_cleared++;
       
  5147 		} else {
       
  5148 			adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
       
  5149 		}
       
  5150 	}
       
  5151 
       
  5152 	/* Reset the timer */
       
  5153 	if (!test_bit(__E1000_DOWN, &adapter->state))
       
  5154 		mod_timer(&adapter->watchdog_timer,
       
  5155 			  round_jiffies(jiffies + 2 * HZ));
       
  5156 }
       
  5157 
       
  5158 #define E1000_TX_FLAGS_CSUM		0x00000001
       
  5159 #define E1000_TX_FLAGS_VLAN		0x00000002
       
  5160 #define E1000_TX_FLAGS_TSO		0x00000004
       
  5161 #define E1000_TX_FLAGS_IPV4		0x00000008
       
  5162 #define E1000_TX_FLAGS_NO_FCS		0x00000010
       
  5163 #define E1000_TX_FLAGS_HWTSTAMP		0x00000020
       
  5164 #define E1000_TX_FLAGS_VLAN_MASK	0xffff0000
       
  5165 #define E1000_TX_FLAGS_VLAN_SHIFT	16
       
  5166 
       
  5167 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb)
       
  5168 {
       
  5169 	struct e1000_context_desc *context_desc;
       
  5170 	struct e1000_buffer *buffer_info;
       
  5171 	unsigned int i;
       
  5172 	u32 cmd_length = 0;
       
  5173 	u16 ipcse = 0, mss;
       
  5174 	u8 ipcss, ipcso, tucss, tucso, hdr_len;
       
  5175 	int err;
       
  5176 
       
  5177 	if (!skb_is_gso(skb))
       
  5178 		return 0;
       
  5179 
       
  5180 	err = skb_cow_head(skb, 0);
       
  5181 	if (err < 0)
       
  5182 		return err;
       
  5183 
       
  5184 	hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
       
  5185 	mss = skb_shinfo(skb)->gso_size;
       
  5186 	if (skb->protocol == htons(ETH_P_IP)) {
       
  5187 		struct iphdr *iph = ip_hdr(skb);
       
  5188 		iph->tot_len = 0;
       
  5189 		iph->check = 0;
       
  5190 		tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
       
  5191 							 0, IPPROTO_TCP, 0);
       
  5192 		cmd_length = E1000_TXD_CMD_IP;
       
  5193 		ipcse = skb_transport_offset(skb) - 1;
       
  5194 	} else if (skb_is_gso_v6(skb)) {
       
  5195 		ipv6_hdr(skb)->payload_len = 0;
       
  5196 		tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
       
  5197 						       &ipv6_hdr(skb)->daddr,
       
  5198 						       0, IPPROTO_TCP, 0);
       
  5199 		ipcse = 0;
       
  5200 	}
       
  5201 	ipcss = skb_network_offset(skb);
       
  5202 	ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
       
  5203 	tucss = skb_transport_offset(skb);
       
  5204 	tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
       
  5205 
       
  5206 	cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
       
  5207 		       E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
       
  5208 
       
  5209 	i = tx_ring->next_to_use;
       
  5210 	context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
       
  5211 	buffer_info = &tx_ring->buffer_info[i];
       
  5212 
       
  5213 	context_desc->lower_setup.ip_fields.ipcss = ipcss;
       
  5214 	context_desc->lower_setup.ip_fields.ipcso = ipcso;
       
  5215 	context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
       
  5216 	context_desc->upper_setup.tcp_fields.tucss = tucss;
       
  5217 	context_desc->upper_setup.tcp_fields.tucso = tucso;
       
  5218 	context_desc->upper_setup.tcp_fields.tucse = 0;
       
  5219 	context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
       
  5220 	context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
       
  5221 	context_desc->cmd_and_length = cpu_to_le32(cmd_length);
       
  5222 
       
  5223 	buffer_info->time_stamp = jiffies;
       
  5224 	buffer_info->next_to_watch = i;
       
  5225 
       
  5226 	i++;
       
  5227 	if (i == tx_ring->count)
       
  5228 		i = 0;
       
  5229 	tx_ring->next_to_use = i;
       
  5230 
       
  5231 	return 1;
       
  5232 }
       
  5233 
       
  5234 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
       
  5235 {
       
  5236 	struct e1000_adapter *adapter = tx_ring->adapter;
       
  5237 	struct e1000_context_desc *context_desc;
       
  5238 	struct e1000_buffer *buffer_info;
       
  5239 	unsigned int i;
       
  5240 	u8 css;
       
  5241 	u32 cmd_len = E1000_TXD_CMD_DEXT;
       
  5242 	__be16 protocol;
       
  5243 
       
  5244 	if (skb->ip_summed != CHECKSUM_PARTIAL)
       
  5245 		return false;
       
  5246 
       
  5247 	if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
       
  5248 		protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
       
  5249 	else
       
  5250 		protocol = skb->protocol;
       
  5251 
       
  5252 	switch (protocol) {
       
  5253 	case cpu_to_be16(ETH_P_IP):
       
  5254 		if (ip_hdr(skb)->protocol == IPPROTO_TCP)
       
  5255 			cmd_len |= E1000_TXD_CMD_TCP;
       
  5256 		break;
       
  5257 	case cpu_to_be16(ETH_P_IPV6):
       
  5258 		/* XXX not handling all IPV6 headers */
       
  5259 		if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
       
  5260 			cmd_len |= E1000_TXD_CMD_TCP;
       
  5261 		break;
       
  5262 	default:
       
  5263 		if (unlikely(net_ratelimit()))
       
  5264 			e_warn("checksum_partial proto=%x!\n",
       
  5265 			       be16_to_cpu(protocol));
       
  5266 		break;
       
  5267 	}
       
  5268 
       
  5269 	css = skb_checksum_start_offset(skb);
       
  5270 
       
  5271 	i = tx_ring->next_to_use;
       
  5272 	buffer_info = &tx_ring->buffer_info[i];
       
  5273 	context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
       
  5274 
       
  5275 	context_desc->lower_setup.ip_config = 0;
       
  5276 	context_desc->upper_setup.tcp_fields.tucss = css;
       
  5277 	context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
       
  5278 	context_desc->upper_setup.tcp_fields.tucse = 0;
       
  5279 	context_desc->tcp_seg_setup.data = 0;
       
  5280 	context_desc->cmd_and_length = cpu_to_le32(cmd_len);
       
  5281 
       
  5282 	buffer_info->time_stamp = jiffies;
       
  5283 	buffer_info->next_to_watch = i;
       
  5284 
       
  5285 	i++;
       
  5286 	if (i == tx_ring->count)
       
  5287 		i = 0;
       
  5288 	tx_ring->next_to_use = i;
       
  5289 
       
  5290 	return true;
       
  5291 }
       
  5292 
       
  5293 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
       
  5294 			unsigned int first, unsigned int max_per_txd,
       
  5295 			unsigned int nr_frags)
       
  5296 {
       
  5297 	struct e1000_adapter *adapter = tx_ring->adapter;
       
  5298 	struct pci_dev *pdev = adapter->pdev;
       
  5299 	struct e1000_buffer *buffer_info;
       
  5300 	unsigned int len = skb_headlen(skb);
       
  5301 	unsigned int offset = 0, size, count = 0, i;
       
  5302 	unsigned int f, bytecount, segs;
       
  5303 
       
  5304 	i = tx_ring->next_to_use;
       
  5305 
       
  5306 	while (len) {
       
  5307 		buffer_info = &tx_ring->buffer_info[i];
       
  5308 		size = min(len, max_per_txd);
       
  5309 
       
  5310 		buffer_info->length = size;
       
  5311 		buffer_info->time_stamp = jiffies;
       
  5312 		buffer_info->next_to_watch = i;
       
  5313 		buffer_info->dma = dma_map_single(&pdev->dev,
       
  5314 						  skb->data + offset,
       
  5315 						  size, DMA_TO_DEVICE);
       
  5316 		buffer_info->mapped_as_page = false;
       
  5317 		if (dma_mapping_error(&pdev->dev, buffer_info->dma))
       
  5318 			goto dma_error;
       
  5319 
       
  5320 		len -= size;
       
  5321 		offset += size;
       
  5322 		count++;
       
  5323 
       
  5324 		if (len) {
       
  5325 			i++;
       
  5326 			if (i == tx_ring->count)
       
  5327 				i = 0;
       
  5328 		}
       
  5329 	}
       
  5330 
       
  5331 	for (f = 0; f < nr_frags; f++) {
       
  5332 		const struct skb_frag_struct *frag;
       
  5333 
       
  5334 		frag = &skb_shinfo(skb)->frags[f];
       
  5335 		len = skb_frag_size(frag);
       
  5336 		offset = 0;
       
  5337 
       
  5338 		while (len) {
       
  5339 			i++;
       
  5340 			if (i == tx_ring->count)
       
  5341 				i = 0;
       
  5342 
       
  5343 			buffer_info = &tx_ring->buffer_info[i];
       
  5344 			size = min(len, max_per_txd);
       
  5345 
       
  5346 			buffer_info->length = size;
       
  5347 			buffer_info->time_stamp = jiffies;
       
  5348 			buffer_info->next_to_watch = i;
       
  5349 			buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
       
  5350 							    offset, size,
       
  5351 							    DMA_TO_DEVICE);
       
  5352 			buffer_info->mapped_as_page = true;
       
  5353 			if (dma_mapping_error(&pdev->dev, buffer_info->dma))
       
  5354 				goto dma_error;
       
  5355 
       
  5356 			len -= size;
       
  5357 			offset += size;
       
  5358 			count++;
       
  5359 		}
       
  5360 	}
       
  5361 
       
  5362 	segs = skb_shinfo(skb)->gso_segs ? : 1;
       
  5363 	/* multiply data chunks by size of headers */
       
  5364 	bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
       
  5365 
       
  5366 	tx_ring->buffer_info[i].skb = skb;
       
  5367 	tx_ring->buffer_info[i].segs = segs;
       
  5368 	tx_ring->buffer_info[i].bytecount = bytecount;
       
  5369 	tx_ring->buffer_info[first].next_to_watch = i;
       
  5370 
       
  5371 	return count;
       
  5372 
       
  5373 dma_error:
       
  5374 	dev_err(&pdev->dev, "Tx DMA map failed\n");
       
  5375 	buffer_info->dma = 0;
       
  5376 	if (count)
       
  5377 		count--;
       
  5378 
       
  5379 	while (count--) {
       
  5380 		if (i == 0)
       
  5381 			i += tx_ring->count;
       
  5382 		i--;
       
  5383 		buffer_info = &tx_ring->buffer_info[i];
       
  5384 		e1000_put_txbuf(tx_ring, buffer_info);
       
  5385 	}
       
  5386 
       
  5387 	return 0;
       
  5388 }
       
  5389 
       
  5390 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
       
  5391 {
       
  5392 	struct e1000_adapter *adapter = tx_ring->adapter;
       
  5393 	struct e1000_tx_desc *tx_desc = NULL;
       
  5394 	struct e1000_buffer *buffer_info;
       
  5395 	u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
       
  5396 	unsigned int i;
       
  5397 
       
  5398 	if (tx_flags & E1000_TX_FLAGS_TSO) {
       
  5399 		txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
       
  5400 		    E1000_TXD_CMD_TSE;
       
  5401 		txd_upper |= E1000_TXD_POPTS_TXSM << 8;
       
  5402 
       
  5403 		if (tx_flags & E1000_TX_FLAGS_IPV4)
       
  5404 			txd_upper |= E1000_TXD_POPTS_IXSM << 8;
       
  5405 	}
       
  5406 
       
  5407 	if (tx_flags & E1000_TX_FLAGS_CSUM) {
       
  5408 		txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
       
  5409 		txd_upper |= E1000_TXD_POPTS_TXSM << 8;
       
  5410 	}
       
  5411 
       
  5412 	if (tx_flags & E1000_TX_FLAGS_VLAN) {
       
  5413 		txd_lower |= E1000_TXD_CMD_VLE;
       
  5414 		txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
       
  5415 	}
       
  5416 
       
  5417 	if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
       
  5418 		txd_lower &= ~(E1000_TXD_CMD_IFCS);
       
  5419 
       
  5420 	if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
       
  5421 		txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
       
  5422 		txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
       
  5423 	}
       
  5424 
       
  5425 	i = tx_ring->next_to_use;
       
  5426 
       
  5427 	do {
       
  5428 		buffer_info = &tx_ring->buffer_info[i];
       
  5429 		tx_desc = E1000_TX_DESC(*tx_ring, i);
       
  5430 		tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
       
  5431 		tx_desc->lower.data = cpu_to_le32(txd_lower |
       
  5432 						  buffer_info->length);
       
  5433 		tx_desc->upper.data = cpu_to_le32(txd_upper);
       
  5434 
       
  5435 		i++;
       
  5436 		if (i == tx_ring->count)
       
  5437 			i = 0;
       
  5438 	} while (--count > 0);
       
  5439 
       
  5440 	tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
       
  5441 
       
  5442 	/* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
       
  5443 	if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
       
  5444 		tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
       
  5445 
       
  5446 	/* Force memory writes to complete before letting h/w
       
  5447 	 * know there are new descriptors to fetch.  (Only
       
  5448 	 * applicable for weak-ordered memory model archs,
       
  5449 	 * such as IA-64).
       
  5450 	 */
       
  5451 	wmb();
       
  5452 
       
  5453 	tx_ring->next_to_use = i;
       
  5454 
       
  5455 	if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
       
  5456 		e1000e_update_tdt_wa(tx_ring, i);
       
  5457 	else
       
  5458 		writel(i, tx_ring->tail);
       
  5459 
       
  5460 	/* we need this if more than one processor can write to our tail
       
  5461 	 * at a time, it synchronizes IO on IA64/Altix systems
       
  5462 	 */
       
  5463 	mmiowb();
       
  5464 }
       
  5465 
       
  5466 #define MINIMUM_DHCP_PACKET_SIZE 282
       
  5467 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
       
  5468 				    struct sk_buff *skb)
       
  5469 {
       
  5470 	struct e1000_hw *hw = &adapter->hw;
       
  5471 	u16 length, offset;
       
  5472 
       
  5473 	if (vlan_tx_tag_present(skb) &&
       
  5474 	    !((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
       
  5475 	      (adapter->hw.mng_cookie.status &
       
  5476 	       E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
       
  5477 		return 0;
       
  5478 
       
  5479 	if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
       
  5480 		return 0;
       
  5481 
       
  5482 	if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
       
  5483 		return 0;
       
  5484 
       
  5485 	{
       
  5486 		const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
       
  5487 		struct udphdr *udp;
       
  5488 
       
  5489 		if (ip->protocol != IPPROTO_UDP)
       
  5490 			return 0;
       
  5491 
       
  5492 		udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
       
  5493 		if (ntohs(udp->dest) != 67)
       
  5494 			return 0;
       
  5495 
       
  5496 		offset = (u8 *)udp + 8 - skb->data;
       
  5497 		length = skb->len - offset;
       
  5498 		return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
       
  5499 	}
       
  5500 
       
  5501 	return 0;
       
  5502 }
       
  5503 
       
  5504 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
       
  5505 {
       
  5506 	struct e1000_adapter *adapter = tx_ring->adapter;
       
  5507 
       
  5508 	netif_stop_queue(adapter->netdev);
       
  5509 	/* Herbert's original patch had:
       
  5510 	 *  smp_mb__after_netif_stop_queue();
       
  5511 	 * but since that doesn't exist yet, just open code it.
       
  5512 	 */
       
  5513 	smp_mb();
       
  5514 
       
  5515 	/* We need to check again in a case another CPU has just
       
  5516 	 * made room available.
       
  5517 	 */
       
  5518 	if (e1000_desc_unused(tx_ring) < size)
       
  5519 		return -EBUSY;
       
  5520 
       
  5521 	/* A reprieve! */
       
  5522 	netif_start_queue(adapter->netdev);
       
  5523 	++adapter->restart_queue;
       
  5524 	return 0;
       
  5525 }
       
  5526 
       
  5527 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
       
  5528 {
       
  5529 	BUG_ON(size > tx_ring->count);
       
  5530 
       
  5531 	if (e1000_desc_unused(tx_ring) >= size)
       
  5532 		return 0;
       
  5533 	return __e1000_maybe_stop_tx(tx_ring, size);
       
  5534 }
       
  5535 
       
  5536 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
       
  5537 				    struct net_device *netdev)
       
  5538 {
       
  5539 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  5540 	struct e1000_ring *tx_ring = adapter->tx_ring;
       
  5541 	unsigned int first;
       
  5542 	unsigned int tx_flags = 0;
       
  5543 	unsigned int len = skb_headlen(skb);
       
  5544 	unsigned int nr_frags;
       
  5545 	unsigned int mss;
       
  5546 	int count = 0;
       
  5547 	int tso;
       
  5548 	unsigned int f;
       
  5549 
       
  5550 	if (test_bit(__E1000_DOWN, &adapter->state)) {
       
  5551 		dev_kfree_skb_any(skb);
       
  5552 		return NETDEV_TX_OK;
       
  5553 	}
       
  5554 
       
  5555 	if (skb->len <= 0) {
       
  5556 		dev_kfree_skb_any(skb);
       
  5557 		return NETDEV_TX_OK;
       
  5558 	}
       
  5559 
       
  5560 	/* The minimum packet size with TCTL.PSP set is 17 bytes so
       
  5561 	 * pad skb in order to meet this minimum size requirement
       
  5562 	 */
       
  5563 	if (unlikely(skb->len < 17)) {
       
  5564 		if (skb_pad(skb, 17 - skb->len))
       
  5565 			return NETDEV_TX_OK;
       
  5566 		skb->len = 17;
       
  5567 		skb_set_tail_pointer(skb, 17);
       
  5568 	}
       
  5569 
       
  5570 	mss = skb_shinfo(skb)->gso_size;
       
  5571 	if (mss) {
       
  5572 		u8 hdr_len;
       
  5573 
       
  5574 		/* TSO Workaround for 82571/2/3 Controllers -- if skb->data
       
  5575 		 * points to just header, pull a few bytes of payload from
       
  5576 		 * frags into skb->data
       
  5577 		 */
       
  5578 		hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
       
  5579 		/* we do this workaround for ES2LAN, but it is un-necessary,
       
  5580 		 * avoiding it could save a lot of cycles
       
  5581 		 */
       
  5582 		if (skb->data_len && (hdr_len == len)) {
       
  5583 			unsigned int pull_size;
       
  5584 
       
  5585 			pull_size = min_t(unsigned int, 4, skb->data_len);
       
  5586 			if (!__pskb_pull_tail(skb, pull_size)) {
       
  5587 				e_err("__pskb_pull_tail failed.\n");
       
  5588 				dev_kfree_skb_any(skb);
       
  5589 				return NETDEV_TX_OK;
       
  5590 			}
       
  5591 			len = skb_headlen(skb);
       
  5592 		}
       
  5593 	}
       
  5594 
       
  5595 	/* reserve a descriptor for the offload context */
       
  5596 	if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
       
  5597 		count++;
       
  5598 	count++;
       
  5599 
       
  5600 	count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
       
  5601 
       
  5602 	nr_frags = skb_shinfo(skb)->nr_frags;
       
  5603 	for (f = 0; f < nr_frags; f++)
       
  5604 		count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
       
  5605 				      adapter->tx_fifo_limit);
       
  5606 
       
  5607 	if (adapter->hw.mac.tx_pkt_filtering)
       
  5608 		e1000_transfer_dhcp_info(adapter, skb);
       
  5609 
       
  5610 	/* need: count + 2 desc gap to keep tail from touching
       
  5611 	 * head, otherwise try next time
       
  5612 	 */
       
  5613 	if (e1000_maybe_stop_tx(tx_ring, count + 2))
       
  5614 		return NETDEV_TX_BUSY;
       
  5615 
       
  5616 	if (vlan_tx_tag_present(skb)) {
       
  5617 		tx_flags |= E1000_TX_FLAGS_VLAN;
       
  5618 		tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
       
  5619 	}
       
  5620 
       
  5621 	first = tx_ring->next_to_use;
       
  5622 
       
  5623 	tso = e1000_tso(tx_ring, skb);
       
  5624 	if (tso < 0) {
       
  5625 		dev_kfree_skb_any(skb);
       
  5626 		return NETDEV_TX_OK;
       
  5627 	}
       
  5628 
       
  5629 	if (tso)
       
  5630 		tx_flags |= E1000_TX_FLAGS_TSO;
       
  5631 	else if (e1000_tx_csum(tx_ring, skb))
       
  5632 		tx_flags |= E1000_TX_FLAGS_CSUM;
       
  5633 
       
  5634 	/* Old method was to assume IPv4 packet by default if TSO was enabled.
       
  5635 	 * 82571 hardware supports TSO capabilities for IPv6 as well...
       
  5636 	 * no longer assume, we must.
       
  5637 	 */
       
  5638 	if (skb->protocol == htons(ETH_P_IP))
       
  5639 		tx_flags |= E1000_TX_FLAGS_IPV4;
       
  5640 
       
  5641 	if (unlikely(skb->no_fcs))
       
  5642 		tx_flags |= E1000_TX_FLAGS_NO_FCS;
       
  5643 
       
  5644 	/* if count is 0 then mapping error has occurred */
       
  5645 	count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
       
  5646 			     nr_frags);
       
  5647 	if (count) {
       
  5648 		if (unlikely((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
       
  5649 			     !adapter->tx_hwtstamp_skb)) {
       
  5650 			skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
       
  5651 			tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
       
  5652 			adapter->tx_hwtstamp_skb = skb_get(skb);
       
  5653 			adapter->tx_hwtstamp_start = jiffies;
       
  5654 			schedule_work(&adapter->tx_hwtstamp_work);
       
  5655 		} else {
       
  5656 			skb_tx_timestamp(skb);
       
  5657 		}
       
  5658 
       
  5659 		netdev_sent_queue(netdev, skb->len);
       
  5660 		e1000_tx_queue(tx_ring, tx_flags, count);
       
  5661 		/* Make sure there is space in the ring for the next send. */
       
  5662 		e1000_maybe_stop_tx(tx_ring,
       
  5663 				    (MAX_SKB_FRAGS *
       
  5664 				     DIV_ROUND_UP(PAGE_SIZE,
       
  5665 						  adapter->tx_fifo_limit) + 2));
       
  5666 	} else {
       
  5667 		dev_kfree_skb_any(skb);
       
  5668 		tx_ring->buffer_info[first].time_stamp = 0;
       
  5669 		tx_ring->next_to_use = first;
       
  5670 	}
       
  5671 
       
  5672 	return NETDEV_TX_OK;
       
  5673 }
       
  5674 
       
  5675 /**
       
  5676  * e1000_tx_timeout - Respond to a Tx Hang
       
  5677  * @netdev: network interface device structure
       
  5678  **/
       
  5679 static void e1000_tx_timeout(struct net_device *netdev)
       
  5680 {
       
  5681 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  5682 
       
  5683 	/* Do the reset outside of interrupt context */
       
  5684 	adapter->tx_timeout_count++;
       
  5685 	schedule_work(&adapter->reset_task);
       
  5686 }
       
  5687 
       
  5688 static void e1000_reset_task(struct work_struct *work)
       
  5689 {
       
  5690 	struct e1000_adapter *adapter;
       
  5691 	adapter = container_of(work, struct e1000_adapter, reset_task);
       
  5692 
       
  5693 	/* don't run the task if already down */
       
  5694 	if (test_bit(__E1000_DOWN, &adapter->state))
       
  5695 		return;
       
  5696 
       
  5697 	if (!(adapter->flags & FLAG_RESTART_NOW)) {
       
  5698 		e1000e_dump(adapter);
       
  5699 		e_err("Reset adapter unexpectedly\n");
       
  5700 	}
       
  5701 	e1000e_reinit_locked(adapter);
       
  5702 }
       
  5703 
       
  5704 /**
       
  5705  * e1000_get_stats64 - Get System Network Statistics
       
  5706  * @netdev: network interface device structure
       
  5707  * @stats: rtnl_link_stats64 pointer
       
  5708  *
       
  5709  * Returns the address of the device statistics structure.
       
  5710  **/
       
  5711 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
       
  5712 					     struct rtnl_link_stats64 *stats)
       
  5713 {
       
  5714 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  5715 
       
  5716 	memset(stats, 0, sizeof(struct rtnl_link_stats64));
       
  5717 	spin_lock(&adapter->stats64_lock);
       
  5718 	e1000e_update_stats(adapter);
       
  5719 	/* Fill out the OS statistics structure */
       
  5720 	stats->rx_bytes = adapter->stats.gorc;
       
  5721 	stats->rx_packets = adapter->stats.gprc;
       
  5722 	stats->tx_bytes = adapter->stats.gotc;
       
  5723 	stats->tx_packets = adapter->stats.gptc;
       
  5724 	stats->multicast = adapter->stats.mprc;
       
  5725 	stats->collisions = adapter->stats.colc;
       
  5726 
       
  5727 	/* Rx Errors */
       
  5728 
       
  5729 	/* RLEC on some newer hardware can be incorrect so build
       
  5730 	 * our own version based on RUC and ROC
       
  5731 	 */
       
  5732 	stats->rx_errors = adapter->stats.rxerrc +
       
  5733 	    adapter->stats.crcerrs + adapter->stats.algnerrc +
       
  5734 	    adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
       
  5735 	stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
       
  5736 	stats->rx_crc_errors = adapter->stats.crcerrs;
       
  5737 	stats->rx_frame_errors = adapter->stats.algnerrc;
       
  5738 	stats->rx_missed_errors = adapter->stats.mpc;
       
  5739 
       
  5740 	/* Tx Errors */
       
  5741 	stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
       
  5742 	stats->tx_aborted_errors = adapter->stats.ecol;
       
  5743 	stats->tx_window_errors = adapter->stats.latecol;
       
  5744 	stats->tx_carrier_errors = adapter->stats.tncrs;
       
  5745 
       
  5746 	/* Tx Dropped needs to be maintained elsewhere */
       
  5747 
       
  5748 	spin_unlock(&adapter->stats64_lock);
       
  5749 	return stats;
       
  5750 }
       
  5751 
       
  5752 /**
       
  5753  * e1000_change_mtu - Change the Maximum Transfer Unit
       
  5754  * @netdev: network interface device structure
       
  5755  * @new_mtu: new value for maximum frame size
       
  5756  *
       
  5757  * Returns 0 on success, negative on failure
       
  5758  **/
       
  5759 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
       
  5760 {
       
  5761 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  5762 	int max_frame = new_mtu + VLAN_HLEN + ETH_HLEN + ETH_FCS_LEN;
       
  5763 
       
  5764 	/* Jumbo frame support */
       
  5765 	if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
       
  5766 	    !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
       
  5767 		e_err("Jumbo Frames not supported.\n");
       
  5768 		return -EINVAL;
       
  5769 	}
       
  5770 
       
  5771 	/* Supported frame sizes */
       
  5772 	if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
       
  5773 	    (max_frame > adapter->max_hw_frame_size)) {
       
  5774 		e_err("Unsupported MTU setting\n");
       
  5775 		return -EINVAL;
       
  5776 	}
       
  5777 
       
  5778 	/* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
       
  5779 	if ((adapter->hw.mac.type >= e1000_pch2lan) &&
       
  5780 	    !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
       
  5781 	    (new_mtu > ETH_DATA_LEN)) {
       
  5782 		e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
       
  5783 		return -EINVAL;
       
  5784 	}
       
  5785 
       
  5786 	while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
       
  5787 		usleep_range(1000, 2000);
       
  5788 	/* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
       
  5789 	adapter->max_frame_size = max_frame;
       
  5790 	e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
       
  5791 	netdev->mtu = new_mtu;
       
  5792 
       
  5793 	pm_runtime_get_sync(netdev->dev.parent);
       
  5794 
       
  5795 	if (netif_running(netdev))
       
  5796 		e1000e_down(adapter, true);
       
  5797 
       
  5798 	/* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
       
  5799 	 * means we reserve 2 more, this pushes us to allocate from the next
       
  5800 	 * larger slab size.
       
  5801 	 * i.e. RXBUFFER_2048 --> size-4096 slab
       
  5802 	 * However with the new *_jumbo_rx* routines, jumbo receives will use
       
  5803 	 * fragmented skbs
       
  5804 	 */
       
  5805 
       
  5806 	if (max_frame <= 2048)
       
  5807 		adapter->rx_buffer_len = 2048;
       
  5808 	else
       
  5809 		adapter->rx_buffer_len = 4096;
       
  5810 
       
  5811 	/* adjust allocation if LPE protects us, and we aren't using SBP */
       
  5812 	if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
       
  5813 	    (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
       
  5814 		adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
       
  5815 		    + ETH_FCS_LEN;
       
  5816 
       
  5817 	if (netif_running(netdev))
       
  5818 		e1000e_up(adapter);
       
  5819 	else
       
  5820 		e1000e_reset(adapter);
       
  5821 
       
  5822 	pm_runtime_put_sync(netdev->dev.parent);
       
  5823 
       
  5824 	clear_bit(__E1000_RESETTING, &adapter->state);
       
  5825 
       
  5826 	return 0;
       
  5827 }
       
  5828 
       
  5829 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
       
  5830 			   int cmd)
       
  5831 {
       
  5832 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  5833 	struct mii_ioctl_data *data = if_mii(ifr);
       
  5834 
       
  5835 	if (adapter->hw.phy.media_type != e1000_media_type_copper)
       
  5836 		return -EOPNOTSUPP;
       
  5837 
       
  5838 	switch (cmd) {
       
  5839 	case SIOCGMIIPHY:
       
  5840 		data->phy_id = adapter->hw.phy.addr;
       
  5841 		break;
       
  5842 	case SIOCGMIIREG:
       
  5843 		e1000_phy_read_status(adapter);
       
  5844 
       
  5845 		switch (data->reg_num & 0x1F) {
       
  5846 		case MII_BMCR:
       
  5847 			data->val_out = adapter->phy_regs.bmcr;
       
  5848 			break;
       
  5849 		case MII_BMSR:
       
  5850 			data->val_out = adapter->phy_regs.bmsr;
       
  5851 			break;
       
  5852 		case MII_PHYSID1:
       
  5853 			data->val_out = (adapter->hw.phy.id >> 16);
       
  5854 			break;
       
  5855 		case MII_PHYSID2:
       
  5856 			data->val_out = (adapter->hw.phy.id & 0xFFFF);
       
  5857 			break;
       
  5858 		case MII_ADVERTISE:
       
  5859 			data->val_out = adapter->phy_regs.advertise;
       
  5860 			break;
       
  5861 		case MII_LPA:
       
  5862 			data->val_out = adapter->phy_regs.lpa;
       
  5863 			break;
       
  5864 		case MII_EXPANSION:
       
  5865 			data->val_out = adapter->phy_regs.expansion;
       
  5866 			break;
       
  5867 		case MII_CTRL1000:
       
  5868 			data->val_out = adapter->phy_regs.ctrl1000;
       
  5869 			break;
       
  5870 		case MII_STAT1000:
       
  5871 			data->val_out = adapter->phy_regs.stat1000;
       
  5872 			break;
       
  5873 		case MII_ESTATUS:
       
  5874 			data->val_out = adapter->phy_regs.estatus;
       
  5875 			break;
       
  5876 		default:
       
  5877 			return -EIO;
       
  5878 		}
       
  5879 		break;
       
  5880 	case SIOCSMIIREG:
       
  5881 	default:
       
  5882 		return -EOPNOTSUPP;
       
  5883 	}
       
  5884 	return 0;
       
  5885 }
       
  5886 
       
  5887 /**
       
  5888  * e1000e_hwtstamp_ioctl - control hardware time stamping
       
  5889  * @netdev: network interface device structure
       
  5890  * @ifreq: interface request
       
  5891  *
       
  5892  * Outgoing time stamping can be enabled and disabled. Play nice and
       
  5893  * disable it when requested, although it shouldn't cause any overhead
       
  5894  * when no packet needs it. At most one packet in the queue may be
       
  5895  * marked for time stamping, otherwise it would be impossible to tell
       
  5896  * for sure to which packet the hardware time stamp belongs.
       
  5897  *
       
  5898  * Incoming time stamping has to be configured via the hardware filters.
       
  5899  * Not all combinations are supported, in particular event type has to be
       
  5900  * specified. Matching the kind of event packet is not supported, with the
       
  5901  * exception of "all V2 events regardless of level 2 or 4".
       
  5902  **/
       
  5903 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
       
  5904 {
       
  5905 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  5906 	struct hwtstamp_config config;
       
  5907 	int ret_val;
       
  5908 
       
  5909 	if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
       
  5910 		return -EFAULT;
       
  5911 
       
  5912 	ret_val = e1000e_config_hwtstamp(adapter, &config);
       
  5913 	if (ret_val)
       
  5914 		return ret_val;
       
  5915 
       
  5916 	switch (config.rx_filter) {
       
  5917 	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
       
  5918 	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
       
  5919 	case HWTSTAMP_FILTER_PTP_V2_SYNC:
       
  5920 	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
       
  5921 	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
       
  5922 	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
       
  5923 		/* With V2 type filters which specify a Sync or Delay Request,
       
  5924 		 * Path Delay Request/Response messages are also time stamped
       
  5925 		 * by hardware so notify the caller the requested packets plus
       
  5926 		 * some others are time stamped.
       
  5927 		 */
       
  5928 		config.rx_filter = HWTSTAMP_FILTER_SOME;
       
  5929 		break;
       
  5930 	default:
       
  5931 		break;
       
  5932 	}
       
  5933 
       
  5934 	return copy_to_user(ifr->ifr_data, &config,
       
  5935 			    sizeof(config)) ? -EFAULT : 0;
       
  5936 }
       
  5937 
       
  5938 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
       
  5939 {
       
  5940 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  5941 
       
  5942 	return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
       
  5943 			    sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
       
  5944 }
       
  5945 
       
  5946 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
       
  5947 {
       
  5948 	switch (cmd) {
       
  5949 	case SIOCGMIIPHY:
       
  5950 	case SIOCGMIIREG:
       
  5951 	case SIOCSMIIREG:
       
  5952 		return e1000_mii_ioctl(netdev, ifr, cmd);
       
  5953 	case SIOCSHWTSTAMP:
       
  5954 		return e1000e_hwtstamp_set(netdev, ifr);
       
  5955 	case SIOCGHWTSTAMP:
       
  5956 		return e1000e_hwtstamp_get(netdev, ifr);
       
  5957 	default:
       
  5958 		return -EOPNOTSUPP;
       
  5959 	}
       
  5960 }
       
  5961 
       
  5962 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
       
  5963 {
       
  5964 	struct e1000_hw *hw = &adapter->hw;
       
  5965 	u32 i, mac_reg, wuc;
       
  5966 	u16 phy_reg, wuc_enable;
       
  5967 	int retval;
       
  5968 
       
  5969 	/* copy MAC RARs to PHY RARs */
       
  5970 	e1000_copy_rx_addrs_to_phy_ich8lan(hw);
       
  5971 
       
  5972 	retval = hw->phy.ops.acquire(hw);
       
  5973 	if (retval) {
       
  5974 		e_err("Could not acquire PHY\n");
       
  5975 		return retval;
       
  5976 	}
       
  5977 
       
  5978 	/* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
       
  5979 	retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
       
  5980 	if (retval)
       
  5981 		goto release;
       
  5982 
       
  5983 	/* copy MAC MTA to PHY MTA - only needed for pchlan */
       
  5984 	for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
       
  5985 		mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
       
  5986 		hw->phy.ops.write_reg_page(hw, BM_MTA(i),
       
  5987 					   (u16)(mac_reg & 0xFFFF));
       
  5988 		hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
       
  5989 					   (u16)((mac_reg >> 16) & 0xFFFF));
       
  5990 	}
       
  5991 
       
  5992 	/* configure PHY Rx Control register */
       
  5993 	hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
       
  5994 	mac_reg = er32(RCTL);
       
  5995 	if (mac_reg & E1000_RCTL_UPE)
       
  5996 		phy_reg |= BM_RCTL_UPE;
       
  5997 	if (mac_reg & E1000_RCTL_MPE)
       
  5998 		phy_reg |= BM_RCTL_MPE;
       
  5999 	phy_reg &= ~(BM_RCTL_MO_MASK);
       
  6000 	if (mac_reg & E1000_RCTL_MO_3)
       
  6001 		phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
       
  6002 			    << BM_RCTL_MO_SHIFT);
       
  6003 	if (mac_reg & E1000_RCTL_BAM)
       
  6004 		phy_reg |= BM_RCTL_BAM;
       
  6005 	if (mac_reg & E1000_RCTL_PMCF)
       
  6006 		phy_reg |= BM_RCTL_PMCF;
       
  6007 	mac_reg = er32(CTRL);
       
  6008 	if (mac_reg & E1000_CTRL_RFCE)
       
  6009 		phy_reg |= BM_RCTL_RFCE;
       
  6010 	hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
       
  6011 
       
  6012 	wuc = E1000_WUC_PME_EN;
       
  6013 	if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
       
  6014 		wuc |= E1000_WUC_APME;
       
  6015 
       
  6016 	/* enable PHY wakeup in MAC register */
       
  6017 	ew32(WUFC, wufc);
       
  6018 	ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
       
  6019 		   E1000_WUC_PME_STATUS | wuc));
       
  6020 
       
  6021 	/* configure and enable PHY wakeup in PHY registers */
       
  6022 	hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
       
  6023 	hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
       
  6024 
       
  6025 	/* activate PHY wakeup */
       
  6026 	wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
       
  6027 	retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
       
  6028 	if (retval)
       
  6029 		e_err("Could not set PHY Host Wakeup bit\n");
       
  6030 release:
       
  6031 	hw->phy.ops.release(hw);
       
  6032 
       
  6033 	return retval;
       
  6034 }
       
  6035 
       
  6036 static int e1000e_pm_freeze(struct device *dev)
       
  6037 {
       
  6038 	struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
       
  6039 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6040 
       
  6041 	netif_device_detach(netdev);
       
  6042 
       
  6043 	if (netif_running(netdev)) {
       
  6044 		int count = E1000_CHECK_RESET_COUNT;
       
  6045 
       
  6046 		while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
       
  6047 			usleep_range(10000, 20000);
       
  6048 
       
  6049 		WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
       
  6050 
       
  6051 		/* Quiesce the device without resetting the hardware */
       
  6052 		e1000e_down(adapter, false);
       
  6053 		e1000_free_irq(adapter);
       
  6054 	}
       
  6055 	e1000e_reset_interrupt_capability(adapter);
       
  6056 
       
  6057 	/* Allow time for pending master requests to run */
       
  6058 	e1000e_disable_pcie_master(&adapter->hw);
       
  6059 
       
  6060 	return 0;
       
  6061 }
       
  6062 
       
  6063 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
       
  6064 {
       
  6065 	struct net_device *netdev = pci_get_drvdata(pdev);
       
  6066 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6067 	struct e1000_hw *hw = &adapter->hw;
       
  6068 	u32 ctrl, ctrl_ext, rctl, status;
       
  6069 	/* Runtime suspend should only enable wakeup for link changes */
       
  6070 	u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
       
  6071 	int retval = 0;
       
  6072 
       
  6073 	status = er32(STATUS);
       
  6074 	if (status & E1000_STATUS_LU)
       
  6075 		wufc &= ~E1000_WUFC_LNKC;
       
  6076 
       
  6077 	if (wufc) {
       
  6078 		e1000_setup_rctl(adapter);
       
  6079 		e1000e_set_rx_mode(netdev);
       
  6080 
       
  6081 		/* turn on all-multi mode if wake on multicast is enabled */
       
  6082 		if (wufc & E1000_WUFC_MC) {
       
  6083 			rctl = er32(RCTL);
       
  6084 			rctl |= E1000_RCTL_MPE;
       
  6085 			ew32(RCTL, rctl);
       
  6086 		}
       
  6087 
       
  6088 		ctrl = er32(CTRL);
       
  6089 		ctrl |= E1000_CTRL_ADVD3WUC;
       
  6090 		if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
       
  6091 			ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
       
  6092 		ew32(CTRL, ctrl);
       
  6093 
       
  6094 		if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
       
  6095 		    adapter->hw.phy.media_type ==
       
  6096 		    e1000_media_type_internal_serdes) {
       
  6097 			/* keep the laser running in D3 */
       
  6098 			ctrl_ext = er32(CTRL_EXT);
       
  6099 			ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
       
  6100 			ew32(CTRL_EXT, ctrl_ext);
       
  6101 		}
       
  6102 
       
  6103 		if (!runtime)
       
  6104 			e1000e_power_up_phy(adapter);
       
  6105 
       
  6106 		if (adapter->flags & FLAG_IS_ICH)
       
  6107 			e1000_suspend_workarounds_ich8lan(&adapter->hw);
       
  6108 
       
  6109 		if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
       
  6110 			/* enable wakeup by the PHY */
       
  6111 			retval = e1000_init_phy_wakeup(adapter, wufc);
       
  6112 			if (retval)
       
  6113 				return retval;
       
  6114 		} else {
       
  6115 			/* enable wakeup by the MAC */
       
  6116 			ew32(WUFC, wufc);
       
  6117 			ew32(WUC, E1000_WUC_PME_EN);
       
  6118 		}
       
  6119 	} else {
       
  6120 		ew32(WUC, 0);
       
  6121 		ew32(WUFC, 0);
       
  6122 
       
  6123 		e1000_power_down_phy(adapter);
       
  6124 	}
       
  6125 
       
  6126 	if (adapter->hw.phy.type == e1000_phy_igp_3) {
       
  6127 		e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
       
  6128 	} else if (hw->mac.type == e1000_pch_lpt) {
       
  6129 		if (!(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
       
  6130 			/* ULP does not support wake from unicast, multicast
       
  6131 			 * or broadcast.
       
  6132 			 */
       
  6133 			retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
       
  6134 
       
  6135 		if (retval)
       
  6136 			return retval;
       
  6137 	}
       
  6138 
       
  6139 
       
  6140 	/* Release control of h/w to f/w.  If f/w is AMT enabled, this
       
  6141 	 * would have already happened in close and is redundant.
       
  6142 	 */
       
  6143 	e1000e_release_hw_control(adapter);
       
  6144 
       
  6145 	pci_clear_master(pdev);
       
  6146 
       
  6147 	/* The pci-e switch on some quad port adapters will report a
       
  6148 	 * correctable error when the MAC transitions from D0 to D3.  To
       
  6149 	 * prevent this we need to mask off the correctable errors on the
       
  6150 	 * downstream port of the pci-e switch.
       
  6151 	 *
       
  6152 	 * We don't have the associated upstream bridge while assigning
       
  6153 	 * the PCI device into guest. For example, the KVM on power is
       
  6154 	 * one of the cases.
       
  6155 	 */
       
  6156 	if (adapter->flags & FLAG_IS_QUAD_PORT) {
       
  6157 		struct pci_dev *us_dev = pdev->bus->self;
       
  6158 		u16 devctl;
       
  6159 
       
  6160 		if (!us_dev)
       
  6161 			return 0;
       
  6162 
       
  6163 		pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
       
  6164 		pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
       
  6165 					   (devctl & ~PCI_EXP_DEVCTL_CERE));
       
  6166 
       
  6167 		pci_save_state(pdev);
       
  6168 		pci_prepare_to_sleep(pdev);
       
  6169 
       
  6170 		pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
       
  6171 	}
       
  6172 
       
  6173 	return 0;
       
  6174 }
       
  6175 
       
  6176 /**
       
  6177  * e1000e_disable_aspm - Disable ASPM states
       
  6178  * @pdev: pointer to PCI device struct
       
  6179  * @state: bit-mask of ASPM states to disable
       
  6180  *
       
  6181  * Some devices *must* have certain ASPM states disabled per hardware errata.
       
  6182  **/
       
  6183 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
       
  6184 {
       
  6185 	struct pci_dev *parent = pdev->bus->self;
       
  6186 	u16 aspm_dis_mask = 0;
       
  6187 	u16 pdev_aspmc, parent_aspmc;
       
  6188 
       
  6189 	switch (state) {
       
  6190 	case PCIE_LINK_STATE_L0S:
       
  6191 	case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
       
  6192 		aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
       
  6193 		/* fall-through - can't have L1 without L0s */
       
  6194 	case PCIE_LINK_STATE_L1:
       
  6195 		aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
       
  6196 		break;
       
  6197 	default:
       
  6198 		return;
       
  6199 	}
       
  6200 
       
  6201 	pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
       
  6202 	pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
       
  6203 
       
  6204 	if (parent) {
       
  6205 		pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
       
  6206 					  &parent_aspmc);
       
  6207 		parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
       
  6208 	}
       
  6209 
       
  6210 	/* Nothing to do if the ASPM states to be disabled already are */
       
  6211 	if (!(pdev_aspmc & aspm_dis_mask) &&
       
  6212 	    (!parent || !(parent_aspmc & aspm_dis_mask)))
       
  6213 		return;
       
  6214 
       
  6215 	dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
       
  6216 		 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
       
  6217 		 "L0s" : "",
       
  6218 		 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
       
  6219 		 "L1" : "");
       
  6220 
       
  6221 #ifdef CONFIG_PCIEASPM
       
  6222 	pci_disable_link_state_locked(pdev, state);
       
  6223 
       
  6224 	/* Double-check ASPM control.  If not disabled by the above, the
       
  6225 	 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
       
  6226 	 * not enabled); override by writing PCI config space directly.
       
  6227 	 */
       
  6228 	pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
       
  6229 	pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
       
  6230 
       
  6231 	if (!(aspm_dis_mask & pdev_aspmc))
       
  6232 		return;
       
  6233 #endif
       
  6234 
       
  6235 	/* Both device and parent should have the same ASPM setting.
       
  6236 	 * Disable ASPM in downstream component first and then upstream.
       
  6237 	 */
       
  6238 	pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
       
  6239 
       
  6240 	if (parent)
       
  6241 		pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
       
  6242 					   aspm_dis_mask);
       
  6243 }
       
  6244 
       
  6245 #ifdef CONFIG_PM
       
  6246 static int __e1000_resume(struct pci_dev *pdev)
       
  6247 {
       
  6248 	struct net_device *netdev = pci_get_drvdata(pdev);
       
  6249 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6250 	struct e1000_hw *hw = &adapter->hw;
       
  6251 	u16 aspm_disable_flag = 0;
       
  6252 
       
  6253 	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
       
  6254 		aspm_disable_flag = PCIE_LINK_STATE_L0S;
       
  6255 	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
       
  6256 		aspm_disable_flag |= PCIE_LINK_STATE_L1;
       
  6257 	if (aspm_disable_flag)
       
  6258 		e1000e_disable_aspm(pdev, aspm_disable_flag);
       
  6259 
       
  6260 	pci_set_master(pdev);
       
  6261 
       
  6262 	if (hw->mac.type >= e1000_pch2lan)
       
  6263 		e1000_resume_workarounds_pchlan(&adapter->hw);
       
  6264 
       
  6265 	e1000e_power_up_phy(adapter);
       
  6266 
       
  6267 	/* report the system wakeup cause from S3/S4 */
       
  6268 	if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
       
  6269 		u16 phy_data;
       
  6270 
       
  6271 		e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
       
  6272 		if (phy_data) {
       
  6273 			e_info("PHY Wakeup cause - %s\n",
       
  6274 			       phy_data & E1000_WUS_EX ? "Unicast Packet" :
       
  6275 			       phy_data & E1000_WUS_MC ? "Multicast Packet" :
       
  6276 			       phy_data & E1000_WUS_BC ? "Broadcast Packet" :
       
  6277 			       phy_data & E1000_WUS_MAG ? "Magic Packet" :
       
  6278 			       phy_data & E1000_WUS_LNKC ?
       
  6279 			       "Link Status Change" : "other");
       
  6280 		}
       
  6281 		e1e_wphy(&adapter->hw, BM_WUS, ~0);
       
  6282 	} else {
       
  6283 		u32 wus = er32(WUS);
       
  6284 
       
  6285 		if (wus) {
       
  6286 			e_info("MAC Wakeup cause - %s\n",
       
  6287 			       wus & E1000_WUS_EX ? "Unicast Packet" :
       
  6288 			       wus & E1000_WUS_MC ? "Multicast Packet" :
       
  6289 			       wus & E1000_WUS_BC ? "Broadcast Packet" :
       
  6290 			       wus & E1000_WUS_MAG ? "Magic Packet" :
       
  6291 			       wus & E1000_WUS_LNKC ? "Link Status Change" :
       
  6292 			       "other");
       
  6293 		}
       
  6294 		ew32(WUS, ~0);
       
  6295 	}
       
  6296 
       
  6297 	e1000e_reset(adapter);
       
  6298 
       
  6299 	e1000_init_manageability_pt(adapter);
       
  6300 
       
  6301 	/* If the controller has AMT, do not set DRV_LOAD until the interface
       
  6302 	 * is up.  For all other cases, let the f/w know that the h/w is now
       
  6303 	 * under the control of the driver.
       
  6304 	 */
       
  6305 	if (!(adapter->flags & FLAG_HAS_AMT))
       
  6306 		e1000e_get_hw_control(adapter);
       
  6307 
       
  6308 	return 0;
       
  6309 }
       
  6310 
       
  6311 #ifdef CONFIG_PM_SLEEP
       
  6312 static int e1000e_pm_thaw(struct device *dev)
       
  6313 {
       
  6314 	struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
       
  6315 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6316 
       
  6317 	e1000e_set_interrupt_capability(adapter);
       
  6318 	if (netif_running(netdev)) {
       
  6319 		u32 err = e1000_request_irq(adapter);
       
  6320 
       
  6321 		if (err)
       
  6322 			return err;
       
  6323 
       
  6324 		e1000e_up(adapter);
       
  6325 	}
       
  6326 
       
  6327 	netif_device_attach(netdev);
       
  6328 
       
  6329 	return 0;
       
  6330 }
       
  6331 
       
  6332 static int e1000e_pm_suspend(struct device *dev)
       
  6333 {
       
  6334 	struct pci_dev *pdev = to_pci_dev(dev);
       
  6335 
       
  6336 	e1000e_pm_freeze(dev);
       
  6337 
       
  6338 	return __e1000_shutdown(pdev, false);
       
  6339 }
       
  6340 
       
  6341 static int e1000e_pm_resume(struct device *dev)
       
  6342 {
       
  6343 	struct pci_dev *pdev = to_pci_dev(dev);
       
  6344 	int rc;
       
  6345 
       
  6346 	rc = __e1000_resume(pdev);
       
  6347 	if (rc)
       
  6348 		return rc;
       
  6349 
       
  6350 	return e1000e_pm_thaw(dev);
       
  6351 }
       
  6352 #endif /* CONFIG_PM_SLEEP */
       
  6353 
       
  6354 #ifdef CONFIG_PM_RUNTIME
       
  6355 static int e1000e_pm_runtime_idle(struct device *dev)
       
  6356 {
       
  6357 	struct pci_dev *pdev = to_pci_dev(dev);
       
  6358 	struct net_device *netdev = pci_get_drvdata(pdev);
       
  6359 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6360 
       
  6361 	if (!e1000e_has_link(adapter))
       
  6362 		pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
       
  6363 
       
  6364 	return -EBUSY;
       
  6365 }
       
  6366 
       
  6367 static int e1000e_pm_runtime_resume(struct device *dev)
       
  6368 {
       
  6369 	struct pci_dev *pdev = to_pci_dev(dev);
       
  6370 	struct net_device *netdev = pci_get_drvdata(pdev);
       
  6371 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6372 	int rc;
       
  6373 
       
  6374 	rc = __e1000_resume(pdev);
       
  6375 	if (rc)
       
  6376 		return rc;
       
  6377 
       
  6378 	if (netdev->flags & IFF_UP)
       
  6379 		rc = e1000e_up(adapter);
       
  6380 
       
  6381 	return rc;
       
  6382 }
       
  6383 
       
  6384 static int e1000e_pm_runtime_suspend(struct device *dev)
       
  6385 {
       
  6386 	struct pci_dev *pdev = to_pci_dev(dev);
       
  6387 	struct net_device *netdev = pci_get_drvdata(pdev);
       
  6388 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6389 
       
  6390 	if (netdev->flags & IFF_UP) {
       
  6391 		int count = E1000_CHECK_RESET_COUNT;
       
  6392 
       
  6393 		while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
       
  6394 			usleep_range(10000, 20000);
       
  6395 
       
  6396 		WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
       
  6397 
       
  6398 		/* Down the device without resetting the hardware */
       
  6399 		e1000e_down(adapter, false);
       
  6400 	}
       
  6401 
       
  6402 	if (__e1000_shutdown(pdev, true)) {
       
  6403 		e1000e_pm_runtime_resume(dev);
       
  6404 		return -EBUSY;
       
  6405 	}
       
  6406 
       
  6407 	return 0;
       
  6408 }
       
  6409 #endif /* CONFIG_PM_RUNTIME */
       
  6410 #endif /* CONFIG_PM */
       
  6411 
       
  6412 static void e1000_shutdown(struct pci_dev *pdev)
       
  6413 {
       
  6414 	e1000e_pm_freeze(&pdev->dev);
       
  6415 
       
  6416 	__e1000_shutdown(pdev, false);
       
  6417 }
       
  6418 
       
  6419 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  6420 
       
  6421 static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
       
  6422 {
       
  6423 	struct net_device *netdev = data;
       
  6424 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6425 
       
  6426 	if (adapter->msix_entries) {
       
  6427 		int vector, msix_irq;
       
  6428 
       
  6429 		vector = 0;
       
  6430 		msix_irq = adapter->msix_entries[vector].vector;
       
  6431 		disable_irq(msix_irq);
       
  6432 		e1000_intr_msix_rx(msix_irq, netdev);
       
  6433 		enable_irq(msix_irq);
       
  6434 
       
  6435 		vector++;
       
  6436 		msix_irq = adapter->msix_entries[vector].vector;
       
  6437 		disable_irq(msix_irq);
       
  6438 		e1000_intr_msix_tx(msix_irq, netdev);
       
  6439 		enable_irq(msix_irq);
       
  6440 
       
  6441 		vector++;
       
  6442 		msix_irq = adapter->msix_entries[vector].vector;
       
  6443 		disable_irq(msix_irq);
       
  6444 		e1000_msix_other(msix_irq, netdev);
       
  6445 		enable_irq(msix_irq);
       
  6446 	}
       
  6447 
       
  6448 	return IRQ_HANDLED;
       
  6449 }
       
  6450 
       
  6451 /**
       
  6452  * e1000_netpoll
       
  6453  * @netdev: network interface device structure
       
  6454  *
       
  6455  * Polling 'interrupt' - used by things like netconsole to send skbs
       
  6456  * without having to re-enable interrupts. It's not called while
       
  6457  * the interrupt routine is executing.
       
  6458  */
       
  6459 static void e1000_netpoll(struct net_device *netdev)
       
  6460 {
       
  6461 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6462 
       
  6463 	switch (adapter->int_mode) {
       
  6464 	case E1000E_INT_MODE_MSIX:
       
  6465 		e1000_intr_msix(adapter->pdev->irq, netdev);
       
  6466 		break;
       
  6467 	case E1000E_INT_MODE_MSI:
       
  6468 		disable_irq(adapter->pdev->irq);
       
  6469 		e1000_intr_msi(adapter->pdev->irq, netdev);
       
  6470 		enable_irq(adapter->pdev->irq);
       
  6471 		break;
       
  6472 	default:		/* E1000E_INT_MODE_LEGACY */
       
  6473 		disable_irq(adapter->pdev->irq);
       
  6474 		e1000_intr(adapter->pdev->irq, netdev);
       
  6475 		enable_irq(adapter->pdev->irq);
       
  6476 		break;
       
  6477 	}
       
  6478 }
       
  6479 #endif
       
  6480 
       
  6481 /**
       
  6482  * e1000_io_error_detected - called when PCI error is detected
       
  6483  * @pdev: Pointer to PCI device
       
  6484  * @state: The current pci connection state
       
  6485  *
       
  6486  * This function is called after a PCI bus error affecting
       
  6487  * this device has been detected.
       
  6488  */
       
  6489 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
       
  6490 						pci_channel_state_t state)
       
  6491 {
       
  6492 	struct net_device *netdev = pci_get_drvdata(pdev);
       
  6493 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6494 
       
  6495 	netif_device_detach(netdev);
       
  6496 
       
  6497 	if (state == pci_channel_io_perm_failure)
       
  6498 		return PCI_ERS_RESULT_DISCONNECT;
       
  6499 
       
  6500 	if (netif_running(netdev))
       
  6501 		e1000e_down(adapter, true);
       
  6502 	pci_disable_device(pdev);
       
  6503 
       
  6504 	/* Request a slot slot reset. */
       
  6505 	return PCI_ERS_RESULT_NEED_RESET;
       
  6506 }
       
  6507 
       
  6508 /**
       
  6509  * e1000_io_slot_reset - called after the pci bus has been reset.
       
  6510  * @pdev: Pointer to PCI device
       
  6511  *
       
  6512  * Restart the card from scratch, as if from a cold-boot. Implementation
       
  6513  * resembles the first-half of the e1000e_pm_resume routine.
       
  6514  */
       
  6515 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
       
  6516 {
       
  6517 	struct net_device *netdev = pci_get_drvdata(pdev);
       
  6518 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6519 	struct e1000_hw *hw = &adapter->hw;
       
  6520 	u16 aspm_disable_flag = 0;
       
  6521 	int err;
       
  6522 	pci_ers_result_t result;
       
  6523 
       
  6524 	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
       
  6525 		aspm_disable_flag = PCIE_LINK_STATE_L0S;
       
  6526 	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
       
  6527 		aspm_disable_flag |= PCIE_LINK_STATE_L1;
       
  6528 	if (aspm_disable_flag)
       
  6529 		e1000e_disable_aspm(pdev, aspm_disable_flag);
       
  6530 
       
  6531 	err = pci_enable_device_mem(pdev);
       
  6532 	if (err) {
       
  6533 		dev_err(&pdev->dev,
       
  6534 			"Cannot re-enable PCI device after reset.\n");
       
  6535 		result = PCI_ERS_RESULT_DISCONNECT;
       
  6536 	} else {
       
  6537 		pdev->state_saved = true;
       
  6538 		pci_restore_state(pdev);
       
  6539 		pci_set_master(pdev);
       
  6540 
       
  6541 		pci_enable_wake(pdev, PCI_D3hot, 0);
       
  6542 		pci_enable_wake(pdev, PCI_D3cold, 0);
       
  6543 
       
  6544 		e1000e_reset(adapter);
       
  6545 		ew32(WUS, ~0);
       
  6546 		result = PCI_ERS_RESULT_RECOVERED;
       
  6547 	}
       
  6548 
       
  6549 	pci_cleanup_aer_uncorrect_error_status(pdev);
       
  6550 
       
  6551 	return result;
       
  6552 }
       
  6553 
       
  6554 /**
       
  6555  * e1000_io_resume - called when traffic can start flowing again.
       
  6556  * @pdev: Pointer to PCI device
       
  6557  *
       
  6558  * This callback is called when the error recovery driver tells us that
       
  6559  * its OK to resume normal operation. Implementation resembles the
       
  6560  * second-half of the e1000e_pm_resume routine.
       
  6561  */
       
  6562 static void e1000_io_resume(struct pci_dev *pdev)
       
  6563 {
       
  6564 	struct net_device *netdev = pci_get_drvdata(pdev);
       
  6565 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6566 
       
  6567 	e1000_init_manageability_pt(adapter);
       
  6568 
       
  6569 	if (netif_running(netdev)) {
       
  6570 		if (e1000e_up(adapter)) {
       
  6571 			dev_err(&pdev->dev,
       
  6572 				"can't bring device back up after reset\n");
       
  6573 			return;
       
  6574 		}
       
  6575 	}
       
  6576 
       
  6577 	netif_device_attach(netdev);
       
  6578 
       
  6579 	/* If the controller has AMT, do not set DRV_LOAD until the interface
       
  6580 	 * is up.  For all other cases, let the f/w know that the h/w is now
       
  6581 	 * under the control of the driver.
       
  6582 	 */
       
  6583 	if (!(adapter->flags & FLAG_HAS_AMT))
       
  6584 		e1000e_get_hw_control(adapter);
       
  6585 }
       
  6586 
       
  6587 static void e1000_print_device_info(struct e1000_adapter *adapter)
       
  6588 {
       
  6589 	struct e1000_hw *hw = &adapter->hw;
       
  6590 	struct net_device *netdev = adapter->netdev;
       
  6591 	u32 ret_val;
       
  6592 	u8 pba_str[E1000_PBANUM_LENGTH];
       
  6593 
       
  6594 	/* print bus type/speed/width info */
       
  6595 	e_info("(PCI Express:2.5GT/s:%s) %pM\n",
       
  6596 	       /* bus width */
       
  6597 	       ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
       
  6598 		"Width x1"),
       
  6599 	       /* MAC address */
       
  6600 	       netdev->dev_addr);
       
  6601 	e_info("Intel(R) PRO/%s Network Connection\n",
       
  6602 	       (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
       
  6603 	ret_val = e1000_read_pba_string_generic(hw, pba_str,
       
  6604 						E1000_PBANUM_LENGTH);
       
  6605 	if (ret_val)
       
  6606 		strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
       
  6607 	e_info("MAC: %d, PHY: %d, PBA No: %s\n",
       
  6608 	       hw->mac.type, hw->phy.type, pba_str);
       
  6609 }
       
  6610 
       
  6611 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
       
  6612 {
       
  6613 	struct e1000_hw *hw = &adapter->hw;
       
  6614 	int ret_val;
       
  6615 	u16 buf = 0;
       
  6616 
       
  6617 	if (hw->mac.type != e1000_82573)
       
  6618 		return;
       
  6619 
       
  6620 	ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
       
  6621 	le16_to_cpus(&buf);
       
  6622 	if (!ret_val && (!(buf & (1 << 0)))) {
       
  6623 		/* Deep Smart Power Down (DSPD) */
       
  6624 		dev_warn(&adapter->pdev->dev,
       
  6625 			 "Warning: detected DSPD enabled in EEPROM\n");
       
  6626 	}
       
  6627 }
       
  6628 
       
  6629 static int e1000_set_features(struct net_device *netdev,
       
  6630 			      netdev_features_t features)
       
  6631 {
       
  6632 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  6633 	netdev_features_t changed = features ^ netdev->features;
       
  6634 
       
  6635 	if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
       
  6636 		adapter->flags |= FLAG_TSO_FORCE;
       
  6637 
       
  6638 	if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
       
  6639 			 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
       
  6640 			 NETIF_F_RXALL)))
       
  6641 		return 0;
       
  6642 
       
  6643 	if (changed & NETIF_F_RXFCS) {
       
  6644 		if (features & NETIF_F_RXFCS) {
       
  6645 			adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
       
  6646 		} else {
       
  6647 			/* We need to take it back to defaults, which might mean
       
  6648 			 * stripping is still disabled at the adapter level.
       
  6649 			 */
       
  6650 			if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
       
  6651 				adapter->flags2 |= FLAG2_CRC_STRIPPING;
       
  6652 			else
       
  6653 				adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
       
  6654 		}
       
  6655 	}
       
  6656 
       
  6657 	netdev->features = features;
       
  6658 
       
  6659 	if (netif_running(netdev))
       
  6660 		e1000e_reinit_locked(adapter);
       
  6661 	else
       
  6662 		e1000e_reset(adapter);
       
  6663 
       
  6664 	return 0;
       
  6665 }
       
  6666 
       
  6667 static const struct net_device_ops e1000e_netdev_ops = {
       
  6668 	.ndo_open		= e1000_open,
       
  6669 	.ndo_stop		= e1000_close,
       
  6670 	.ndo_start_xmit		= e1000_xmit_frame,
       
  6671 	.ndo_get_stats64	= e1000e_get_stats64,
       
  6672 	.ndo_set_rx_mode	= e1000e_set_rx_mode,
       
  6673 	.ndo_set_mac_address	= e1000_set_mac,
       
  6674 	.ndo_change_mtu		= e1000_change_mtu,
       
  6675 	.ndo_do_ioctl		= e1000_ioctl,
       
  6676 	.ndo_tx_timeout		= e1000_tx_timeout,
       
  6677 	.ndo_validate_addr	= eth_validate_addr,
       
  6678 
       
  6679 	.ndo_vlan_rx_add_vid	= e1000_vlan_rx_add_vid,
       
  6680 	.ndo_vlan_rx_kill_vid	= e1000_vlan_rx_kill_vid,
       
  6681 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  6682 	.ndo_poll_controller	= e1000_netpoll,
       
  6683 #endif
       
  6684 	.ndo_set_features = e1000_set_features,
       
  6685 };
       
  6686 
       
  6687 /**
       
  6688  * e1000_probe - Device Initialization Routine
       
  6689  * @pdev: PCI device information struct
       
  6690  * @ent: entry in e1000_pci_tbl
       
  6691  *
       
  6692  * Returns 0 on success, negative on failure
       
  6693  *
       
  6694  * e1000_probe initializes an adapter identified by a pci_dev structure.
       
  6695  * The OS initialization, configuring of the adapter private structure,
       
  6696  * and a hardware reset occur.
       
  6697  **/
       
  6698 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
       
  6699 {
       
  6700 	struct net_device *netdev;
       
  6701 	struct e1000_adapter *adapter;
       
  6702 	struct e1000_hw *hw;
       
  6703 	const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
       
  6704 	resource_size_t mmio_start, mmio_len;
       
  6705 	resource_size_t flash_start, flash_len;
       
  6706 	static int cards_found;
       
  6707 	u16 aspm_disable_flag = 0;
       
  6708 	int bars, i, err, pci_using_dac;
       
  6709 	u16 eeprom_data = 0;
       
  6710 	u16 eeprom_apme_mask = E1000_EEPROM_APME;
       
  6711 
       
  6712 	if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
       
  6713 		aspm_disable_flag = PCIE_LINK_STATE_L0S;
       
  6714 	if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
       
  6715 		aspm_disable_flag |= PCIE_LINK_STATE_L1;
       
  6716 	if (aspm_disable_flag)
       
  6717 		e1000e_disable_aspm(pdev, aspm_disable_flag);
       
  6718 
       
  6719 	err = pci_enable_device_mem(pdev);
       
  6720 	if (err)
       
  6721 		return err;
       
  6722 
       
  6723 	pci_using_dac = 0;
       
  6724 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
       
  6725 	if (!err) {
       
  6726 		pci_using_dac = 1;
       
  6727 	} else {
       
  6728 		err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
       
  6729 		if (err) {
       
  6730 			dev_err(&pdev->dev,
       
  6731 				"No usable DMA configuration, aborting\n");
       
  6732 			goto err_dma;
       
  6733 		}
       
  6734 	}
       
  6735 
       
  6736 	bars = pci_select_bars(pdev, IORESOURCE_MEM);
       
  6737 	err = pci_request_selected_regions_exclusive(pdev, bars,
       
  6738 						     e1000e_driver_name);
       
  6739 	if (err)
       
  6740 		goto err_pci_reg;
       
  6741 
       
  6742 	/* AER (Advanced Error Reporting) hooks */
       
  6743 	pci_enable_pcie_error_reporting(pdev);
       
  6744 
       
  6745 	pci_set_master(pdev);
       
  6746 	/* PCI config space info */
       
  6747 	err = pci_save_state(pdev);
       
  6748 	if (err)
       
  6749 		goto err_alloc_etherdev;
       
  6750 
       
  6751 	err = -ENOMEM;
       
  6752 	netdev = alloc_etherdev(sizeof(struct e1000_adapter));
       
  6753 	if (!netdev)
       
  6754 		goto err_alloc_etherdev;
       
  6755 
       
  6756 	SET_NETDEV_DEV(netdev, &pdev->dev);
       
  6757 
       
  6758 	netdev->irq = pdev->irq;
       
  6759 
       
  6760 	pci_set_drvdata(pdev, netdev);
       
  6761 	adapter = netdev_priv(netdev);
       
  6762 	hw = &adapter->hw;
       
  6763 	adapter->netdev = netdev;
       
  6764 	adapter->pdev = pdev;
       
  6765 	adapter->ei = ei;
       
  6766 	adapter->pba = ei->pba;
       
  6767 	adapter->flags = ei->flags;
       
  6768 	adapter->flags2 = ei->flags2;
       
  6769 	adapter->hw.adapter = adapter;
       
  6770 	adapter->hw.mac.type = ei->mac;
       
  6771 	adapter->max_hw_frame_size = ei->max_hw_frame_size;
       
  6772 	adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
       
  6773 
       
  6774 	mmio_start = pci_resource_start(pdev, 0);
       
  6775 	mmio_len = pci_resource_len(pdev, 0);
       
  6776 
       
  6777 	err = -EIO;
       
  6778 	adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
       
  6779 	if (!adapter->hw.hw_addr)
       
  6780 		goto err_ioremap;
       
  6781 
       
  6782 	if ((adapter->flags & FLAG_HAS_FLASH) &&
       
  6783 	    (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
       
  6784 		flash_start = pci_resource_start(pdev, 1);
       
  6785 		flash_len = pci_resource_len(pdev, 1);
       
  6786 		adapter->hw.flash_address = ioremap(flash_start, flash_len);
       
  6787 		if (!adapter->hw.flash_address)
       
  6788 			goto err_flashmap;
       
  6789 	}
       
  6790 
       
  6791 	/* Set default EEE advertisement */
       
  6792 	if (adapter->flags2 & FLAG2_HAS_EEE)
       
  6793 		adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
       
  6794 
       
  6795 	/* construct the net_device struct */
       
  6796 	netdev->netdev_ops = &e1000e_netdev_ops;
       
  6797 	e1000e_set_ethtool_ops(netdev);
       
  6798 	netdev->watchdog_timeo = 5 * HZ;
       
  6799 	netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
       
  6800 	strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
       
  6801 
       
  6802 	netdev->mem_start = mmio_start;
       
  6803 	netdev->mem_end = mmio_start + mmio_len;
       
  6804 
       
  6805 	adapter->bd_number = cards_found++;
       
  6806 
       
  6807 	e1000e_check_options(adapter);
       
  6808 
       
  6809 	/* setup adapter struct */
       
  6810 	err = e1000_sw_init(adapter);
       
  6811 	if (err)
       
  6812 		goto err_sw_init;
       
  6813 
       
  6814 	memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
       
  6815 	memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
       
  6816 	memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
       
  6817 
       
  6818 	err = ei->get_variants(adapter);
       
  6819 	if (err)
       
  6820 		goto err_hw_init;
       
  6821 
       
  6822 	if ((adapter->flags & FLAG_IS_ICH) &&
       
  6823 	    (adapter->flags & FLAG_READ_ONLY_NVM))
       
  6824 		e1000e_write_protect_nvm_ich8lan(&adapter->hw);
       
  6825 
       
  6826 	hw->mac.ops.get_bus_info(&adapter->hw);
       
  6827 
       
  6828 	adapter->hw.phy.autoneg_wait_to_complete = 0;
       
  6829 
       
  6830 	/* Copper options */
       
  6831 	if (adapter->hw.phy.media_type == e1000_media_type_copper) {
       
  6832 		adapter->hw.phy.mdix = AUTO_ALL_MODES;
       
  6833 		adapter->hw.phy.disable_polarity_correction = 0;
       
  6834 		adapter->hw.phy.ms_type = e1000_ms_hw_default;
       
  6835 	}
       
  6836 
       
  6837 	if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
       
  6838 		dev_info(&pdev->dev,
       
  6839 			 "PHY reset is blocked due to SOL/IDER session.\n");
       
  6840 
       
  6841 	/* Set initial default active device features */
       
  6842 	netdev->features = (NETIF_F_SG |
       
  6843 			    NETIF_F_HW_VLAN_CTAG_RX |
       
  6844 			    NETIF_F_HW_VLAN_CTAG_TX |
       
  6845 			    NETIF_F_TSO |
       
  6846 			    NETIF_F_TSO6 |
       
  6847 			    NETIF_F_RXHASH |
       
  6848 			    NETIF_F_RXCSUM |
       
  6849 			    NETIF_F_HW_CSUM);
       
  6850 
       
  6851 	/* Set user-changeable features (subset of all device features) */
       
  6852 	netdev->hw_features = netdev->features;
       
  6853 	netdev->hw_features |= NETIF_F_RXFCS;
       
  6854 	netdev->priv_flags |= IFF_SUPP_NOFCS;
       
  6855 	netdev->hw_features |= NETIF_F_RXALL;
       
  6856 
       
  6857 	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
       
  6858 		netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
       
  6859 
       
  6860 	netdev->vlan_features |= (NETIF_F_SG |
       
  6861 				  NETIF_F_TSO |
       
  6862 				  NETIF_F_TSO6 |
       
  6863 				  NETIF_F_HW_CSUM);
       
  6864 
       
  6865 	netdev->priv_flags |= IFF_UNICAST_FLT;
       
  6866 
       
  6867 	if (pci_using_dac) {
       
  6868 		netdev->features |= NETIF_F_HIGHDMA;
       
  6869 		netdev->vlan_features |= NETIF_F_HIGHDMA;
       
  6870 	}
       
  6871 
       
  6872 	if (e1000e_enable_mng_pass_thru(&adapter->hw))
       
  6873 		adapter->flags |= FLAG_MNG_PT_ENABLED;
       
  6874 
       
  6875 	/* before reading the NVM, reset the controller to
       
  6876 	 * put the device in a known good starting state
       
  6877 	 */
       
  6878 	adapter->hw.mac.ops.reset_hw(&adapter->hw);
       
  6879 
       
  6880 	/* systems with ASPM and others may see the checksum fail on the first
       
  6881 	 * attempt. Let's give it a few tries
       
  6882 	 */
       
  6883 	for (i = 0;; i++) {
       
  6884 		if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
       
  6885 			break;
       
  6886 		if (i == 2) {
       
  6887 			dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
       
  6888 			err = -EIO;
       
  6889 			goto err_eeprom;
       
  6890 		}
       
  6891 	}
       
  6892 
       
  6893 	e1000_eeprom_checks(adapter);
       
  6894 
       
  6895 	/* copy the MAC address */
       
  6896 	if (e1000e_read_mac_addr(&adapter->hw))
       
  6897 		dev_err(&pdev->dev,
       
  6898 			"NVM Read Error while reading MAC address\n");
       
  6899 
       
  6900 	memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
       
  6901 
       
  6902 	if (!is_valid_ether_addr(netdev->dev_addr)) {
       
  6903 		dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
       
  6904 			netdev->dev_addr);
       
  6905 		err = -EIO;
       
  6906 		goto err_eeprom;
       
  6907 	}
       
  6908 
       
  6909 	init_timer(&adapter->watchdog_timer);
       
  6910 	adapter->watchdog_timer.function = e1000_watchdog;
       
  6911 	adapter->watchdog_timer.data = (unsigned long)adapter;
       
  6912 
       
  6913 	init_timer(&adapter->phy_info_timer);
       
  6914 	adapter->phy_info_timer.function = e1000_update_phy_info;
       
  6915 	adapter->phy_info_timer.data = (unsigned long)adapter;
       
  6916 
       
  6917 	INIT_WORK(&adapter->reset_task, e1000_reset_task);
       
  6918 	INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
       
  6919 	INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
       
  6920 	INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
       
  6921 	INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
       
  6922 
       
  6923 	/* Initialize link parameters. User can change them with ethtool */
       
  6924 	adapter->hw.mac.autoneg = 1;
       
  6925 	adapter->fc_autoneg = true;
       
  6926 	adapter->hw.fc.requested_mode = e1000_fc_default;
       
  6927 	adapter->hw.fc.current_mode = e1000_fc_default;
       
  6928 	adapter->hw.phy.autoneg_advertised = 0x2f;
       
  6929 
       
  6930 	/* Initial Wake on LAN setting - If APM wake is enabled in
       
  6931 	 * the EEPROM, enable the ACPI Magic Packet filter
       
  6932 	 */
       
  6933 	if (adapter->flags & FLAG_APME_IN_WUC) {
       
  6934 		/* APME bit in EEPROM is mapped to WUC.APME */
       
  6935 		eeprom_data = er32(WUC);
       
  6936 		eeprom_apme_mask = E1000_WUC_APME;
       
  6937 		if ((hw->mac.type > e1000_ich10lan) &&
       
  6938 		    (eeprom_data & E1000_WUC_PHY_WAKE))
       
  6939 			adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
       
  6940 	} else if (adapter->flags & FLAG_APME_IN_CTRL3) {
       
  6941 		if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
       
  6942 		    (adapter->hw.bus.func == 1))
       
  6943 			e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B,
       
  6944 				       1, &eeprom_data);
       
  6945 		else
       
  6946 			e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A,
       
  6947 				       1, &eeprom_data);
       
  6948 	}
       
  6949 
       
  6950 	/* fetch WoL from EEPROM */
       
  6951 	if (eeprom_data & eeprom_apme_mask)
       
  6952 		adapter->eeprom_wol |= E1000_WUFC_MAG;
       
  6953 
       
  6954 	/* now that we have the eeprom settings, apply the special cases
       
  6955 	 * where the eeprom may be wrong or the board simply won't support
       
  6956 	 * wake on lan on a particular port
       
  6957 	 */
       
  6958 	if (!(adapter->flags & FLAG_HAS_WOL))
       
  6959 		adapter->eeprom_wol = 0;
       
  6960 
       
  6961 	/* initialize the wol settings based on the eeprom settings */
       
  6962 	adapter->wol = adapter->eeprom_wol;
       
  6963 
       
  6964 	/* make sure adapter isn't asleep if manageability is enabled */
       
  6965 	if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
       
  6966 	    (hw->mac.ops.check_mng_mode(hw)))
       
  6967 		device_wakeup_enable(&pdev->dev);
       
  6968 
       
  6969 	/* save off EEPROM version number */
       
  6970 	e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
       
  6971 
       
  6972 	/* reset the hardware with the new settings */
       
  6973 	e1000e_reset(adapter);
       
  6974 
       
  6975 	/* If the controller has AMT, do not set DRV_LOAD until the interface
       
  6976 	 * is up.  For all other cases, let the f/w know that the h/w is now
       
  6977 	 * under the control of the driver.
       
  6978 	 */
       
  6979 	if (!(adapter->flags & FLAG_HAS_AMT))
       
  6980 		e1000e_get_hw_control(adapter);
       
  6981 
       
  6982 	strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
       
  6983 	err = register_netdev(netdev);
       
  6984 	if (err)
       
  6985 		goto err_register;
       
  6986 
       
  6987 	/* carrier off reporting is important to ethtool even BEFORE open */
       
  6988 	netif_carrier_off(netdev);
       
  6989 
       
  6990 	/* init PTP hardware clock */
       
  6991 	e1000e_ptp_init(adapter);
       
  6992 
       
  6993 	e1000_print_device_info(adapter);
       
  6994 
       
  6995 	if (pci_dev_run_wake(pdev))
       
  6996 		pm_runtime_put_noidle(&pdev->dev);
       
  6997 
       
  6998 	return 0;
       
  6999 
       
  7000 err_register:
       
  7001 	if (!(adapter->flags & FLAG_HAS_AMT))
       
  7002 		e1000e_release_hw_control(adapter);
       
  7003 err_eeprom:
       
  7004 	if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
       
  7005 		e1000_phy_hw_reset(&adapter->hw);
       
  7006 err_hw_init:
       
  7007 	kfree(adapter->tx_ring);
       
  7008 	kfree(adapter->rx_ring);
       
  7009 err_sw_init:
       
  7010 	if (adapter->hw.flash_address)
       
  7011 		iounmap(adapter->hw.flash_address);
       
  7012 	e1000e_reset_interrupt_capability(adapter);
       
  7013 err_flashmap:
       
  7014 	iounmap(adapter->hw.hw_addr);
       
  7015 err_ioremap:
       
  7016 	free_netdev(netdev);
       
  7017 err_alloc_etherdev:
       
  7018 	pci_release_selected_regions(pdev,
       
  7019 				     pci_select_bars(pdev, IORESOURCE_MEM));
       
  7020 err_pci_reg:
       
  7021 err_dma:
       
  7022 	pci_disable_device(pdev);
       
  7023 	return err;
       
  7024 }
       
  7025 
       
  7026 /**
       
  7027  * e1000_remove - Device Removal Routine
       
  7028  * @pdev: PCI device information struct
       
  7029  *
       
  7030  * e1000_remove is called by the PCI subsystem to alert the driver
       
  7031  * that it should release a PCI device.  The could be caused by a
       
  7032  * Hot-Plug event, or because the driver is going to be removed from
       
  7033  * memory.
       
  7034  **/
       
  7035 static void e1000_remove(struct pci_dev *pdev)
       
  7036 {
       
  7037 	struct net_device *netdev = pci_get_drvdata(pdev);
       
  7038 	struct e1000_adapter *adapter = netdev_priv(netdev);
       
  7039 	bool down = test_bit(__E1000_DOWN, &adapter->state);
       
  7040 
       
  7041 	e1000e_ptp_remove(adapter);
       
  7042 
       
  7043 	/* The timers may be rescheduled, so explicitly disable them
       
  7044 	 * from being rescheduled.
       
  7045 	 */
       
  7046 	if (!down)
       
  7047 		set_bit(__E1000_DOWN, &adapter->state);
       
  7048 	del_timer_sync(&adapter->watchdog_timer);
       
  7049 	del_timer_sync(&adapter->phy_info_timer);
       
  7050 
       
  7051 	cancel_work_sync(&adapter->reset_task);
       
  7052 	cancel_work_sync(&adapter->watchdog_task);
       
  7053 	cancel_work_sync(&adapter->downshift_task);
       
  7054 	cancel_work_sync(&adapter->update_phy_task);
       
  7055 	cancel_work_sync(&adapter->print_hang_task);
       
  7056 
       
  7057 	if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
       
  7058 		cancel_work_sync(&adapter->tx_hwtstamp_work);
       
  7059 		if (adapter->tx_hwtstamp_skb) {
       
  7060 			dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
       
  7061 			adapter->tx_hwtstamp_skb = NULL;
       
  7062 		}
       
  7063 	}
       
  7064 
       
  7065 	/* Don't lie to e1000_close() down the road. */
       
  7066 	if (!down)
       
  7067 		clear_bit(__E1000_DOWN, &adapter->state);
       
  7068 	unregister_netdev(netdev);
       
  7069 
       
  7070 	if (pci_dev_run_wake(pdev))
       
  7071 		pm_runtime_get_noresume(&pdev->dev);
       
  7072 
       
  7073 	/* Release control of h/w to f/w.  If f/w is AMT enabled, this
       
  7074 	 * would have already happened in close and is redundant.
       
  7075 	 */
       
  7076 	e1000e_release_hw_control(adapter);
       
  7077 
       
  7078 	e1000e_reset_interrupt_capability(adapter);
       
  7079 	kfree(adapter->tx_ring);
       
  7080 	kfree(adapter->rx_ring);
       
  7081 
       
  7082 	iounmap(adapter->hw.hw_addr);
       
  7083 	if (adapter->hw.flash_address)
       
  7084 		iounmap(adapter->hw.flash_address);
       
  7085 	pci_release_selected_regions(pdev,
       
  7086 				     pci_select_bars(pdev, IORESOURCE_MEM));
       
  7087 
       
  7088 	free_netdev(netdev);
       
  7089 
       
  7090 	/* AER disable */
       
  7091 	pci_disable_pcie_error_reporting(pdev);
       
  7092 
       
  7093 	pci_disable_device(pdev);
       
  7094 }
       
  7095 
       
  7096 /* PCI Error Recovery (ERS) */
       
  7097 static const struct pci_error_handlers e1000_err_handler = {
       
  7098 	.error_detected = e1000_io_error_detected,
       
  7099 	.slot_reset = e1000_io_slot_reset,
       
  7100 	.resume = e1000_io_resume,
       
  7101 };
       
  7102 
       
  7103 static const struct pci_device_id e1000_pci_tbl[] = {
       
  7104 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
       
  7105 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
       
  7106 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
       
  7107 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
       
  7108 	  board_82571 },
       
  7109 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
       
  7110 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
       
  7111 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
       
  7112 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
       
  7113 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
       
  7114 
       
  7115 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
       
  7116 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
       
  7117 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
       
  7118 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
       
  7119 
       
  7120 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
       
  7121 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
       
  7122 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
       
  7123 
       
  7124 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
       
  7125 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
       
  7126 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
       
  7127 
       
  7128 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
       
  7129 	  board_80003es2lan },
       
  7130 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
       
  7131 	  board_80003es2lan },
       
  7132 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
       
  7133 	  board_80003es2lan },
       
  7134 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
       
  7135 	  board_80003es2lan },
       
  7136 
       
  7137 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
       
  7138 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
       
  7139 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
       
  7140 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
       
  7141 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
       
  7142 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
       
  7143 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
       
  7144 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
       
  7145 
       
  7146 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
       
  7147 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
       
  7148 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
       
  7149 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
       
  7150 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
       
  7151 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
       
  7152 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
       
  7153 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
       
  7154 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
       
  7155 
       
  7156 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
       
  7157 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
       
  7158 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
       
  7159 
       
  7160 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
       
  7161 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
       
  7162 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
       
  7163 
       
  7164 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
       
  7165 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
       
  7166 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
       
  7167 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
       
  7168 
       
  7169 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
       
  7170 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
       
  7171 
       
  7172 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
       
  7173 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
       
  7174 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
       
  7175 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
       
  7176 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
       
  7177 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
       
  7178 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
       
  7179 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
       
  7180 
       
  7181 	{ 0, 0, 0, 0, 0, 0, 0 }	/* terminate list */
       
  7182 };
       
  7183 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
       
  7184 
       
  7185 static const struct dev_pm_ops e1000_pm_ops = {
       
  7186 #ifdef CONFIG_PM_SLEEP
       
  7187 	.suspend	= e1000e_pm_suspend,
       
  7188 	.resume		= e1000e_pm_resume,
       
  7189 	.freeze		= e1000e_pm_freeze,
       
  7190 	.thaw		= e1000e_pm_thaw,
       
  7191 	.poweroff	= e1000e_pm_suspend,
       
  7192 	.restore	= e1000e_pm_resume,
       
  7193 #endif
       
  7194 	SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
       
  7195 			   e1000e_pm_runtime_idle)
       
  7196 };
       
  7197 
       
  7198 /* PCI Device API Driver */
       
  7199 static struct pci_driver e1000_driver = {
       
  7200 	.name     = e1000e_driver_name,
       
  7201 	.id_table = e1000_pci_tbl,
       
  7202 	.probe    = e1000_probe,
       
  7203 	.remove   = e1000_remove,
       
  7204 	.driver   = {
       
  7205 		.pm = &e1000_pm_ops,
       
  7206 	},
       
  7207 	.shutdown = e1000_shutdown,
       
  7208 	.err_handler = &e1000_err_handler
       
  7209 };
       
  7210 
       
  7211 /**
       
  7212  * e1000_init_module - Driver Registration Routine
       
  7213  *
       
  7214  * e1000_init_module is the first routine called when the driver is
       
  7215  * loaded. All it does is register with the PCI subsystem.
       
  7216  **/
       
  7217 static int __init e1000_init_module(void)
       
  7218 {
       
  7219 	int ret;
       
  7220 
       
  7221 	pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
       
  7222 		e1000e_driver_version);
       
  7223 	pr_info("Copyright(c) 1999 - 2014 Intel Corporation.\n");
       
  7224 	ret = pci_register_driver(&e1000_driver);
       
  7225 
       
  7226 	return ret;
       
  7227 }
       
  7228 module_init(e1000_init_module);
       
  7229 
       
  7230 /**
       
  7231  * e1000_exit_module - Driver Exit Cleanup Routine
       
  7232  *
       
  7233  * e1000_exit_module is called just before the driver is removed
       
  7234  * from memory.
       
  7235  **/
       
  7236 static void __exit e1000_exit_module(void)
       
  7237 {
       
  7238 	pci_unregister_driver(&e1000_driver);
       
  7239 }
       
  7240 module_exit(e1000_exit_module);
       
  7241 
       
  7242 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
       
  7243 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
       
  7244 MODULE_LICENSE("GPL");
       
  7245 MODULE_VERSION(DRV_VERSION);
       
  7246 
       
  7247 /* netdev.c */