devices/8139too-3.16-orig.c
branchstable-1.5
changeset 2588 792892ab4806
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2587:afd76ee3aa87 2588:792892ab4806
       
     1 /*
       
     2 
       
     3 	8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
       
     4 
       
     5 	Maintained by Jeff Garzik <jgarzik@pobox.com>
       
     6 	Copyright 2000-2002 Jeff Garzik
       
     7 
       
     8 	Much code comes from Donald Becker's rtl8139.c driver,
       
     9 	versions 1.13 and older.  This driver was originally based
       
    10 	on rtl8139.c version 1.07.  Header of rtl8139.c version 1.13:
       
    11 
       
    12 	-----<snip>-----
       
    13 
       
    14         	Written 1997-2001 by Donald Becker.
       
    15 		This software may be used and distributed according to the
       
    16 		terms of the GNU General Public License (GPL), incorporated
       
    17 		herein by reference.  Drivers based on or derived from this
       
    18 		code fall under the GPL and must retain the authorship,
       
    19 		copyright and license notice.  This file is not a complete
       
    20 		program and may only be used when the entire operating
       
    21 		system is licensed under the GPL.
       
    22 
       
    23 		This driver is for boards based on the RTL8129 and RTL8139
       
    24 		PCI ethernet chips.
       
    25 
       
    26 		The author may be reached as becker@scyld.com, or C/O Scyld
       
    27 		Computing Corporation 410 Severn Ave., Suite 210 Annapolis
       
    28 		MD 21403
       
    29 
       
    30 		Support and updates available at
       
    31 		http://www.scyld.com/network/rtl8139.html
       
    32 
       
    33 		Twister-tuning table provided by Kinston
       
    34 		<shangh@realtek.com.tw>.
       
    35 
       
    36 	-----<snip>-----
       
    37 
       
    38 	This software may be used and distributed according to the terms
       
    39 	of the GNU General Public License, incorporated herein by reference.
       
    40 
       
    41 	Contributors:
       
    42 
       
    43 		Donald Becker - he wrote the original driver, kudos to him!
       
    44 		(but please don't e-mail him for support, this isn't his driver)
       
    45 
       
    46 		Tigran Aivazian - bug fixes, skbuff free cleanup
       
    47 
       
    48 		Martin Mares - suggestions for PCI cleanup
       
    49 
       
    50 		David S. Miller - PCI DMA and softnet updates
       
    51 
       
    52 		Ernst Gill - fixes ported from BSD driver
       
    53 
       
    54 		Daniel Kobras - identified specific locations of
       
    55 			posted MMIO write bugginess
       
    56 
       
    57 		Gerard Sharp - bug fix, testing and feedback
       
    58 
       
    59 		David Ford - Rx ring wrap fix
       
    60 
       
    61 		Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
       
    62 		to find and fix a crucial bug on older chipsets.
       
    63 
       
    64 		Donald Becker/Chris Butterworth/Marcus Westergren -
       
    65 		Noticed various Rx packet size-related buglets.
       
    66 
       
    67 		Santiago Garcia Mantinan - testing and feedback
       
    68 
       
    69 		Jens David - 2.2.x kernel backports
       
    70 
       
    71 		Martin Dennett - incredibly helpful insight on undocumented
       
    72 		features of the 8139 chips
       
    73 
       
    74 		Jean-Jacques Michel - bug fix
       
    75 
       
    76 		Tobias Ringström - Rx interrupt status checking suggestion
       
    77 
       
    78 		Andrew Morton - Clear blocked signals, avoid
       
    79 		buffer overrun setting current->comm.
       
    80 
       
    81 		Kalle Olavi Niemitalo - Wake-on-LAN ioctls
       
    82 
       
    83 		Robert Kuebel - Save kernel thread from dying on any signal.
       
    84 
       
    85 	Submitting bug reports:
       
    86 
       
    87 		"rtl8139-diag -mmmaaavvveefN" output
       
    88 		enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
       
    89 
       
    90 */
       
    91 
       
    92 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
       
    93 
       
    94 #define DRV_NAME	"8139too"
       
    95 #define DRV_VERSION	"0.9.28"
       
    96 
       
    97 
       
    98 #include <linux/module.h>
       
    99 #include <linux/kernel.h>
       
   100 #include <linux/compiler.h>
       
   101 #include <linux/pci.h>
       
   102 #include <linux/init.h>
       
   103 #include <linux/interrupt.h>
       
   104 #include <linux/netdevice.h>
       
   105 #include <linux/etherdevice.h>
       
   106 #include <linux/rtnetlink.h>
       
   107 #include <linux/delay.h>
       
   108 #include <linux/ethtool.h>
       
   109 #include <linux/mii.h>
       
   110 #include <linux/completion.h>
       
   111 #include <linux/crc32.h>
       
   112 #include <linux/io.h>
       
   113 #include <linux/uaccess.h>
       
   114 #include <linux/gfp.h>
       
   115 #include <asm/irq.h>
       
   116 
       
   117 #define RTL8139_DRIVER_NAME   DRV_NAME " Fast Ethernet driver " DRV_VERSION
       
   118 
       
   119 /* Default Message level */
       
   120 #define RTL8139_DEF_MSG_ENABLE   (NETIF_MSG_DRV   | \
       
   121                                  NETIF_MSG_PROBE  | \
       
   122                                  NETIF_MSG_LINK)
       
   123 
       
   124 
       
   125 /* define to 1, 2 or 3 to enable copious debugging info */
       
   126 #define RTL8139_DEBUG 0
       
   127 
       
   128 /* define to 1 to disable lightweight runtime debugging checks */
       
   129 #undef RTL8139_NDEBUG
       
   130 
       
   131 
       
   132 #ifdef RTL8139_NDEBUG
       
   133 #  define assert(expr) do {} while (0)
       
   134 #else
       
   135 #  define assert(expr) \
       
   136         if (unlikely(!(expr))) {				\
       
   137 		pr_err("Assertion failed! %s,%s,%s,line=%d\n",	\
       
   138 		       #expr, __FILE__, __func__, __LINE__);	\
       
   139         }
       
   140 #endif
       
   141 
       
   142 
       
   143 /* A few user-configurable values. */
       
   144 /* media options */
       
   145 #define MAX_UNITS 8
       
   146 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   147 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   148 
       
   149 /* Whether to use MMIO or PIO. Default to MMIO. */
       
   150 #ifdef CONFIG_8139TOO_PIO
       
   151 static bool use_io = true;
       
   152 #else
       
   153 static bool use_io = false;
       
   154 #endif
       
   155 
       
   156 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
       
   157    The RTL chips use a 64 element hash table based on the Ethernet CRC.  */
       
   158 static int multicast_filter_limit = 32;
       
   159 
       
   160 /* bitmapped message enable number */
       
   161 static int debug = -1;
       
   162 
       
   163 /*
       
   164  * Receive ring size
       
   165  * Warning: 64K ring has hardware issues and may lock up.
       
   166  */
       
   167 #if defined(CONFIG_SH_DREAMCAST)
       
   168 #define RX_BUF_IDX 0	/* 8K ring */
       
   169 #else
       
   170 #define RX_BUF_IDX	2	/* 32K ring */
       
   171 #endif
       
   172 #define RX_BUF_LEN	(8192 << RX_BUF_IDX)
       
   173 #define RX_BUF_PAD	16
       
   174 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
       
   175 
       
   176 #if RX_BUF_LEN == 65536
       
   177 #define RX_BUF_TOT_LEN	RX_BUF_LEN
       
   178 #else
       
   179 #define RX_BUF_TOT_LEN	(RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
       
   180 #endif
       
   181 
       
   182 /* Number of Tx descriptor registers. */
       
   183 #define NUM_TX_DESC	4
       
   184 
       
   185 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
       
   186 #define MAX_ETH_FRAME_SIZE	1536
       
   187 
       
   188 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
       
   189 #define TX_BUF_SIZE	MAX_ETH_FRAME_SIZE
       
   190 #define TX_BUF_TOT_LEN	(TX_BUF_SIZE * NUM_TX_DESC)
       
   191 
       
   192 /* PCI Tuning Parameters
       
   193    Threshold is bytes transferred to chip before transmission starts. */
       
   194 #define TX_FIFO_THRESH 256	/* In bytes, rounded down to 32 byte units. */
       
   195 
       
   196 /* The following settings are log_2(bytes)-4:  0 == 16 bytes .. 6==1024, 7==end of packet. */
       
   197 #define RX_FIFO_THRESH	7	/* Rx buffer level before first PCI xfer.  */
       
   198 #define RX_DMA_BURST	7	/* Maximum PCI burst, '6' is 1024 */
       
   199 #define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
       
   200 #define TX_RETRY	8	/* 0-15.  retries = 16 + (TX_RETRY * 16) */
       
   201 
       
   202 /* Operational parameters that usually are not changed. */
       
   203 /* Time in jiffies before concluding the transmitter is hung. */
       
   204 #define TX_TIMEOUT  (6*HZ)
       
   205 
       
   206 
       
   207 enum {
       
   208 	HAS_MII_XCVR = 0x010000,
       
   209 	HAS_CHIP_XCVR = 0x020000,
       
   210 	HAS_LNK_CHNG = 0x040000,
       
   211 };
       
   212 
       
   213 #define RTL_NUM_STATS 4		/* number of ETHTOOL_GSTATS u64's */
       
   214 #define RTL_REGS_VER 1		/* version of reg. data in ETHTOOL_GREGS */
       
   215 #define RTL_MIN_IO_SIZE 0x80
       
   216 #define RTL8139B_IO_SIZE 256
       
   217 
       
   218 #define RTL8129_CAPS	HAS_MII_XCVR
       
   219 #define RTL8139_CAPS	(HAS_CHIP_XCVR|HAS_LNK_CHNG)
       
   220 
       
   221 typedef enum {
       
   222 	RTL8139 = 0,
       
   223 	RTL8129,
       
   224 } board_t;
       
   225 
       
   226 
       
   227 /* indexed by board_t, above */
       
   228 static const struct {
       
   229 	const char *name;
       
   230 	u32 hw_flags;
       
   231 } board_info[] = {
       
   232 	{ "RealTek RTL8139", RTL8139_CAPS },
       
   233 	{ "RealTek RTL8129", RTL8129_CAPS },
       
   234 };
       
   235 
       
   236 
       
   237 static DEFINE_PCI_DEVICE_TABLE(rtl8139_pci_tbl) = {
       
   238 	{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   239 	{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   240 	{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   241 	{0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   242 	{0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   243 	{0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   244 	{0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   245 	{0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   246 	{0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   247 	{0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   248 	{0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   249 	{0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   250 	{0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   251 	{0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   252 	{0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   253 	{0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   254 	{0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   255 	{0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   256 	{0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   257 
       
   258 #ifdef CONFIG_SH_SECUREEDGE5410
       
   259 	/* Bogus 8139 silicon reports 8129 without external PROM :-( */
       
   260 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   261 #endif
       
   262 #ifdef CONFIG_8139TOO_8129
       
   263 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
       
   264 #endif
       
   265 
       
   266 	/* some crazy cards report invalid vendor ids like
       
   267 	 * 0x0001 here.  The other ids are valid and constant,
       
   268 	 * so we simply don't match on the main vendor id.
       
   269 	 */
       
   270 	{PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
       
   271 	{PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
       
   272 	{PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
       
   273 
       
   274 	{0,}
       
   275 };
       
   276 MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
       
   277 
       
   278 static struct {
       
   279 	const char str[ETH_GSTRING_LEN];
       
   280 } ethtool_stats_keys[] = {
       
   281 	{ "early_rx" },
       
   282 	{ "tx_buf_mapped" },
       
   283 	{ "tx_timeouts" },
       
   284 	{ "rx_lost_in_ring" },
       
   285 };
       
   286 
       
   287 /* The rest of these values should never change. */
       
   288 
       
   289 /* Symbolic offsets to registers. */
       
   290 enum RTL8139_registers {
       
   291 	MAC0		= 0,	 /* Ethernet hardware address. */
       
   292 	MAR0		= 8,	 /* Multicast filter. */
       
   293 	TxStatus0	= 0x10,	 /* Transmit status (Four 32bit registers). */
       
   294 	TxAddr0		= 0x20,	 /* Tx descriptors (also four 32bit). */
       
   295 	RxBuf		= 0x30,
       
   296 	ChipCmd		= 0x37,
       
   297 	RxBufPtr	= 0x38,
       
   298 	RxBufAddr	= 0x3A,
       
   299 	IntrMask	= 0x3C,
       
   300 	IntrStatus	= 0x3E,
       
   301 	TxConfig	= 0x40,
       
   302 	RxConfig	= 0x44,
       
   303 	Timer		= 0x48,	 /* A general-purpose counter. */
       
   304 	RxMissed	= 0x4C,  /* 24 bits valid, write clears. */
       
   305 	Cfg9346		= 0x50,
       
   306 	Config0		= 0x51,
       
   307 	Config1		= 0x52,
       
   308 	TimerInt	= 0x54,
       
   309 	MediaStatus	= 0x58,
       
   310 	Config3		= 0x59,
       
   311 	Config4		= 0x5A,	 /* absent on RTL-8139A */
       
   312 	HltClk		= 0x5B,
       
   313 	MultiIntr	= 0x5C,
       
   314 	TxSummary	= 0x60,
       
   315 	BasicModeCtrl	= 0x62,
       
   316 	BasicModeStatus	= 0x64,
       
   317 	NWayAdvert	= 0x66,
       
   318 	NWayLPAR	= 0x68,
       
   319 	NWayExpansion	= 0x6A,
       
   320 	/* Undocumented registers, but required for proper operation. */
       
   321 	FIFOTMS		= 0x70,	 /* FIFO Control and test. */
       
   322 	CSCR		= 0x74,	 /* Chip Status and Configuration Register. */
       
   323 	PARA78		= 0x78,
       
   324 	FlashReg	= 0xD4,	/* Communication with Flash ROM, four bytes. */
       
   325 	PARA7c		= 0x7c,	 /* Magic transceiver parameter register. */
       
   326 	Config5		= 0xD8,	 /* absent on RTL-8139A */
       
   327 };
       
   328 
       
   329 enum ClearBitMasks {
       
   330 	MultiIntrClear	= 0xF000,
       
   331 	ChipCmdClear	= 0xE2,
       
   332 	Config1Clear	= (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
       
   333 };
       
   334 
       
   335 enum ChipCmdBits {
       
   336 	CmdReset	= 0x10,
       
   337 	CmdRxEnb	= 0x08,
       
   338 	CmdTxEnb	= 0x04,
       
   339 	RxBufEmpty	= 0x01,
       
   340 };
       
   341 
       
   342 /* Interrupt register bits, using my own meaningful names. */
       
   343 enum IntrStatusBits {
       
   344 	PCIErr		= 0x8000,
       
   345 	PCSTimeout	= 0x4000,
       
   346 	RxFIFOOver	= 0x40,
       
   347 	RxUnderrun	= 0x20,
       
   348 	RxOverflow	= 0x10,
       
   349 	TxErr		= 0x08,
       
   350 	TxOK		= 0x04,
       
   351 	RxErr		= 0x02,
       
   352 	RxOK		= 0x01,
       
   353 
       
   354 	RxAckBits	= RxFIFOOver | RxOverflow | RxOK,
       
   355 };
       
   356 
       
   357 enum TxStatusBits {
       
   358 	TxHostOwns	= 0x2000,
       
   359 	TxUnderrun	= 0x4000,
       
   360 	TxStatOK	= 0x8000,
       
   361 	TxOutOfWindow	= 0x20000000,
       
   362 	TxAborted	= 0x40000000,
       
   363 	TxCarrierLost	= 0x80000000,
       
   364 };
       
   365 enum RxStatusBits {
       
   366 	RxMulticast	= 0x8000,
       
   367 	RxPhysical	= 0x4000,
       
   368 	RxBroadcast	= 0x2000,
       
   369 	RxBadSymbol	= 0x0020,
       
   370 	RxRunt		= 0x0010,
       
   371 	RxTooLong	= 0x0008,
       
   372 	RxCRCErr	= 0x0004,
       
   373 	RxBadAlign	= 0x0002,
       
   374 	RxStatusOK	= 0x0001,
       
   375 };
       
   376 
       
   377 /* Bits in RxConfig. */
       
   378 enum rx_mode_bits {
       
   379 	AcceptErr	= 0x20,
       
   380 	AcceptRunt	= 0x10,
       
   381 	AcceptBroadcast	= 0x08,
       
   382 	AcceptMulticast	= 0x04,
       
   383 	AcceptMyPhys	= 0x02,
       
   384 	AcceptAllPhys	= 0x01,
       
   385 };
       
   386 
       
   387 /* Bits in TxConfig. */
       
   388 enum tx_config_bits {
       
   389         /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */
       
   390         TxIFGShift	= 24,
       
   391         TxIFG84		= (0 << TxIFGShift), /* 8.4us / 840ns (10 / 100Mbps) */
       
   392         TxIFG88		= (1 << TxIFGShift), /* 8.8us / 880ns (10 / 100Mbps) */
       
   393         TxIFG92		= (2 << TxIFGShift), /* 9.2us / 920ns (10 / 100Mbps) */
       
   394         TxIFG96		= (3 << TxIFGShift), /* 9.6us / 960ns (10 / 100Mbps) */
       
   395 
       
   396 	TxLoopBack	= (1 << 18) | (1 << 17), /* enable loopback test mode */
       
   397 	TxCRC		= (1 << 16),	/* DISABLE Tx pkt CRC append */
       
   398 	TxClearAbt	= (1 << 0),	/* Clear abort (WO) */
       
   399 	TxDMAShift	= 8, /* DMA burst value (0-7) is shifted X many bits */
       
   400 	TxRetryShift	= 4, /* TXRR value (0-15) is shifted X many bits */
       
   401 
       
   402 	TxVersionMask	= 0x7C800000, /* mask out version bits 30-26, 23 */
       
   403 };
       
   404 
       
   405 /* Bits in Config1 */
       
   406 enum Config1Bits {
       
   407 	Cfg1_PM_Enable	= 0x01,
       
   408 	Cfg1_VPD_Enable	= 0x02,
       
   409 	Cfg1_PIO	= 0x04,
       
   410 	Cfg1_MMIO	= 0x08,
       
   411 	LWAKE		= 0x10,		/* not on 8139, 8139A */
       
   412 	Cfg1_Driver_Load = 0x20,
       
   413 	Cfg1_LED0	= 0x40,
       
   414 	Cfg1_LED1	= 0x80,
       
   415 	SLEEP		= (1 << 1),	/* only on 8139, 8139A */
       
   416 	PWRDN		= (1 << 0),	/* only on 8139, 8139A */
       
   417 };
       
   418 
       
   419 /* Bits in Config3 */
       
   420 enum Config3Bits {
       
   421 	Cfg3_FBtBEn   	= (1 << 0), /* 1	= Fast Back to Back */
       
   422 	Cfg3_FuncRegEn	= (1 << 1), /* 1	= enable CardBus Function registers */
       
   423 	Cfg3_CLKRUN_En	= (1 << 2), /* 1	= enable CLKRUN */
       
   424 	Cfg3_CardB_En 	= (1 << 3), /* 1	= enable CardBus registers */
       
   425 	Cfg3_LinkUp   	= (1 << 4), /* 1	= wake up on link up */
       
   426 	Cfg3_Magic    	= (1 << 5), /* 1	= wake up on Magic Packet (tm) */
       
   427 	Cfg3_PARM_En  	= (1 << 6), /* 0	= software can set twister parameters */
       
   428 	Cfg3_GNTSel   	= (1 << 7), /* 1	= delay 1 clock from PCI GNT signal */
       
   429 };
       
   430 
       
   431 /* Bits in Config4 */
       
   432 enum Config4Bits {
       
   433 	LWPTN	= (1 << 2),	/* not on 8139, 8139A */
       
   434 };
       
   435 
       
   436 /* Bits in Config5 */
       
   437 enum Config5Bits {
       
   438 	Cfg5_PME_STS   	= (1 << 0), /* 1	= PCI reset resets PME_Status */
       
   439 	Cfg5_LANWake   	= (1 << 1), /* 1	= enable LANWake signal */
       
   440 	Cfg5_LDPS      	= (1 << 2), /* 0	= save power when link is down */
       
   441 	Cfg5_FIFOAddrPtr= (1 << 3), /* Realtek internal SRAM testing */
       
   442 	Cfg5_UWF        = (1 << 4), /* 1 = accept unicast wakeup frame */
       
   443 	Cfg5_MWF        = (1 << 5), /* 1 = accept multicast wakeup frame */
       
   444 	Cfg5_BWF        = (1 << 6), /* 1 = accept broadcast wakeup frame */
       
   445 };
       
   446 
       
   447 enum RxConfigBits {
       
   448 	/* rx fifo threshold */
       
   449 	RxCfgFIFOShift	= 13,
       
   450 	RxCfgFIFONone	= (7 << RxCfgFIFOShift),
       
   451 
       
   452 	/* Max DMA burst */
       
   453 	RxCfgDMAShift	= 8,
       
   454 	RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
       
   455 
       
   456 	/* rx ring buffer length */
       
   457 	RxCfgRcv8K	= 0,
       
   458 	RxCfgRcv16K	= (1 << 11),
       
   459 	RxCfgRcv32K	= (1 << 12),
       
   460 	RxCfgRcv64K	= (1 << 11) | (1 << 12),
       
   461 
       
   462 	/* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
       
   463 	RxNoWrap	= (1 << 7),
       
   464 };
       
   465 
       
   466 /* Twister tuning parameters from RealTek.
       
   467    Completely undocumented, but required to tune bad links on some boards. */
       
   468 enum CSCRBits {
       
   469 	CSCR_LinkOKBit		= 0x0400,
       
   470 	CSCR_LinkChangeBit	= 0x0800,
       
   471 	CSCR_LinkStatusBits	= 0x0f000,
       
   472 	CSCR_LinkDownOffCmd	= 0x003c0,
       
   473 	CSCR_LinkDownCmd	= 0x0f3c0,
       
   474 };
       
   475 
       
   476 enum Cfg9346Bits {
       
   477 	Cfg9346_Lock	= 0x00,
       
   478 	Cfg9346_Unlock	= 0xC0,
       
   479 };
       
   480 
       
   481 typedef enum {
       
   482 	CH_8139	= 0,
       
   483 	CH_8139_K,
       
   484 	CH_8139A,
       
   485 	CH_8139A_G,
       
   486 	CH_8139B,
       
   487 	CH_8130,
       
   488 	CH_8139C,
       
   489 	CH_8100,
       
   490 	CH_8100B_8139D,
       
   491 	CH_8101,
       
   492 } chip_t;
       
   493 
       
   494 enum chip_flags {
       
   495 	HasHltClk	= (1 << 0),
       
   496 	HasLWake	= (1 << 1),
       
   497 };
       
   498 
       
   499 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
       
   500 	(b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
       
   501 #define HW_REVID_MASK	HW_REVID(1, 1, 1, 1, 1, 1, 1)
       
   502 
       
   503 /* directly indexed by chip_t, above */
       
   504 static const struct {
       
   505 	const char *name;
       
   506 	u32 version; /* from RTL8139C/RTL8139D docs */
       
   507 	u32 flags;
       
   508 } rtl_chip_info[] = {
       
   509 	{ "RTL-8139",
       
   510 	  HW_REVID(1, 0, 0, 0, 0, 0, 0),
       
   511 	  HasHltClk,
       
   512 	},
       
   513 
       
   514 	{ "RTL-8139 rev K",
       
   515 	  HW_REVID(1, 1, 0, 0, 0, 0, 0),
       
   516 	  HasHltClk,
       
   517 	},
       
   518 
       
   519 	{ "RTL-8139A",
       
   520 	  HW_REVID(1, 1, 1, 0, 0, 0, 0),
       
   521 	  HasHltClk, /* XXX undocumented? */
       
   522 	},
       
   523 
       
   524 	{ "RTL-8139A rev G",
       
   525 	  HW_REVID(1, 1, 1, 0, 0, 1, 0),
       
   526 	  HasHltClk, /* XXX undocumented? */
       
   527 	},
       
   528 
       
   529 	{ "RTL-8139B",
       
   530 	  HW_REVID(1, 1, 1, 1, 0, 0, 0),
       
   531 	  HasLWake,
       
   532 	},
       
   533 
       
   534 	{ "RTL-8130",
       
   535 	  HW_REVID(1, 1, 1, 1, 1, 0, 0),
       
   536 	  HasLWake,
       
   537 	},
       
   538 
       
   539 	{ "RTL-8139C",
       
   540 	  HW_REVID(1, 1, 1, 0, 1, 0, 0),
       
   541 	  HasLWake,
       
   542 	},
       
   543 
       
   544 	{ "RTL-8100",
       
   545 	  HW_REVID(1, 1, 1, 1, 0, 1, 0),
       
   546  	  HasLWake,
       
   547  	},
       
   548 
       
   549 	{ "RTL-8100B/8139D",
       
   550 	  HW_REVID(1, 1, 1, 0, 1, 0, 1),
       
   551 	  HasHltClk /* XXX undocumented? */
       
   552 	| HasLWake,
       
   553 	},
       
   554 
       
   555 	{ "RTL-8101",
       
   556 	  HW_REVID(1, 1, 1, 0, 1, 1, 1),
       
   557 	  HasLWake,
       
   558 	},
       
   559 };
       
   560 
       
   561 struct rtl_extra_stats {
       
   562 	unsigned long early_rx;
       
   563 	unsigned long tx_buf_mapped;
       
   564 	unsigned long tx_timeouts;
       
   565 	unsigned long rx_lost_in_ring;
       
   566 };
       
   567 
       
   568 struct rtl8139_stats {
       
   569 	u64	packets;
       
   570 	u64	bytes;
       
   571 	struct u64_stats_sync	syncp;
       
   572 };
       
   573 
       
   574 struct rtl8139_private {
       
   575 	void __iomem		*mmio_addr;
       
   576 	int			drv_flags;
       
   577 	struct pci_dev		*pci_dev;
       
   578 	u32			msg_enable;
       
   579 	struct napi_struct	napi;
       
   580 	struct net_device	*dev;
       
   581 
       
   582 	unsigned char		*rx_ring;
       
   583 	unsigned int		cur_rx;	/* RX buf index of next pkt */
       
   584 	struct rtl8139_stats	rx_stats;
       
   585 	dma_addr_t		rx_ring_dma;
       
   586 
       
   587 	unsigned int		tx_flag;
       
   588 	unsigned long		cur_tx;
       
   589 	unsigned long		dirty_tx;
       
   590 	struct rtl8139_stats	tx_stats;
       
   591 	unsigned char		*tx_buf[NUM_TX_DESC];	/* Tx bounce buffers */
       
   592 	unsigned char		*tx_bufs;	/* Tx bounce buffer region. */
       
   593 	dma_addr_t		tx_bufs_dma;
       
   594 
       
   595 	signed char		phys[4];	/* MII device addresses. */
       
   596 
       
   597 				/* Twister tune state. */
       
   598 	char			twistie, twist_row, twist_col;
       
   599 
       
   600 	unsigned int		watchdog_fired : 1;
       
   601 	unsigned int		default_port : 4; /* Last dev->if_port value. */
       
   602 	unsigned int		have_thread : 1;
       
   603 
       
   604 	spinlock_t		lock;
       
   605 	spinlock_t		rx_lock;
       
   606 
       
   607 	chip_t			chipset;
       
   608 	u32			rx_config;
       
   609 	struct rtl_extra_stats	xstats;
       
   610 
       
   611 	struct delayed_work	thread;
       
   612 
       
   613 	struct mii_if_info	mii;
       
   614 	unsigned int		regs_len;
       
   615 	unsigned long		fifo_copy_timeout;
       
   616 };
       
   617 
       
   618 MODULE_AUTHOR ("Jeff Garzik <jgarzik@pobox.com>");
       
   619 MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");
       
   620 MODULE_LICENSE("GPL");
       
   621 MODULE_VERSION(DRV_VERSION);
       
   622 
       
   623 module_param(use_io, bool, 0);
       
   624 MODULE_PARM_DESC(use_io, "Force use of I/O access mode. 0=MMIO 1=PIO");
       
   625 module_param(multicast_filter_limit, int, 0);
       
   626 module_param_array(media, int, NULL, 0);
       
   627 module_param_array(full_duplex, int, NULL, 0);
       
   628 module_param(debug, int, 0);
       
   629 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
       
   630 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
       
   631 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
       
   632 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
       
   633 
       
   634 static int read_eeprom (void __iomem *ioaddr, int location, int addr_len);
       
   635 static int rtl8139_open (struct net_device *dev);
       
   636 static int mdio_read (struct net_device *dev, int phy_id, int location);
       
   637 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
   638 			int val);
       
   639 static void rtl8139_start_thread(struct rtl8139_private *tp);
       
   640 static void rtl8139_tx_timeout (struct net_device *dev);
       
   641 static void rtl8139_init_ring (struct net_device *dev);
       
   642 static netdev_tx_t rtl8139_start_xmit (struct sk_buff *skb,
       
   643 				       struct net_device *dev);
       
   644 #ifdef CONFIG_NET_POLL_CONTROLLER
       
   645 static void rtl8139_poll_controller(struct net_device *dev);
       
   646 #endif
       
   647 static int rtl8139_set_mac_address(struct net_device *dev, void *p);
       
   648 static int rtl8139_poll(struct napi_struct *napi, int budget);
       
   649 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance);
       
   650 static int rtl8139_close (struct net_device *dev);
       
   651 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
       
   652 static struct rtnl_link_stats64 *rtl8139_get_stats64(struct net_device *dev,
       
   653 						    struct rtnl_link_stats64
       
   654 						    *stats);
       
   655 static void rtl8139_set_rx_mode (struct net_device *dev);
       
   656 static void __set_rx_mode (struct net_device *dev);
       
   657 static void rtl8139_hw_start (struct net_device *dev);
       
   658 static void rtl8139_thread (struct work_struct *work);
       
   659 static void rtl8139_tx_timeout_task(struct work_struct *work);
       
   660 static const struct ethtool_ops rtl8139_ethtool_ops;
       
   661 
       
   662 /* write MMIO register, with flush */
       
   663 /* Flush avoids rtl8139 bug w/ posted MMIO writes */
       
   664 #define RTL_W8_F(reg, val8)	do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0)
       
   665 #define RTL_W16_F(reg, val16)	do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0)
       
   666 #define RTL_W32_F(reg, val32)	do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0)
       
   667 
       
   668 /* write MMIO register */
       
   669 #define RTL_W8(reg, val8)	iowrite8 ((val8), ioaddr + (reg))
       
   670 #define RTL_W16(reg, val16)	iowrite16 ((val16), ioaddr + (reg))
       
   671 #define RTL_W32(reg, val32)	iowrite32 ((val32), ioaddr + (reg))
       
   672 
       
   673 /* read MMIO register */
       
   674 #define RTL_R8(reg)		ioread8 (ioaddr + (reg))
       
   675 #define RTL_R16(reg)		ioread16 (ioaddr + (reg))
       
   676 #define RTL_R32(reg)		ioread32 (ioaddr + (reg))
       
   677 
       
   678 
       
   679 static const u16 rtl8139_intr_mask =
       
   680 	PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
       
   681 	TxErr | TxOK | RxErr | RxOK;
       
   682 
       
   683 static const u16 rtl8139_norx_intr_mask =
       
   684 	PCIErr | PCSTimeout | RxUnderrun |
       
   685 	TxErr | TxOK | RxErr ;
       
   686 
       
   687 #if RX_BUF_IDX == 0
       
   688 static const unsigned int rtl8139_rx_config =
       
   689 	RxCfgRcv8K | RxNoWrap |
       
   690 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   691 	(RX_DMA_BURST << RxCfgDMAShift);
       
   692 #elif RX_BUF_IDX == 1
       
   693 static const unsigned int rtl8139_rx_config =
       
   694 	RxCfgRcv16K | RxNoWrap |
       
   695 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   696 	(RX_DMA_BURST << RxCfgDMAShift);
       
   697 #elif RX_BUF_IDX == 2
       
   698 static const unsigned int rtl8139_rx_config =
       
   699 	RxCfgRcv32K | RxNoWrap |
       
   700 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   701 	(RX_DMA_BURST << RxCfgDMAShift);
       
   702 #elif RX_BUF_IDX == 3
       
   703 static const unsigned int rtl8139_rx_config =
       
   704 	RxCfgRcv64K |
       
   705 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   706 	(RX_DMA_BURST << RxCfgDMAShift);
       
   707 #else
       
   708 #error "Invalid configuration for 8139_RXBUF_IDX"
       
   709 #endif
       
   710 
       
   711 static const unsigned int rtl8139_tx_config =
       
   712 	TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
       
   713 
       
   714 static void __rtl8139_cleanup_dev (struct net_device *dev)
       
   715 {
       
   716 	struct rtl8139_private *tp = netdev_priv(dev);
       
   717 	struct pci_dev *pdev;
       
   718 
       
   719 	assert (dev != NULL);
       
   720 	assert (tp->pci_dev != NULL);
       
   721 	pdev = tp->pci_dev;
       
   722 
       
   723 	if (tp->mmio_addr)
       
   724 		pci_iounmap (pdev, tp->mmio_addr);
       
   725 
       
   726 	/* it's ok to call this even if we have no regions to free */
       
   727 	pci_release_regions (pdev);
       
   728 
       
   729 	free_netdev(dev);
       
   730 }
       
   731 
       
   732 
       
   733 static void rtl8139_chip_reset (void __iomem *ioaddr)
       
   734 {
       
   735 	int i;
       
   736 
       
   737 	/* Soft reset the chip. */
       
   738 	RTL_W8 (ChipCmd, CmdReset);
       
   739 
       
   740 	/* Check that the chip has finished the reset. */
       
   741 	for (i = 1000; i > 0; i--) {
       
   742 		barrier();
       
   743 		if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
       
   744 			break;
       
   745 		udelay (10);
       
   746 	}
       
   747 }
       
   748 
       
   749 
       
   750 static struct net_device *rtl8139_init_board(struct pci_dev *pdev)
       
   751 {
       
   752 	struct device *d = &pdev->dev;
       
   753 	void __iomem *ioaddr;
       
   754 	struct net_device *dev;
       
   755 	struct rtl8139_private *tp;
       
   756 	u8 tmp8;
       
   757 	int rc, disable_dev_on_err = 0;
       
   758 	unsigned int i, bar;
       
   759 	unsigned long io_len;
       
   760 	u32 version;
       
   761 	static const struct {
       
   762 		unsigned long mask;
       
   763 		char *type;
       
   764 	} res[] = {
       
   765 		{ IORESOURCE_IO,  "PIO" },
       
   766 		{ IORESOURCE_MEM, "MMIO" }
       
   767 	};
       
   768 
       
   769 	assert (pdev != NULL);
       
   770 
       
   771 	/* dev and priv zeroed in alloc_etherdev */
       
   772 	dev = alloc_etherdev (sizeof (*tp));
       
   773 	if (dev == NULL)
       
   774 		return ERR_PTR(-ENOMEM);
       
   775 
       
   776 	SET_NETDEV_DEV(dev, &pdev->dev);
       
   777 
       
   778 	tp = netdev_priv(dev);
       
   779 	tp->pci_dev = pdev;
       
   780 
       
   781 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
       
   782 	rc = pci_enable_device (pdev);
       
   783 	if (rc)
       
   784 		goto err_out;
       
   785 
       
   786 	rc = pci_request_regions (pdev, DRV_NAME);
       
   787 	if (rc)
       
   788 		goto err_out;
       
   789 	disable_dev_on_err = 1;
       
   790 
       
   791 	pci_set_master (pdev);
       
   792 
       
   793 	u64_stats_init(&tp->rx_stats.syncp);
       
   794 	u64_stats_init(&tp->tx_stats.syncp);
       
   795 
       
   796 retry:
       
   797 	/* PIO bar register comes first. */
       
   798 	bar = !use_io;
       
   799 
       
   800 	io_len = pci_resource_len(pdev, bar);
       
   801 
       
   802 	dev_dbg(d, "%s region size = 0x%02lX\n", res[bar].type, io_len);
       
   803 
       
   804 	if (!(pci_resource_flags(pdev, bar) & res[bar].mask)) {
       
   805 		dev_err(d, "region #%d not a %s resource, aborting\n", bar,
       
   806 			res[bar].type);
       
   807 		rc = -ENODEV;
       
   808 		goto err_out;
       
   809 	}
       
   810 	if (io_len < RTL_MIN_IO_SIZE) {
       
   811 		dev_err(d, "Invalid PCI %s region size(s), aborting\n",
       
   812 			res[bar].type);
       
   813 		rc = -ENODEV;
       
   814 		goto err_out;
       
   815 	}
       
   816 
       
   817 	ioaddr = pci_iomap(pdev, bar, 0);
       
   818 	if (!ioaddr) {
       
   819 		dev_err(d, "cannot map %s\n", res[bar].type);
       
   820 		if (!use_io) {
       
   821 			use_io = true;
       
   822 			goto retry;
       
   823 		}
       
   824 		rc = -ENODEV;
       
   825 		goto err_out;
       
   826 	}
       
   827 	tp->regs_len = io_len;
       
   828 	tp->mmio_addr = ioaddr;
       
   829 
       
   830 	/* Bring old chips out of low-power mode. */
       
   831 	RTL_W8 (HltClk, 'R');
       
   832 
       
   833 	/* check for missing/broken hardware */
       
   834 	if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
       
   835 		dev_err(&pdev->dev, "Chip not responding, ignoring board\n");
       
   836 		rc = -EIO;
       
   837 		goto err_out;
       
   838 	}
       
   839 
       
   840 	/* identify chip attached to board */
       
   841 	version = RTL_R32 (TxConfig) & HW_REVID_MASK;
       
   842 	for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
       
   843 		if (version == rtl_chip_info[i].version) {
       
   844 			tp->chipset = i;
       
   845 			goto match;
       
   846 		}
       
   847 
       
   848 	/* if unknown chip, assume array element #0, original RTL-8139 in this case */
       
   849 	i = 0;
       
   850 	dev_dbg(&pdev->dev, "unknown chip version, assuming RTL-8139\n");
       
   851 	dev_dbg(&pdev->dev, "TxConfig = 0x%x\n", RTL_R32 (TxConfig));
       
   852 	tp->chipset = 0;
       
   853 
       
   854 match:
       
   855 	pr_debug("chipset id (%d) == index %d, '%s'\n",
       
   856 		 version, i, rtl_chip_info[i].name);
       
   857 
       
   858 	if (tp->chipset >= CH_8139B) {
       
   859 		u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
       
   860 		pr_debug("PCI PM wakeup\n");
       
   861 		if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
       
   862 		    (tmp8 & LWAKE))
       
   863 			new_tmp8 &= ~LWAKE;
       
   864 		new_tmp8 |= Cfg1_PM_Enable;
       
   865 		if (new_tmp8 != tmp8) {
       
   866 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   867 			RTL_W8 (Config1, tmp8);
       
   868 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   869 		}
       
   870 		if (rtl_chip_info[tp->chipset].flags & HasLWake) {
       
   871 			tmp8 = RTL_R8 (Config4);
       
   872 			if (tmp8 & LWPTN) {
       
   873 				RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   874 				RTL_W8 (Config4, tmp8 & ~LWPTN);
       
   875 				RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   876 			}
       
   877 		}
       
   878 	} else {
       
   879 		pr_debug("Old chip wakeup\n");
       
   880 		tmp8 = RTL_R8 (Config1);
       
   881 		tmp8 &= ~(SLEEP | PWRDN);
       
   882 		RTL_W8 (Config1, tmp8);
       
   883 	}
       
   884 
       
   885 	rtl8139_chip_reset (ioaddr);
       
   886 
       
   887 	return dev;
       
   888 
       
   889 err_out:
       
   890 	__rtl8139_cleanup_dev (dev);
       
   891 	if (disable_dev_on_err)
       
   892 		pci_disable_device (pdev);
       
   893 	return ERR_PTR(rc);
       
   894 }
       
   895 
       
   896 static int rtl8139_set_features(struct net_device *dev, netdev_features_t features)
       
   897 {
       
   898 	struct rtl8139_private *tp = netdev_priv(dev);
       
   899 	unsigned long flags;
       
   900 	netdev_features_t changed = features ^ dev->features;
       
   901 	void __iomem *ioaddr = tp->mmio_addr;
       
   902 
       
   903 	if (!(changed & (NETIF_F_RXALL)))
       
   904 		return 0;
       
   905 
       
   906 	spin_lock_irqsave(&tp->lock, flags);
       
   907 
       
   908 	if (changed & NETIF_F_RXALL) {
       
   909 		int rx_mode = tp->rx_config;
       
   910 		if (features & NETIF_F_RXALL)
       
   911 			rx_mode |= (AcceptErr | AcceptRunt);
       
   912 		else
       
   913 			rx_mode &= ~(AcceptErr | AcceptRunt);
       
   914 		tp->rx_config = rtl8139_rx_config | rx_mode;
       
   915 		RTL_W32_F(RxConfig, tp->rx_config);
       
   916 	}
       
   917 
       
   918 	spin_unlock_irqrestore(&tp->lock, flags);
       
   919 
       
   920 	return 0;
       
   921 }
       
   922 
       
   923 static const struct net_device_ops rtl8139_netdev_ops = {
       
   924 	.ndo_open		= rtl8139_open,
       
   925 	.ndo_stop		= rtl8139_close,
       
   926 	.ndo_get_stats64	= rtl8139_get_stats64,
       
   927 	.ndo_change_mtu		= eth_change_mtu,
       
   928 	.ndo_validate_addr	= eth_validate_addr,
       
   929 	.ndo_set_mac_address 	= rtl8139_set_mac_address,
       
   930 	.ndo_start_xmit		= rtl8139_start_xmit,
       
   931 	.ndo_set_rx_mode	= rtl8139_set_rx_mode,
       
   932 	.ndo_do_ioctl		= netdev_ioctl,
       
   933 	.ndo_tx_timeout		= rtl8139_tx_timeout,
       
   934 #ifdef CONFIG_NET_POLL_CONTROLLER
       
   935 	.ndo_poll_controller	= rtl8139_poll_controller,
       
   936 #endif
       
   937 	.ndo_set_features	= rtl8139_set_features,
       
   938 };
       
   939 
       
   940 static int rtl8139_init_one(struct pci_dev *pdev,
       
   941 			    const struct pci_device_id *ent)
       
   942 {
       
   943 	struct net_device *dev = NULL;
       
   944 	struct rtl8139_private *tp;
       
   945 	int i, addr_len, option;
       
   946 	void __iomem *ioaddr;
       
   947 	static int board_idx = -1;
       
   948 
       
   949 	assert (pdev != NULL);
       
   950 	assert (ent != NULL);
       
   951 
       
   952 	board_idx++;
       
   953 
       
   954 	/* when we're built into the kernel, the driver version message
       
   955 	 * is only printed if at least one 8139 board has been found
       
   956 	 */
       
   957 #ifndef MODULE
       
   958 	{
       
   959 		static int printed_version;
       
   960 		if (!printed_version++)
       
   961 			pr_info(RTL8139_DRIVER_NAME "\n");
       
   962 	}
       
   963 #endif
       
   964 
       
   965 	if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
       
   966 	    pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision >= 0x20) {
       
   967 		dev_info(&pdev->dev,
       
   968 			   "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip, use 8139cp\n",
       
   969 		       	   pdev->vendor, pdev->device, pdev->revision);
       
   970 		return -ENODEV;
       
   971 	}
       
   972 
       
   973 	if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
       
   974 	    pdev->device == PCI_DEVICE_ID_REALTEK_8139 &&
       
   975 	    pdev->subsystem_vendor == PCI_VENDOR_ID_ATHEROS &&
       
   976 	    pdev->subsystem_device == PCI_DEVICE_ID_REALTEK_8139) {
       
   977 		pr_info("OQO Model 2 detected. Forcing PIO\n");
       
   978 		use_io = 1;
       
   979 	}
       
   980 
       
   981 	dev = rtl8139_init_board (pdev);
       
   982 	if (IS_ERR(dev))
       
   983 		return PTR_ERR(dev);
       
   984 
       
   985 	assert (dev != NULL);
       
   986 	tp = netdev_priv(dev);
       
   987 	tp->dev = dev;
       
   988 
       
   989 	ioaddr = tp->mmio_addr;
       
   990 	assert (ioaddr != NULL);
       
   991 
       
   992 	addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
       
   993 	for (i = 0; i < 3; i++)
       
   994 		((__le16 *) (dev->dev_addr))[i] =
       
   995 		    cpu_to_le16(read_eeprom (ioaddr, i + 7, addr_len));
       
   996 
       
   997 	/* The Rtl8139-specific entries in the device structure. */
       
   998 	dev->netdev_ops = &rtl8139_netdev_ops;
       
   999 	dev->ethtool_ops = &rtl8139_ethtool_ops;
       
  1000 	dev->watchdog_timeo = TX_TIMEOUT;
       
  1001 	netif_napi_add(dev, &tp->napi, rtl8139_poll, 64);
       
  1002 
       
  1003 	/* note: the hardware is not capable of sg/csum/highdma, however
       
  1004 	 * through the use of skb_copy_and_csum_dev we enable these
       
  1005 	 * features
       
  1006 	 */
       
  1007 	dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
       
  1008 	dev->vlan_features = dev->features;
       
  1009 
       
  1010 	dev->hw_features |= NETIF_F_RXALL;
       
  1011 	dev->hw_features |= NETIF_F_RXFCS;
       
  1012 
       
  1013 	/* tp zeroed and aligned in alloc_etherdev */
       
  1014 	tp = netdev_priv(dev);
       
  1015 
       
  1016 	/* note: tp->chipset set in rtl8139_init_board */
       
  1017 	tp->drv_flags = board_info[ent->driver_data].hw_flags;
       
  1018 	tp->mmio_addr = ioaddr;
       
  1019 	tp->msg_enable =
       
  1020 		(debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1));
       
  1021 	spin_lock_init (&tp->lock);
       
  1022 	spin_lock_init (&tp->rx_lock);
       
  1023 	INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
       
  1024 	tp->mii.dev = dev;
       
  1025 	tp->mii.mdio_read = mdio_read;
       
  1026 	tp->mii.mdio_write = mdio_write;
       
  1027 	tp->mii.phy_id_mask = 0x3f;
       
  1028 	tp->mii.reg_num_mask = 0x1f;
       
  1029 
       
  1030 	/* dev is fully set up and ready to use now */
       
  1031 	pr_debug("about to register device named %s (%p)...\n",
       
  1032 		 dev->name, dev);
       
  1033 	i = register_netdev (dev);
       
  1034 	if (i) goto err_out;
       
  1035 
       
  1036 	pci_set_drvdata (pdev, dev);
       
  1037 
       
  1038 	netdev_info(dev, "%s at 0x%p, %pM, IRQ %d\n",
       
  1039 		    board_info[ent->driver_data].name,
       
  1040 		    ioaddr, dev->dev_addr, pdev->irq);
       
  1041 
       
  1042 	netdev_dbg(dev, "Identified 8139 chip type '%s'\n",
       
  1043 		   rtl_chip_info[tp->chipset].name);
       
  1044 
       
  1045 	/* Find the connected MII xcvrs.
       
  1046 	   Doing this in open() would allow detecting external xcvrs later, but
       
  1047 	   takes too much time. */
       
  1048 #ifdef CONFIG_8139TOO_8129
       
  1049 	if (tp->drv_flags & HAS_MII_XCVR) {
       
  1050 		int phy, phy_idx = 0;
       
  1051 		for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
       
  1052 			int mii_status = mdio_read(dev, phy, 1);
       
  1053 			if (mii_status != 0xffff  &&  mii_status != 0x0000) {
       
  1054 				u16 advertising = mdio_read(dev, phy, 4);
       
  1055 				tp->phys[phy_idx++] = phy;
       
  1056 				netdev_info(dev, "MII transceiver %d status 0x%04x advertising %04x\n",
       
  1057 					    phy, mii_status, advertising);
       
  1058 			}
       
  1059 		}
       
  1060 		if (phy_idx == 0) {
       
  1061 			netdev_info(dev, "No MII transceivers found! Assuming SYM transceiver\n");
       
  1062 			tp->phys[0] = 32;
       
  1063 		}
       
  1064 	} else
       
  1065 #endif
       
  1066 		tp->phys[0] = 32;
       
  1067 	tp->mii.phy_id = tp->phys[0];
       
  1068 
       
  1069 	/* The lower four bits are the media type. */
       
  1070 	option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
       
  1071 	if (option > 0) {
       
  1072 		tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
       
  1073 		tp->default_port = option & 0xFF;
       
  1074 		if (tp->default_port)
       
  1075 			tp->mii.force_media = 1;
       
  1076 	}
       
  1077 	if (board_idx < MAX_UNITS  &&  full_duplex[board_idx] > 0)
       
  1078 		tp->mii.full_duplex = full_duplex[board_idx];
       
  1079 	if (tp->mii.full_duplex) {
       
  1080 		netdev_info(dev, "Media type forced to Full Duplex\n");
       
  1081 		/* Changing the MII-advertised media because might prevent
       
  1082 		   re-connection. */
       
  1083 		tp->mii.force_media = 1;
       
  1084 	}
       
  1085 	if (tp->default_port) {
       
  1086 		netdev_info(dev, "  Forcing %dMbps %s-duplex operation\n",
       
  1087 			    (option & 0x20 ? 100 : 10),
       
  1088 			    (option & 0x10 ? "full" : "half"));
       
  1089 		mdio_write(dev, tp->phys[0], 0,
       
  1090 				   ((option & 0x20) ? 0x2000 : 0) | 	/* 100Mbps? */
       
  1091 				   ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
       
  1092 	}
       
  1093 
       
  1094 	/* Put the chip into low-power mode. */
       
  1095 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1096 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  1097 
       
  1098 	return 0;
       
  1099 
       
  1100 err_out:
       
  1101 	__rtl8139_cleanup_dev (dev);
       
  1102 	pci_disable_device (pdev);
       
  1103 	return i;
       
  1104 }
       
  1105 
       
  1106 
       
  1107 static void rtl8139_remove_one(struct pci_dev *pdev)
       
  1108 {
       
  1109 	struct net_device *dev = pci_get_drvdata (pdev);
       
  1110 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1111 
       
  1112 	assert (dev != NULL);
       
  1113 
       
  1114 	cancel_delayed_work_sync(&tp->thread);
       
  1115 
       
  1116 	unregister_netdev (dev);
       
  1117 
       
  1118 	__rtl8139_cleanup_dev (dev);
       
  1119 	pci_disable_device (pdev);
       
  1120 }
       
  1121 
       
  1122 
       
  1123 /* Serial EEPROM section. */
       
  1124 
       
  1125 /*  EEPROM_Ctrl bits. */
       
  1126 #define EE_SHIFT_CLK	0x04	/* EEPROM shift clock. */
       
  1127 #define EE_CS			0x08	/* EEPROM chip select. */
       
  1128 #define EE_DATA_WRITE	0x02	/* EEPROM chip data in. */
       
  1129 #define EE_WRITE_0		0x00
       
  1130 #define EE_WRITE_1		0x02
       
  1131 #define EE_DATA_READ	0x01	/* EEPROM chip data out. */
       
  1132 #define EE_ENB			(0x80 | EE_CS)
       
  1133 
       
  1134 /* Delay between EEPROM clock transitions.
       
  1135    No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
       
  1136  */
       
  1137 
       
  1138 #define eeprom_delay()	(void)RTL_R8(Cfg9346)
       
  1139 
       
  1140 /* The EEPROM commands include the alway-set leading bit. */
       
  1141 #define EE_WRITE_CMD	(5)
       
  1142 #define EE_READ_CMD		(6)
       
  1143 #define EE_ERASE_CMD	(7)
       
  1144 
       
  1145 static int read_eeprom(void __iomem *ioaddr, int location, int addr_len)
       
  1146 {
       
  1147 	int i;
       
  1148 	unsigned retval = 0;
       
  1149 	int read_cmd = location | (EE_READ_CMD << addr_len);
       
  1150 
       
  1151 	RTL_W8 (Cfg9346, EE_ENB & ~EE_CS);
       
  1152 	RTL_W8 (Cfg9346, EE_ENB);
       
  1153 	eeprom_delay ();
       
  1154 
       
  1155 	/* Shift the read command bits out. */
       
  1156 	for (i = 4 + addr_len; i >= 0; i--) {
       
  1157 		int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
       
  1158 		RTL_W8 (Cfg9346, EE_ENB | dataval);
       
  1159 		eeprom_delay ();
       
  1160 		RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK);
       
  1161 		eeprom_delay ();
       
  1162 	}
       
  1163 	RTL_W8 (Cfg9346, EE_ENB);
       
  1164 	eeprom_delay ();
       
  1165 
       
  1166 	for (i = 16; i > 0; i--) {
       
  1167 		RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK);
       
  1168 		eeprom_delay ();
       
  1169 		retval =
       
  1170 		    (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 :
       
  1171 				     0);
       
  1172 		RTL_W8 (Cfg9346, EE_ENB);
       
  1173 		eeprom_delay ();
       
  1174 	}
       
  1175 
       
  1176 	/* Terminate the EEPROM access. */
       
  1177 	RTL_W8(Cfg9346, 0);
       
  1178 	eeprom_delay ();
       
  1179 
       
  1180 	return retval;
       
  1181 }
       
  1182 
       
  1183 /* MII serial management: mostly bogus for now. */
       
  1184 /* Read and write the MII management registers using software-generated
       
  1185    serial MDIO protocol.
       
  1186    The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
       
  1187    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
       
  1188    "overclocking" issues. */
       
  1189 #define MDIO_DIR		0x80
       
  1190 #define MDIO_DATA_OUT	0x04
       
  1191 #define MDIO_DATA_IN	0x02
       
  1192 #define MDIO_CLK		0x01
       
  1193 #define MDIO_WRITE0 (MDIO_DIR)
       
  1194 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
       
  1195 
       
  1196 #define mdio_delay()	RTL_R8(Config4)
       
  1197 
       
  1198 
       
  1199 static const char mii_2_8139_map[8] = {
       
  1200 	BasicModeCtrl,
       
  1201 	BasicModeStatus,
       
  1202 	0,
       
  1203 	0,
       
  1204 	NWayAdvert,
       
  1205 	NWayLPAR,
       
  1206 	NWayExpansion,
       
  1207 	0
       
  1208 };
       
  1209 
       
  1210 
       
  1211 #ifdef CONFIG_8139TOO_8129
       
  1212 /* Syncronize the MII management interface by shifting 32 one bits out. */
       
  1213 static void mdio_sync (void __iomem *ioaddr)
       
  1214 {
       
  1215 	int i;
       
  1216 
       
  1217 	for (i = 32; i >= 0; i--) {
       
  1218 		RTL_W8 (Config4, MDIO_WRITE1);
       
  1219 		mdio_delay ();
       
  1220 		RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK);
       
  1221 		mdio_delay ();
       
  1222 	}
       
  1223 }
       
  1224 #endif
       
  1225 
       
  1226 static int mdio_read (struct net_device *dev, int phy_id, int location)
       
  1227 {
       
  1228 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1229 	int retval = 0;
       
  1230 #ifdef CONFIG_8139TOO_8129
       
  1231 	void __iomem *ioaddr = tp->mmio_addr;
       
  1232 	int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
       
  1233 	int i;
       
  1234 #endif
       
  1235 
       
  1236 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1237 		void __iomem *ioaddr = tp->mmio_addr;
       
  1238 		return location < 8 && mii_2_8139_map[location] ?
       
  1239 		    RTL_R16 (mii_2_8139_map[location]) : 0;
       
  1240 	}
       
  1241 
       
  1242 #ifdef CONFIG_8139TOO_8129
       
  1243 	mdio_sync (ioaddr);
       
  1244 	/* Shift the read command bits out. */
       
  1245 	for (i = 15; i >= 0; i--) {
       
  1246 		int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
       
  1247 
       
  1248 		RTL_W8 (Config4, MDIO_DIR | dataval);
       
  1249 		mdio_delay ();
       
  1250 		RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK);
       
  1251 		mdio_delay ();
       
  1252 	}
       
  1253 
       
  1254 	/* Read the two transition, 16 data, and wire-idle bits. */
       
  1255 	for (i = 19; i > 0; i--) {
       
  1256 		RTL_W8 (Config4, 0);
       
  1257 		mdio_delay ();
       
  1258 		retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0);
       
  1259 		RTL_W8 (Config4, MDIO_CLK);
       
  1260 		mdio_delay ();
       
  1261 	}
       
  1262 #endif
       
  1263 
       
  1264 	return (retval >> 1) & 0xffff;
       
  1265 }
       
  1266 
       
  1267 
       
  1268 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
  1269 			int value)
       
  1270 {
       
  1271 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1272 #ifdef CONFIG_8139TOO_8129
       
  1273 	void __iomem *ioaddr = tp->mmio_addr;
       
  1274 	int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
       
  1275 	int i;
       
  1276 #endif
       
  1277 
       
  1278 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1279 		void __iomem *ioaddr = tp->mmio_addr;
       
  1280 		if (location == 0) {
       
  1281 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1282 			RTL_W16 (BasicModeCtrl, value);
       
  1283 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1284 		} else if (location < 8 && mii_2_8139_map[location])
       
  1285 			RTL_W16 (mii_2_8139_map[location], value);
       
  1286 		return;
       
  1287 	}
       
  1288 
       
  1289 #ifdef CONFIG_8139TOO_8129
       
  1290 	mdio_sync (ioaddr);
       
  1291 
       
  1292 	/* Shift the command bits out. */
       
  1293 	for (i = 31; i >= 0; i--) {
       
  1294 		int dataval =
       
  1295 		    (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
       
  1296 		RTL_W8 (Config4, dataval);
       
  1297 		mdio_delay ();
       
  1298 		RTL_W8 (Config4, dataval | MDIO_CLK);
       
  1299 		mdio_delay ();
       
  1300 	}
       
  1301 	/* Clear out extra bits. */
       
  1302 	for (i = 2; i > 0; i--) {
       
  1303 		RTL_W8 (Config4, 0);
       
  1304 		mdio_delay ();
       
  1305 		RTL_W8 (Config4, MDIO_CLK);
       
  1306 		mdio_delay ();
       
  1307 	}
       
  1308 #endif
       
  1309 }
       
  1310 
       
  1311 
       
  1312 static int rtl8139_open (struct net_device *dev)
       
  1313 {
       
  1314 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1315 	void __iomem *ioaddr = tp->mmio_addr;
       
  1316 	const int irq = tp->pci_dev->irq;
       
  1317 	int retval;
       
  1318 
       
  1319 	retval = request_irq(irq, rtl8139_interrupt, IRQF_SHARED, dev->name, dev);
       
  1320 	if (retval)
       
  1321 		return retval;
       
  1322 
       
  1323 	tp->tx_bufs = dma_alloc_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN,
       
  1324 					   &tp->tx_bufs_dma, GFP_KERNEL);
       
  1325 	tp->rx_ring = dma_alloc_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN,
       
  1326 					   &tp->rx_ring_dma, GFP_KERNEL);
       
  1327 	if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
       
  1328 		free_irq(irq, dev);
       
  1329 
       
  1330 		if (tp->tx_bufs)
       
  1331 			dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN,
       
  1332 					    tp->tx_bufs, tp->tx_bufs_dma);
       
  1333 		if (tp->rx_ring)
       
  1334 			dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN,
       
  1335 					    tp->rx_ring, tp->rx_ring_dma);
       
  1336 
       
  1337 		return -ENOMEM;
       
  1338 
       
  1339 	}
       
  1340 
       
  1341 	napi_enable(&tp->napi);
       
  1342 
       
  1343 	tp->mii.full_duplex = tp->mii.force_media;
       
  1344 	tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
       
  1345 
       
  1346 	rtl8139_init_ring (dev);
       
  1347 	rtl8139_hw_start (dev);
       
  1348 	netif_start_queue (dev);
       
  1349 
       
  1350 	netif_dbg(tp, ifup, dev,
       
  1351 		  "%s() ioaddr %#llx IRQ %d GP Pins %02x %s-duplex\n",
       
  1352 		  __func__,
       
  1353 		  (unsigned long long)pci_resource_start (tp->pci_dev, 1),
       
  1354 		  irq, RTL_R8 (MediaStatus),
       
  1355 		  tp->mii.full_duplex ? "full" : "half");
       
  1356 
       
  1357 	rtl8139_start_thread(tp);
       
  1358 
       
  1359 	return 0;
       
  1360 }
       
  1361 
       
  1362 
       
  1363 static void rtl_check_media (struct net_device *dev, unsigned int init_media)
       
  1364 {
       
  1365 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1366 
       
  1367 	if (tp->phys[0] >= 0) {
       
  1368 		mii_check_media(&tp->mii, netif_msg_link(tp), init_media);
       
  1369 	}
       
  1370 }
       
  1371 
       
  1372 /* Start the hardware at open or resume. */
       
  1373 static void rtl8139_hw_start (struct net_device *dev)
       
  1374 {
       
  1375 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1376 	void __iomem *ioaddr = tp->mmio_addr;
       
  1377 	u32 i;
       
  1378 	u8 tmp;
       
  1379 
       
  1380 	/* Bring old chips out of low-power mode. */
       
  1381 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1382 		RTL_W8 (HltClk, 'R');
       
  1383 
       
  1384 	rtl8139_chip_reset (ioaddr);
       
  1385 
       
  1386 	/* unlock Config[01234] and BMCR register writes */
       
  1387 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1388 	/* Restore our idea of the MAC address. */
       
  1389 	RTL_W32_F (MAC0 + 0, le32_to_cpu (*(__le32 *) (dev->dev_addr + 0)));
       
  1390 	RTL_W32_F (MAC0 + 4, le16_to_cpu (*(__le16 *) (dev->dev_addr + 4)));
       
  1391 
       
  1392 	tp->cur_rx = 0;
       
  1393 
       
  1394 	/* init Rx ring buffer DMA address */
       
  1395 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1396 
       
  1397 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1398 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1399 
       
  1400 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1401 	RTL_W32 (RxConfig, tp->rx_config);
       
  1402 	RTL_W32 (TxConfig, rtl8139_tx_config);
       
  1403 
       
  1404 	rtl_check_media (dev, 1);
       
  1405 
       
  1406 	if (tp->chipset >= CH_8139B) {
       
  1407 		/* Disable magic packet scanning, which is enabled
       
  1408 		 * when PM is enabled in Config1.  It can be reenabled
       
  1409 		 * via ETHTOOL_SWOL if desired.  */
       
  1410 		RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
       
  1411 	}
       
  1412 
       
  1413 	netdev_dbg(dev, "init buffer addresses\n");
       
  1414 
       
  1415 	/* Lock Config[01234] and BMCR register writes */
       
  1416 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1417 
       
  1418 	/* init Tx buffer DMA addresses */
       
  1419 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1420 		RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
       
  1421 
       
  1422 	RTL_W32 (RxMissed, 0);
       
  1423 
       
  1424 	rtl8139_set_rx_mode (dev);
       
  1425 
       
  1426 	/* no early-rx interrupts */
       
  1427 	RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
       
  1428 
       
  1429 	/* make sure RxTx has started */
       
  1430 	tmp = RTL_R8 (ChipCmd);
       
  1431 	if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
       
  1432 		RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1433 
       
  1434 	/* Enable all known interrupts by setting the interrupt mask. */
       
  1435 	RTL_W16 (IntrMask, rtl8139_intr_mask);
       
  1436 }
       
  1437 
       
  1438 
       
  1439 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
       
  1440 static void rtl8139_init_ring (struct net_device *dev)
       
  1441 {
       
  1442 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1443 	int i;
       
  1444 
       
  1445 	tp->cur_rx = 0;
       
  1446 	tp->cur_tx = 0;
       
  1447 	tp->dirty_tx = 0;
       
  1448 
       
  1449 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1450 		tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
       
  1451 }
       
  1452 
       
  1453 
       
  1454 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
       
  1455 static int next_tick = 3 * HZ;
       
  1456 
       
  1457 #ifndef CONFIG_8139TOO_TUNE_TWISTER
       
  1458 static inline void rtl8139_tune_twister (struct net_device *dev,
       
  1459 				  struct rtl8139_private *tp) {}
       
  1460 #else
       
  1461 enum TwisterParamVals {
       
  1462 	PARA78_default	= 0x78fa8388,
       
  1463 	PARA7c_default	= 0xcb38de43,	/* param[0][3] */
       
  1464 	PARA7c_xxx	= 0xcb38de43,
       
  1465 };
       
  1466 
       
  1467 static const unsigned long param[4][4] = {
       
  1468 	{0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
       
  1469 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1470 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1471 	{0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
       
  1472 };
       
  1473 
       
  1474 static void rtl8139_tune_twister (struct net_device *dev,
       
  1475 				  struct rtl8139_private *tp)
       
  1476 {
       
  1477 	int linkcase;
       
  1478 	void __iomem *ioaddr = tp->mmio_addr;
       
  1479 
       
  1480 	/* This is a complicated state machine to configure the "twister" for
       
  1481 	   impedance/echos based on the cable length.
       
  1482 	   All of this is magic and undocumented.
       
  1483 	 */
       
  1484 	switch (tp->twistie) {
       
  1485 	case 1:
       
  1486 		if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
       
  1487 			/* We have link beat, let us tune the twister. */
       
  1488 			RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
       
  1489 			tp->twistie = 2;	/* Change to state 2. */
       
  1490 			next_tick = HZ / 10;
       
  1491 		} else {
       
  1492 			/* Just put in some reasonable defaults for when beat returns. */
       
  1493 			RTL_W16 (CSCR, CSCR_LinkDownCmd);
       
  1494 			RTL_W32 (FIFOTMS, 0x20);	/* Turn on cable test mode. */
       
  1495 			RTL_W32 (PARA78, PARA78_default);
       
  1496 			RTL_W32 (PARA7c, PARA7c_default);
       
  1497 			tp->twistie = 0;	/* Bail from future actions. */
       
  1498 		}
       
  1499 		break;
       
  1500 	case 2:
       
  1501 		/* Read how long it took to hear the echo. */
       
  1502 		linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
       
  1503 		if (linkcase == 0x7000)
       
  1504 			tp->twist_row = 3;
       
  1505 		else if (linkcase == 0x3000)
       
  1506 			tp->twist_row = 2;
       
  1507 		else if (linkcase == 0x1000)
       
  1508 			tp->twist_row = 1;
       
  1509 		else
       
  1510 			tp->twist_row = 0;
       
  1511 		tp->twist_col = 0;
       
  1512 		tp->twistie = 3;	/* Change to state 2. */
       
  1513 		next_tick = HZ / 10;
       
  1514 		break;
       
  1515 	case 3:
       
  1516 		/* Put out four tuning parameters, one per 100msec. */
       
  1517 		if (tp->twist_col == 0)
       
  1518 			RTL_W16 (FIFOTMS, 0);
       
  1519 		RTL_W32 (PARA7c, param[(int) tp->twist_row]
       
  1520 			 [(int) tp->twist_col]);
       
  1521 		next_tick = HZ / 10;
       
  1522 		if (++tp->twist_col >= 4) {
       
  1523 			/* For short cables we are done.
       
  1524 			   For long cables (row == 3) check for mistune. */
       
  1525 			tp->twistie =
       
  1526 			    (tp->twist_row == 3) ? 4 : 0;
       
  1527 		}
       
  1528 		break;
       
  1529 	case 4:
       
  1530 		/* Special case for long cables: check for mistune. */
       
  1531 		if ((RTL_R16 (CSCR) &
       
  1532 		     CSCR_LinkStatusBits) == 0x7000) {
       
  1533 			tp->twistie = 0;
       
  1534 			break;
       
  1535 		} else {
       
  1536 			RTL_W32 (PARA7c, 0xfb38de03);
       
  1537 			tp->twistie = 5;
       
  1538 			next_tick = HZ / 10;
       
  1539 		}
       
  1540 		break;
       
  1541 	case 5:
       
  1542 		/* Retune for shorter cable (column 2). */
       
  1543 		RTL_W32 (FIFOTMS, 0x20);
       
  1544 		RTL_W32 (PARA78, PARA78_default);
       
  1545 		RTL_W32 (PARA7c, PARA7c_default);
       
  1546 		RTL_W32 (FIFOTMS, 0x00);
       
  1547 		tp->twist_row = 2;
       
  1548 		tp->twist_col = 0;
       
  1549 		tp->twistie = 3;
       
  1550 		next_tick = HZ / 10;
       
  1551 		break;
       
  1552 
       
  1553 	default:
       
  1554 		/* do nothing */
       
  1555 		break;
       
  1556 	}
       
  1557 }
       
  1558 #endif /* CONFIG_8139TOO_TUNE_TWISTER */
       
  1559 
       
  1560 static inline void rtl8139_thread_iter (struct net_device *dev,
       
  1561 				 struct rtl8139_private *tp,
       
  1562 				 void __iomem *ioaddr)
       
  1563 {
       
  1564 	int mii_lpa;
       
  1565 
       
  1566 	mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
       
  1567 
       
  1568 	if (!tp->mii.force_media && mii_lpa != 0xffff) {
       
  1569 		int duplex = ((mii_lpa & LPA_100FULL) ||
       
  1570 			      (mii_lpa & 0x01C0) == 0x0040);
       
  1571 		if (tp->mii.full_duplex != duplex) {
       
  1572 			tp->mii.full_duplex = duplex;
       
  1573 
       
  1574 			if (mii_lpa) {
       
  1575 				netdev_info(dev, "Setting %s-duplex based on MII #%d link partner ability of %04x\n",
       
  1576 					    tp->mii.full_duplex ? "full" : "half",
       
  1577 					    tp->phys[0], mii_lpa);
       
  1578 			} else {
       
  1579 				netdev_info(dev, "media is unconnected, link down, or incompatible connection\n");
       
  1580 			}
       
  1581 #if 0
       
  1582 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1583 			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
       
  1584 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1585 #endif
       
  1586 		}
       
  1587 	}
       
  1588 
       
  1589 	next_tick = HZ * 60;
       
  1590 
       
  1591 	rtl8139_tune_twister (dev, tp);
       
  1592 
       
  1593 	netdev_dbg(dev, "Media selection tick, Link partner %04x\n",
       
  1594 		   RTL_R16(NWayLPAR));
       
  1595 	netdev_dbg(dev, "Other registers are IntMask %04x IntStatus %04x\n",
       
  1596 		   RTL_R16(IntrMask), RTL_R16(IntrStatus));
       
  1597 	netdev_dbg(dev, "Chip config %02x %02x\n",
       
  1598 		   RTL_R8(Config0), RTL_R8(Config1));
       
  1599 }
       
  1600 
       
  1601 static void rtl8139_thread (struct work_struct *work)
       
  1602 {
       
  1603 	struct rtl8139_private *tp =
       
  1604 		container_of(work, struct rtl8139_private, thread.work);
       
  1605 	struct net_device *dev = tp->mii.dev;
       
  1606 	unsigned long thr_delay = next_tick;
       
  1607 
       
  1608 	rtnl_lock();
       
  1609 
       
  1610 	if (!netif_running(dev))
       
  1611 		goto out_unlock;
       
  1612 
       
  1613 	if (tp->watchdog_fired) {
       
  1614 		tp->watchdog_fired = 0;
       
  1615 		rtl8139_tx_timeout_task(work);
       
  1616 	} else
       
  1617 		rtl8139_thread_iter(dev, tp, tp->mmio_addr);
       
  1618 
       
  1619 	if (tp->have_thread)
       
  1620 		schedule_delayed_work(&tp->thread, thr_delay);
       
  1621 out_unlock:
       
  1622 	rtnl_unlock ();
       
  1623 }
       
  1624 
       
  1625 static void rtl8139_start_thread(struct rtl8139_private *tp)
       
  1626 {
       
  1627 	tp->twistie = 0;
       
  1628 	if (tp->chipset == CH_8139_K)
       
  1629 		tp->twistie = 1;
       
  1630 	else if (tp->drv_flags & HAS_LNK_CHNG)
       
  1631 		return;
       
  1632 
       
  1633 	tp->have_thread = 1;
       
  1634 	tp->watchdog_fired = 0;
       
  1635 
       
  1636 	schedule_delayed_work(&tp->thread, next_tick);
       
  1637 }
       
  1638 
       
  1639 static inline void rtl8139_tx_clear (struct rtl8139_private *tp)
       
  1640 {
       
  1641 	tp->cur_tx = 0;
       
  1642 	tp->dirty_tx = 0;
       
  1643 
       
  1644 	/* XXX account for unsent Tx packets in tp->stats.tx_dropped */
       
  1645 }
       
  1646 
       
  1647 static void rtl8139_tx_timeout_task (struct work_struct *work)
       
  1648 {
       
  1649 	struct rtl8139_private *tp =
       
  1650 		container_of(work, struct rtl8139_private, thread.work);
       
  1651 	struct net_device *dev = tp->mii.dev;
       
  1652 	void __iomem *ioaddr = tp->mmio_addr;
       
  1653 	int i;
       
  1654 	u8 tmp8;
       
  1655 
       
  1656 	netdev_dbg(dev, "Transmit timeout, status %02x %04x %04x media %02x\n",
       
  1657 		   RTL_R8(ChipCmd), RTL_R16(IntrStatus),
       
  1658 		   RTL_R16(IntrMask), RTL_R8(MediaStatus));
       
  1659 	/* Emit info to figure out what went wrong. */
       
  1660 	netdev_dbg(dev, "Tx queue start entry %ld  dirty entry %ld\n",
       
  1661 		   tp->cur_tx, tp->dirty_tx);
       
  1662 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1663 		netdev_dbg(dev, "Tx descriptor %d is %08x%s\n",
       
  1664 			   i, RTL_R32(TxStatus0 + (i * 4)),
       
  1665 			   i == tp->dirty_tx % NUM_TX_DESC ?
       
  1666 			   " (queue head)" : "");
       
  1667 
       
  1668 	tp->xstats.tx_timeouts++;
       
  1669 
       
  1670 	/* disable Tx ASAP, if not already */
       
  1671 	tmp8 = RTL_R8 (ChipCmd);
       
  1672 	if (tmp8 & CmdTxEnb)
       
  1673 		RTL_W8 (ChipCmd, CmdRxEnb);
       
  1674 
       
  1675 	spin_lock_bh(&tp->rx_lock);
       
  1676 	/* Disable interrupts by clearing the interrupt mask. */
       
  1677 	RTL_W16 (IntrMask, 0x0000);
       
  1678 
       
  1679 	/* Stop a shared interrupt from scavenging while we are. */
       
  1680 	spin_lock_irq(&tp->lock);
       
  1681 	rtl8139_tx_clear (tp);
       
  1682 	spin_unlock_irq(&tp->lock);
       
  1683 
       
  1684 	/* ...and finally, reset everything */
       
  1685 	if (netif_running(dev)) {
       
  1686 		rtl8139_hw_start (dev);
       
  1687 		netif_wake_queue (dev);
       
  1688 	}
       
  1689 	spin_unlock_bh(&tp->rx_lock);
       
  1690 }
       
  1691 
       
  1692 static void rtl8139_tx_timeout (struct net_device *dev)
       
  1693 {
       
  1694 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1695 
       
  1696 	tp->watchdog_fired = 1;
       
  1697 	if (!tp->have_thread) {
       
  1698 		INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
       
  1699 		schedule_delayed_work(&tp->thread, next_tick);
       
  1700 	}
       
  1701 }
       
  1702 
       
  1703 static netdev_tx_t rtl8139_start_xmit (struct sk_buff *skb,
       
  1704 					     struct net_device *dev)
       
  1705 {
       
  1706 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1707 	void __iomem *ioaddr = tp->mmio_addr;
       
  1708 	unsigned int entry;
       
  1709 	unsigned int len = skb->len;
       
  1710 	unsigned long flags;
       
  1711 
       
  1712 	/* Calculate the next Tx descriptor entry. */
       
  1713 	entry = tp->cur_tx % NUM_TX_DESC;
       
  1714 
       
  1715 	/* Note: the chip doesn't have auto-pad! */
       
  1716 	if (likely(len < TX_BUF_SIZE)) {
       
  1717 		if (len < ETH_ZLEN)
       
  1718 			memset(tp->tx_buf[entry], 0, ETH_ZLEN);
       
  1719 		skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
       
  1720 		dev_kfree_skb_any(skb);
       
  1721 	} else {
       
  1722 		dev_kfree_skb_any(skb);
       
  1723 		dev->stats.tx_dropped++;
       
  1724 		return NETDEV_TX_OK;
       
  1725 	}
       
  1726 
       
  1727 	spin_lock_irqsave(&tp->lock, flags);
       
  1728 	/*
       
  1729 	 * Writing to TxStatus triggers a DMA transfer of the data
       
  1730 	 * copied to tp->tx_buf[entry] above. Use a memory barrier
       
  1731 	 * to make sure that the device sees the updated data.
       
  1732 	 */
       
  1733 	wmb();
       
  1734 	RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
       
  1735 		   tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
       
  1736 
       
  1737 	tp->cur_tx++;
       
  1738 
       
  1739 	if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
       
  1740 		netif_stop_queue (dev);
       
  1741 	spin_unlock_irqrestore(&tp->lock, flags);
       
  1742 
       
  1743 	netif_dbg(tp, tx_queued, dev, "Queued Tx packet size %u to slot %d\n",
       
  1744 		  len, entry);
       
  1745 
       
  1746 	return NETDEV_TX_OK;
       
  1747 }
       
  1748 
       
  1749 
       
  1750 static void rtl8139_tx_interrupt (struct net_device *dev,
       
  1751 				  struct rtl8139_private *tp,
       
  1752 				  void __iomem *ioaddr)
       
  1753 {
       
  1754 	unsigned long dirty_tx, tx_left;
       
  1755 
       
  1756 	assert (dev != NULL);
       
  1757 	assert (ioaddr != NULL);
       
  1758 
       
  1759 	dirty_tx = tp->dirty_tx;
       
  1760 	tx_left = tp->cur_tx - dirty_tx;
       
  1761 	while (tx_left > 0) {
       
  1762 		int entry = dirty_tx % NUM_TX_DESC;
       
  1763 		int txstatus;
       
  1764 
       
  1765 		txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
       
  1766 
       
  1767 		if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
       
  1768 			break;	/* It still hasn't been Txed */
       
  1769 
       
  1770 		/* Note: TxCarrierLost is always asserted at 100mbps. */
       
  1771 		if (txstatus & (TxOutOfWindow | TxAborted)) {
       
  1772 			/* There was an major error, log it. */
       
  1773 			netif_dbg(tp, tx_err, dev, "Transmit error, Tx status %08x\n",
       
  1774 				  txstatus);
       
  1775 			dev->stats.tx_errors++;
       
  1776 			if (txstatus & TxAborted) {
       
  1777 				dev->stats.tx_aborted_errors++;
       
  1778 				RTL_W32 (TxConfig, TxClearAbt);
       
  1779 				RTL_W16 (IntrStatus, TxErr);
       
  1780 				wmb();
       
  1781 			}
       
  1782 			if (txstatus & TxCarrierLost)
       
  1783 				dev->stats.tx_carrier_errors++;
       
  1784 			if (txstatus & TxOutOfWindow)
       
  1785 				dev->stats.tx_window_errors++;
       
  1786 		} else {
       
  1787 			if (txstatus & TxUnderrun) {
       
  1788 				/* Add 64 to the Tx FIFO threshold. */
       
  1789 				if (tp->tx_flag < 0x00300000)
       
  1790 					tp->tx_flag += 0x00020000;
       
  1791 				dev->stats.tx_fifo_errors++;
       
  1792 			}
       
  1793 			dev->stats.collisions += (txstatus >> 24) & 15;
       
  1794 			u64_stats_update_begin(&tp->tx_stats.syncp);
       
  1795 			tp->tx_stats.packets++;
       
  1796 			tp->tx_stats.bytes += txstatus & 0x7ff;
       
  1797 			u64_stats_update_end(&tp->tx_stats.syncp);
       
  1798 		}
       
  1799 
       
  1800 		dirty_tx++;
       
  1801 		tx_left--;
       
  1802 	}
       
  1803 
       
  1804 #ifndef RTL8139_NDEBUG
       
  1805 	if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
       
  1806 		netdev_err(dev, "Out-of-sync dirty pointer, %ld vs. %ld\n",
       
  1807 			   dirty_tx, tp->cur_tx);
       
  1808 		dirty_tx += NUM_TX_DESC;
       
  1809 	}
       
  1810 #endif /* RTL8139_NDEBUG */
       
  1811 
       
  1812 	/* only wake the queue if we did work, and the queue is stopped */
       
  1813 	if (tp->dirty_tx != dirty_tx) {
       
  1814 		tp->dirty_tx = dirty_tx;
       
  1815 		mb();
       
  1816 		netif_wake_queue (dev);
       
  1817 	}
       
  1818 }
       
  1819 
       
  1820 
       
  1821 /* TODO: clean this up!  Rx reset need not be this intensive */
       
  1822 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
       
  1823 			    struct rtl8139_private *tp, void __iomem *ioaddr)
       
  1824 {
       
  1825 	u8 tmp8;
       
  1826 #ifdef CONFIG_8139_OLD_RX_RESET
       
  1827 	int tmp_work;
       
  1828 #endif
       
  1829 
       
  1830 	netif_dbg(tp, rx_err, dev, "Ethernet frame had errors, status %08x\n",
       
  1831 		  rx_status);
       
  1832 	dev->stats.rx_errors++;
       
  1833 	if (!(rx_status & RxStatusOK)) {
       
  1834 		if (rx_status & RxTooLong) {
       
  1835 			netdev_dbg(dev, "Oversized Ethernet frame, status %04x!\n",
       
  1836 				   rx_status);
       
  1837 			/* A.C.: The chip hangs here. */
       
  1838 		}
       
  1839 		if (rx_status & (RxBadSymbol | RxBadAlign))
       
  1840 			dev->stats.rx_frame_errors++;
       
  1841 		if (rx_status & (RxRunt | RxTooLong))
       
  1842 			dev->stats.rx_length_errors++;
       
  1843 		if (rx_status & RxCRCErr)
       
  1844 			dev->stats.rx_crc_errors++;
       
  1845 	} else {
       
  1846 		tp->xstats.rx_lost_in_ring++;
       
  1847 	}
       
  1848 
       
  1849 #ifndef CONFIG_8139_OLD_RX_RESET
       
  1850 	tmp8 = RTL_R8 (ChipCmd);
       
  1851 	RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
       
  1852 	RTL_W8 (ChipCmd, tmp8);
       
  1853 	RTL_W32 (RxConfig, tp->rx_config);
       
  1854 	tp->cur_rx = 0;
       
  1855 #else
       
  1856 	/* Reset the receiver, based on RealTek recommendation. (Bug?) */
       
  1857 
       
  1858 	/* disable receive */
       
  1859 	RTL_W8_F (ChipCmd, CmdTxEnb);
       
  1860 	tmp_work = 200;
       
  1861 	while (--tmp_work > 0) {
       
  1862 		udelay(1);
       
  1863 		tmp8 = RTL_R8 (ChipCmd);
       
  1864 		if (!(tmp8 & CmdRxEnb))
       
  1865 			break;
       
  1866 	}
       
  1867 	if (tmp_work <= 0)
       
  1868 		netdev_warn(dev, "rx stop wait too long\n");
       
  1869 	/* restart receive */
       
  1870 	tmp_work = 200;
       
  1871 	while (--tmp_work > 0) {
       
  1872 		RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1873 		udelay(1);
       
  1874 		tmp8 = RTL_R8 (ChipCmd);
       
  1875 		if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
       
  1876 			break;
       
  1877 	}
       
  1878 	if (tmp_work <= 0)
       
  1879 		netdev_warn(dev, "tx/rx enable wait too long\n");
       
  1880 
       
  1881 	/* and reinitialize all rx related registers */
       
  1882 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1883 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1884 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1885 
       
  1886 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1887 	RTL_W32 (RxConfig, tp->rx_config);
       
  1888 	tp->cur_rx = 0;
       
  1889 
       
  1890 	netdev_dbg(dev, "init buffer addresses\n");
       
  1891 
       
  1892 	/* Lock Config[01234] and BMCR register writes */
       
  1893 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1894 
       
  1895 	/* init Rx ring buffer DMA address */
       
  1896 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1897 
       
  1898 	/* A.C.: Reset the multicast list. */
       
  1899 	__set_rx_mode (dev);
       
  1900 #endif
       
  1901 }
       
  1902 
       
  1903 #if RX_BUF_IDX == 3
       
  1904 static inline void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
       
  1905 				 u32 offset, unsigned int size)
       
  1906 {
       
  1907 	u32 left = RX_BUF_LEN - offset;
       
  1908 
       
  1909 	if (size > left) {
       
  1910 		skb_copy_to_linear_data(skb, ring + offset, left);
       
  1911 		skb_copy_to_linear_data_offset(skb, left, ring, size - left);
       
  1912 	} else
       
  1913 		skb_copy_to_linear_data(skb, ring + offset, size);
       
  1914 }
       
  1915 #endif
       
  1916 
       
  1917 static void rtl8139_isr_ack(struct rtl8139_private *tp)
       
  1918 {
       
  1919 	void __iomem *ioaddr = tp->mmio_addr;
       
  1920 	u16 status;
       
  1921 
       
  1922 	status = RTL_R16 (IntrStatus) & RxAckBits;
       
  1923 
       
  1924 	/* Clear out errors and receive interrupts */
       
  1925 	if (likely(status != 0)) {
       
  1926 		if (unlikely(status & (RxFIFOOver | RxOverflow))) {
       
  1927 			tp->dev->stats.rx_errors++;
       
  1928 			if (status & RxFIFOOver)
       
  1929 				tp->dev->stats.rx_fifo_errors++;
       
  1930 		}
       
  1931 		RTL_W16_F (IntrStatus, RxAckBits);
       
  1932 	}
       
  1933 }
       
  1934 
       
  1935 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
       
  1936 		      int budget)
       
  1937 {
       
  1938 	void __iomem *ioaddr = tp->mmio_addr;
       
  1939 	int received = 0;
       
  1940 	unsigned char *rx_ring = tp->rx_ring;
       
  1941 	unsigned int cur_rx = tp->cur_rx;
       
  1942 	unsigned int rx_size = 0;
       
  1943 
       
  1944 	netdev_dbg(dev, "In %s(), current %04x BufAddr %04x, free to %04x, Cmd %02x\n",
       
  1945 		   __func__, (u16)cur_rx,
       
  1946 		   RTL_R16(RxBufAddr), RTL_R16(RxBufPtr), RTL_R8(ChipCmd));
       
  1947 
       
  1948 	while (netif_running(dev) && received < budget &&
       
  1949 	       (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
       
  1950 		u32 ring_offset = cur_rx % RX_BUF_LEN;
       
  1951 		u32 rx_status;
       
  1952 		unsigned int pkt_size;
       
  1953 		struct sk_buff *skb;
       
  1954 
       
  1955 		rmb();
       
  1956 
       
  1957 		/* read size+status of next frame from DMA ring buffer */
       
  1958 		rx_status = le32_to_cpu (*(__le32 *) (rx_ring + ring_offset));
       
  1959 		rx_size = rx_status >> 16;
       
  1960 		if (likely(!(dev->features & NETIF_F_RXFCS)))
       
  1961 			pkt_size = rx_size - 4;
       
  1962 		else
       
  1963 			pkt_size = rx_size;
       
  1964 
       
  1965 		netif_dbg(tp, rx_status, dev, "%s() status %04x, size %04x, cur %04x\n",
       
  1966 			  __func__, rx_status, rx_size, cur_rx);
       
  1967 #if RTL8139_DEBUG > 2
       
  1968 		print_hex_dump(KERN_DEBUG, "Frame contents: ",
       
  1969 			       DUMP_PREFIX_OFFSET, 16, 1,
       
  1970 			       &rx_ring[ring_offset], 70, true);
       
  1971 #endif
       
  1972 
       
  1973 		/* Packet copy from FIFO still in progress.
       
  1974 		 * Theoretically, this should never happen
       
  1975 		 * since EarlyRx is disabled.
       
  1976 		 */
       
  1977 		if (unlikely(rx_size == 0xfff0)) {
       
  1978 			if (!tp->fifo_copy_timeout)
       
  1979 				tp->fifo_copy_timeout = jiffies + 2;
       
  1980 			else if (time_after(jiffies, tp->fifo_copy_timeout)) {
       
  1981 				netdev_dbg(dev, "hung FIFO. Reset\n");
       
  1982 				rx_size = 0;
       
  1983 				goto no_early_rx;
       
  1984 			}
       
  1985 			netif_dbg(tp, intr, dev, "fifo copy in progress\n");
       
  1986 			tp->xstats.early_rx++;
       
  1987 			break;
       
  1988 		}
       
  1989 
       
  1990 no_early_rx:
       
  1991 		tp->fifo_copy_timeout = 0;
       
  1992 
       
  1993 		/* If Rx err or invalid rx_size/rx_status received
       
  1994 		 * (which happens if we get lost in the ring),
       
  1995 		 * Rx process gets reset, so we abort any further
       
  1996 		 * Rx processing.
       
  1997 		 */
       
  1998 		if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
       
  1999 			     (rx_size < 8) ||
       
  2000 			     (!(rx_status & RxStatusOK)))) {
       
  2001 			if ((dev->features & NETIF_F_RXALL) &&
       
  2002 			    (rx_size <= (MAX_ETH_FRAME_SIZE + 4)) &&
       
  2003 			    (rx_size >= 8) &&
       
  2004 			    (!(rx_status & RxStatusOK))) {
       
  2005 				/* Length is at least mostly OK, but pkt has
       
  2006 				 * error.  I'm hoping we can handle some of these
       
  2007 				 * errors without resetting the chip. --Ben
       
  2008 				 */
       
  2009 				dev->stats.rx_errors++;
       
  2010 				if (rx_status & RxCRCErr) {
       
  2011 					dev->stats.rx_crc_errors++;
       
  2012 					goto keep_pkt;
       
  2013 				}
       
  2014 				if (rx_status & RxRunt) {
       
  2015 					dev->stats.rx_length_errors++;
       
  2016 					goto keep_pkt;
       
  2017 				}
       
  2018 			}
       
  2019 			rtl8139_rx_err (rx_status, dev, tp, ioaddr);
       
  2020 			received = -1;
       
  2021 			goto out;
       
  2022 		}
       
  2023 
       
  2024 keep_pkt:
       
  2025 		/* Malloc up new buffer, compatible with net-2e. */
       
  2026 		/* Omit the four octet CRC from the length. */
       
  2027 
       
  2028 		skb = netdev_alloc_skb_ip_align(dev, pkt_size);
       
  2029 		if (likely(skb)) {
       
  2030 #if RX_BUF_IDX == 3
       
  2031 			wrap_copy(skb, rx_ring, ring_offset+4, pkt_size);
       
  2032 #else
       
  2033 			skb_copy_to_linear_data (skb, &rx_ring[ring_offset + 4], pkt_size);
       
  2034 #endif
       
  2035 			skb_put (skb, pkt_size);
       
  2036 
       
  2037 			skb->protocol = eth_type_trans (skb, dev);
       
  2038 
       
  2039 			u64_stats_update_begin(&tp->rx_stats.syncp);
       
  2040 			tp->rx_stats.packets++;
       
  2041 			tp->rx_stats.bytes += pkt_size;
       
  2042 			u64_stats_update_end(&tp->rx_stats.syncp);
       
  2043 
       
  2044 			netif_receive_skb (skb);
       
  2045 		} else {
       
  2046 			dev->stats.rx_dropped++;
       
  2047 		}
       
  2048 		received++;
       
  2049 
       
  2050 		cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
       
  2051 		RTL_W16 (RxBufPtr, (u16) (cur_rx - 16));
       
  2052 
       
  2053 		rtl8139_isr_ack(tp);
       
  2054 	}
       
  2055 
       
  2056 	if (unlikely(!received || rx_size == 0xfff0))
       
  2057 		rtl8139_isr_ack(tp);
       
  2058 
       
  2059 	netdev_dbg(dev, "Done %s(), current %04x BufAddr %04x, free to %04x, Cmd %02x\n",
       
  2060 		   __func__, cur_rx,
       
  2061 		   RTL_R16(RxBufAddr), RTL_R16(RxBufPtr), RTL_R8(ChipCmd));
       
  2062 
       
  2063 	tp->cur_rx = cur_rx;
       
  2064 
       
  2065 	/*
       
  2066 	 * The receive buffer should be mostly empty.
       
  2067 	 * Tell NAPI to reenable the Rx irq.
       
  2068 	 */
       
  2069 	if (tp->fifo_copy_timeout)
       
  2070 		received = budget;
       
  2071 
       
  2072 out:
       
  2073 	return received;
       
  2074 }
       
  2075 
       
  2076 
       
  2077 static void rtl8139_weird_interrupt (struct net_device *dev,
       
  2078 				     struct rtl8139_private *tp,
       
  2079 				     void __iomem *ioaddr,
       
  2080 				     int status, int link_changed)
       
  2081 {
       
  2082 	netdev_dbg(dev, "Abnormal interrupt, status %08x\n", status);
       
  2083 
       
  2084 	assert (dev != NULL);
       
  2085 	assert (tp != NULL);
       
  2086 	assert (ioaddr != NULL);
       
  2087 
       
  2088 	/* Update the error count. */
       
  2089 	dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2090 	RTL_W32 (RxMissed, 0);
       
  2091 
       
  2092 	if ((status & RxUnderrun) && link_changed &&
       
  2093 	    (tp->drv_flags & HAS_LNK_CHNG)) {
       
  2094 		rtl_check_media(dev, 0);
       
  2095 		status &= ~RxUnderrun;
       
  2096 	}
       
  2097 
       
  2098 	if (status & (RxUnderrun | RxErr))
       
  2099 		dev->stats.rx_errors++;
       
  2100 
       
  2101 	if (status & PCSTimeout)
       
  2102 		dev->stats.rx_length_errors++;
       
  2103 	if (status & RxUnderrun)
       
  2104 		dev->stats.rx_fifo_errors++;
       
  2105 	if (status & PCIErr) {
       
  2106 		u16 pci_cmd_status;
       
  2107 		pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
       
  2108 		pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
       
  2109 
       
  2110 		netdev_err(dev, "PCI Bus error %04x\n", pci_cmd_status);
       
  2111 	}
       
  2112 }
       
  2113 
       
  2114 static int rtl8139_poll(struct napi_struct *napi, int budget)
       
  2115 {
       
  2116 	struct rtl8139_private *tp = container_of(napi, struct rtl8139_private, napi);
       
  2117 	struct net_device *dev = tp->dev;
       
  2118 	void __iomem *ioaddr = tp->mmio_addr;
       
  2119 	int work_done;
       
  2120 
       
  2121 	spin_lock(&tp->rx_lock);
       
  2122 	work_done = 0;
       
  2123 	if (likely(RTL_R16(IntrStatus) & RxAckBits))
       
  2124 		work_done += rtl8139_rx(dev, tp, budget);
       
  2125 
       
  2126 	if (work_done < budget) {
       
  2127 		unsigned long flags;
       
  2128 		/*
       
  2129 		 * Order is important since data can get interrupted
       
  2130 		 * again when we think we are done.
       
  2131 		 */
       
  2132 		spin_lock_irqsave(&tp->lock, flags);
       
  2133 		__napi_complete(napi);
       
  2134 		RTL_W16_F(IntrMask, rtl8139_intr_mask);
       
  2135 		spin_unlock_irqrestore(&tp->lock, flags);
       
  2136 	}
       
  2137 	spin_unlock(&tp->rx_lock);
       
  2138 
       
  2139 	return work_done;
       
  2140 }
       
  2141 
       
  2142 /* The interrupt handler does all of the Rx thread work and cleans up
       
  2143    after the Tx thread. */
       
  2144 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance)
       
  2145 {
       
  2146 	struct net_device *dev = (struct net_device *) dev_instance;
       
  2147 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2148 	void __iomem *ioaddr = tp->mmio_addr;
       
  2149 	u16 status, ackstat;
       
  2150 	int link_changed = 0; /* avoid bogus "uninit" warning */
       
  2151 	int handled = 0;
       
  2152 
       
  2153 	spin_lock (&tp->lock);
       
  2154 	status = RTL_R16 (IntrStatus);
       
  2155 
       
  2156 	/* shared irq? */
       
  2157 	if (unlikely((status & rtl8139_intr_mask) == 0))
       
  2158 		goto out;
       
  2159 
       
  2160 	handled = 1;
       
  2161 
       
  2162 	/* h/w no longer present (hotplug?) or major error, bail */
       
  2163 	if (unlikely(status == 0xFFFF))
       
  2164 		goto out;
       
  2165 
       
  2166 	/* close possible race's with dev_close */
       
  2167 	if (unlikely(!netif_running(dev))) {
       
  2168 		RTL_W16 (IntrMask, 0);
       
  2169 		goto out;
       
  2170 	}
       
  2171 
       
  2172 	/* Acknowledge all of the current interrupt sources ASAP, but
       
  2173 	   an first get an additional status bit from CSCR. */
       
  2174 	if (unlikely(status & RxUnderrun))
       
  2175 		link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
       
  2176 
       
  2177 	ackstat = status & ~(RxAckBits | TxErr);
       
  2178 	if (ackstat)
       
  2179 		RTL_W16 (IntrStatus, ackstat);
       
  2180 
       
  2181 	/* Receive packets are processed by poll routine.
       
  2182 	   If not running start it now. */
       
  2183 	if (status & RxAckBits){
       
  2184 		if (napi_schedule_prep(&tp->napi)) {
       
  2185 			RTL_W16_F (IntrMask, rtl8139_norx_intr_mask);
       
  2186 			__napi_schedule(&tp->napi);
       
  2187 		}
       
  2188 	}
       
  2189 
       
  2190 	/* Check uncommon events with one test. */
       
  2191 	if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr)))
       
  2192 		rtl8139_weird_interrupt (dev, tp, ioaddr,
       
  2193 					 status, link_changed);
       
  2194 
       
  2195 	if (status & (TxOK | TxErr)) {
       
  2196 		rtl8139_tx_interrupt (dev, tp, ioaddr);
       
  2197 		if (status & TxErr)
       
  2198 			RTL_W16 (IntrStatus, TxErr);
       
  2199 	}
       
  2200  out:
       
  2201 	spin_unlock (&tp->lock);
       
  2202 
       
  2203 	netdev_dbg(dev, "exiting interrupt, intr_status=%#4.4x\n",
       
  2204 		   RTL_R16(IntrStatus));
       
  2205 	return IRQ_RETVAL(handled);
       
  2206 }
       
  2207 
       
  2208 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  2209 /*
       
  2210  * Polling receive - used by netconsole and other diagnostic tools
       
  2211  * to allow network i/o with interrupts disabled.
       
  2212  */
       
  2213 static void rtl8139_poll_controller(struct net_device *dev)
       
  2214 {
       
  2215 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2216 	const int irq = tp->pci_dev->irq;
       
  2217 
       
  2218 	disable_irq(irq);
       
  2219 	rtl8139_interrupt(irq, dev);
       
  2220 	enable_irq(irq);
       
  2221 }
       
  2222 #endif
       
  2223 
       
  2224 static int rtl8139_set_mac_address(struct net_device *dev, void *p)
       
  2225 {
       
  2226 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2227 	void __iomem *ioaddr = tp->mmio_addr;
       
  2228 	struct sockaddr *addr = p;
       
  2229 
       
  2230 	if (!is_valid_ether_addr(addr->sa_data))
       
  2231 		return -EADDRNOTAVAIL;
       
  2232 
       
  2233 	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
       
  2234 
       
  2235 	spin_lock_irq(&tp->lock);
       
  2236 
       
  2237 	RTL_W8_F(Cfg9346, Cfg9346_Unlock);
       
  2238 	RTL_W32_F(MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
       
  2239 	RTL_W32_F(MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
       
  2240 	RTL_W8_F(Cfg9346, Cfg9346_Lock);
       
  2241 
       
  2242 	spin_unlock_irq(&tp->lock);
       
  2243 
       
  2244 	return 0;
       
  2245 }
       
  2246 
       
  2247 static int rtl8139_close (struct net_device *dev)
       
  2248 {
       
  2249 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2250 	void __iomem *ioaddr = tp->mmio_addr;
       
  2251 	unsigned long flags;
       
  2252 
       
  2253 	netif_stop_queue(dev);
       
  2254 	napi_disable(&tp->napi);
       
  2255 
       
  2256 	netif_dbg(tp, ifdown, dev, "Shutting down ethercard, status was 0x%04x\n",
       
  2257 		  RTL_R16(IntrStatus));
       
  2258 
       
  2259 	spin_lock_irqsave (&tp->lock, flags);
       
  2260 
       
  2261 	/* Stop the chip's Tx and Rx DMA processes. */
       
  2262 	RTL_W8 (ChipCmd, 0);
       
  2263 
       
  2264 	/* Disable interrupts by clearing the interrupt mask. */
       
  2265 	RTL_W16 (IntrMask, 0);
       
  2266 
       
  2267 	/* Update the error counts. */
       
  2268 	dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2269 	RTL_W32 (RxMissed, 0);
       
  2270 
       
  2271 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2272 
       
  2273 	free_irq(tp->pci_dev->irq, dev);
       
  2274 
       
  2275 	rtl8139_tx_clear (tp);
       
  2276 
       
  2277 	dma_free_coherent(&tp->pci_dev->dev, RX_BUF_TOT_LEN,
       
  2278 			  tp->rx_ring, tp->rx_ring_dma);
       
  2279 	dma_free_coherent(&tp->pci_dev->dev, TX_BUF_TOT_LEN,
       
  2280 			  tp->tx_bufs, tp->tx_bufs_dma);
       
  2281 	tp->rx_ring = NULL;
       
  2282 	tp->tx_bufs = NULL;
       
  2283 
       
  2284 	/* Green! Put the chip in low-power mode. */
       
  2285 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2286 
       
  2287 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  2288 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  2289 
       
  2290 	return 0;
       
  2291 }
       
  2292 
       
  2293 
       
  2294 /* Get the ethtool Wake-on-LAN settings.  Assumes that wol points to
       
  2295    kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
       
  2296    other threads or interrupts aren't messing with the 8139.  */
       
  2297 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2298 {
       
  2299 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2300 	void __iomem *ioaddr = tp->mmio_addr;
       
  2301 
       
  2302 	spin_lock_irq(&tp->lock);
       
  2303 	if (rtl_chip_info[tp->chipset].flags & HasLWake) {
       
  2304 		u8 cfg3 = RTL_R8 (Config3);
       
  2305 		u8 cfg5 = RTL_R8 (Config5);
       
  2306 
       
  2307 		wol->supported = WAKE_PHY | WAKE_MAGIC
       
  2308 			| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
       
  2309 
       
  2310 		wol->wolopts = 0;
       
  2311 		if (cfg3 & Cfg3_LinkUp)
       
  2312 			wol->wolopts |= WAKE_PHY;
       
  2313 		if (cfg3 & Cfg3_Magic)
       
  2314 			wol->wolopts |= WAKE_MAGIC;
       
  2315 		/* (KON)FIXME: See how netdev_set_wol() handles the
       
  2316 		   following constants.  */
       
  2317 		if (cfg5 & Cfg5_UWF)
       
  2318 			wol->wolopts |= WAKE_UCAST;
       
  2319 		if (cfg5 & Cfg5_MWF)
       
  2320 			wol->wolopts |= WAKE_MCAST;
       
  2321 		if (cfg5 & Cfg5_BWF)
       
  2322 			wol->wolopts |= WAKE_BCAST;
       
  2323 	}
       
  2324 	spin_unlock_irq(&tp->lock);
       
  2325 }
       
  2326 
       
  2327 
       
  2328 /* Set the ethtool Wake-on-LAN settings.  Return 0 or -errno.  Assumes
       
  2329    that wol points to kernel memory and other threads or interrupts
       
  2330    aren't messing with the 8139.  */
       
  2331 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2332 {
       
  2333 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2334 	void __iomem *ioaddr = tp->mmio_addr;
       
  2335 	u32 support;
       
  2336 	u8 cfg3, cfg5;
       
  2337 
       
  2338 	support = ((rtl_chip_info[tp->chipset].flags & HasLWake)
       
  2339 		   ? (WAKE_PHY | WAKE_MAGIC
       
  2340 		      | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
       
  2341 		   : 0);
       
  2342 	if (wol->wolopts & ~support)
       
  2343 		return -EINVAL;
       
  2344 
       
  2345 	spin_lock_irq(&tp->lock);
       
  2346 	cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
       
  2347 	if (wol->wolopts & WAKE_PHY)
       
  2348 		cfg3 |= Cfg3_LinkUp;
       
  2349 	if (wol->wolopts & WAKE_MAGIC)
       
  2350 		cfg3 |= Cfg3_Magic;
       
  2351 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2352 	RTL_W8 (Config3, cfg3);
       
  2353 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  2354 
       
  2355 	cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
       
  2356 	/* (KON)FIXME: These are untested.  We may have to set the
       
  2357 	   CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
       
  2358 	   documentation.  */
       
  2359 	if (wol->wolopts & WAKE_UCAST)
       
  2360 		cfg5 |= Cfg5_UWF;
       
  2361 	if (wol->wolopts & WAKE_MCAST)
       
  2362 		cfg5 |= Cfg5_MWF;
       
  2363 	if (wol->wolopts & WAKE_BCAST)
       
  2364 		cfg5 |= Cfg5_BWF;
       
  2365 	RTL_W8 (Config5, cfg5);	/* need not unlock via Cfg9346 */
       
  2366 	spin_unlock_irq(&tp->lock);
       
  2367 
       
  2368 	return 0;
       
  2369 }
       
  2370 
       
  2371 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
       
  2372 {
       
  2373 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2374 	strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
       
  2375 	strlcpy(info->version, DRV_VERSION, sizeof(info->version));
       
  2376 	strlcpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info));
       
  2377 	info->regdump_len = tp->regs_len;
       
  2378 }
       
  2379 
       
  2380 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2381 {
       
  2382 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2383 	spin_lock_irq(&tp->lock);
       
  2384 	mii_ethtool_gset(&tp->mii, cmd);
       
  2385 	spin_unlock_irq(&tp->lock);
       
  2386 	return 0;
       
  2387 }
       
  2388 
       
  2389 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2390 {
       
  2391 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2392 	int rc;
       
  2393 	spin_lock_irq(&tp->lock);
       
  2394 	rc = mii_ethtool_sset(&tp->mii, cmd);
       
  2395 	spin_unlock_irq(&tp->lock);
       
  2396 	return rc;
       
  2397 }
       
  2398 
       
  2399 static int rtl8139_nway_reset(struct net_device *dev)
       
  2400 {
       
  2401 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2402 	return mii_nway_restart(&tp->mii);
       
  2403 }
       
  2404 
       
  2405 static u32 rtl8139_get_link(struct net_device *dev)
       
  2406 {
       
  2407 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2408 	return mii_link_ok(&tp->mii);
       
  2409 }
       
  2410 
       
  2411 static u32 rtl8139_get_msglevel(struct net_device *dev)
       
  2412 {
       
  2413 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2414 	return tp->msg_enable;
       
  2415 }
       
  2416 
       
  2417 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
       
  2418 {
       
  2419 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2420 	tp->msg_enable = datum;
       
  2421 }
       
  2422 
       
  2423 static int rtl8139_get_regs_len(struct net_device *dev)
       
  2424 {
       
  2425 	struct rtl8139_private *tp;
       
  2426 	/* TODO: we are too slack to do reg dumping for pio, for now */
       
  2427 	if (use_io)
       
  2428 		return 0;
       
  2429 	tp = netdev_priv(dev);
       
  2430 	return tp->regs_len;
       
  2431 }
       
  2432 
       
  2433 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
       
  2434 {
       
  2435 	struct rtl8139_private *tp;
       
  2436 
       
  2437 	/* TODO: we are too slack to do reg dumping for pio, for now */
       
  2438 	if (use_io)
       
  2439 		return;
       
  2440 	tp = netdev_priv(dev);
       
  2441 
       
  2442 	regs->version = RTL_REGS_VER;
       
  2443 
       
  2444 	spin_lock_irq(&tp->lock);
       
  2445 	memcpy_fromio(regbuf, tp->mmio_addr, regs->len);
       
  2446 	spin_unlock_irq(&tp->lock);
       
  2447 }
       
  2448 
       
  2449 static int rtl8139_get_sset_count(struct net_device *dev, int sset)
       
  2450 {
       
  2451 	switch (sset) {
       
  2452 	case ETH_SS_STATS:
       
  2453 		return RTL_NUM_STATS;
       
  2454 	default:
       
  2455 		return -EOPNOTSUPP;
       
  2456 	}
       
  2457 }
       
  2458 
       
  2459 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
       
  2460 {
       
  2461 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2462 
       
  2463 	data[0] = tp->xstats.early_rx;
       
  2464 	data[1] = tp->xstats.tx_buf_mapped;
       
  2465 	data[2] = tp->xstats.tx_timeouts;
       
  2466 	data[3] = tp->xstats.rx_lost_in_ring;
       
  2467 }
       
  2468 
       
  2469 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
       
  2470 {
       
  2471 	memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
       
  2472 }
       
  2473 
       
  2474 static const struct ethtool_ops rtl8139_ethtool_ops = {
       
  2475 	.get_drvinfo		= rtl8139_get_drvinfo,
       
  2476 	.get_settings		= rtl8139_get_settings,
       
  2477 	.set_settings		= rtl8139_set_settings,
       
  2478 	.get_regs_len		= rtl8139_get_regs_len,
       
  2479 	.get_regs		= rtl8139_get_regs,
       
  2480 	.nway_reset		= rtl8139_nway_reset,
       
  2481 	.get_link		= rtl8139_get_link,
       
  2482 	.get_msglevel		= rtl8139_get_msglevel,
       
  2483 	.set_msglevel		= rtl8139_set_msglevel,
       
  2484 	.get_wol		= rtl8139_get_wol,
       
  2485 	.set_wol		= rtl8139_set_wol,
       
  2486 	.get_strings		= rtl8139_get_strings,
       
  2487 	.get_sset_count		= rtl8139_get_sset_count,
       
  2488 	.get_ethtool_stats	= rtl8139_get_ethtool_stats,
       
  2489 };
       
  2490 
       
  2491 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
       
  2492 {
       
  2493 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2494 	int rc;
       
  2495 
       
  2496 	if (!netif_running(dev))
       
  2497 		return -EINVAL;
       
  2498 
       
  2499 	spin_lock_irq(&tp->lock);
       
  2500 	rc = generic_mii_ioctl(&tp->mii, if_mii(rq), cmd, NULL);
       
  2501 	spin_unlock_irq(&tp->lock);
       
  2502 
       
  2503 	return rc;
       
  2504 }
       
  2505 
       
  2506 
       
  2507 static struct rtnl_link_stats64 *
       
  2508 rtl8139_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
       
  2509 {
       
  2510 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2511 	void __iomem *ioaddr = tp->mmio_addr;
       
  2512 	unsigned long flags;
       
  2513 	unsigned int start;
       
  2514 
       
  2515 	if (netif_running(dev)) {
       
  2516 		spin_lock_irqsave (&tp->lock, flags);
       
  2517 		dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2518 		RTL_W32 (RxMissed, 0);
       
  2519 		spin_unlock_irqrestore (&tp->lock, flags);
       
  2520 	}
       
  2521 
       
  2522 	netdev_stats_to_stats64(stats, &dev->stats);
       
  2523 
       
  2524 	do {
       
  2525 		start = u64_stats_fetch_begin_irq(&tp->rx_stats.syncp);
       
  2526 		stats->rx_packets = tp->rx_stats.packets;
       
  2527 		stats->rx_bytes = tp->rx_stats.bytes;
       
  2528 	} while (u64_stats_fetch_retry_irq(&tp->rx_stats.syncp, start));
       
  2529 
       
  2530 	do {
       
  2531 		start = u64_stats_fetch_begin_irq(&tp->tx_stats.syncp);
       
  2532 		stats->tx_packets = tp->tx_stats.packets;
       
  2533 		stats->tx_bytes = tp->tx_stats.bytes;
       
  2534 	} while (u64_stats_fetch_retry_irq(&tp->tx_stats.syncp, start));
       
  2535 
       
  2536 	return stats;
       
  2537 }
       
  2538 
       
  2539 /* Set or clear the multicast filter for this adaptor.
       
  2540    This routine is not state sensitive and need not be SMP locked. */
       
  2541 
       
  2542 static void __set_rx_mode (struct net_device *dev)
       
  2543 {
       
  2544 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2545 	void __iomem *ioaddr = tp->mmio_addr;
       
  2546 	u32 mc_filter[2];	/* Multicast hash filter */
       
  2547 	int rx_mode;
       
  2548 	u32 tmp;
       
  2549 
       
  2550 	netdev_dbg(dev, "rtl8139_set_rx_mode(%04x) done -- Rx config %08x\n",
       
  2551 		   dev->flags, RTL_R32(RxConfig));
       
  2552 
       
  2553 	/* Note: do not reorder, GCC is clever about common statements. */
       
  2554 	if (dev->flags & IFF_PROMISC) {
       
  2555 		rx_mode =
       
  2556 		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
       
  2557 		    AcceptAllPhys;
       
  2558 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2559 	} else if ((netdev_mc_count(dev) > multicast_filter_limit) ||
       
  2560 		   (dev->flags & IFF_ALLMULTI)) {
       
  2561 		/* Too many to filter perfectly -- accept all multicasts. */
       
  2562 		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
       
  2563 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2564 	} else {
       
  2565 		struct netdev_hw_addr *ha;
       
  2566 		rx_mode = AcceptBroadcast | AcceptMyPhys;
       
  2567 		mc_filter[1] = mc_filter[0] = 0;
       
  2568 		netdev_for_each_mc_addr(ha, dev) {
       
  2569 			int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
       
  2570 
       
  2571 			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
       
  2572 			rx_mode |= AcceptMulticast;
       
  2573 		}
       
  2574 	}
       
  2575 
       
  2576 	if (dev->features & NETIF_F_RXALL)
       
  2577 		rx_mode |= (AcceptErr | AcceptRunt);
       
  2578 
       
  2579 	/* We can safely update without stopping the chip. */
       
  2580 	tmp = rtl8139_rx_config | rx_mode;
       
  2581 	if (tp->rx_config != tmp) {
       
  2582 		RTL_W32_F (RxConfig, tmp);
       
  2583 		tp->rx_config = tmp;
       
  2584 	}
       
  2585 	RTL_W32_F (MAR0 + 0, mc_filter[0]);
       
  2586 	RTL_W32_F (MAR0 + 4, mc_filter[1]);
       
  2587 }
       
  2588 
       
  2589 static void rtl8139_set_rx_mode (struct net_device *dev)
       
  2590 {
       
  2591 	unsigned long flags;
       
  2592 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2593 
       
  2594 	spin_lock_irqsave (&tp->lock, flags);
       
  2595 	__set_rx_mode(dev);
       
  2596 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2597 }
       
  2598 
       
  2599 #ifdef CONFIG_PM
       
  2600 
       
  2601 static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state)
       
  2602 {
       
  2603 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2604 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2605 	void __iomem *ioaddr = tp->mmio_addr;
       
  2606 	unsigned long flags;
       
  2607 
       
  2608 	pci_save_state (pdev);
       
  2609 
       
  2610 	if (!netif_running (dev))
       
  2611 		return 0;
       
  2612 
       
  2613 	netif_device_detach (dev);
       
  2614 
       
  2615 	spin_lock_irqsave (&tp->lock, flags);
       
  2616 
       
  2617 	/* Disable interrupts, stop Tx and Rx. */
       
  2618 	RTL_W16 (IntrMask, 0);
       
  2619 	RTL_W8 (ChipCmd, 0);
       
  2620 
       
  2621 	/* Update the error counts. */
       
  2622 	dev->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2623 	RTL_W32 (RxMissed, 0);
       
  2624 
       
  2625 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2626 
       
  2627 	pci_set_power_state (pdev, PCI_D3hot);
       
  2628 
       
  2629 	return 0;
       
  2630 }
       
  2631 
       
  2632 
       
  2633 static int rtl8139_resume (struct pci_dev *pdev)
       
  2634 {
       
  2635 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2636 
       
  2637 	pci_restore_state (pdev);
       
  2638 	if (!netif_running (dev))
       
  2639 		return 0;
       
  2640 	pci_set_power_state (pdev, PCI_D0);
       
  2641 	rtl8139_init_ring (dev);
       
  2642 	rtl8139_hw_start (dev);
       
  2643 	netif_device_attach (dev);
       
  2644 	return 0;
       
  2645 }
       
  2646 
       
  2647 #endif /* CONFIG_PM */
       
  2648 
       
  2649 
       
  2650 static struct pci_driver rtl8139_pci_driver = {
       
  2651 	.name		= DRV_NAME,
       
  2652 	.id_table	= rtl8139_pci_tbl,
       
  2653 	.probe		= rtl8139_init_one,
       
  2654 	.remove		= rtl8139_remove_one,
       
  2655 #ifdef CONFIG_PM
       
  2656 	.suspend	= rtl8139_suspend,
       
  2657 	.resume		= rtl8139_resume,
       
  2658 #endif /* CONFIG_PM */
       
  2659 };
       
  2660 
       
  2661 
       
  2662 static int __init rtl8139_init_module (void)
       
  2663 {
       
  2664 	/* when we're a module, we always print a version message,
       
  2665 	 * even if no 8139 board is found.
       
  2666 	 */
       
  2667 #ifdef MODULE
       
  2668 	pr_info(RTL8139_DRIVER_NAME "\n");
       
  2669 #endif
       
  2670 
       
  2671 	return pci_register_driver(&rtl8139_pci_driver);
       
  2672 }
       
  2673 
       
  2674 
       
  2675 static void __exit rtl8139_cleanup_module (void)
       
  2676 {
       
  2677 	pci_unregister_driver (&rtl8139_pci_driver);
       
  2678 }
       
  2679 
       
  2680 
       
  2681 module_init(rtl8139_init_module);
       
  2682 module_exit(rtl8139_cleanup_module);