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1 /****************************************************************************** |
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2 * |
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3 * drv_8139too.c |
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4 * |
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5 * EtherCAT-Treiber für RTL8139-kompatible Netzwerkkarten. |
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6 * |
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7 * Autoren: Wilhelm Hagemeister, Florian Pose |
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8 * |
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9 * $Date$ |
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10 * $Author$ |
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11 * |
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12 * (C) Copyright IgH 2005 |
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13 * Ingenieurgemeinschaft IgH |
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14 * Heinz-Bäcker Str. 34 |
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15 * D-45356 Essen |
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16 * Tel.: +49 201/61 99 31 |
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17 * Fax.: +49 201/61 98 36 |
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18 * E-mail: sp@igh-essen.com |
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19 * |
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20 ******************************************************************************/ |
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21 |
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22 /* |
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23 8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux. |
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24 |
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25 Maintained by Jeff Garzik <jgarzik@pobox.com> |
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26 Copyright 2000-2002 Jeff Garzik |
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27 |
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28 Much code comes from Donald Becker's rtl8139.c driver, |
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29 versions 1.13 and older. This driver was originally based |
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30 on rtl8139.c version 1.07. Header of rtl8139.c version 1.13: |
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31 |
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32 -----<snip>----- |
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33 |
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34 Written 1997-2001 by Donald Becker. |
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35 This software may be used and distributed according to the |
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36 terms of the GNU General Public License (GPL), incorporated |
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37 herein by reference. Drivers based on or derived from this |
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38 code fall under the GPL and must retain the authorship, |
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39 copyright and license notice. This file is not a complete |
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40 program and may only be used when the entire operating |
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41 system is licensed under the GPL. |
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42 |
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43 This driver is for boards based on the RTL8129 and RTL8139 |
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44 PCI ethernet chips. |
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45 |
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46 The author may be reached as becker@scyld.com, or C/O Scyld |
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47 Computing Corporation 410 Severn Ave., Suite 210 Annapolis |
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48 MD 21403 |
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49 |
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50 Support and updates available at |
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51 http://www.scyld.com/network/rtl8139.html |
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52 |
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53 Twister-tuning table provided by Kinston |
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54 <shangh@realtek.com.tw>. |
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55 |
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56 -----<snip>----- |
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57 |
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58 This software may be used and distributed according to the terms |
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59 of the GNU General Public License, incorporated herein by reference. |
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60 |
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61 Contributors: |
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62 |
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63 Donald Becker - he wrote the original driver, kudos to him! |
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64 (but please don't e-mail him for support, this isn't his driver) |
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65 |
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66 Tigran Aivazian - bug fixes, skbuff free cleanup |
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67 |
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68 Martin Mares - suggestions for PCI cleanup |
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69 |
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70 David S. Miller - PCI DMA and softnet updates |
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71 |
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72 Ernst Gill - fixes ported from BSD driver |
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73 |
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74 Daniel Kobras - identified specific locations of |
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75 posted MMIO write bugginess |
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76 |
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77 Gerard Sharp - bug fix, testing and feedback |
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78 |
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79 David Ford - Rx ring wrap fix |
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80 |
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81 Dan DeMaggio - swapped RTL8139 cards with me, and allowed me |
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82 to find and fix a crucial bug on older chipsets. |
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83 |
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84 Donald Becker/Chris Butterworth/Marcus Westergren - |
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85 Noticed various Rx packet size-related buglets. |
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86 |
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87 Santiago Garcia Mantinan - testing and feedback |
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88 |
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89 Jens David - 2.2.x kernel backports |
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90 |
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91 Martin Dennett - incredibly helpful insight on undocumented |
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92 features of the 8139 chips |
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93 |
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94 Jean-Jacques Michel - bug fix |
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95 |
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96 Tobias Ringström - Rx interrupt status checking suggestion |
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97 |
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98 Andrew Morton - Clear blocked signals, avoid |
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99 buffer overrun setting current->comm. |
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100 |
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101 Kalle Olavi Niemitalo - Wake-on-LAN ioctls |
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102 |
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103 Robert Kuebel - Save kernel thread from dying on any signal. |
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104 |
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105 Submitting bug reports: |
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106 |
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107 "rtl8139-diag -mmmaaavvveefN" output |
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108 enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log |
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109 |
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110 */ |
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111 |
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112 #define DRV_NAME "8139too_ec" |
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113 #define DRV_VERSION "0.9.27" |
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114 |
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115 |
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116 #include <linux/config.h> |
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117 #include <linux/module.h> |
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118 #include <linux/kernel.h> |
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119 #include <linux/compiler.h> |
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120 #include <linux/pci.h> |
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121 #include <linux/init.h> |
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122 #include <linux/ioport.h> |
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123 #include <linux/netdevice.h> |
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124 #include <linux/etherdevice.h> |
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125 #include <linux/rtnetlink.h> |
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126 #include <linux/delay.h> |
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127 #include <linux/ethtool.h> |
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128 #include <linux/mii.h> |
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129 #include <linux/completion.h> |
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130 #include <linux/crc32.h> |
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131 #include <asm/io.h> |
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132 #include <asm/uaccess.h> |
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133 #include <asm/irq.h> |
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134 |
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135 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
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136 |
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137 #include "../include/EtherCAT_dev.h" |
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138 |
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139 #define LIT(X) #X |
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140 #define STR(X) LIT(X) |
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141 |
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142 #define COMPILE_INFO "Revision " STR(EC_REV) \ |
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143 ", compiled by " STR(EC_USER) \ |
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144 " at " STR(EC_DATE) |
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145 |
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146 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
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147 |
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148 #define RTL8139_DRIVER_NAME DRV_NAME " Fast Ethernet driver " DRV_VERSION |
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149 #define PFX DRV_NAME ": " |
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150 |
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151 /* Default Message level */ |
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152 #define RTL8139_DEF_MSG_ENABLE (NETIF_MSG_DRV | \ |
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153 NETIF_MSG_PROBE | \ |
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154 NETIF_MSG_LINK) |
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155 |
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156 |
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157 /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */ |
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158 #ifdef CONFIG_8139TOO_PIO |
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159 #define USE_IO_OPS 1 |
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160 #endif |
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161 |
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162 /* define to 1, 2 or 3 to enable copious debugging info */ |
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163 #define RTL8139_DEBUG 0 |
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164 |
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165 /* define to 1 to disable lightweight runtime debugging checks */ |
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166 #undef RTL8139_NDEBUG |
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167 |
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168 |
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169 #if RTL8139_DEBUG |
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170 /* note: prints function name for you */ |
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171 # define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) |
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172 #else |
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173 # define DPRINTK(fmt, args...) |
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174 #endif |
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175 |
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176 #ifdef RTL8139_NDEBUG |
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177 # define assert(expr) do {} while (0) |
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178 #else |
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179 # define assert(expr) \ |
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180 if(unlikely(!(expr))) { \ |
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181 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \ |
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182 #expr,__FILE__,__FUNCTION__,__LINE__); \ |
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183 } |
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184 #endif |
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185 |
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186 |
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187 /* A few user-configurable values. */ |
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188 /* media options */ |
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189 #define MAX_UNITS 8 |
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190 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; |
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191 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; |
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192 |
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193 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). |
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194 The RTL chips use a 64 element hash table based on the Ethernet CRC. */ |
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195 static int multicast_filter_limit = 32; |
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196 |
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197 /* bitmapped message enable number */ |
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198 static int debug = -1; |
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199 |
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200 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
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201 |
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202 // Uncomment for debugging |
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203 //#define EC_DEBUG |
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204 |
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205 // Device index for EtherCAT device selection |
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206 static int ec_device_index = -1; |
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207 static int ec_device_master_index = 0; |
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208 |
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209 static ec_device_t *rtl_ec_dev; |
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210 int rtl_ec_dev_registered = 0; |
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211 |
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212 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
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213 |
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214 /* |
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215 * Receive ring size |
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216 * Warning: 64K ring has hardware issues and may lock up. |
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217 */ |
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218 #if defined(CONFIG_SH_DREAMCAST) |
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219 #define RX_BUF_IDX 1 /* 16K ring */ |
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220 #else |
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221 #define RX_BUF_IDX 2 /* 32K ring */ |
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222 #endif |
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223 #define RX_BUF_LEN (8192 << RX_BUF_IDX) |
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224 #define RX_BUF_PAD 16 |
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225 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ |
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226 |
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227 #if RX_BUF_LEN == 65536 |
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228 #define RX_BUF_TOT_LEN RX_BUF_LEN |
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229 #else |
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230 #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD) |
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231 #endif |
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232 |
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233 /* Number of Tx descriptor registers. */ |
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234 #define NUM_TX_DESC 4 |
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235 |
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236 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/ |
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237 #define MAX_ETH_FRAME_SIZE 1536 |
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238 |
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239 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */ |
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240 #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE |
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241 #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC) |
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242 |
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243 /* PCI Tuning Parameters |
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244 Threshold is bytes transferred to chip before transmission starts. */ |
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245 #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ |
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246 |
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247 /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */ |
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248 #define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */ |
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249 #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */ |
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250 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ |
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251 #define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */ |
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252 |
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253 /* Operational parameters that usually are not changed. */ |
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254 /* Time in jiffies before concluding the transmitter is hung. */ |
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255 #define TX_TIMEOUT (6*HZ) |
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256 |
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257 |
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258 enum { |
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259 HAS_MII_XCVR = 0x010000, |
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260 HAS_CHIP_XCVR = 0x020000, |
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261 HAS_LNK_CHNG = 0x040000, |
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262 }; |
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263 |
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264 #define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */ |
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265 #define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */ |
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266 #define RTL_MIN_IO_SIZE 0x80 |
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267 #define RTL8139B_IO_SIZE 256 |
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268 |
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269 #define RTL8129_CAPS HAS_MII_XCVR |
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270 #define RTL8139_CAPS HAS_CHIP_XCVR|HAS_LNK_CHNG |
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271 |
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272 typedef enum { |
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273 RTL8139 = 0, |
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274 RTL8129, |
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275 } board_t; |
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276 |
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277 |
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278 /* indexed by board_t, above */ |
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279 static struct { |
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280 const char *name; |
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281 u32 hw_flags; |
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282 } board_info[] __devinitdata = { |
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283 { "RealTek RTL8139", RTL8139_CAPS }, |
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284 { "RealTek RTL8129", RTL8129_CAPS }, |
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285 }; |
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286 |
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287 |
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288 static struct pci_device_id rtl8139_pci_tbl[] = { |
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289 {0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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290 {0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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291 {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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292 {0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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293 {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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294 {0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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295 {0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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296 {0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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297 {0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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298 {0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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299 {0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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300 {0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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301 {0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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302 {0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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303 {0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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304 {0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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305 {0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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306 {0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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307 {0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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308 |
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309 #ifdef CONFIG_SH_SECUREEDGE5410 |
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310 /* Bogus 8139 silicon reports 8129 without external PROM :-( */ |
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311 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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312 #endif |
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313 #ifdef CONFIG_8139TOO_8129 |
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314 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 }, |
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315 #endif |
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316 |
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317 /* some crazy cards report invalid vendor ids like |
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318 * 0x0001 here. The other ids are valid and constant, |
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319 * so we simply don't match on the main vendor id. |
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320 */ |
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321 {PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 }, |
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322 {PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 }, |
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323 {PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 }, |
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324 |
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325 {0,} |
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326 }; |
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327 MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl); |
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328 |
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329 static struct { |
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330 const char str[ETH_GSTRING_LEN]; |
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331 } ethtool_stats_keys[] = { |
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332 { "early_rx" }, |
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333 { "tx_buf_mapped" }, |
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334 { "tx_timeouts" }, |
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335 { "rx_lost_in_ring" }, |
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336 }; |
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337 |
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338 /* The rest of these values should never change. */ |
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339 |
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340 /* Symbolic offsets to registers. */ |
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341 enum RTL8139_registers { |
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342 MAC0 = 0, /* Ethernet hardware address. */ |
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343 MAR0 = 8, /* Multicast filter. */ |
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344 TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */ |
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345 TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */ |
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346 RxBuf = 0x30, |
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347 ChipCmd = 0x37, |
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348 RxBufPtr = 0x38, |
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349 RxBufAddr = 0x3A, |
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350 IntrMask = 0x3C, |
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351 IntrStatus = 0x3E, |
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352 TxConfig = 0x40, |
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353 RxConfig = 0x44, |
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354 Timer = 0x48, /* A general-purpose counter. */ |
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355 RxMissed = 0x4C, /* 24 bits valid, write clears. */ |
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356 Cfg9346 = 0x50, |
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357 Config0 = 0x51, |
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358 Config1 = 0x52, |
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359 FlashReg = 0x54, |
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360 MediaStatus = 0x58, |
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361 Config3 = 0x59, |
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362 Config4 = 0x5A, /* absent on RTL-8139A */ |
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363 HltClk = 0x5B, |
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364 MultiIntr = 0x5C, |
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365 TxSummary = 0x60, |
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366 BasicModeCtrl = 0x62, |
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367 BasicModeStatus = 0x64, |
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368 NWayAdvert = 0x66, |
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369 NWayLPAR = 0x68, |
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370 NWayExpansion = 0x6A, |
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371 /* Undocumented registers, but required for proper operation. */ |
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372 FIFOTMS = 0x70, /* FIFO Control and test. */ |
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373 CSCR = 0x74, /* Chip Status and Configuration Register. */ |
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374 PARA78 = 0x78, |
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375 PARA7c = 0x7c, /* Magic transceiver parameter register. */ |
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376 Config5 = 0xD8, /* absent on RTL-8139A */ |
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377 }; |
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378 |
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379 enum ClearBitMasks { |
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380 MultiIntrClear = 0xF000, |
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381 ChipCmdClear = 0xE2, |
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382 Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1), |
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383 }; |
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384 |
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385 enum ChipCmdBits { |
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386 CmdReset = 0x10, |
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387 CmdRxEnb = 0x08, |
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388 CmdTxEnb = 0x04, |
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389 RxBufEmpty = 0x01, |
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390 }; |
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391 |
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392 /* Interrupt register bits, using my own meaningful names. */ |
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393 enum IntrStatusBits { |
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394 PCIErr = 0x8000, |
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395 PCSTimeout = 0x4000, |
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396 RxFIFOOver = 0x40, |
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397 RxUnderrun = 0x20, |
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398 RxOverflow = 0x10, |
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399 TxErr = 0x08, |
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400 TxOK = 0x04, |
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401 RxErr = 0x02, |
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402 RxOK = 0x01, |
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403 |
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404 RxAckBits = RxFIFOOver | RxOverflow | RxOK, |
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405 }; |
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406 |
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407 enum TxStatusBits { |
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408 TxHostOwns = 0x2000, |
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409 TxUnderrun = 0x4000, |
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410 TxStatOK = 0x8000, |
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411 TxOutOfWindow = 0x20000000, |
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412 TxAborted = 0x40000000, |
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413 TxCarrierLost = 0x80000000, |
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414 }; |
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415 enum RxStatusBits { |
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416 RxMulticast = 0x8000, |
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417 RxPhysical = 0x4000, |
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418 RxBroadcast = 0x2000, |
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419 RxBadSymbol = 0x0020, |
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420 RxRunt = 0x0010, |
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421 RxTooLong = 0x0008, |
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422 RxCRCErr = 0x0004, |
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423 RxBadAlign = 0x0002, |
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424 RxStatusOK = 0x0001, |
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425 }; |
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426 |
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427 /* Bits in RxConfig. */ |
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428 enum rx_mode_bits { |
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429 AcceptErr = 0x20, |
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430 AcceptRunt = 0x10, |
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431 AcceptBroadcast = 0x08, |
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432 AcceptMulticast = 0x04, |
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433 AcceptMyPhys = 0x02, |
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434 AcceptAllPhys = 0x01, |
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435 }; |
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436 |
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437 /* Bits in TxConfig. */ |
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438 enum tx_config_bits { |
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439 |
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440 /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */ |
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441 TxIFGShift = 24, |
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442 TxIFG84 = (0 << TxIFGShift), /* 8.4us / 840ns (10 / 100Mbps) */ |
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443 TxIFG88 = (1 << TxIFGShift), /* 8.8us / 880ns (10 / 100Mbps) */ |
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444 TxIFG92 = (2 << TxIFGShift), /* 9.2us / 920ns (10 / 100Mbps) */ |
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445 TxIFG96 = (3 << TxIFGShift), /* 9.6us / 960ns (10 / 100Mbps) */ |
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446 |
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447 TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */ |
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448 TxCRC = (1 << 16), /* DISABLE appending CRC to end of Tx packets */ |
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449 TxClearAbt = (1 << 0), /* Clear abort (WO) */ |
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450 TxDMAShift = 8, /* DMA burst value (0-7) is shifted this many bits */ |
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451 TxRetryShift = 4, /* TXRR value (0-15) is shifted this many bits */ |
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452 |
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453 TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */ |
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454 }; |
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455 |
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456 /* Bits in Config1 */ |
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457 enum Config1Bits { |
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458 Cfg1_PM_Enable = 0x01, |
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459 Cfg1_VPD_Enable = 0x02, |
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460 Cfg1_PIO = 0x04, |
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461 Cfg1_MMIO = 0x08, |
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462 LWAKE = 0x10, /* not on 8139, 8139A */ |
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463 Cfg1_Driver_Load = 0x20, |
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464 Cfg1_LED0 = 0x40, |
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465 Cfg1_LED1 = 0x80, |
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466 SLEEP = (1 << 1), /* only on 8139, 8139A */ |
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467 PWRDN = (1 << 0), /* only on 8139, 8139A */ |
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468 }; |
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469 |
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470 /* Bits in Config3 */ |
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471 enum Config3Bits { |
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472 Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */ |
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473 Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */ |
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474 Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */ |
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475 Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */ |
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476 Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */ |
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477 Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */ |
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478 Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */ |
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479 Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */ |
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480 }; |
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481 |
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482 /* Bits in Config4 */ |
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483 enum Config4Bits { |
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484 LWPTN = (1 << 2), /* not on 8139, 8139A */ |
|
485 }; |
|
486 |
|
487 /* Bits in Config5 */ |
|
488 enum Config5Bits { |
|
489 Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */ |
|
490 Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */ |
|
491 Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */ |
|
492 Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */ |
|
493 Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */ |
|
494 Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */ |
|
495 Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */ |
|
496 }; |
|
497 |
|
498 enum RxConfigBits { |
|
499 /* rx fifo threshold */ |
|
500 RxCfgFIFOShift = 13, |
|
501 RxCfgFIFONone = (7 << RxCfgFIFOShift), |
|
502 |
|
503 /* Max DMA burst */ |
|
504 RxCfgDMAShift = 8, |
|
505 RxCfgDMAUnlimited = (7 << RxCfgDMAShift), |
|
506 |
|
507 /* rx ring buffer length */ |
|
508 RxCfgRcv8K = 0, |
|
509 RxCfgRcv16K = (1 << 11), |
|
510 RxCfgRcv32K = (1 << 12), |
|
511 RxCfgRcv64K = (1 << 11) | (1 << 12), |
|
512 |
|
513 /* Disable packet wrap at end of Rx buffer. (not possible with 64k) */ |
|
514 RxNoWrap = (1 << 7), |
|
515 }; |
|
516 |
|
517 /* Twister tuning parameters from RealTek. |
|
518 Completely undocumented, but required to tune bad links on some boards. */ |
|
519 enum CSCRBits { |
|
520 CSCR_LinkOKBit = 0x0400, |
|
521 CSCR_LinkChangeBit = 0x0800, |
|
522 CSCR_LinkStatusBits = 0x0f000, |
|
523 CSCR_LinkDownOffCmd = 0x003c0, |
|
524 CSCR_LinkDownCmd = 0x0f3c0, |
|
525 }; |
|
526 |
|
527 enum Cfg9346Bits { |
|
528 Cfg9346_Lock = 0x00, |
|
529 Cfg9346_Unlock = 0xC0, |
|
530 }; |
|
531 |
|
532 typedef enum { |
|
533 CH_8139 = 0, |
|
534 CH_8139_K, |
|
535 CH_8139A, |
|
536 CH_8139A_G, |
|
537 CH_8139B, |
|
538 CH_8130, |
|
539 CH_8139C, |
|
540 CH_8100, |
|
541 CH_8100B_8139D, |
|
542 CH_8101, |
|
543 } chip_t; |
|
544 |
|
545 enum chip_flags { |
|
546 HasHltClk = (1 << 0), |
|
547 HasLWake = (1 << 1), |
|
548 }; |
|
549 |
|
550 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \ |
|
551 (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22) |
|
552 #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1) |
|
553 |
|
554 /* directly indexed by chip_t, above */ |
|
555 const static struct { |
|
556 const char *name; |
|
557 u32 version; /* from RTL8139C/RTL8139D docs */ |
|
558 u32 flags; |
|
559 } rtl_chip_info[] = { |
|
560 { "RTL-8139", |
|
561 HW_REVID(1, 0, 0, 0, 0, 0, 0), |
|
562 HasHltClk, |
|
563 }, |
|
564 |
|
565 { "RTL-8139 rev K", |
|
566 HW_REVID(1, 1, 0, 0, 0, 0, 0), |
|
567 HasHltClk, |
|
568 }, |
|
569 |
|
570 { "RTL-8139A", |
|
571 HW_REVID(1, 1, 1, 0, 0, 0, 0), |
|
572 HasHltClk, /* XXX undocumented? */ |
|
573 }, |
|
574 |
|
575 { "RTL-8139A rev G", |
|
576 HW_REVID(1, 1, 1, 0, 0, 1, 0), |
|
577 HasHltClk, /* XXX undocumented? */ |
|
578 }, |
|
579 |
|
580 { "RTL-8139B", |
|
581 HW_REVID(1, 1, 1, 1, 0, 0, 0), |
|
582 HasLWake, |
|
583 }, |
|
584 |
|
585 { "RTL-8130", |
|
586 HW_REVID(1, 1, 1, 1, 1, 0, 0), |
|
587 HasLWake, |
|
588 }, |
|
589 |
|
590 { "RTL-8139C", |
|
591 HW_REVID(1, 1, 1, 0, 1, 0, 0), |
|
592 HasLWake, |
|
593 }, |
|
594 |
|
595 { "RTL-8100", |
|
596 HW_REVID(1, 1, 1, 1, 0, 1, 0), |
|
597 HasLWake, |
|
598 }, |
|
599 |
|
600 { "RTL-8100B/8139D", |
|
601 HW_REVID(1, 1, 1, 0, 1, 0, 1), |
|
602 HasLWake, |
|
603 }, |
|
604 |
|
605 { "RTL-8101", |
|
606 HW_REVID(1, 1, 1, 0, 1, 1, 1), |
|
607 HasLWake, |
|
608 }, |
|
609 }; |
|
610 |
|
611 struct rtl_extra_stats { |
|
612 unsigned long early_rx; |
|
613 unsigned long tx_buf_mapped; |
|
614 unsigned long tx_timeouts; |
|
615 unsigned long rx_lost_in_ring; |
|
616 }; |
|
617 |
|
618 struct rtl8139_private { |
|
619 void __iomem *mmio_addr; |
|
620 int drv_flags; |
|
621 struct pci_dev *pci_dev; |
|
622 u32 msg_enable; |
|
623 struct net_device_stats stats; |
|
624 unsigned char *rx_ring; |
|
625 unsigned int cur_rx; /* Index into the Rx buffer of next Rx pkt. */ |
|
626 unsigned int tx_flag; |
|
627 unsigned long cur_tx; |
|
628 unsigned long dirty_tx; |
|
629 unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */ |
|
630 unsigned char *tx_bufs; /* Tx bounce buffer region. */ |
|
631 dma_addr_t rx_ring_dma; |
|
632 dma_addr_t tx_bufs_dma; |
|
633 signed char phys[4]; /* MII device addresses. */ |
|
634 char twistie, twist_row, twist_col; /* Twister tune state. */ |
|
635 unsigned int default_port:4; /* Last dev->if_port value. */ |
|
636 spinlock_t lock; |
|
637 spinlock_t rx_lock; |
|
638 chip_t chipset; |
|
639 pid_t thr_pid; |
|
640 wait_queue_head_t thr_wait; |
|
641 struct completion thr_exited; |
|
642 u32 rx_config; |
|
643 struct rtl_extra_stats xstats; |
|
644 int time_to_die; |
|
645 struct mii_if_info mii; |
|
646 unsigned int regs_len; |
|
647 unsigned long fifo_copy_timeout; |
|
648 }; |
|
649 |
|
650 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
651 |
|
652 MODULE_AUTHOR ("Wilhelm Hagemeister <hm@igh-essen.com>, Florian Pose <fp@igh-essen.com>"); |
|
653 MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver with EtherCAT functionality"); |
|
654 MODULE_LICENSE("GPL"); |
|
655 MODULE_VERSION(COMPILE_INFO); |
|
656 |
|
657 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
658 |
|
659 module_param(multicast_filter_limit, int, 0); |
|
660 module_param_array(media, int, NULL, 0); |
|
661 module_param_array(full_duplex, int, NULL, 0); |
|
662 module_param(debug, int, 0); |
|
663 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number"); |
|
664 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses"); |
|
665 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps"); |
|
666 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)"); |
|
667 |
|
668 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
669 |
|
670 module_param(ec_device_index, int, -1); |
|
671 module_param(ec_device_master_index, int, 0); |
|
672 MODULE_PARM_DESC(ec_device_index, "Index of the device reserved for EtherCAT."); |
|
673 MODULE_PARM_DESC(ec_device_master_index, "Index of the EtherCAT master to register the device."); |
|
674 |
|
675 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
676 |
|
677 static int read_eeprom (void __iomem *ioaddr, int location, int addr_len); |
|
678 static int rtl8139_open (struct net_device *dev); |
|
679 static int mdio_read (struct net_device *dev, int phy_id, int location); |
|
680 static void mdio_write (struct net_device *dev, int phy_id, int location, |
|
681 int val); |
|
682 static void rtl8139_start_thread(struct net_device *dev); |
|
683 static void rtl8139_tx_timeout (struct net_device *dev); |
|
684 static void rtl8139_init_ring (struct net_device *dev); |
|
685 static int rtl8139_start_xmit (struct sk_buff *skb, |
|
686 struct net_device *dev); |
|
687 int rtl8139_poll(struct net_device *dev, int *budget); |
|
688 #ifdef CONFIG_NET_POLL_CONTROLLER |
|
689 static void rtl8139_poll_controller(struct net_device *dev); |
|
690 #endif |
|
691 irqreturn_t rtl8139_interrupt (int irq, void *dev_instance, |
|
692 struct pt_regs *regs); |
|
693 static int rtl8139_close (struct net_device *dev); |
|
694 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); |
|
695 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev); |
|
696 static void rtl8139_set_rx_mode (struct net_device *dev); |
|
697 static void __set_rx_mode (struct net_device *dev); |
|
698 static void rtl8139_hw_start (struct net_device *dev); |
|
699 static struct ethtool_ops rtl8139_ethtool_ops; |
|
700 |
|
701 /* write MMIO register, with flush */ |
|
702 /* Flush avoids rtl8139 bug w/ posted MMIO writes */ |
|
703 #define RTL_W8_F(reg, val8) do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0) |
|
704 #define RTL_W16_F(reg, val16) do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0) |
|
705 #define RTL_W32_F(reg, val32) do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0) |
|
706 |
|
707 |
|
708 #define MMIO_FLUSH_AUDIT_COMPLETE 1 |
|
709 #if MMIO_FLUSH_AUDIT_COMPLETE |
|
710 |
|
711 /* write MMIO register */ |
|
712 #define RTL_W8(reg, val8) iowrite8 ((val8), ioaddr + (reg)) |
|
713 #define RTL_W16(reg, val16) iowrite16 ((val16), ioaddr + (reg)) |
|
714 #define RTL_W32(reg, val32) iowrite32 ((val32), ioaddr + (reg)) |
|
715 |
|
716 #else |
|
717 |
|
718 /* write MMIO register, then flush */ |
|
719 #define RTL_W8 RTL_W8_F |
|
720 #define RTL_W16 RTL_W16_F |
|
721 #define RTL_W32 RTL_W32_F |
|
722 |
|
723 #endif /* MMIO_FLUSH_AUDIT_COMPLETE */ |
|
724 |
|
725 /* read MMIO register */ |
|
726 #define RTL_R8(reg) ioread8 (ioaddr + (reg)) |
|
727 #define RTL_R16(reg) ioread16 (ioaddr + (reg)) |
|
728 #define RTL_R32(reg) ((unsigned long) ioread32 (ioaddr + (reg))) |
|
729 |
|
730 |
|
731 static const u16 rtl8139_intr_mask = |
|
732 PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | |
|
733 TxErr | TxOK | RxErr | RxOK; |
|
734 |
|
735 static const u16 rtl8139_norx_intr_mask = |
|
736 PCIErr | PCSTimeout | RxUnderrun | |
|
737 TxErr | TxOK | RxErr ; |
|
738 |
|
739 #if RX_BUF_IDX == 0 |
|
740 static const unsigned int rtl8139_rx_config = |
|
741 RxCfgRcv8K | RxNoWrap | |
|
742 (RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
743 (RX_DMA_BURST << RxCfgDMAShift); |
|
744 #elif RX_BUF_IDX == 1 |
|
745 static const unsigned int rtl8139_rx_config = |
|
746 RxCfgRcv16K | RxNoWrap | |
|
747 (RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
748 (RX_DMA_BURST << RxCfgDMAShift); |
|
749 #elif RX_BUF_IDX == 2 |
|
750 static const unsigned int rtl8139_rx_config = |
|
751 RxCfgRcv32K | RxNoWrap | |
|
752 (RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
753 (RX_DMA_BURST << RxCfgDMAShift); |
|
754 #elif RX_BUF_IDX == 3 |
|
755 static const unsigned int rtl8139_rx_config = |
|
756 RxCfgRcv64K | |
|
757 (RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
758 (RX_DMA_BURST << RxCfgDMAShift); |
|
759 #else |
|
760 #error "Invalid configuration for 8139_RXBUF_IDX" |
|
761 #endif |
|
762 |
|
763 static const unsigned int rtl8139_tx_config = |
|
764 TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift); |
|
765 |
|
766 static void __rtl8139_cleanup_dev (struct net_device *dev) |
|
767 { |
|
768 struct rtl8139_private *tp = netdev_priv(dev); |
|
769 struct pci_dev *pdev; |
|
770 |
|
771 assert (dev != NULL); |
|
772 assert (tp->pci_dev != NULL); |
|
773 pdev = tp->pci_dev; |
|
774 |
|
775 #ifdef USE_IO_OPS |
|
776 if (tp->mmio_addr) |
|
777 ioport_unmap (tp->mmio_addr); |
|
778 #else |
|
779 if (tp->mmio_addr) |
|
780 pci_iounmap (pdev, tp->mmio_addr); |
|
781 #endif /* USE_IO_OPS */ |
|
782 |
|
783 /* it's ok to call this even if we have no regions to free */ |
|
784 pci_release_regions (pdev); |
|
785 |
|
786 free_netdev(dev); |
|
787 pci_set_drvdata (pdev, NULL); |
|
788 } |
|
789 |
|
790 |
|
791 static void rtl8139_chip_reset (void __iomem *ioaddr) |
|
792 { |
|
793 int i; |
|
794 |
|
795 /* Soft reset the chip. */ |
|
796 RTL_W8 (ChipCmd, CmdReset); |
|
797 |
|
798 /* Check that the chip has finished the reset. */ |
|
799 for (i = 1000; i > 0; i--) { |
|
800 barrier(); |
|
801 if ((RTL_R8 (ChipCmd) & CmdReset) == 0) |
|
802 break; |
|
803 udelay (10); |
|
804 } |
|
805 } |
|
806 |
|
807 |
|
808 static int __devinit rtl8139_init_board (struct pci_dev *pdev, |
|
809 struct net_device **dev_out) |
|
810 { |
|
811 void __iomem *ioaddr; |
|
812 struct net_device *dev; |
|
813 struct rtl8139_private *tp; |
|
814 u8 tmp8; |
|
815 int rc, disable_dev_on_err = 0; |
|
816 unsigned int i; |
|
817 unsigned long pio_start, pio_end, pio_flags, pio_len; |
|
818 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; |
|
819 u32 version; |
|
820 |
|
821 assert (pdev != NULL); |
|
822 |
|
823 *dev_out = NULL; |
|
824 |
|
825 /* dev and priv zeroed in alloc_etherdev */ |
|
826 dev = alloc_etherdev (sizeof (*tp)); |
|
827 if (dev == NULL) { |
|
828 printk (KERN_ERR PFX "%s: Unable to alloc new net device\n", pci_name(pdev)); |
|
829 return -ENOMEM; |
|
830 } |
|
831 SET_MODULE_OWNER(dev); |
|
832 SET_NETDEV_DEV(dev, &pdev->dev); |
|
833 |
|
834 tp = netdev_priv(dev); |
|
835 tp->pci_dev = pdev; |
|
836 |
|
837 /* enable device (incl. PCI PM wakeup and hotplug setup) */ |
|
838 rc = pci_enable_device (pdev); |
|
839 if (rc) |
|
840 goto err_out; |
|
841 |
|
842 pio_start = pci_resource_start (pdev, 0); |
|
843 pio_end = pci_resource_end (pdev, 0); |
|
844 pio_flags = pci_resource_flags (pdev, 0); |
|
845 pio_len = pci_resource_len (pdev, 0); |
|
846 |
|
847 mmio_start = pci_resource_start (pdev, 1); |
|
848 mmio_end = pci_resource_end (pdev, 1); |
|
849 mmio_flags = pci_resource_flags (pdev, 1); |
|
850 mmio_len = pci_resource_len (pdev, 1); |
|
851 |
|
852 /* set this immediately, we need to know before |
|
853 * we talk to the chip directly */ |
|
854 DPRINTK("PIO region size == 0x%02X\n", pio_len); |
|
855 DPRINTK("MMIO region size == 0x%02lX\n", mmio_len); |
|
856 |
|
857 #ifdef USE_IO_OPS |
|
858 /* make sure PCI base addr 0 is PIO */ |
|
859 if (!(pio_flags & IORESOURCE_IO)) { |
|
860 printk (KERN_ERR PFX "%s: region #0 not a PIO resource, aborting\n", pci_name(pdev)); |
|
861 rc = -ENODEV; |
|
862 goto err_out; |
|
863 } |
|
864 /* check for weird/broken PCI region reporting */ |
|
865 if (pio_len < RTL_MIN_IO_SIZE) { |
|
866 printk (KERN_ERR PFX "%s: Invalid PCI I/O region size(s), aborting\n", pci_name(pdev)); |
|
867 rc = -ENODEV; |
|
868 goto err_out; |
|
869 } |
|
870 #else |
|
871 /* make sure PCI base addr 1 is MMIO */ |
|
872 if (!(mmio_flags & IORESOURCE_MEM)) { |
|
873 printk (KERN_ERR PFX "%s: region #1 not an MMIO resource, aborting\n", pci_name(pdev)); |
|
874 rc = -ENODEV; |
|
875 goto err_out; |
|
876 } |
|
877 if (mmio_len < RTL_MIN_IO_SIZE) { |
|
878 printk (KERN_ERR PFX "%s: Invalid PCI mem region size(s), aborting\n", pci_name(pdev)); |
|
879 rc = -ENODEV; |
|
880 goto err_out; |
|
881 } |
|
882 #endif |
|
883 |
|
884 rc = pci_request_regions (pdev, "8139too"); |
|
885 if (rc) |
|
886 goto err_out; |
|
887 disable_dev_on_err = 1; |
|
888 |
|
889 /* enable PCI bus-mastering */ |
|
890 pci_set_master (pdev); |
|
891 |
|
892 #ifdef USE_IO_OPS |
|
893 ioaddr = ioport_map(pio_start, pio_len); |
|
894 if (!ioaddr) { |
|
895 printk (KERN_ERR PFX "%s: cannot map PIO, aborting\n", pci_name(pdev)); |
|
896 rc = -EIO; |
|
897 goto err_out; |
|
898 } |
|
899 dev->base_addr = pio_start; |
|
900 tp->mmio_addr = ioaddr; |
|
901 tp->regs_len = pio_len; |
|
902 #else |
|
903 /* ioremap MMIO region */ |
|
904 ioaddr = pci_iomap(pdev, 1, 0); |
|
905 if (ioaddr == NULL) { |
|
906 printk (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pci_name(pdev)); |
|
907 rc = -EIO; |
|
908 goto err_out; |
|
909 } |
|
910 dev->base_addr = (long) ioaddr; |
|
911 tp->mmio_addr = ioaddr; |
|
912 tp->regs_len = mmio_len; |
|
913 #endif /* USE_IO_OPS */ |
|
914 |
|
915 /* Bring old chips out of low-power mode. */ |
|
916 RTL_W8 (HltClk, 'R'); |
|
917 |
|
918 /* check for missing/broken hardware */ |
|
919 if (RTL_R32 (TxConfig) == 0xFFFFFFFF) { |
|
920 printk (KERN_ERR PFX "%s: Chip not responding, ignoring board\n", |
|
921 pci_name(pdev)); |
|
922 rc = -EIO; |
|
923 goto err_out; |
|
924 } |
|
925 |
|
926 /* identify chip attached to board */ |
|
927 version = RTL_R32 (TxConfig) & HW_REVID_MASK; |
|
928 for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++) |
|
929 if (version == rtl_chip_info[i].version) { |
|
930 tp->chipset = i; |
|
931 goto match; |
|
932 } |
|
933 |
|
934 /* if unknown chip, assume array element #0, original RTL-8139 in this case */ |
|
935 printk (KERN_DEBUG PFX "%s: unknown chip version, assuming RTL-8139\n", |
|
936 pci_name(pdev)); |
|
937 printk (KERN_DEBUG PFX "%s: TxConfig = 0x%lx\n", pci_name(pdev), RTL_R32 (TxConfig)); |
|
938 tp->chipset = 0; |
|
939 |
|
940 match: |
|
941 DPRINTK ("chipset id (%d) == index %d, '%s'\n", |
|
942 version, i, rtl_chip_info[i].name); |
|
943 |
|
944 if (tp->chipset >= CH_8139B) { |
|
945 u8 new_tmp8 = tmp8 = RTL_R8 (Config1); |
|
946 DPRINTK("PCI PM wakeup\n"); |
|
947 if ((rtl_chip_info[tp->chipset].flags & HasLWake) && |
|
948 (tmp8 & LWAKE)) |
|
949 new_tmp8 &= ~LWAKE; |
|
950 new_tmp8 |= Cfg1_PM_Enable; |
|
951 if (new_tmp8 != tmp8) { |
|
952 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
953 RTL_W8 (Config1, tmp8); |
|
954 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
955 } |
|
956 if (rtl_chip_info[tp->chipset].flags & HasLWake) { |
|
957 tmp8 = RTL_R8 (Config4); |
|
958 if (tmp8 & LWPTN) { |
|
959 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
960 RTL_W8 (Config4, tmp8 & ~LWPTN); |
|
961 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
962 } |
|
963 } |
|
964 } else { |
|
965 DPRINTK("Old chip wakeup\n"); |
|
966 tmp8 = RTL_R8 (Config1); |
|
967 tmp8 &= ~(SLEEP | PWRDN); |
|
968 RTL_W8 (Config1, tmp8); |
|
969 } |
|
970 |
|
971 rtl8139_chip_reset (ioaddr); |
|
972 |
|
973 *dev_out = dev; |
|
974 return 0; |
|
975 |
|
976 err_out: |
|
977 __rtl8139_cleanup_dev (dev); |
|
978 if (disable_dev_on_err) |
|
979 pci_disable_device (pdev); |
|
980 return rc; |
|
981 } |
|
982 |
|
983 |
|
984 static int __devinit rtl8139_init_one (struct pci_dev *pdev, |
|
985 const struct pci_device_id *ent) |
|
986 { |
|
987 struct net_device *dev = NULL; |
|
988 struct rtl8139_private *tp; |
|
989 int i, addr_len, option; |
|
990 void __iomem *ioaddr; |
|
991 static int board_idx = -1; |
|
992 u8 pci_rev; |
|
993 |
|
994 assert (pdev != NULL); |
|
995 assert (ent != NULL); |
|
996 |
|
997 board_idx++; |
|
998 |
|
999 /* when we're built into the kernel, the driver version message |
|
1000 * is only printed if at least one 8139 board has been found |
|
1001 */ |
|
1002 #ifndef MODULE |
|
1003 { |
|
1004 static int printed_version; |
|
1005 if (!printed_version++) |
|
1006 printk (KERN_INFO RTL8139_DRIVER_NAME "\n"); |
|
1007 } |
|
1008 #endif |
|
1009 |
|
1010 pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev); |
|
1011 |
|
1012 if (pdev->vendor == PCI_VENDOR_ID_REALTEK && |
|
1013 pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) { |
|
1014 printk(KERN_INFO PFX "pci dev %s (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n", |
|
1015 pci_name(pdev), pdev->vendor, pdev->device, pci_rev); |
|
1016 printk(KERN_INFO PFX "Use the \"8139cp\" driver for improved performance and stability.\n"); |
|
1017 } |
|
1018 |
|
1019 i = rtl8139_init_board (pdev, &dev); |
|
1020 if (i < 0) |
|
1021 return i; |
|
1022 |
|
1023 assert (dev != NULL); |
|
1024 tp = netdev_priv(dev); |
|
1025 |
|
1026 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1027 |
|
1028 if (board_idx == ec_device_index) |
|
1029 { |
|
1030 printk(KERN_INFO "Registering EtherCAT device...\n"); |
|
1031 rtl_ec_dev = EtherCAT_dev_register(ec_device_master_index, dev, |
|
1032 rtl8139_interrupt, THIS_MODULE); |
|
1033 |
|
1034 if (rtl_ec_dev) strcpy(dev->name, "ec0"); |
|
1035 } |
|
1036 |
|
1037 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1038 |
|
1039 ioaddr = tp->mmio_addr; |
|
1040 assert (ioaddr != NULL); |
|
1041 |
|
1042 addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6; |
|
1043 for (i = 0; i < 3; i++) |
|
1044 ((u16 *) (dev->dev_addr))[i] = |
|
1045 le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len)); |
|
1046 |
|
1047 /* The Rtl8139-specific entries in the device structure. */ |
|
1048 dev->open = rtl8139_open; |
|
1049 dev->hard_start_xmit = rtl8139_start_xmit; |
|
1050 dev->poll = rtl8139_poll; |
|
1051 dev->weight = 64; |
|
1052 dev->stop = rtl8139_close; |
|
1053 dev->get_stats = rtl8139_get_stats; |
|
1054 dev->set_multicast_list = rtl8139_set_rx_mode; |
|
1055 dev->do_ioctl = netdev_ioctl; |
|
1056 dev->ethtool_ops = &rtl8139_ethtool_ops; |
|
1057 dev->tx_timeout = rtl8139_tx_timeout; |
|
1058 dev->watchdog_timeo = TX_TIMEOUT; |
|
1059 #ifdef CONFIG_NET_POLL_CONTROLLER |
|
1060 dev->poll_controller = rtl8139_poll_controller; |
|
1061 #endif |
|
1062 |
|
1063 /* note: the hardware is not capable of sg/csum/highdma, however |
|
1064 * through the use of skb_copy_and_csum_dev we enable these |
|
1065 * features |
|
1066 */ |
|
1067 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA; |
|
1068 |
|
1069 dev->irq = pdev->irq; |
|
1070 |
|
1071 /* tp zeroed and aligned in alloc_etherdev */ |
|
1072 tp = netdev_priv(dev); |
|
1073 |
|
1074 /* note: tp->chipset set in rtl8139_init_board */ |
|
1075 tp->drv_flags = board_info[ent->driver_data].hw_flags; |
|
1076 tp->mmio_addr = ioaddr; |
|
1077 tp->msg_enable = |
|
1078 (debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1)); |
|
1079 spin_lock_init (&tp->lock); |
|
1080 spin_lock_init (&tp->rx_lock); |
|
1081 |
|
1082 init_waitqueue_head (&tp->thr_wait); |
|
1083 init_completion (&tp->thr_exited); |
|
1084 tp->mii.dev = dev; |
|
1085 tp->mii.mdio_read = mdio_read; |
|
1086 tp->mii.mdio_write = mdio_write; |
|
1087 tp->mii.phy_id_mask = 0x3f; |
|
1088 tp->mii.reg_num_mask = 0x1f; |
|
1089 |
|
1090 /* dev is fully set up and ready to use now */ |
|
1091 |
|
1092 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1093 |
|
1094 /* EtherCAT-Karten nicht beim Stack anmelden. */ |
|
1095 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1096 { |
|
1097 DPRINTK("About to register device named %s (%p)...\n", dev->name, dev); |
|
1098 i = register_netdev (dev); |
|
1099 if (i) goto err_out; |
|
1100 } |
|
1101 |
|
1102 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1103 |
|
1104 pci_set_drvdata (pdev, dev); |
|
1105 |
|
1106 printk (KERN_INFO "%s: %s at 0x%lx, " |
|
1107 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " |
|
1108 "IRQ %d\n", |
|
1109 dev->name, |
|
1110 board_info[ent->driver_data].name, |
|
1111 dev->base_addr, |
|
1112 dev->dev_addr[0], dev->dev_addr[1], |
|
1113 dev->dev_addr[2], dev->dev_addr[3], |
|
1114 dev->dev_addr[4], dev->dev_addr[5], |
|
1115 dev->irq); |
|
1116 |
|
1117 printk (KERN_DEBUG "%s: Identified 8139 chip type '%s'\n", |
|
1118 dev->name, rtl_chip_info[tp->chipset].name); |
|
1119 |
|
1120 /* Find the connected MII xcvrs. |
|
1121 Doing this in open() would allow detecting external xcvrs later, but |
|
1122 takes too much time. */ |
|
1123 #ifdef CONFIG_8139TOO_8129 |
|
1124 if (tp->drv_flags & HAS_MII_XCVR) { |
|
1125 int phy, phy_idx = 0; |
|
1126 for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) { |
|
1127 int mii_status = mdio_read(dev, phy, 1); |
|
1128 if (mii_status != 0xffff && mii_status != 0x0000) { |
|
1129 u16 advertising = mdio_read(dev, phy, 4); |
|
1130 tp->phys[phy_idx++] = phy; |
|
1131 printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x " |
|
1132 "advertising %4.4x.\n", |
|
1133 dev->name, phy, mii_status, advertising); |
|
1134 } |
|
1135 } |
|
1136 if (phy_idx == 0) { |
|
1137 printk(KERN_INFO "%s: No MII transceivers found! Assuming SYM " |
|
1138 "transceiver.\n", |
|
1139 dev->name); |
|
1140 tp->phys[0] = 32; |
|
1141 } |
|
1142 } else |
|
1143 #endif |
|
1144 tp->phys[0] = 32; |
|
1145 tp->mii.phy_id = tp->phys[0]; |
|
1146 |
|
1147 /* The lower four bits are the media type. */ |
|
1148 option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx]; |
|
1149 if (option > 0) { |
|
1150 tp->mii.full_duplex = (option & 0x210) ? 1 : 0; |
|
1151 tp->default_port = option & 0xFF; |
|
1152 if (tp->default_port) |
|
1153 tp->mii.force_media = 1; |
|
1154 } |
|
1155 if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0) |
|
1156 tp->mii.full_duplex = full_duplex[board_idx]; |
|
1157 if (tp->mii.full_duplex) { |
|
1158 printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name); |
|
1159 /* Changing the MII-advertised media because might prevent |
|
1160 re-connection. */ |
|
1161 tp->mii.force_media = 1; |
|
1162 } |
|
1163 if (tp->default_port) { |
|
1164 printk(KERN_INFO " Forcing %dMbps %s-duplex operation.\n", |
|
1165 (option & 0x20 ? 100 : 10), |
|
1166 (option & 0x10 ? "full" : "half")); |
|
1167 mdio_write(dev, tp->phys[0], 0, |
|
1168 ((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */ |
|
1169 ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */ |
|
1170 } |
|
1171 |
|
1172 /* Put the chip into low-power mode. */ |
|
1173 if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
1174 RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ |
|
1175 |
|
1176 return 0; |
|
1177 |
|
1178 err_out: |
|
1179 __rtl8139_cleanup_dev (dev); |
|
1180 pci_disable_device (pdev); |
|
1181 return i; |
|
1182 } |
|
1183 |
|
1184 |
|
1185 static void __devexit rtl8139_remove_one (struct pci_dev *pdev) |
|
1186 { |
|
1187 struct net_device *dev = pci_get_drvdata (pdev); |
|
1188 |
|
1189 assert (dev != NULL); |
|
1190 |
|
1191 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1192 |
|
1193 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1194 { |
|
1195 unregister_netdev (dev); |
|
1196 } |
|
1197 |
|
1198 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1199 |
|
1200 __rtl8139_cleanup_dev (dev); |
|
1201 pci_disable_device (pdev); |
|
1202 } |
|
1203 |
|
1204 |
|
1205 /* Serial EEPROM section. */ |
|
1206 |
|
1207 /* EEPROM_Ctrl bits. */ |
|
1208 #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ |
|
1209 #define EE_CS 0x08 /* EEPROM chip select. */ |
|
1210 #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ |
|
1211 #define EE_WRITE_0 0x00 |
|
1212 #define EE_WRITE_1 0x02 |
|
1213 #define EE_DATA_READ 0x01 /* EEPROM chip data out. */ |
|
1214 #define EE_ENB (0x80 | EE_CS) |
|
1215 |
|
1216 /* Delay between EEPROM clock transitions. |
|
1217 No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. |
|
1218 */ |
|
1219 |
|
1220 #define eeprom_delay() RTL_R32(Cfg9346) |
|
1221 |
|
1222 /* The EEPROM commands include the alway-set leading bit. */ |
|
1223 #define EE_WRITE_CMD (5) |
|
1224 #define EE_READ_CMD (6) |
|
1225 #define EE_ERASE_CMD (7) |
|
1226 |
|
1227 static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len) |
|
1228 { |
|
1229 int i; |
|
1230 unsigned retval = 0; |
|
1231 int read_cmd = location | (EE_READ_CMD << addr_len); |
|
1232 |
|
1233 RTL_W8 (Cfg9346, EE_ENB & ~EE_CS); |
|
1234 RTL_W8 (Cfg9346, EE_ENB); |
|
1235 eeprom_delay (); |
|
1236 |
|
1237 /* Shift the read command bits out. */ |
|
1238 for (i = 4 + addr_len; i >= 0; i--) { |
|
1239 int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; |
|
1240 RTL_W8 (Cfg9346, EE_ENB | dataval); |
|
1241 eeprom_delay (); |
|
1242 RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK); |
|
1243 eeprom_delay (); |
|
1244 } |
|
1245 RTL_W8 (Cfg9346, EE_ENB); |
|
1246 eeprom_delay (); |
|
1247 |
|
1248 for (i = 16; i > 0; i--) { |
|
1249 RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK); |
|
1250 eeprom_delay (); |
|
1251 retval = |
|
1252 (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 : |
|
1253 0); |
|
1254 RTL_W8 (Cfg9346, EE_ENB); |
|
1255 eeprom_delay (); |
|
1256 } |
|
1257 |
|
1258 /* Terminate the EEPROM access. */ |
|
1259 RTL_W8 (Cfg9346, ~EE_CS); |
|
1260 eeprom_delay (); |
|
1261 |
|
1262 return retval; |
|
1263 } |
|
1264 |
|
1265 /* MII serial management: mostly bogus for now. */ |
|
1266 /* Read and write the MII management registers using software-generated |
|
1267 serial MDIO protocol. |
|
1268 The maximum data clock rate is 2.5 Mhz. The minimum timing is usually |
|
1269 met by back-to-back PCI I/O cycles, but we insert a delay to avoid |
|
1270 "overclocking" issues. */ |
|
1271 #define MDIO_DIR 0x80 |
|
1272 #define MDIO_DATA_OUT 0x04 |
|
1273 #define MDIO_DATA_IN 0x02 |
|
1274 #define MDIO_CLK 0x01 |
|
1275 #define MDIO_WRITE0 (MDIO_DIR) |
|
1276 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) |
|
1277 |
|
1278 #define mdio_delay() RTL_R8(Config4) |
|
1279 |
|
1280 |
|
1281 static char mii_2_8139_map[8] = { |
|
1282 BasicModeCtrl, |
|
1283 BasicModeStatus, |
|
1284 0, |
|
1285 0, |
|
1286 NWayAdvert, |
|
1287 NWayLPAR, |
|
1288 NWayExpansion, |
|
1289 0 |
|
1290 }; |
|
1291 |
|
1292 |
|
1293 #ifdef CONFIG_8139TOO_8129 |
|
1294 /* Syncronize the MII management interface by shifting 32 one bits out. */ |
|
1295 static void mdio_sync (void __iomem *ioaddr) |
|
1296 { |
|
1297 int i; |
|
1298 |
|
1299 for (i = 32; i >= 0; i--) { |
|
1300 RTL_W8 (Config4, MDIO_WRITE1); |
|
1301 mdio_delay (); |
|
1302 RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK); |
|
1303 mdio_delay (); |
|
1304 } |
|
1305 } |
|
1306 #endif |
|
1307 |
|
1308 static int mdio_read (struct net_device *dev, int phy_id, int location) |
|
1309 { |
|
1310 struct rtl8139_private *tp = netdev_priv(dev); |
|
1311 int retval = 0; |
|
1312 #ifdef CONFIG_8139TOO_8129 |
|
1313 void __iomem *ioaddr = tp->mmio_addr; |
|
1314 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; |
|
1315 int i; |
|
1316 #endif |
|
1317 |
|
1318 if (phy_id > 31) { /* Really a 8139. Use internal registers. */ |
|
1319 void __iomem *ioaddr = tp->mmio_addr; |
|
1320 return location < 8 && mii_2_8139_map[location] ? |
|
1321 RTL_R16 (mii_2_8139_map[location]) : 0; |
|
1322 } |
|
1323 |
|
1324 #ifdef CONFIG_8139TOO_8129 |
|
1325 mdio_sync (ioaddr); |
|
1326 /* Shift the read command bits out. */ |
|
1327 for (i = 15; i >= 0; i--) { |
|
1328 int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; |
|
1329 |
|
1330 RTL_W8 (Config4, MDIO_DIR | dataval); |
|
1331 mdio_delay (); |
|
1332 RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK); |
|
1333 mdio_delay (); |
|
1334 } |
|
1335 |
|
1336 /* Read the two transition, 16 data, and wire-idle bits. */ |
|
1337 for (i = 19; i > 0; i--) { |
|
1338 RTL_W8 (Config4, 0); |
|
1339 mdio_delay (); |
|
1340 retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0); |
|
1341 RTL_W8 (Config4, MDIO_CLK); |
|
1342 mdio_delay (); |
|
1343 } |
|
1344 #endif |
|
1345 |
|
1346 return (retval >> 1) & 0xffff; |
|
1347 } |
|
1348 |
|
1349 |
|
1350 static void mdio_write (struct net_device *dev, int phy_id, int location, |
|
1351 int value) |
|
1352 { |
|
1353 struct rtl8139_private *tp = netdev_priv(dev); |
|
1354 #ifdef CONFIG_8139TOO_8129 |
|
1355 void __iomem *ioaddr = tp->mmio_addr; |
|
1356 int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; |
|
1357 int i; |
|
1358 #endif |
|
1359 |
|
1360 if (phy_id > 31) { /* Really a 8139. Use internal registers. */ |
|
1361 void __iomem *ioaddr = tp->mmio_addr; |
|
1362 if (location == 0) { |
|
1363 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
1364 RTL_W16 (BasicModeCtrl, value); |
|
1365 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1366 } else if (location < 8 && mii_2_8139_map[location]) |
|
1367 RTL_W16 (mii_2_8139_map[location], value); |
|
1368 return; |
|
1369 } |
|
1370 |
|
1371 #ifdef CONFIG_8139TOO_8129 |
|
1372 mdio_sync (ioaddr); |
|
1373 |
|
1374 /* Shift the command bits out. */ |
|
1375 for (i = 31; i >= 0; i--) { |
|
1376 int dataval = |
|
1377 (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; |
|
1378 RTL_W8 (Config4, dataval); |
|
1379 mdio_delay (); |
|
1380 RTL_W8 (Config4, dataval | MDIO_CLK); |
|
1381 mdio_delay (); |
|
1382 } |
|
1383 /* Clear out extra bits. */ |
|
1384 for (i = 2; i > 0; i--) { |
|
1385 RTL_W8 (Config4, 0); |
|
1386 mdio_delay (); |
|
1387 RTL_W8 (Config4, MDIO_CLK); |
|
1388 mdio_delay (); |
|
1389 } |
|
1390 #endif |
|
1391 } |
|
1392 |
|
1393 |
|
1394 static int rtl8139_open (struct net_device *dev) |
|
1395 { |
|
1396 struct rtl8139_private *tp = netdev_priv(dev); |
|
1397 int retval; |
|
1398 void __iomem *ioaddr = tp->mmio_addr; |
|
1399 |
|
1400 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1401 |
|
1402 #ifdef EC_DEBUG |
|
1403 printk(KERN_DEBUG "%s: open\n", dev->name); |
|
1404 #endif |
|
1405 |
|
1406 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1407 { |
|
1408 retval = request_irq(dev->irq, rtl8139_interrupt, SA_SHIRQ, dev->name, dev); |
|
1409 if (retval) |
|
1410 return retval; |
|
1411 } |
|
1412 |
|
1413 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1414 |
|
1415 tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN, |
|
1416 &tp->tx_bufs_dma); |
|
1417 tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
|
1418 &tp->rx_ring_dma); |
|
1419 if (tp->tx_bufs == NULL || tp->rx_ring == NULL) |
|
1420 { |
|
1421 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1422 |
|
1423 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1424 { |
|
1425 free_irq(dev->irq, dev); |
|
1426 } |
|
1427 |
|
1428 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1429 |
|
1430 if (tp->tx_bufs) |
|
1431 pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN, |
|
1432 tp->tx_bufs, tp->tx_bufs_dma); |
|
1433 if (tp->rx_ring) |
|
1434 pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
|
1435 tp->rx_ring, tp->rx_ring_dma); |
|
1436 |
|
1437 return -ENOMEM; |
|
1438 } |
|
1439 |
|
1440 tp->mii.full_duplex = tp->mii.force_media; |
|
1441 tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000; |
|
1442 |
|
1443 rtl8139_init_ring (dev); |
|
1444 rtl8139_hw_start (dev); |
|
1445 |
|
1446 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1447 |
|
1448 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1449 { |
|
1450 netif_start_queue (dev); |
|
1451 |
|
1452 if (netif_msg_ifup(tp)) |
|
1453 { |
|
1454 printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#lx IRQ %d" |
|
1455 " GP Pins %2.2x %s-duplex.\n", |
|
1456 dev->name, pci_resource_start (tp->pci_dev, 1), |
|
1457 dev->irq, RTL_R8 (MediaStatus), |
|
1458 tp->mii.full_duplex ? "full" : "half"); |
|
1459 } |
|
1460 |
|
1461 rtl8139_start_thread(dev); |
|
1462 } |
|
1463 |
|
1464 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1465 |
|
1466 return 0; |
|
1467 } |
|
1468 |
|
1469 |
|
1470 static void rtl_check_media (struct net_device *dev, unsigned int init_media) |
|
1471 { |
|
1472 struct rtl8139_private *tp = netdev_priv(dev); |
|
1473 |
|
1474 if (tp->phys[0] >= 0) { |
|
1475 mii_check_media(&tp->mii, netif_msg_link(tp), init_media); |
|
1476 } |
|
1477 } |
|
1478 |
|
1479 /* Start the hardware at open or resume. */ |
|
1480 static void rtl8139_hw_start (struct net_device *dev) |
|
1481 { |
|
1482 struct rtl8139_private *tp = netdev_priv(dev); |
|
1483 void __iomem *ioaddr = tp->mmio_addr; |
|
1484 u32 i; |
|
1485 u8 tmp; |
|
1486 |
|
1487 /* Bring old chips out of low-power mode. */ |
|
1488 if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
1489 RTL_W8 (HltClk, 'R'); |
|
1490 |
|
1491 rtl8139_chip_reset (ioaddr); |
|
1492 |
|
1493 /* unlock Config[01234] and BMCR register writes */ |
|
1494 RTL_W8_F (Cfg9346, Cfg9346_Unlock); |
|
1495 /* Restore our idea of the MAC address. */ |
|
1496 RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0))); |
|
1497 RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4))); |
|
1498 |
|
1499 /* Must enable Tx/Rx before setting transfer thresholds! */ |
|
1500 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
1501 |
|
1502 tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; |
|
1503 RTL_W32 (RxConfig, tp->rx_config); |
|
1504 RTL_W32 (TxConfig, rtl8139_tx_config); |
|
1505 |
|
1506 tp->cur_rx = 0; |
|
1507 |
|
1508 rtl_check_media (dev, 1); |
|
1509 |
|
1510 if (tp->chipset >= CH_8139B) { |
|
1511 /* Disable magic packet scanning, which is enabled |
|
1512 * when PM is enabled in Config1. It can be reenabled |
|
1513 * via ETHTOOL_SWOL if desired. */ |
|
1514 RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic); |
|
1515 } |
|
1516 |
|
1517 DPRINTK("init buffer addresses\n"); |
|
1518 |
|
1519 /* Lock Config[01234] and BMCR register writes */ |
|
1520 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1521 |
|
1522 /* init Rx ring buffer DMA address */ |
|
1523 RTL_W32_F (RxBuf, tp->rx_ring_dma); |
|
1524 |
|
1525 /* init Tx buffer DMA addresses */ |
|
1526 for (i = 0; i < NUM_TX_DESC; i++) |
|
1527 RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs)); |
|
1528 |
|
1529 RTL_W32 (RxMissed, 0); |
|
1530 |
|
1531 rtl8139_set_rx_mode (dev); |
|
1532 |
|
1533 /* no early-rx interrupts */ |
|
1534 RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear); |
|
1535 |
|
1536 /* make sure RxTx has started */ |
|
1537 tmp = RTL_R8 (ChipCmd); |
|
1538 if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb))) |
|
1539 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
1540 |
|
1541 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1542 |
|
1543 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1544 { |
|
1545 /* Enable all known interrupts by setting the interrupt mask. */ |
|
1546 RTL_W16 (IntrMask, rtl8139_intr_mask); |
|
1547 } |
|
1548 |
|
1549 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1550 } |
|
1551 |
|
1552 |
|
1553 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ |
|
1554 static void rtl8139_init_ring (struct net_device *dev) |
|
1555 { |
|
1556 struct rtl8139_private *tp = netdev_priv(dev); |
|
1557 int i; |
|
1558 |
|
1559 tp->cur_rx = 0; |
|
1560 tp->cur_tx = 0; |
|
1561 tp->dirty_tx = 0; |
|
1562 |
|
1563 for (i = 0; i < NUM_TX_DESC; i++) |
|
1564 tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE]; |
|
1565 } |
|
1566 |
|
1567 |
|
1568 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */ |
|
1569 static int next_tick = 3 * HZ; |
|
1570 |
|
1571 #ifndef CONFIG_8139TOO_TUNE_TWISTER |
|
1572 static inline void rtl8139_tune_twister (struct net_device *dev, |
|
1573 struct rtl8139_private *tp) {} |
|
1574 #else |
|
1575 enum TwisterParamVals { |
|
1576 PARA78_default = 0x78fa8388, |
|
1577 PARA7c_default = 0xcb38de43, /* param[0][3] */ |
|
1578 PARA7c_xxx = 0xcb38de43, |
|
1579 }; |
|
1580 |
|
1581 static const unsigned long param[4][4] = { |
|
1582 {0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43}, |
|
1583 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, |
|
1584 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, |
|
1585 {0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83} |
|
1586 }; |
|
1587 |
|
1588 static void rtl8139_tune_twister (struct net_device *dev, |
|
1589 struct rtl8139_private *tp) |
|
1590 { |
|
1591 int linkcase; |
|
1592 void __iomem *ioaddr = tp->mmio_addr; |
|
1593 |
|
1594 /* This is a complicated state machine to configure the "twister" for |
|
1595 impedance/echos based on the cable length. |
|
1596 All of this is magic and undocumented. |
|
1597 */ |
|
1598 switch (tp->twistie) { |
|
1599 case 1: |
|
1600 if (RTL_R16 (CSCR) & CSCR_LinkOKBit) { |
|
1601 /* We have link beat, let us tune the twister. */ |
|
1602 RTL_W16 (CSCR, CSCR_LinkDownOffCmd); |
|
1603 tp->twistie = 2; /* Change to state 2. */ |
|
1604 next_tick = HZ / 10; |
|
1605 } else { |
|
1606 /* Just put in some reasonable defaults for when beat returns. */ |
|
1607 RTL_W16 (CSCR, CSCR_LinkDownCmd); |
|
1608 RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */ |
|
1609 RTL_W32 (PARA78, PARA78_default); |
|
1610 RTL_W32 (PARA7c, PARA7c_default); |
|
1611 tp->twistie = 0; /* Bail from future actions. */ |
|
1612 } |
|
1613 break; |
|
1614 case 2: |
|
1615 /* Read how long it took to hear the echo. */ |
|
1616 linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits; |
|
1617 if (linkcase == 0x7000) |
|
1618 tp->twist_row = 3; |
|
1619 else if (linkcase == 0x3000) |
|
1620 tp->twist_row = 2; |
|
1621 else if (linkcase == 0x1000) |
|
1622 tp->twist_row = 1; |
|
1623 else |
|
1624 tp->twist_row = 0; |
|
1625 tp->twist_col = 0; |
|
1626 tp->twistie = 3; /* Change to state 2. */ |
|
1627 next_tick = HZ / 10; |
|
1628 break; |
|
1629 case 3: |
|
1630 /* Put out four tuning parameters, one per 100msec. */ |
|
1631 if (tp->twist_col == 0) |
|
1632 RTL_W16 (FIFOTMS, 0); |
|
1633 RTL_W32 (PARA7c, param[(int) tp->twist_row] |
|
1634 [(int) tp->twist_col]); |
|
1635 next_tick = HZ / 10; |
|
1636 if (++tp->twist_col >= 4) { |
|
1637 /* For short cables we are done. |
|
1638 For long cables (row == 3) check for mistune. */ |
|
1639 tp->twistie = |
|
1640 (tp->twist_row == 3) ? 4 : 0; |
|
1641 } |
|
1642 break; |
|
1643 case 4: |
|
1644 /* Special case for long cables: check for mistune. */ |
|
1645 if ((RTL_R16 (CSCR) & |
|
1646 CSCR_LinkStatusBits) == 0x7000) { |
|
1647 tp->twistie = 0; |
|
1648 break; |
|
1649 } else { |
|
1650 RTL_W32 (PARA7c, 0xfb38de03); |
|
1651 tp->twistie = 5; |
|
1652 next_tick = HZ / 10; |
|
1653 } |
|
1654 break; |
|
1655 case 5: |
|
1656 /* Retune for shorter cable (column 2). */ |
|
1657 RTL_W32 (FIFOTMS, 0x20); |
|
1658 RTL_W32 (PARA78, PARA78_default); |
|
1659 RTL_W32 (PARA7c, PARA7c_default); |
|
1660 RTL_W32 (FIFOTMS, 0x00); |
|
1661 tp->twist_row = 2; |
|
1662 tp->twist_col = 0; |
|
1663 tp->twistie = 3; |
|
1664 next_tick = HZ / 10; |
|
1665 break; |
|
1666 |
|
1667 default: |
|
1668 /* do nothing */ |
|
1669 break; |
|
1670 } |
|
1671 } |
|
1672 #endif /* CONFIG_8139TOO_TUNE_TWISTER */ |
|
1673 |
|
1674 static inline void rtl8139_thread_iter (struct net_device *dev, |
|
1675 struct rtl8139_private *tp, |
|
1676 void __iomem *ioaddr) |
|
1677 { |
|
1678 int mii_lpa; |
|
1679 |
|
1680 mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA); |
|
1681 |
|
1682 if (!tp->mii.force_media && mii_lpa != 0xffff) { |
|
1683 int duplex = (mii_lpa & LPA_100FULL) |
|
1684 || (mii_lpa & 0x01C0) == 0x0040; |
|
1685 if (tp->mii.full_duplex != duplex) { |
|
1686 tp->mii.full_duplex = duplex; |
|
1687 |
|
1688 if (mii_lpa) { |
|
1689 printk (KERN_INFO |
|
1690 "%s: Setting %s-duplex based on MII #%d link" |
|
1691 " partner ability of %4.4x.\n", |
|
1692 dev->name, |
|
1693 tp->mii.full_duplex ? "full" : "half", |
|
1694 tp->phys[0], mii_lpa); |
|
1695 } else { |
|
1696 printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n", |
|
1697 dev->name); |
|
1698 } |
|
1699 #if 0 |
|
1700 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
1701 RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20); |
|
1702 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1703 #endif |
|
1704 } |
|
1705 } |
|
1706 |
|
1707 next_tick = HZ * 60; |
|
1708 |
|
1709 rtl8139_tune_twister (dev, tp); |
|
1710 |
|
1711 DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n", |
|
1712 dev->name, RTL_R16 (NWayLPAR)); |
|
1713 DPRINTK ("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n", |
|
1714 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus)); |
|
1715 DPRINTK ("%s: Chip config %2.2x %2.2x.\n", |
|
1716 dev->name, RTL_R8 (Config0), |
|
1717 RTL_R8 (Config1)); |
|
1718 } |
|
1719 |
|
1720 static int rtl8139_thread (void *data) |
|
1721 { |
|
1722 struct net_device *dev = data; |
|
1723 struct rtl8139_private *tp = netdev_priv(dev); |
|
1724 unsigned long timeout; |
|
1725 |
|
1726 daemonize("%s", dev->name); |
|
1727 allow_signal(SIGTERM); |
|
1728 |
|
1729 while (1) { |
|
1730 timeout = next_tick; |
|
1731 do { |
|
1732 timeout = interruptible_sleep_on_timeout (&tp->thr_wait, timeout); |
|
1733 /* make swsusp happy with our thread */ |
|
1734 try_to_freeze(); |
|
1735 } while (!signal_pending (current) && (timeout > 0)); |
|
1736 |
|
1737 if (signal_pending (current)) { |
|
1738 flush_signals(current); |
|
1739 } |
|
1740 |
|
1741 if (tp->time_to_die) |
|
1742 break; |
|
1743 |
|
1744 if (rtnl_lock_interruptible ()) |
|
1745 break; |
|
1746 rtl8139_thread_iter (dev, tp, tp->mmio_addr); |
|
1747 rtnl_unlock (); |
|
1748 } |
|
1749 |
|
1750 complete_and_exit (&tp->thr_exited, 0); |
|
1751 } |
|
1752 |
|
1753 static void rtl8139_start_thread(struct net_device *dev) |
|
1754 { |
|
1755 struct rtl8139_private *tp = netdev_priv(dev); |
|
1756 |
|
1757 tp->thr_pid = -1; |
|
1758 tp->twistie = 0; |
|
1759 tp->time_to_die = 0; |
|
1760 if (tp->chipset == CH_8139_K) |
|
1761 tp->twistie = 1; |
|
1762 else if (tp->drv_flags & HAS_LNK_CHNG) |
|
1763 return; |
|
1764 |
|
1765 tp->thr_pid = kernel_thread(rtl8139_thread, dev, CLONE_FS|CLONE_FILES); |
|
1766 if (tp->thr_pid < 0) { |
|
1767 printk (KERN_WARNING "%s: unable to start kernel thread\n", |
|
1768 dev->name); |
|
1769 } |
|
1770 } |
|
1771 |
|
1772 static inline void rtl8139_tx_clear (struct rtl8139_private *tp) |
|
1773 { |
|
1774 tp->cur_tx = 0; |
|
1775 tp->dirty_tx = 0; |
|
1776 |
|
1777 /* XXX account for unsent Tx packets in tp->stats.tx_dropped */ |
|
1778 } |
|
1779 |
|
1780 |
|
1781 static void rtl8139_tx_timeout (struct net_device *dev) |
|
1782 { |
|
1783 struct rtl8139_private *tp = netdev_priv(dev); |
|
1784 void __iomem *ioaddr = tp->mmio_addr; |
|
1785 int i; |
|
1786 u8 tmp8; |
|
1787 unsigned long flags; |
|
1788 |
|
1789 printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x " |
|
1790 "media %2.2x.\n", dev->name, RTL_R8 (ChipCmd), |
|
1791 RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus)); |
|
1792 /* Emit info to figure out what went wrong. */ |
|
1793 printk (KERN_DEBUG "%s: Tx queue start entry %ld dirty entry %ld.\n", |
|
1794 dev->name, tp->cur_tx, tp->dirty_tx); |
|
1795 for (i = 0; i < NUM_TX_DESC; i++) |
|
1796 printk (KERN_DEBUG "%s: Tx descriptor %d is %8.8lx.%s\n", |
|
1797 dev->name, i, RTL_R32 (TxStatus0 + (i * 4)), |
|
1798 i == tp->dirty_tx % NUM_TX_DESC ? |
|
1799 " (queue head)" : ""); |
|
1800 |
|
1801 tp->xstats.tx_timeouts++; |
|
1802 |
|
1803 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1804 |
|
1805 printk(KERN_DEBUG "%s: tx_timeout\n", dev->name); |
|
1806 |
|
1807 if (EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1808 { |
|
1809 EtherCAT_dev_state(rtl_ec_dev, EC_DEVICE_STATE_TIMEOUT); |
|
1810 } |
|
1811 |
|
1812 /* disable Tx ASAP, if not already */ |
|
1813 tmp8 = RTL_R8 (ChipCmd); |
|
1814 if (tmp8 & CmdTxEnb) |
|
1815 RTL_W8 (ChipCmd, CmdRxEnb); |
|
1816 |
|
1817 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1818 { |
|
1819 spin_lock(&tp->rx_lock); |
|
1820 |
|
1821 /* Disable interrupts by clearing the interrupt mask. */ |
|
1822 RTL_W16 (IntrMask, 0x0000); |
|
1823 |
|
1824 /* Stop a shared interrupt from scavenging while we are. */ |
|
1825 spin_lock_irqsave (&tp->lock, flags); |
|
1826 rtl8139_tx_clear (tp); |
|
1827 spin_unlock_irqrestore (&tp->lock, flags); |
|
1828 |
|
1829 /* ...and finally, reset everything */ |
|
1830 |
|
1831 if (netif_running(dev)) |
|
1832 { |
|
1833 rtl8139_hw_start (dev); |
|
1834 netif_wake_queue (dev); |
|
1835 } |
|
1836 |
|
1837 spin_unlock(&tp->rx_lock); |
|
1838 } |
|
1839 else |
|
1840 { |
|
1841 rtl8139_tx_clear (tp); |
|
1842 rtl8139_hw_start(dev); |
|
1843 } |
|
1844 |
|
1845 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1846 } |
|
1847 |
|
1848 static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev) |
|
1849 { |
|
1850 struct rtl8139_private *tp = netdev_priv(dev); |
|
1851 void __iomem *ioaddr = tp->mmio_addr; |
|
1852 unsigned int entry; |
|
1853 unsigned int len = skb->len; |
|
1854 |
|
1855 /* Calculate the next Tx descriptor entry. */ |
|
1856 entry = tp->cur_tx % NUM_TX_DESC; |
|
1857 |
|
1858 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1859 |
|
1860 /* Note: the chip doesn't have auto-pad! */ |
|
1861 if (likely(len < TX_BUF_SIZE)) |
|
1862 { |
|
1863 if (len < ETH_ZLEN) |
|
1864 memset(tp->tx_buf[entry], 0, ETH_ZLEN); |
|
1865 |
|
1866 skb_copy_and_csum_dev(skb, tp->tx_buf[entry]); |
|
1867 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) dev_kfree_skb(skb); |
|
1868 } |
|
1869 else |
|
1870 { |
|
1871 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) dev_kfree_skb(skb); |
|
1872 tp->stats.tx_dropped++; |
|
1873 return 0; |
|
1874 } |
|
1875 |
|
1876 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1877 { |
|
1878 spin_lock_irq(&tp->lock); |
|
1879 } |
|
1880 |
|
1881 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1882 |
|
1883 RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), |
|
1884 tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); |
|
1885 |
|
1886 dev->trans_start = jiffies; |
|
1887 |
|
1888 tp->cur_tx++; |
|
1889 wmb(); |
|
1890 |
|
1891 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1892 |
|
1893 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1894 { |
|
1895 if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx) |
|
1896 netif_stop_queue (dev); |
|
1897 |
|
1898 spin_unlock_irq(&tp->lock); |
|
1899 |
|
1900 if (netif_msg_tx_queued(tp)) |
|
1901 printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n", |
|
1902 dev->name, len, entry); |
|
1903 } |
|
1904 |
|
1905 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1906 |
|
1907 return 0; |
|
1908 } |
|
1909 |
|
1910 |
|
1911 static void rtl8139_tx_interrupt (struct net_device *dev, |
|
1912 struct rtl8139_private *tp, |
|
1913 void __iomem *ioaddr) |
|
1914 { |
|
1915 unsigned long dirty_tx, tx_left; |
|
1916 |
|
1917 assert (dev != NULL); |
|
1918 assert (ioaddr != NULL); |
|
1919 |
|
1920 dirty_tx = tp->dirty_tx; |
|
1921 tx_left = tp->cur_tx - dirty_tx; |
|
1922 |
|
1923 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1924 |
|
1925 #if 0 |
|
1926 if (EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1927 { |
|
1928 rtl_ec_dev.tx_intr_cnt++; |
|
1929 rdtscl(rtl_ec_dev.tx_time); // Get CPU cycles |
|
1930 } |
|
1931 #endif |
|
1932 |
|
1933 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1934 |
|
1935 while (tx_left > 0) { |
|
1936 int entry = dirty_tx % NUM_TX_DESC; |
|
1937 int txstatus; |
|
1938 |
|
1939 txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32))); |
|
1940 |
|
1941 if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted))) |
|
1942 break; /* It still hasn't been Txed */ |
|
1943 |
|
1944 /* Note: TxCarrierLost is always asserted at 100mbps. */ |
|
1945 if (txstatus & (TxOutOfWindow | TxAborted)) { |
|
1946 /* There was an major error, log it. */ |
|
1947 if (netif_msg_tx_err(tp)) |
|
1948 printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n", |
|
1949 dev->name, txstatus); |
|
1950 tp->stats.tx_errors++; |
|
1951 if (txstatus & TxAborted) { |
|
1952 tp->stats.tx_aborted_errors++; |
|
1953 RTL_W32 (TxConfig, TxClearAbt); |
|
1954 RTL_W16 (IntrStatus, TxErr); |
|
1955 wmb(); |
|
1956 } |
|
1957 if (txstatus & TxCarrierLost) |
|
1958 tp->stats.tx_carrier_errors++; |
|
1959 if (txstatus & TxOutOfWindow) |
|
1960 tp->stats.tx_window_errors++; |
|
1961 |
|
1962 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1963 |
|
1964 if (EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
1965 { |
|
1966 EtherCAT_dev_state(rtl_ec_dev, EC_DEVICE_STATE_ERROR); |
|
1967 } |
|
1968 |
|
1969 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1970 |
|
1971 } else { |
|
1972 if (txstatus & TxUnderrun) { |
|
1973 /* Add 64 to the Tx FIFO threshold. */ |
|
1974 if (tp->tx_flag < 0x00300000) |
|
1975 tp->tx_flag += 0x00020000; |
|
1976 tp->stats.tx_fifo_errors++; |
|
1977 } |
|
1978 tp->stats.collisions += (txstatus >> 24) & 15; |
|
1979 tp->stats.tx_bytes += txstatus & 0x7ff; |
|
1980 tp->stats.tx_packets++; |
|
1981 } |
|
1982 |
|
1983 dirty_tx++; |
|
1984 tx_left--; |
|
1985 } |
|
1986 |
|
1987 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1988 |
|
1989 #ifndef RTL8139_NDEBUG |
|
1990 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev) && tp->cur_tx - dirty_tx > NUM_TX_DESC) { |
|
1991 printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n", |
|
1992 dev->name, dirty_tx, tp->cur_tx); |
|
1993 dirty_tx += NUM_TX_DESC; |
|
1994 } |
|
1995 #endif /* RTL8139_NDEBUG */ |
|
1996 |
|
1997 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1998 |
|
1999 /* only wake the queue if we did work, and the queue is stopped */ |
|
2000 if (tp->dirty_tx != dirty_tx) { |
|
2001 tp->dirty_tx = dirty_tx; |
|
2002 mb(); |
|
2003 |
|
2004 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2005 |
|
2006 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
2007 { |
|
2008 netif_wake_queue (dev); |
|
2009 } |
|
2010 |
|
2011 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2012 } |
|
2013 } |
|
2014 |
|
2015 |
|
2016 /* TODO: clean this up! Rx reset need not be this intensive */ |
|
2017 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, |
|
2018 struct rtl8139_private *tp, void __iomem *ioaddr) |
|
2019 { |
|
2020 u8 tmp8; |
|
2021 #ifdef CONFIG_8139_OLD_RX_RESET |
|
2022 int tmp_work; |
|
2023 #endif |
|
2024 |
|
2025 if (netif_msg_rx_err (tp)) |
|
2026 printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n", |
|
2027 dev->name, rx_status); |
|
2028 tp->stats.rx_errors++; |
|
2029 if (!(rx_status & RxStatusOK)) { |
|
2030 if (rx_status & RxTooLong) { |
|
2031 DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n", |
|
2032 dev->name, rx_status); |
|
2033 /* A.C.: The chip hangs here. */ |
|
2034 } |
|
2035 if (rx_status & (RxBadSymbol | RxBadAlign)) |
|
2036 tp->stats.rx_frame_errors++; |
|
2037 if (rx_status & (RxRunt | RxTooLong)) |
|
2038 tp->stats.rx_length_errors++; |
|
2039 if (rx_status & RxCRCErr) |
|
2040 tp->stats.rx_crc_errors++; |
|
2041 } else { |
|
2042 tp->xstats.rx_lost_in_ring++; |
|
2043 } |
|
2044 |
|
2045 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2046 |
|
2047 if (EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
2048 { |
|
2049 EtherCAT_dev_state(rtl_ec_dev, EC_DEVICE_STATE_ERROR); |
|
2050 } |
|
2051 |
|
2052 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2053 |
|
2054 #ifndef CONFIG_8139_OLD_RX_RESET |
|
2055 tmp8 = RTL_R8 (ChipCmd); |
|
2056 RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb); |
|
2057 RTL_W8 (ChipCmd, tmp8); |
|
2058 RTL_W32 (RxConfig, tp->rx_config); |
|
2059 tp->cur_rx = 0; |
|
2060 #else |
|
2061 /* Reset the receiver, based on RealTek recommendation. (Bug?) */ |
|
2062 |
|
2063 /* disable receive */ |
|
2064 RTL_W8_F (ChipCmd, CmdTxEnb); |
|
2065 tmp_work = 200; |
|
2066 while (--tmp_work > 0) { |
|
2067 udelay(1); |
|
2068 tmp8 = RTL_R8 (ChipCmd); |
|
2069 if (!(tmp8 & CmdRxEnb)) |
|
2070 break; |
|
2071 } |
|
2072 if (tmp_work <= 0) |
|
2073 printk (KERN_WARNING PFX "rx stop wait too long\n"); |
|
2074 /* restart receive */ |
|
2075 tmp_work = 200; |
|
2076 while (--tmp_work > 0) { |
|
2077 RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
2078 udelay(1); |
|
2079 tmp8 = RTL_R8 (ChipCmd); |
|
2080 if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb)) |
|
2081 break; |
|
2082 } |
|
2083 if (tmp_work <= 0) |
|
2084 printk (KERN_WARNING PFX "tx/rx enable wait too long\n"); |
|
2085 |
|
2086 /* and reinitialize all rx related registers */ |
|
2087 RTL_W8_F (Cfg9346, Cfg9346_Unlock); |
|
2088 /* Must enable Tx/Rx before setting transfer thresholds! */ |
|
2089 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
2090 |
|
2091 tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; |
|
2092 RTL_W32 (RxConfig, tp->rx_config); |
|
2093 tp->cur_rx = 0; |
|
2094 |
|
2095 DPRINTK("init buffer addresses\n"); |
|
2096 |
|
2097 /* Lock Config[01234] and BMCR register writes */ |
|
2098 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
2099 |
|
2100 /* init Rx ring buffer DMA address */ |
|
2101 RTL_W32_F (RxBuf, tp->rx_ring_dma); |
|
2102 |
|
2103 /* A.C.: Reset the multicast list. */ |
|
2104 __set_rx_mode (dev); |
|
2105 #endif |
|
2106 } |
|
2107 |
|
2108 #if RX_BUF_IDX == 3 |
|
2109 static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring, |
|
2110 u32 offset, unsigned int size) |
|
2111 { |
|
2112 u32 left = RX_BUF_LEN - offset; |
|
2113 |
|
2114 if (size > left) { |
|
2115 memcpy(skb->data, ring + offset, left); |
|
2116 memcpy(skb->data+left, ring, size - left); |
|
2117 } else |
|
2118 memcpy(skb->data, ring + offset, size); |
|
2119 } |
|
2120 #endif |
|
2121 |
|
2122 static void rtl8139_isr_ack(struct rtl8139_private *tp) |
|
2123 { |
|
2124 void __iomem *ioaddr = tp->mmio_addr; |
|
2125 u16 status; |
|
2126 |
|
2127 status = RTL_R16 (IntrStatus) & RxAckBits; |
|
2128 |
|
2129 /* Clear out errors and receive interrupts */ |
|
2130 if (likely(status != 0)) { |
|
2131 if (unlikely(status & (RxFIFOOver | RxOverflow))) { |
|
2132 tp->stats.rx_errors++; |
|
2133 if (status & RxFIFOOver) |
|
2134 tp->stats.rx_fifo_errors++; |
|
2135 } |
|
2136 RTL_W16_F (IntrStatus, RxAckBits); |
|
2137 } |
|
2138 } |
|
2139 |
|
2140 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp, |
|
2141 int budget) |
|
2142 { |
|
2143 void __iomem *ioaddr = tp->mmio_addr; |
|
2144 int received = 0; |
|
2145 unsigned char *rx_ring = tp->rx_ring; |
|
2146 unsigned int cur_rx = tp->cur_rx; |
|
2147 unsigned int rx_size = 0; |
|
2148 |
|
2149 DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x," |
|
2150 " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx, |
|
2151 RTL_R16 (RxBufAddr), |
|
2152 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); |
|
2153 |
|
2154 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2155 #if 0 |
|
2156 if (EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
2157 { |
|
2158 rtl_ec_dev.rx_intr_cnt++; |
|
2159 rdtscl(rtl_ec_dev.rx_time); // Get CPU cycles |
|
2160 } |
|
2161 #endif |
|
2162 |
|
2163 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2164 |
|
2165 while ((EtherCAT_dev_is_ec(rtl_ec_dev, dev) || netif_running(dev)) |
|
2166 && received < budget |
|
2167 && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) { |
|
2168 u32 ring_offset = cur_rx % RX_BUF_LEN; |
|
2169 u32 rx_status; |
|
2170 unsigned int pkt_size; |
|
2171 struct sk_buff *skb; |
|
2172 |
|
2173 rmb(); |
|
2174 |
|
2175 /* read size+status of next frame from DMA ring buffer */ |
|
2176 rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset)); |
|
2177 rx_size = rx_status >> 16; |
|
2178 pkt_size = rx_size - 4; |
|
2179 |
|
2180 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2181 |
|
2182 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev) && netif_msg_rx_status(tp)) |
|
2183 printk(KERN_DEBUG "%s: rtl8139_rx() status %4.4x, size %4.4x," |
|
2184 " cur %4.4x.\n", dev->name, rx_status, |
|
2185 rx_size, cur_rx); |
|
2186 |
|
2187 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2188 |
|
2189 #if RTL8139_DEBUG > 2 |
|
2190 { |
|
2191 int i; |
|
2192 DPRINTK ("%s: Frame contents ", dev->name); |
|
2193 for (i = 0; i < 70; i++) |
|
2194 printk (" %2.2x", |
|
2195 rx_ring[ring_offset + i]); |
|
2196 printk (".\n"); |
|
2197 } |
|
2198 #endif |
|
2199 |
|
2200 /* Packet copy from FIFO still in progress. |
|
2201 * Theoretically, this should never happen |
|
2202 * since EarlyRx is disabled. |
|
2203 */ |
|
2204 if (unlikely(rx_size == 0xfff0)) { |
|
2205 if (!tp->fifo_copy_timeout) |
|
2206 tp->fifo_copy_timeout = jiffies + 2; |
|
2207 else if (time_after(jiffies, tp->fifo_copy_timeout)) { |
|
2208 DPRINTK ("%s: hung FIFO. Reset.", dev->name); |
|
2209 rx_size = 0; |
|
2210 goto no_early_rx; |
|
2211 } |
|
2212 if (netif_msg_intr(tp)) { |
|
2213 printk(KERN_DEBUG "%s: fifo copy in progress.", |
|
2214 dev->name); |
|
2215 } |
|
2216 tp->xstats.early_rx++; |
|
2217 break; |
|
2218 } |
|
2219 |
|
2220 no_early_rx: |
|
2221 tp->fifo_copy_timeout = 0; |
|
2222 |
|
2223 /* If Rx err or invalid rx_size/rx_status received |
|
2224 * (which happens if we get lost in the ring), |
|
2225 * Rx process gets reset, so we abort any further |
|
2226 * Rx processing. |
|
2227 */ |
|
2228 if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) || |
|
2229 (rx_size < 8) || |
|
2230 (!(rx_status & RxStatusOK)))) { |
|
2231 rtl8139_rx_err (rx_status, dev, tp, ioaddr); |
|
2232 received = -1; |
|
2233 goto out; |
|
2234 } |
|
2235 |
|
2236 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2237 |
|
2238 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
2239 { |
|
2240 /* Malloc up new buffer, compatible with net-2e. */ |
|
2241 /* Omit the four octet CRC from the length. */ |
|
2242 skb = dev_alloc_skb(pkt_size + 2); |
|
2243 |
|
2244 if (likely(skb)) { |
|
2245 skb->dev = dev; |
|
2246 skb_reserve (skb, 2); /* 16 byte align the IP fields. */ |
|
2247 #if RX_BUF_IDX == 3 |
|
2248 wrap_copy(skb, rx_ring, ring_offset+4, pkt_size); |
|
2249 #else |
|
2250 eth_copy_and_sum (skb, &rx_ring[ring_offset + 4], pkt_size, 0); |
|
2251 #endif |
|
2252 skb_put (skb, pkt_size); |
|
2253 |
|
2254 skb->protocol = eth_type_trans (skb, dev); |
|
2255 |
|
2256 dev->last_rx = jiffies; |
|
2257 tp->stats.rx_bytes += pkt_size; |
|
2258 tp->stats.rx_packets++; |
|
2259 |
|
2260 netif_receive_skb (skb); |
|
2261 } else { |
|
2262 if (net_ratelimit()) |
|
2263 printk (KERN_WARNING |
|
2264 "%s: Memory squeeze, dropping packet.\n", |
|
2265 dev->name); |
|
2266 tp->stats.rx_dropped++; |
|
2267 } |
|
2268 } |
|
2269 else |
|
2270 { |
|
2271 if (EtherCAT_dev_receive(rtl_ec_dev, |
|
2272 &rx_ring[ring_offset + 4] + ETH_HLEN, |
|
2273 pkt_size - ETH_HLEN) == 0) |
|
2274 { |
|
2275 dev->last_rx = jiffies; |
|
2276 tp->stats.rx_bytes += pkt_size; |
|
2277 tp->stats.rx_packets++; |
|
2278 } |
|
2279 } |
|
2280 |
|
2281 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2282 |
|
2283 received++; |
|
2284 |
|
2285 cur_rx = (cur_rx + rx_size + 4 + 3) & ~3; |
|
2286 RTL_W16 (RxBufPtr, (u16) (cur_rx - 16)); |
|
2287 |
|
2288 rtl8139_isr_ack(tp); |
|
2289 } |
|
2290 |
|
2291 if (unlikely(!received || rx_size == 0xfff0)) |
|
2292 rtl8139_isr_ack(tp); |
|
2293 |
|
2294 #if RTL8139_DEBUG > 1 |
|
2295 DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x," |
|
2296 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, |
|
2297 RTL_R16 (RxBufAddr), |
|
2298 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); |
|
2299 #endif |
|
2300 |
|
2301 tp->cur_rx = cur_rx; |
|
2302 |
|
2303 /* |
|
2304 * The receive buffer should be mostly empty. |
|
2305 * Tell NAPI to reenable the Rx irq. |
|
2306 */ |
|
2307 if (tp->fifo_copy_timeout) |
|
2308 received = budget; |
|
2309 |
|
2310 out: |
|
2311 return received; |
|
2312 } |
|
2313 |
|
2314 |
|
2315 static void rtl8139_weird_interrupt (struct net_device *dev, |
|
2316 struct rtl8139_private *tp, |
|
2317 void __iomem *ioaddr, |
|
2318 int status, int link_changed) |
|
2319 { |
|
2320 DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n", |
|
2321 dev->name, status); |
|
2322 |
|
2323 assert (dev != NULL); |
|
2324 assert (tp != NULL); |
|
2325 assert (ioaddr != NULL); |
|
2326 |
|
2327 /* Update the error count. */ |
|
2328 tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2329 RTL_W32 (RxMissed, 0); |
|
2330 |
|
2331 if ((status & RxUnderrun) && link_changed && |
|
2332 (tp->drv_flags & HAS_LNK_CHNG)) { |
|
2333 rtl_check_media(dev, 0); |
|
2334 status &= ~RxUnderrun; |
|
2335 } |
|
2336 |
|
2337 if (status & (RxUnderrun | RxErr)) |
|
2338 tp->stats.rx_errors++; |
|
2339 |
|
2340 if (status & PCSTimeout) |
|
2341 tp->stats.rx_length_errors++; |
|
2342 if (status & RxUnderrun) |
|
2343 tp->stats.rx_fifo_errors++; |
|
2344 if (status & PCIErr) { |
|
2345 u16 pci_cmd_status; |
|
2346 pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status); |
|
2347 pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status); |
|
2348 |
|
2349 printk (KERN_ERR "%s: PCI Bus error %4.4x.\n", |
|
2350 dev->name, pci_cmd_status); |
|
2351 } |
|
2352 } |
|
2353 |
|
2354 int rtl8139_poll(struct net_device *dev, int *budget) |
|
2355 { |
|
2356 struct rtl8139_private *tp = netdev_priv(dev); |
|
2357 void __iomem *ioaddr = tp->mmio_addr; |
|
2358 int orig_budget = min(*budget, dev->quota); |
|
2359 int done = 1; |
|
2360 |
|
2361 spin_lock(&tp->rx_lock); |
|
2362 if (likely(RTL_R16(IntrStatus) & RxAckBits)) { |
|
2363 int work_done; |
|
2364 |
|
2365 work_done = rtl8139_rx(dev, tp, orig_budget); |
|
2366 if (likely(work_done > 0)) { |
|
2367 *budget -= work_done; |
|
2368 dev->quota -= work_done; |
|
2369 done = (work_done < orig_budget); |
|
2370 } |
|
2371 } |
|
2372 |
|
2373 if (done) { |
|
2374 /* |
|
2375 * Order is important since data can get interrupted |
|
2376 * again when we think we are done. |
|
2377 */ |
|
2378 |
|
2379 local_irq_disable(); |
|
2380 RTL_W16_F(IntrMask, rtl8139_intr_mask); |
|
2381 __netif_rx_complete(dev); |
|
2382 local_irq_enable(); |
|
2383 } |
|
2384 spin_unlock(&tp->rx_lock); |
|
2385 |
|
2386 return !done; |
|
2387 } |
|
2388 |
|
2389 /* The interrupt handler does all of the Rx thread work and cleans up |
|
2390 after the Tx thread. */ |
|
2391 irqreturn_t rtl8139_interrupt (int irq, void *dev_instance, |
|
2392 struct pt_regs *regs) |
|
2393 { |
|
2394 struct net_device *dev = (struct net_device *) dev_instance; |
|
2395 struct rtl8139_private *tp = netdev_priv(dev); |
|
2396 void __iomem *ioaddr = tp->mmio_addr; |
|
2397 u16 status, ackstat; |
|
2398 int link_changed = 0; /* avoid bogus "uninit" warning */ |
|
2399 int handled = 0; |
|
2400 |
|
2401 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2402 |
|
2403 if (EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
2404 { |
|
2405 #if 0 // FIXME |
|
2406 rtl_ec_dev.intr_cnt++; |
|
2407 #endif |
|
2408 status = RTL_R16 (IntrStatus); |
|
2409 } |
|
2410 else |
|
2411 { |
|
2412 spin_lock(&tp->lock); |
|
2413 |
|
2414 status = RTL_R16 (IntrStatus); |
|
2415 |
|
2416 if (unlikely((status & rtl8139_intr_mask) == 0)) |
|
2417 goto out; |
|
2418 } |
|
2419 |
|
2420 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2421 |
|
2422 handled = 1; |
|
2423 |
|
2424 /* h/w no longer present (hotplug?) or major error, bail */ |
|
2425 if (unlikely(status == 0xFFFF)) |
|
2426 goto out; |
|
2427 |
|
2428 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2429 |
|
2430 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
2431 { |
|
2432 /* close possible race's with dev_close */ |
|
2433 if (unlikely(!netif_running(dev))) { |
|
2434 RTL_W16 (IntrMask, 0); |
|
2435 goto out; |
|
2436 } |
|
2437 } |
|
2438 |
|
2439 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2440 |
|
2441 /* Acknowledge all of the current interrupt sources ASAP, but |
|
2442 an first get an additional status bit from CSCR. */ |
|
2443 if (unlikely(status & RxUnderrun)) |
|
2444 link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit; |
|
2445 |
|
2446 ackstat = status & ~(RxAckBits | TxErr); |
|
2447 if (ackstat) { |
|
2448 RTL_W16 (IntrStatus, ackstat); |
|
2449 } |
|
2450 |
|
2451 /* Receive packets are processed by poll routine. |
|
2452 If not running start it now. */ |
|
2453 |
|
2454 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2455 |
|
2456 if (status & RxAckBits) |
|
2457 { |
|
2458 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
2459 { |
|
2460 /* Polling vormerken */ |
|
2461 if (netif_rx_schedule_prep(dev)) { |
|
2462 RTL_W16_F (IntrMask, rtl8139_norx_intr_mask); |
|
2463 __netif_rx_schedule (dev); |
|
2464 } |
|
2465 } |
|
2466 else |
|
2467 { |
|
2468 /* Beim EtherCAT-Device einfach alle Frames empfangen */ |
|
2469 rtl8139_rx(dev, tp, 100); // FIXME Das ist echt dirty... |
|
2470 } |
|
2471 } |
|
2472 |
|
2473 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2474 |
|
2475 /* Check uncommon events with one test. */ |
|
2476 if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr))) |
|
2477 rtl8139_weird_interrupt (dev, tp, ioaddr, |
|
2478 status, link_changed); |
|
2479 |
|
2480 if (status & (TxOK | TxErr)) { |
|
2481 rtl8139_tx_interrupt (dev, tp, ioaddr); |
|
2482 if (status & TxErr) |
|
2483 RTL_W16 (IntrStatus, TxErr); |
|
2484 } |
|
2485 out: |
|
2486 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2487 |
|
2488 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
2489 { |
|
2490 spin_unlock (&tp->lock); |
|
2491 } |
|
2492 |
|
2493 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2494 |
|
2495 DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n", |
|
2496 dev->name, RTL_R16 (IntrStatus)); |
|
2497 return IRQ_RETVAL(handled); |
|
2498 } |
|
2499 |
|
2500 #ifdef CONFIG_NET_POLL_CONTROLLER |
|
2501 /* |
|
2502 * Polling receive - used by netconsole and other diagnostic tools |
|
2503 * to allow network i/o with interrupts disabled. |
|
2504 */ |
|
2505 static void rtl8139_poll_controller(struct net_device *dev) |
|
2506 { |
|
2507 disable_irq(dev->irq); |
|
2508 rtl8139_interrupt(dev->irq, dev, NULL); |
|
2509 enable_irq(dev->irq); |
|
2510 } |
|
2511 #endif |
|
2512 |
|
2513 static int rtl8139_close (struct net_device *dev) |
|
2514 { |
|
2515 struct rtl8139_private *tp = netdev_priv(dev); |
|
2516 void __iomem *ioaddr = tp->mmio_addr; |
|
2517 int ret = 0; |
|
2518 unsigned long flags; |
|
2519 |
|
2520 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2521 |
|
2522 if (!EtherCAT_dev_is_ec(rtl_ec_dev, dev)) |
|
2523 { |
|
2524 netif_stop_queue(dev); |
|
2525 if (tp->thr_pid >= 0) { |
|
2526 tp->time_to_die = 1; |
|
2527 wmb(); |
|
2528 ret = kill_proc (tp->thr_pid, SIGTERM, 1); |
|
2529 if (ret) { |
|
2530 printk (KERN_ERR "%s: unable to signal thread\n", dev->name); |
|
2531 return ret; |
|
2532 } |
|
2533 wait_for_completion (&tp->thr_exited); |
|
2534 } |
|
2535 |
|
2536 if (netif_msg_ifdown(tp)) |
|
2537 printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n", |
|
2538 dev->name, RTL_R16 (IntrStatus)); |
|
2539 |
|
2540 spin_lock_irqsave (&tp->lock, flags); |
|
2541 |
|
2542 /* Stop the chip's Tx and Rx DMA processes. */ |
|
2543 RTL_W8 (ChipCmd, 0); |
|
2544 |
|
2545 /* Disable interrupts by clearing the interrupt mask. */ |
|
2546 RTL_W16 (IntrMask, 0); |
|
2547 |
|
2548 /* Update the error counts. */ |
|
2549 tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2550 RTL_W32 (RxMissed, 0); |
|
2551 |
|
2552 spin_unlock_irqrestore (&tp->lock, flags); |
|
2553 |
|
2554 synchronize_irq (dev->irq); /* racy, but that's ok here */ |
|
2555 free_irq (dev->irq, dev); |
|
2556 } |
|
2557 else |
|
2558 { |
|
2559 /* Stop the chip's Tx and Rx DMA processes. */ |
|
2560 RTL_W8 (ChipCmd, 0); |
|
2561 |
|
2562 /* Disable interrupts by clearing the interrupt mask. */ |
|
2563 RTL_W16 (IntrMask, 0); |
|
2564 |
|
2565 /* Update the error counts. */ |
|
2566 tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2567 RTL_W32 (RxMissed, 0); |
|
2568 } |
|
2569 |
|
2570 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2571 |
|
2572 rtl8139_tx_clear (tp); |
|
2573 |
|
2574 pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
|
2575 tp->rx_ring, tp->rx_ring_dma); |
|
2576 pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN, |
|
2577 tp->tx_bufs, tp->tx_bufs_dma); |
|
2578 tp->rx_ring = NULL; |
|
2579 tp->tx_bufs = NULL; |
|
2580 |
|
2581 /* Green! Put the chip in low-power mode. */ |
|
2582 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
2583 |
|
2584 if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
2585 RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ |
|
2586 |
|
2587 return 0; |
|
2588 } |
|
2589 |
|
2590 |
|
2591 /* Get the ethtool Wake-on-LAN settings. Assumes that wol points to |
|
2592 kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and |
|
2593 other threads or interrupts aren't messing with the 8139. */ |
|
2594 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
|
2595 { |
|
2596 struct rtl8139_private *np = netdev_priv(dev); |
|
2597 void __iomem *ioaddr = np->mmio_addr; |
|
2598 |
|
2599 spin_lock_irq(&np->lock); |
|
2600 if (rtl_chip_info[np->chipset].flags & HasLWake) { |
|
2601 u8 cfg3 = RTL_R8 (Config3); |
|
2602 u8 cfg5 = RTL_R8 (Config5); |
|
2603 |
|
2604 wol->supported = WAKE_PHY | WAKE_MAGIC |
|
2605 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST; |
|
2606 |
|
2607 wol->wolopts = 0; |
|
2608 if (cfg3 & Cfg3_LinkUp) |
|
2609 wol->wolopts |= WAKE_PHY; |
|
2610 if (cfg3 & Cfg3_Magic) |
|
2611 wol->wolopts |= WAKE_MAGIC; |
|
2612 /* (KON)FIXME: See how netdev_set_wol() handles the |
|
2613 following constants. */ |
|
2614 if (cfg5 & Cfg5_UWF) |
|
2615 wol->wolopts |= WAKE_UCAST; |
|
2616 if (cfg5 & Cfg5_MWF) |
|
2617 wol->wolopts |= WAKE_MCAST; |
|
2618 if (cfg5 & Cfg5_BWF) |
|
2619 wol->wolopts |= WAKE_BCAST; |
|
2620 } |
|
2621 spin_unlock_irq(&np->lock); |
|
2622 } |
|
2623 |
|
2624 |
|
2625 /* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes |
|
2626 that wol points to kernel memory and other threads or interrupts |
|
2627 aren't messing with the 8139. */ |
|
2628 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
|
2629 { |
|
2630 struct rtl8139_private *np = netdev_priv(dev); |
|
2631 void __iomem *ioaddr = np->mmio_addr; |
|
2632 u32 support; |
|
2633 u8 cfg3, cfg5; |
|
2634 |
|
2635 support = ((rtl_chip_info[np->chipset].flags & HasLWake) |
|
2636 ? (WAKE_PHY | WAKE_MAGIC |
|
2637 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST) |
|
2638 : 0); |
|
2639 if (wol->wolopts & ~support) |
|
2640 return -EINVAL; |
|
2641 |
|
2642 spin_lock_irq(&np->lock); |
|
2643 cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic); |
|
2644 if (wol->wolopts & WAKE_PHY) |
|
2645 cfg3 |= Cfg3_LinkUp; |
|
2646 if (wol->wolopts & WAKE_MAGIC) |
|
2647 cfg3 |= Cfg3_Magic; |
|
2648 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
2649 RTL_W8 (Config3, cfg3); |
|
2650 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
2651 |
|
2652 cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); |
|
2653 /* (KON)FIXME: These are untested. We may have to set the |
|
2654 CRC0, Wakeup0 and LSBCRC0 registers too, but I have no |
|
2655 documentation. */ |
|
2656 if (wol->wolopts & WAKE_UCAST) |
|
2657 cfg5 |= Cfg5_UWF; |
|
2658 if (wol->wolopts & WAKE_MCAST) |
|
2659 cfg5 |= Cfg5_MWF; |
|
2660 if (wol->wolopts & WAKE_BCAST) |
|
2661 cfg5 |= Cfg5_BWF; |
|
2662 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ |
|
2663 spin_unlock_irq(&np->lock); |
|
2664 |
|
2665 return 0; |
|
2666 } |
|
2667 |
|
2668 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
|
2669 { |
|
2670 struct rtl8139_private *np = netdev_priv(dev); |
|
2671 strcpy(info->driver, DRV_NAME); |
|
2672 strcpy(info->version, DRV_VERSION); |
|
2673 strcpy(info->bus_info, pci_name(np->pci_dev)); |
|
2674 info->regdump_len = np->regs_len; |
|
2675 } |
|
2676 |
|
2677 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
|
2678 { |
|
2679 struct rtl8139_private *np = netdev_priv(dev); |
|
2680 spin_lock_irq(&np->lock); |
|
2681 mii_ethtool_gset(&np->mii, cmd); |
|
2682 spin_unlock_irq(&np->lock); |
|
2683 return 0; |
|
2684 } |
|
2685 |
|
2686 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
|
2687 { |
|
2688 struct rtl8139_private *np = netdev_priv(dev); |
|
2689 int rc; |
|
2690 spin_lock_irq(&np->lock); |
|
2691 rc = mii_ethtool_sset(&np->mii, cmd); |
|
2692 spin_unlock_irq(&np->lock); |
|
2693 return rc; |
|
2694 } |
|
2695 |
|
2696 static int rtl8139_nway_reset(struct net_device *dev) |
|
2697 { |
|
2698 struct rtl8139_private *np = netdev_priv(dev); |
|
2699 return mii_nway_restart(&np->mii); |
|
2700 } |
|
2701 |
|
2702 static u32 rtl8139_get_link(struct net_device *dev) |
|
2703 { |
|
2704 struct rtl8139_private *np = netdev_priv(dev); |
|
2705 return mii_link_ok(&np->mii); |
|
2706 } |
|
2707 |
|
2708 static u32 rtl8139_get_msglevel(struct net_device *dev) |
|
2709 { |
|
2710 struct rtl8139_private *np = netdev_priv(dev); |
|
2711 return np->msg_enable; |
|
2712 } |
|
2713 |
|
2714 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum) |
|
2715 { |
|
2716 struct rtl8139_private *np = netdev_priv(dev); |
|
2717 np->msg_enable = datum; |
|
2718 } |
|
2719 |
|
2720 /* TODO: we are too slack to do reg dumping for pio, for now */ |
|
2721 #ifdef CONFIG_8139TOO_PIO |
|
2722 #define rtl8139_get_regs_len NULL |
|
2723 #define rtl8139_get_regs NULL |
|
2724 #else |
|
2725 static int rtl8139_get_regs_len(struct net_device *dev) |
|
2726 { |
|
2727 struct rtl8139_private *np = netdev_priv(dev); |
|
2728 return np->regs_len; |
|
2729 } |
|
2730 |
|
2731 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf) |
|
2732 { |
|
2733 struct rtl8139_private *np = netdev_priv(dev); |
|
2734 |
|
2735 regs->version = RTL_REGS_VER; |
|
2736 |
|
2737 spin_lock_irq(&np->lock); |
|
2738 memcpy_fromio(regbuf, np->mmio_addr, regs->len); |
|
2739 spin_unlock_irq(&np->lock); |
|
2740 } |
|
2741 #endif /* CONFIG_8139TOO_MMIO */ |
|
2742 |
|
2743 static int rtl8139_get_stats_count(struct net_device *dev) |
|
2744 { |
|
2745 return RTL_NUM_STATS; |
|
2746 } |
|
2747 |
|
2748 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data) |
|
2749 { |
|
2750 struct rtl8139_private *np = netdev_priv(dev); |
|
2751 |
|
2752 data[0] = np->xstats.early_rx; |
|
2753 data[1] = np->xstats.tx_buf_mapped; |
|
2754 data[2] = np->xstats.tx_timeouts; |
|
2755 data[3] = np->xstats.rx_lost_in_ring; |
|
2756 } |
|
2757 |
|
2758 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data) |
|
2759 { |
|
2760 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys)); |
|
2761 } |
|
2762 |
|
2763 static struct ethtool_ops rtl8139_ethtool_ops = { |
|
2764 .get_drvinfo = rtl8139_get_drvinfo, |
|
2765 .get_settings = rtl8139_get_settings, |
|
2766 .set_settings = rtl8139_set_settings, |
|
2767 .get_regs_len = rtl8139_get_regs_len, |
|
2768 .get_regs = rtl8139_get_regs, |
|
2769 .nway_reset = rtl8139_nway_reset, |
|
2770 .get_link = rtl8139_get_link, |
|
2771 .get_msglevel = rtl8139_get_msglevel, |
|
2772 .set_msglevel = rtl8139_set_msglevel, |
|
2773 .get_wol = rtl8139_get_wol, |
|
2774 .set_wol = rtl8139_set_wol, |
|
2775 .get_strings = rtl8139_get_strings, |
|
2776 .get_stats_count = rtl8139_get_stats_count, |
|
2777 .get_ethtool_stats = rtl8139_get_ethtool_stats, |
|
2778 }; |
|
2779 |
|
2780 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
|
2781 { |
|
2782 struct rtl8139_private *np = netdev_priv(dev); |
|
2783 int rc; |
|
2784 |
|
2785 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2786 |
|
2787 if (EtherCAT_dev_is_ec(rtl_ec_dev, dev) || !netif_running(dev)) |
|
2788 return -EINVAL; |
|
2789 |
|
2790 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2791 |
|
2792 spin_lock_irq(&np->lock); |
|
2793 rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL); |
|
2794 spin_unlock_irq(&np->lock); |
|
2795 |
|
2796 return rc; |
|
2797 } |
|
2798 |
|
2799 |
|
2800 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) |
|
2801 { |
|
2802 struct rtl8139_private *tp = netdev_priv(dev); |
|
2803 void __iomem *ioaddr = tp->mmio_addr; |
|
2804 unsigned long flags; |
|
2805 |
|
2806 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2807 |
|
2808 if (EtherCAT_dev_is_ec(rtl_ec_dev, dev) || netif_running(dev)) |
|
2809 { |
|
2810 spin_lock_irqsave (&tp->lock, flags); |
|
2811 tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2812 RTL_W32 (RxMissed, 0); |
|
2813 spin_unlock_irqrestore (&tp->lock, flags); |
|
2814 } |
|
2815 |
|
2816 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2817 |
|
2818 return &tp->stats; |
|
2819 } |
|
2820 |
|
2821 /* Set or clear the multicast filter for this adaptor. |
|
2822 This routine is not state sensitive and need not be SMP locked. */ |
|
2823 |
|
2824 static void __set_rx_mode (struct net_device *dev) |
|
2825 { |
|
2826 struct rtl8139_private *tp = netdev_priv(dev); |
|
2827 void __iomem *ioaddr = tp->mmio_addr; |
|
2828 u32 mc_filter[2]; /* Multicast hash filter */ |
|
2829 int i, rx_mode; |
|
2830 u32 tmp; |
|
2831 |
|
2832 DPRINTK ("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n", |
|
2833 dev->name, dev->flags, RTL_R32 (RxConfig)); |
|
2834 |
|
2835 /* Note: do not reorder, GCC is clever about common statements. */ |
|
2836 if (dev->flags & IFF_PROMISC) { |
|
2837 /* Unconditionally log net taps. */ |
|
2838 printk (KERN_NOTICE "%s: Promiscuous mode enabled.\n", |
|
2839 dev->name); |
|
2840 rx_mode = |
|
2841 AcceptBroadcast | AcceptMulticast | AcceptMyPhys | |
|
2842 AcceptAllPhys; |
|
2843 mc_filter[1] = mc_filter[0] = 0xffffffff; |
|
2844 } else if ((dev->mc_count > multicast_filter_limit) |
|
2845 || (dev->flags & IFF_ALLMULTI)) { |
|
2846 /* Too many to filter perfectly -- accept all multicasts. */ |
|
2847 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; |
|
2848 mc_filter[1] = mc_filter[0] = 0xffffffff; |
|
2849 } else { |
|
2850 struct dev_mc_list *mclist; |
|
2851 rx_mode = AcceptBroadcast | AcceptMyPhys; |
|
2852 mc_filter[1] = mc_filter[0] = 0; |
|
2853 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; |
|
2854 i++, mclist = mclist->next) { |
|
2855 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; |
|
2856 |
|
2857 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); |
|
2858 rx_mode |= AcceptMulticast; |
|
2859 } |
|
2860 } |
|
2861 |
|
2862 /* We can safely update without stopping the chip. */ |
|
2863 tmp = rtl8139_rx_config | rx_mode; |
|
2864 if (tp->rx_config != tmp) { |
|
2865 RTL_W32_F (RxConfig, tmp); |
|
2866 tp->rx_config = tmp; |
|
2867 } |
|
2868 RTL_W32_F (MAR0 + 0, mc_filter[0]); |
|
2869 RTL_W32_F (MAR0 + 4, mc_filter[1]); |
|
2870 } |
|
2871 |
|
2872 static void rtl8139_set_rx_mode (struct net_device *dev) |
|
2873 { |
|
2874 unsigned long flags; |
|
2875 struct rtl8139_private *tp = netdev_priv(dev); |
|
2876 |
|
2877 spin_lock_irqsave (&tp->lock, flags); |
|
2878 __set_rx_mode(dev); |
|
2879 spin_unlock_irqrestore (&tp->lock, flags); |
|
2880 } |
|
2881 |
|
2882 #ifdef CONFIG_PM |
|
2883 |
|
2884 static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state) |
|
2885 { |
|
2886 struct net_device *dev = pci_get_drvdata (pdev); |
|
2887 struct rtl8139_private *tp = netdev_priv(dev); |
|
2888 void __iomem *ioaddr = tp->mmio_addr; |
|
2889 unsigned long flags; |
|
2890 |
|
2891 pci_save_state (pdev); |
|
2892 |
|
2893 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2894 |
|
2895 if (EtherCAT_dev_is_ec(rtl_ec_dev, dev) || !netif_running (dev)) |
|
2896 return 0; |
|
2897 |
|
2898 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2899 |
|
2900 netif_device_detach (dev); |
|
2901 |
|
2902 spin_lock_irqsave (&tp->lock, flags); |
|
2903 |
|
2904 /* Disable interrupts, stop Tx and Rx. */ |
|
2905 RTL_W16 (IntrMask, 0); |
|
2906 RTL_W8 (ChipCmd, 0); |
|
2907 |
|
2908 /* Update the error counts. */ |
|
2909 tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2910 RTL_W32 (RxMissed, 0); |
|
2911 |
|
2912 spin_unlock_irqrestore (&tp->lock, flags); |
|
2913 |
|
2914 pci_set_power_state (pdev, PCI_D3hot); |
|
2915 |
|
2916 return 0; |
|
2917 } |
|
2918 |
|
2919 |
|
2920 static int rtl8139_resume (struct pci_dev *pdev) |
|
2921 { |
|
2922 struct net_device *dev = pci_get_drvdata (pdev); |
|
2923 |
|
2924 pci_restore_state (pdev); |
|
2925 |
|
2926 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2927 |
|
2928 if (EtherCAT_dev_is_ec(rtl_ec_dev, dev) || !netif_running (dev)) |
|
2929 return 0; |
|
2930 |
|
2931 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2932 |
|
2933 pci_set_power_state (pdev, PCI_D0); |
|
2934 rtl8139_init_ring (dev); |
|
2935 rtl8139_hw_start (dev); |
|
2936 netif_device_attach (dev); |
|
2937 return 0; |
|
2938 } |
|
2939 |
|
2940 #endif /* CONFIG_PM */ |
|
2941 |
|
2942 |
|
2943 static struct pci_driver rtl8139_pci_driver = { |
|
2944 .name = DRV_NAME, |
|
2945 .id_table = rtl8139_pci_tbl, |
|
2946 .probe = rtl8139_init_one, |
|
2947 .remove = __devexit_p(rtl8139_remove_one), |
|
2948 #ifdef CONFIG_PM |
|
2949 .suspend = rtl8139_suspend, |
|
2950 .resume = rtl8139_resume, |
|
2951 #endif /* CONFIG_PM */ |
|
2952 }; |
|
2953 |
|
2954 |
|
2955 static int __init rtl8139_init_module (void) |
|
2956 { |
|
2957 /* when we're a module, we always print a version message, |
|
2958 * even if no 8139 board is found. |
|
2959 */ |
|
2960 #ifdef MODULE |
|
2961 printk (KERN_INFO RTL8139_DRIVER_NAME "\n"); |
|
2962 #endif |
|
2963 |
|
2964 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2965 |
|
2966 printk(KERN_INFO "Initializing RTL8139-EtherCAT module. %s\n", COMPILE_INFO); |
|
2967 printk(KERN_INFO "EtherCAT device index is %i.\n", ec_device_index); |
|
2968 |
|
2969 if (pci_module_init(&rtl8139_pci_driver) < 0) |
|
2970 { |
|
2971 printk(KERN_ERR "Could not init PCI module.\n"); |
|
2972 goto out_ec_dev; |
|
2973 } |
|
2974 |
|
2975 if (!rtl_ec_dev) |
|
2976 { |
|
2977 printk(KERN_WARNING "NO EtherCAT device registered!\n"); |
|
2978 } |
|
2979 |
|
2980 return 0; |
|
2981 |
|
2982 out_ec_dev: |
|
2983 if (rtl_ec_dev) { |
|
2984 printk(KERN_INFO "Unregistering RTL8139-EtherCAT device...\n"); |
|
2985 EtherCAT_dev_unregister(ec_device_master_index); |
|
2986 rtl_ec_dev = NULL; |
|
2987 } |
|
2988 |
|
2989 return -1; |
|
2990 |
|
2991 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2992 } |
|
2993 |
|
2994 |
|
2995 static void __exit rtl8139_cleanup_module (void) |
|
2996 { |
|
2997 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2998 |
|
2999 printk(KERN_INFO "Cleaning up RTL8139-EtherCAT module...\n"); |
|
3000 |
|
3001 if (rtl_ec_dev) { |
|
3002 printk(KERN_INFO "Unregistering RTL8139-EtherCAT device...\n"); |
|
3003 EtherCAT_dev_unregister(ec_device_master_index); |
|
3004 rtl_ec_dev = NULL; |
|
3005 } |
|
3006 |
|
3007 pci_unregister_driver(&rtl8139_pci_driver); |
|
3008 |
|
3009 printk(KERN_INFO "RTL8139-EtherCAT module cleaned up.\n"); |
|
3010 |
|
3011 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
3012 } |
|
3013 |
|
3014 |
|
3015 module_init(rtl8139_init_module); |
|
3016 module_exit(rtl8139_cleanup_module); |