devices/igb/e1000_i210-3.18-ethercat.h
branchstable-1.5
changeset 2685 740291442c05
equal deleted inserted replaced
2684:56587a22d05c 2685:740291442c05
       
     1 /* Intel(R) Gigabit Ethernet Linux driver
       
     2  * Copyright(c) 2007-2014 Intel Corporation.
       
     3  *
       
     4  * This program is free software; you can redistribute it and/or modify it
       
     5  * under the terms and conditions of the GNU General Public License,
       
     6  * version 2, as published by the Free Software Foundation.
       
     7  *
       
     8  * This program is distributed in the hope it will be useful, but WITHOUT
       
     9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
       
    10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
       
    11  * more details.
       
    12  *
       
    13  * You should have received a copy of the GNU General Public License along with
       
    14  * this program; if not, see <http://www.gnu.org/licenses/>.
       
    15  *
       
    16  * The full GNU General Public License is included in this distribution in
       
    17  * the file called "COPYING".
       
    18  *
       
    19  * Contact Information:
       
    20  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
       
    21  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
       
    22  */
       
    23 
       
    24 #ifndef _E1000_I210_H_
       
    25 #define _E1000_I210_H_
       
    26 
       
    27 s32 igb_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
       
    28 void igb_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
       
    29 s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data);
       
    30 s32 igb_read_invm_version(struct e1000_hw *hw,
       
    31 			  struct e1000_fw_version *invm_ver);
       
    32 s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data);
       
    33 s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data);
       
    34 s32 igb_init_nvm_params_i210(struct e1000_hw *hw);
       
    35 bool igb_get_flash_presence_i210(struct e1000_hw *hw);
       
    36 s32 igb_pll_workaround_i210(struct e1000_hw *hw);
       
    37 
       
    38 #define E1000_STM_OPCODE		0xDB00
       
    39 #define E1000_EEPROM_FLASH_SIZE_WORD	0x11
       
    40 
       
    41 #define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \
       
    42 	(u8)((invm_dword) & 0x7)
       
    43 #define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \
       
    44 	(u8)(((invm_dword) & 0x0000FE00) >> 9)
       
    45 #define INVM_DWORD_TO_WORD_DATA(invm_dword) \
       
    46 	(u16)(((invm_dword) & 0xFFFF0000) >> 16)
       
    47 
       
    48 enum E1000_INVM_STRUCTURE_TYPE {
       
    49 	E1000_INVM_UNINITIALIZED_STRUCTURE		= 0x00,
       
    50 	E1000_INVM_WORD_AUTOLOAD_STRUCTURE		= 0x01,
       
    51 	E1000_INVM_CSR_AUTOLOAD_STRUCTURE		= 0x02,
       
    52 	E1000_INVM_PHY_REGISTER_AUTOLOAD_STRUCTURE	= 0x03,
       
    53 	E1000_INVM_RSA_KEY_SHA256_STRUCTURE		= 0x04,
       
    54 	E1000_INVM_INVALIDATED_STRUCTURE		= 0x0F,
       
    55 };
       
    56 
       
    57 #define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS	8
       
    58 #define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS	1
       
    59 #define E1000_INVM_ULT_BYTES_SIZE			8
       
    60 #define E1000_INVM_RECORD_SIZE_IN_BYTES			4
       
    61 #define E1000_INVM_VER_FIELD_ONE			0x1FF8
       
    62 #define E1000_INVM_VER_FIELD_TWO			0x7FE000
       
    63 #define E1000_INVM_IMGTYPE_FIELD			0x1F800000
       
    64 
       
    65 #define E1000_INVM_MAJOR_MASK		0x3F0
       
    66 #define E1000_INVM_MINOR_MASK		0xF
       
    67 #define E1000_INVM_MAJOR_SHIFT		4
       
    68 
       
    69 #define ID_LED_DEFAULT_I210		((ID_LED_OFF1_ON2  << 8) | \
       
    70 					 (ID_LED_DEF1_DEF2 <<  4) | \
       
    71 					 (ID_LED_OFF1_OFF2))
       
    72 #define ID_LED_DEFAULT_I210_SERDES	((ID_LED_DEF1_DEF2 << 8) | \
       
    73 					 (ID_LED_DEF1_DEF2 <<  4) | \
       
    74 					 (ID_LED_OFF1_ON2))
       
    75 
       
    76 /* NVM offset defaults for i211 device */
       
    77 #define NVM_INIT_CTRL_2_DEFAULT_I211	0X7243
       
    78 #define NVM_INIT_CTRL_4_DEFAULT_I211	0x00C1
       
    79 #define NVM_LED_1_CFG_DEFAULT_I211	0x0184
       
    80 #define NVM_LED_0_2_CFG_DEFAULT_I211	0x200C
       
    81 
       
    82 /* PLL Defines */
       
    83 #define E1000_PCI_PMCSR			0x44
       
    84 #define E1000_PCI_PMCSR_D3		0x03
       
    85 #define E1000_MAX_PLL_TRIES		5
       
    86 #define E1000_PHY_PLL_UNCONF		0xFF
       
    87 #define E1000_PHY_PLL_FREQ_PAGE		0xFC0000
       
    88 #define E1000_PHY_PLL_FREQ_REG		0x000E
       
    89 #define E1000_INVM_DEFAULT_AL		0x202F
       
    90 #define E1000_INVM_AUTOLOAD		0x0A
       
    91 #define E1000_INVM_PLL_WO_VAL		0x0010
       
    92 
       
    93 #endif