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1 /****************************************************************************** |
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2 * |
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3 * $Id$ |
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4 * |
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5 * Copyright (C) 2006 Florian Pose, Ingenieurgemeinschaft IgH |
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6 * |
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7 * This file is part of the IgH EtherCAT Master. |
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8 * |
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9 * The IgH EtherCAT Master is free software; you can redistribute it |
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10 * and/or modify it under the terms of the GNU General Public License |
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11 * as published by the Free Software Foundation; either version 2 of the |
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12 * License, or (at your option) any later version. |
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13 * |
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14 * The IgH EtherCAT Master is distributed in the hope that it will be |
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15 * useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
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16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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17 * GNU General Public License for more details. |
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18 * |
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19 * You should have received a copy of the GNU General Public License |
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20 * along with the IgH EtherCAT Master; if not, write to the Free Software |
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21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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22 * |
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23 * The right to use EtherCAT Technology is granted and comes free of |
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24 * charge under condition of compatibility of product made by |
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25 * Licensee. People intending to distribute/sell products based on the |
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26 * code, have to sign an agreement to guarantee that products using |
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27 * software based on IgH EtherCAT master stay compatible with the actual |
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28 * EtherCAT specification (which are released themselves as an open |
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29 * standard) as the (only) precondition to have the right to use EtherCAT |
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30 * Technology, IP and trade marks. |
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31 * |
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32 *****************************************************************************/ |
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33 |
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34 /** |
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35 \file |
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36 EtherCAT driver for RTL8139-compatible NICs. |
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37 */ |
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38 |
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39 /*****************************************************************************/ |
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40 |
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41 /* |
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42 Former documentation: |
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43 |
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44 8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux. |
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45 |
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46 Maintained by Jeff Garzik <jgarzik@pobox.com> |
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47 Copyright 2000-2002 Jeff Garzik |
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48 |
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49 Much code comes from Donald Becker's rtl8139.c driver, |
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50 versions 1.13 and older. This driver was originally based |
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51 on rtl8139.c version 1.07. Header of rtl8139.c version 1.13: |
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52 |
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53 -----<snip>----- |
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54 |
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55 Written 1997-2001 by Donald Becker. |
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56 This software may be used and distributed according to the |
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57 terms of the GNU General Public License (GPL), incorporated |
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58 herein by reference. Drivers based on or derived from this |
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59 code fall under the GPL and must retain the authorship, |
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60 copyright and license notice. This file is not a complete |
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61 program and may only be used when the entire operating |
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62 system is licensed under the GPL. |
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63 |
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64 This driver is for boards based on the RTL8129 and RTL8139 |
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65 PCI ethernet chips. |
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66 |
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67 The author may be reached as becker@scyld.com, or C/O Scyld |
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68 Computing Corporation 410 Severn Ave., Suite 210 Annapolis |
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69 MD 21403 |
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70 |
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71 Support and updates available at |
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72 http://www.scyld.com/network/rtl8139.html |
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73 |
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74 Twister-tuning table provided by Kinston |
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75 <shangh@realtek.com.tw>. |
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76 |
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77 -----<snip>----- |
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78 |
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79 This software may be used and distributed according to the terms |
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80 of the GNU General Public License, incorporated herein by reference. |
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81 |
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82 Contributors: |
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83 |
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84 Donald Becker - he wrote the original driver, kudos to him! |
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85 (but please don't e-mail him for support, this isn't his driver) |
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86 |
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87 Tigran Aivazian - bug fixes, skbuff free cleanup |
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88 |
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89 Martin Mares - suggestions for PCI cleanup |
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90 |
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91 David S. Miller - PCI DMA and softnet updates |
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92 |
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93 Ernst Gill - fixes ported from BSD driver |
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94 |
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95 Daniel Kobras - identified specific locations of |
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96 posted MMIO write bugginess |
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97 |
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98 Gerard Sharp - bug fix, testing and feedback |
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99 |
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100 David Ford - Rx ring wrap fix |
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101 |
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102 Dan DeMaggio - swapped RTL8139 cards with me, and allowed me |
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103 to find and fix a crucial bug on older chipsets. |
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104 |
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105 Donald Becker/Chris Butterworth/Marcus Westergren - |
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106 Noticed various Rx packet size-related buglets. |
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107 |
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108 Santiago Garcia Mantinan - testing and feedback |
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109 |
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110 Jens David - 2.2.x kernel backports |
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111 |
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112 Martin Dennett - incredibly helpful insight on undocumented |
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113 features of the 8139 chips |
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114 |
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115 Jean-Jacques Michel - bug fix |
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116 |
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117 Tobias Ringström - Rx interrupt status checking suggestion |
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118 |
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119 Andrew Morton - Clear blocked signals, avoid |
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120 buffer overrun setting current->comm. |
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121 |
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122 Kalle Olavi Niemitalo - Wake-on-LAN ioctls |
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123 |
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124 Robert Kuebel - Save kernel thread from dying on any signal. |
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125 |
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126 Submitting bug reports: |
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127 |
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128 "rtl8139-diag -mmmaaavvveefN" output |
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129 enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log |
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130 |
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131 */ |
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132 |
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133 #define DRV_NAME "ec_8139too" |
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134 #define DRV_VERSION "0.9.28" |
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135 |
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136 |
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137 #include <linux/module.h> |
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138 #include <linux/kernel.h> |
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139 #include <linux/compiler.h> |
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140 #include <linux/pci.h> |
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141 #include <linux/init.h> |
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142 #include <linux/ioport.h> |
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143 #include <linux/netdevice.h> |
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144 #include <linux/etherdevice.h> |
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145 #include <linux/rtnetlink.h> |
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146 #include <linux/delay.h> |
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147 #include <linux/ethtool.h> |
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148 #include <linux/mii.h> |
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149 #include <linux/completion.h> |
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150 #include <linux/crc32.h> |
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151 #include <asm/io.h> |
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152 #include <asm/uaccess.h> |
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153 #include <asm/irq.h> |
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154 |
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155 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
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156 |
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157 #include "../globals.h" |
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158 #include "ecdev.h" |
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159 |
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160 #define RTL8139_DRIVER_NAME DRV_NAME \ |
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161 " EtherCAT-capable Fast Ethernet driver " \ |
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162 DRV_VERSION ", master " EC_MASTER_VERSION |
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163 |
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164 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
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165 |
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166 #define PFX DRV_NAME ": " |
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167 |
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168 /* Default Message level */ |
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169 #define RTL8139_DEF_MSG_ENABLE (NETIF_MSG_DRV | \ |
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170 NETIF_MSG_PROBE | \ |
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171 NETIF_MSG_LINK) |
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172 |
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173 |
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174 /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */ |
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175 #ifdef CONFIG_8139TOO_PIO |
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176 #define USE_IO_OPS 1 |
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177 #endif |
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178 |
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179 /* define to 1, 2 or 3 to enable copious debugging info */ |
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180 #define RTL8139_DEBUG 0 |
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181 |
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182 /* define to 1 to disable lightweight runtime debugging checks */ |
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183 #undef RTL8139_NDEBUG |
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184 |
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185 |
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186 #if RTL8139_DEBUG |
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187 /* note: prints function name for you */ |
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188 # define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) |
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189 #else |
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190 # define DPRINTK(fmt, args...) |
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191 #endif |
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192 |
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193 #ifdef RTL8139_NDEBUG |
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194 # define assert(expr) do {} while (0) |
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195 #else |
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196 # define assert(expr) \ |
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197 if(unlikely(!(expr))) { \ |
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198 printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n", \ |
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199 #expr,__FILE__,__FUNCTION__,__LINE__); \ |
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200 } |
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201 #endif |
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202 |
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203 |
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204 /* A few user-configurable values. */ |
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205 /* media options */ |
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206 #define MAX_UNITS 8 |
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207 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; |
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208 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; |
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209 |
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210 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). |
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211 The RTL chips use a 64 element hash table based on the Ethernet CRC. */ |
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212 static int multicast_filter_limit = 32; |
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213 |
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214 /* bitmapped message enable number */ |
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215 static int debug = -1; |
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216 |
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217 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
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218 |
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219 static int ec_device_index = -1; |
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220 static int ec_device_master_index = 0; |
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221 static ec_device_t *rtl_ec_dev; |
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222 struct net_device *rtl_ec_net_dev = NULL; |
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223 |
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224 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
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225 |
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226 /* |
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227 * Receive ring size |
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228 * Warning: 64K ring has hardware issues and may lock up. |
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229 */ |
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230 #if defined(CONFIG_SH_DREAMCAST) |
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231 #define RX_BUF_IDX 1 /* 16K ring */ |
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232 #else |
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233 #define RX_BUF_IDX 2 /* 32K ring */ |
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234 #endif |
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235 #define RX_BUF_LEN (8192 << RX_BUF_IDX) |
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236 #define RX_BUF_PAD 16 |
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237 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */ |
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238 |
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239 #if RX_BUF_LEN == 65536 |
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240 #define RX_BUF_TOT_LEN RX_BUF_LEN |
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241 #else |
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242 #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD) |
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243 #endif |
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244 |
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245 /* Number of Tx descriptor registers. */ |
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246 #define NUM_TX_DESC 4 |
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247 |
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248 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/ |
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249 #define MAX_ETH_FRAME_SIZE 1536 |
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250 |
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251 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */ |
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252 #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE |
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253 #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC) |
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254 |
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255 /* PCI Tuning Parameters |
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256 Threshold is bytes transferred to chip before transmission starts. */ |
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257 #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */ |
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258 |
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259 /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */ |
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260 #define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */ |
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261 #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */ |
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262 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ |
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263 #define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */ |
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264 |
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265 /* Operational parameters that usually are not changed. */ |
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266 /* Time in jiffies before concluding the transmitter is hung. */ |
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267 #define TX_TIMEOUT (6*HZ) |
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268 |
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269 |
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270 enum { |
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271 HAS_MII_XCVR = 0x010000, |
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272 HAS_CHIP_XCVR = 0x020000, |
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273 HAS_LNK_CHNG = 0x040000, |
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274 }; |
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275 |
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276 #define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */ |
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277 #define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */ |
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278 #define RTL_MIN_IO_SIZE 0x80 |
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279 #define RTL8139B_IO_SIZE 256 |
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280 |
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281 #define RTL8129_CAPS HAS_MII_XCVR |
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282 #define RTL8139_CAPS HAS_CHIP_XCVR|HAS_LNK_CHNG |
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283 |
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284 typedef enum { |
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285 RTL8139 = 0, |
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286 RTL8129, |
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287 } board_t; |
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288 |
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289 |
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290 /* indexed by board_t, above */ |
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291 static const struct { |
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292 const char *name; |
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293 u32 hw_flags; |
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294 } board_info[] __devinitdata = { |
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295 { "RealTek RTL8139", RTL8139_CAPS }, |
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296 { "RealTek RTL8129", RTL8129_CAPS }, |
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297 }; |
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298 |
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299 |
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300 static struct pci_device_id rtl8139_pci_tbl[] = { |
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301 {0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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302 {0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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303 {0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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304 {0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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305 {0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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306 {0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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307 {0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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308 {0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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309 {0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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310 {0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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311 {0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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312 {0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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313 {0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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314 {0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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315 {0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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316 {0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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317 {0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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318 {0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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319 {0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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320 |
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321 #ifdef CONFIG_SH_SECUREEDGE5410 |
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322 /* Bogus 8139 silicon reports 8129 without external PROM :-( */ |
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323 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 }, |
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324 #endif |
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325 #ifdef CONFIG_8139TOO_8129 |
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326 {0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 }, |
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327 #endif |
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328 |
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329 /* some crazy cards report invalid vendor ids like |
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330 * 0x0001 here. The other ids are valid and constant, |
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331 * so we simply don't match on the main vendor id. |
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332 */ |
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333 {PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 }, |
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334 {PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 }, |
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335 {PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 }, |
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336 |
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337 {0,} |
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338 }; |
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339 |
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340 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
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341 |
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342 /* prevent driver from being loaded automatically */ |
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343 //MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl); |
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344 |
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345 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
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346 |
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347 static struct { |
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348 const char str[ETH_GSTRING_LEN]; |
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349 } ethtool_stats_keys[] = { |
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350 { "early_rx" }, |
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351 { "tx_buf_mapped" }, |
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352 { "tx_timeouts" }, |
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353 { "rx_lost_in_ring" }, |
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354 }; |
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355 |
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356 /* The rest of these values should never change. */ |
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357 |
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358 /* Symbolic offsets to registers. */ |
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359 enum RTL8139_registers { |
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360 MAC0 = 0, /* Ethernet hardware address. */ |
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361 MAR0 = 8, /* Multicast filter. */ |
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362 TxStatus0 = 0x10, /* Transmit status (Four 32bit registers). */ |
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363 TxAddr0 = 0x20, /* Tx descriptors (also four 32bit). */ |
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364 RxBuf = 0x30, |
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365 ChipCmd = 0x37, |
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366 RxBufPtr = 0x38, |
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367 RxBufAddr = 0x3A, |
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368 IntrMask = 0x3C, |
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369 IntrStatus = 0x3E, |
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370 TxConfig = 0x40, |
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371 RxConfig = 0x44, |
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372 Timer = 0x48, /* A general-purpose counter. */ |
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373 RxMissed = 0x4C, /* 24 bits valid, write clears. */ |
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374 Cfg9346 = 0x50, |
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375 Config0 = 0x51, |
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376 Config1 = 0x52, |
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377 FlashReg = 0x54, |
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378 MediaStatus = 0x58, |
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379 Config3 = 0x59, |
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380 Config4 = 0x5A, /* absent on RTL-8139A */ |
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381 HltClk = 0x5B, |
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382 MultiIntr = 0x5C, |
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383 TxSummary = 0x60, |
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384 BasicModeCtrl = 0x62, |
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385 BasicModeStatus = 0x64, |
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386 NWayAdvert = 0x66, |
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387 NWayLPAR = 0x68, |
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388 NWayExpansion = 0x6A, |
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389 /* Undocumented registers, but required for proper operation. */ |
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390 FIFOTMS = 0x70, /* FIFO Control and test. */ |
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391 CSCR = 0x74, /* Chip Status and Configuration Register. */ |
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392 PARA78 = 0x78, |
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393 PARA7c = 0x7c, /* Magic transceiver parameter register. */ |
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394 Config5 = 0xD8, /* absent on RTL-8139A */ |
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395 }; |
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396 |
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397 enum ClearBitMasks { |
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398 MultiIntrClear = 0xF000, |
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399 ChipCmdClear = 0xE2, |
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400 Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1), |
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401 }; |
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402 |
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403 enum ChipCmdBits { |
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404 CmdReset = 0x10, |
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405 CmdRxEnb = 0x08, |
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406 CmdTxEnb = 0x04, |
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407 RxBufEmpty = 0x01, |
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408 }; |
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409 |
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410 /* Interrupt register bits, using my own meaningful names. */ |
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411 enum IntrStatusBits { |
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412 PCIErr = 0x8000, |
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413 PCSTimeout = 0x4000, |
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414 RxFIFOOver = 0x40, |
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415 RxUnderrun = 0x20, |
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416 RxOverflow = 0x10, |
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417 TxErr = 0x08, |
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418 TxOK = 0x04, |
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419 RxErr = 0x02, |
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420 RxOK = 0x01, |
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421 |
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422 RxAckBits = RxFIFOOver | RxOverflow | RxOK, |
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423 }; |
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424 |
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425 enum TxStatusBits { |
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426 TxHostOwns = 0x2000, |
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427 TxUnderrun = 0x4000, |
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428 TxStatOK = 0x8000, |
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429 TxOutOfWindow = 0x20000000, |
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430 TxAborted = 0x40000000, |
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431 TxCarrierLost = 0x80000000, |
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432 }; |
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433 enum RxStatusBits { |
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434 RxMulticast = 0x8000, |
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435 RxPhysical = 0x4000, |
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436 RxBroadcast = 0x2000, |
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437 RxBadSymbol = 0x0020, |
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438 RxRunt = 0x0010, |
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439 RxTooLong = 0x0008, |
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440 RxCRCErr = 0x0004, |
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441 RxBadAlign = 0x0002, |
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442 RxStatusOK = 0x0001, |
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443 }; |
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444 |
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445 /* Bits in RxConfig. */ |
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446 enum rx_mode_bits { |
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447 AcceptErr = 0x20, |
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448 AcceptRunt = 0x10, |
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449 AcceptBroadcast = 0x08, |
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450 AcceptMulticast = 0x04, |
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451 AcceptMyPhys = 0x02, |
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452 AcceptAllPhys = 0x01, |
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453 }; |
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454 |
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455 /* Bits in TxConfig. */ |
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456 enum tx_config_bits { |
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457 |
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458 /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */ |
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459 TxIFGShift = 24, |
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460 TxIFG84 = (0 << TxIFGShift), /* 8.4us / 840ns (10 / 100Mbps) */ |
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461 TxIFG88 = (1 << TxIFGShift), /* 8.8us / 880ns (10 / 100Mbps) */ |
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462 TxIFG92 = (2 << TxIFGShift), /* 9.2us / 920ns (10 / 100Mbps) */ |
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463 TxIFG96 = (3 << TxIFGShift), /* 9.6us / 960ns (10 / 100Mbps) */ |
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464 |
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465 TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */ |
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466 TxCRC = (1 << 16), /* DISABLE appending CRC to end of Tx packets */ |
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467 TxClearAbt = (1 << 0), /* Clear abort (WO) */ |
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468 TxDMAShift = 8, /* DMA burst value (0-7) is shifted this many bits */ |
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469 TxRetryShift = 4, /* TXRR value (0-15) is shifted this many bits */ |
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470 |
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471 TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */ |
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472 }; |
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473 |
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474 /* Bits in Config1 */ |
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475 enum Config1Bits { |
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476 Cfg1_PM_Enable = 0x01, |
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477 Cfg1_VPD_Enable = 0x02, |
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478 Cfg1_PIO = 0x04, |
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479 Cfg1_MMIO = 0x08, |
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480 LWAKE = 0x10, /* not on 8139, 8139A */ |
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481 Cfg1_Driver_Load = 0x20, |
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482 Cfg1_LED0 = 0x40, |
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483 Cfg1_LED1 = 0x80, |
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484 SLEEP = (1 << 1), /* only on 8139, 8139A */ |
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485 PWRDN = (1 << 0), /* only on 8139, 8139A */ |
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486 }; |
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487 |
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488 /* Bits in Config3 */ |
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489 enum Config3Bits { |
|
490 Cfg3_FBtBEn = (1 << 0), /* 1 = Fast Back to Back */ |
|
491 Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */ |
|
492 Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */ |
|
493 Cfg3_CardB_En = (1 << 3), /* 1 = enable CardBus registers */ |
|
494 Cfg3_LinkUp = (1 << 4), /* 1 = wake up on link up */ |
|
495 Cfg3_Magic = (1 << 5), /* 1 = wake up on Magic Packet (tm) */ |
|
496 Cfg3_PARM_En = (1 << 6), /* 0 = software can set twister parameters */ |
|
497 Cfg3_GNTSel = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */ |
|
498 }; |
|
499 |
|
500 /* Bits in Config4 */ |
|
501 enum Config4Bits { |
|
502 LWPTN = (1 << 2), /* not on 8139, 8139A */ |
|
503 }; |
|
504 |
|
505 /* Bits in Config5 */ |
|
506 enum Config5Bits { |
|
507 Cfg5_PME_STS = (1 << 0), /* 1 = PCI reset resets PME_Status */ |
|
508 Cfg5_LANWake = (1 << 1), /* 1 = enable LANWake signal */ |
|
509 Cfg5_LDPS = (1 << 2), /* 0 = save power when link is down */ |
|
510 Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */ |
|
511 Cfg5_UWF = (1 << 4), /* 1 = accept unicast wakeup frame */ |
|
512 Cfg5_MWF = (1 << 5), /* 1 = accept multicast wakeup frame */ |
|
513 Cfg5_BWF = (1 << 6), /* 1 = accept broadcast wakeup frame */ |
|
514 }; |
|
515 |
|
516 enum RxConfigBits { |
|
517 /* rx fifo threshold */ |
|
518 RxCfgFIFOShift = 13, |
|
519 RxCfgFIFONone = (7 << RxCfgFIFOShift), |
|
520 |
|
521 /* Max DMA burst */ |
|
522 RxCfgDMAShift = 8, |
|
523 RxCfgDMAUnlimited = (7 << RxCfgDMAShift), |
|
524 |
|
525 /* rx ring buffer length */ |
|
526 RxCfgRcv8K = 0, |
|
527 RxCfgRcv16K = (1 << 11), |
|
528 RxCfgRcv32K = (1 << 12), |
|
529 RxCfgRcv64K = (1 << 11) | (1 << 12), |
|
530 |
|
531 /* Disable packet wrap at end of Rx buffer. (not possible with 64k) */ |
|
532 RxNoWrap = (1 << 7), |
|
533 }; |
|
534 |
|
535 /* Twister tuning parameters from RealTek. |
|
536 Completely undocumented, but required to tune bad links on some boards. */ |
|
537 enum CSCRBits { |
|
538 CSCR_LinkOKBit = 0x0400, |
|
539 CSCR_LinkChangeBit = 0x0800, |
|
540 CSCR_LinkStatusBits = 0x0f000, |
|
541 CSCR_LinkDownOffCmd = 0x003c0, |
|
542 CSCR_LinkDownCmd = 0x0f3c0, |
|
543 }; |
|
544 |
|
545 enum Cfg9346Bits { |
|
546 Cfg9346_Lock = 0x00, |
|
547 Cfg9346_Unlock = 0xC0, |
|
548 }; |
|
549 |
|
550 typedef enum { |
|
551 CH_8139 = 0, |
|
552 CH_8139_K, |
|
553 CH_8139A, |
|
554 CH_8139A_G, |
|
555 CH_8139B, |
|
556 CH_8130, |
|
557 CH_8139C, |
|
558 CH_8100, |
|
559 CH_8100B_8139D, |
|
560 CH_8101, |
|
561 } chip_t; |
|
562 |
|
563 enum chip_flags { |
|
564 HasHltClk = (1 << 0), |
|
565 HasLWake = (1 << 1), |
|
566 }; |
|
567 |
|
568 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \ |
|
569 (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22) |
|
570 #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1) |
|
571 |
|
572 /* directly indexed by chip_t, above */ |
|
573 static const struct { |
|
574 const char *name; |
|
575 u32 version; /* from RTL8139C/RTL8139D docs */ |
|
576 u32 flags; |
|
577 } rtl_chip_info[] = { |
|
578 { "RTL-8139", |
|
579 HW_REVID(1, 0, 0, 0, 0, 0, 0), |
|
580 HasHltClk, |
|
581 }, |
|
582 |
|
583 { "RTL-8139 rev K", |
|
584 HW_REVID(1, 1, 0, 0, 0, 0, 0), |
|
585 HasHltClk, |
|
586 }, |
|
587 |
|
588 { "RTL-8139A", |
|
589 HW_REVID(1, 1, 1, 0, 0, 0, 0), |
|
590 HasHltClk, /* XXX undocumented? */ |
|
591 }, |
|
592 |
|
593 { "RTL-8139A rev G", |
|
594 HW_REVID(1, 1, 1, 0, 0, 1, 0), |
|
595 HasHltClk, /* XXX undocumented? */ |
|
596 }, |
|
597 |
|
598 { "RTL-8139B", |
|
599 HW_REVID(1, 1, 1, 1, 0, 0, 0), |
|
600 HasLWake, |
|
601 }, |
|
602 |
|
603 { "RTL-8130", |
|
604 HW_REVID(1, 1, 1, 1, 1, 0, 0), |
|
605 HasLWake, |
|
606 }, |
|
607 |
|
608 { "RTL-8139C", |
|
609 HW_REVID(1, 1, 1, 0, 1, 0, 0), |
|
610 HasLWake, |
|
611 }, |
|
612 |
|
613 { "RTL-8100", |
|
614 HW_REVID(1, 1, 1, 1, 0, 1, 0), |
|
615 HasLWake, |
|
616 }, |
|
617 |
|
618 { "RTL-8100B/8139D", |
|
619 HW_REVID(1, 1, 1, 0, 1, 0, 1), |
|
620 HasHltClk /* XXX undocumented? */ |
|
621 | HasLWake, |
|
622 }, |
|
623 |
|
624 { "RTL-8101", |
|
625 HW_REVID(1, 1, 1, 0, 1, 1, 1), |
|
626 HasLWake, |
|
627 }, |
|
628 }; |
|
629 |
|
630 struct rtl_extra_stats { |
|
631 unsigned long early_rx; |
|
632 unsigned long tx_buf_mapped; |
|
633 unsigned long tx_timeouts; |
|
634 unsigned long rx_lost_in_ring; |
|
635 }; |
|
636 |
|
637 struct rtl8139_private { |
|
638 void __iomem *mmio_addr; |
|
639 int drv_flags; |
|
640 struct pci_dev *pci_dev; |
|
641 u32 msg_enable; |
|
642 struct net_device_stats stats; |
|
643 unsigned char *rx_ring; |
|
644 unsigned int cur_rx; /* Index into the Rx buffer of next Rx pkt. */ |
|
645 unsigned int tx_flag; |
|
646 unsigned long cur_tx; |
|
647 unsigned long dirty_tx; |
|
648 unsigned char *tx_buf[NUM_TX_DESC]; /* Tx bounce buffers */ |
|
649 unsigned char *tx_bufs; /* Tx bounce buffer region. */ |
|
650 dma_addr_t rx_ring_dma; |
|
651 dma_addr_t tx_bufs_dma; |
|
652 signed char phys[4]; /* MII device addresses. */ |
|
653 char twistie, twist_row, twist_col; /* Twister tune state. */ |
|
654 unsigned int watchdog_fired : 1; |
|
655 unsigned int default_port : 4; /* Last dev->if_port value. */ |
|
656 unsigned int have_thread : 1; |
|
657 spinlock_t lock; |
|
658 spinlock_t rx_lock; |
|
659 chip_t chipset; |
|
660 u32 rx_config; |
|
661 struct rtl_extra_stats xstats; |
|
662 |
|
663 struct work_struct thread; |
|
664 |
|
665 struct mii_if_info mii; |
|
666 unsigned int regs_len; |
|
667 unsigned long fifo_copy_timeout; |
|
668 }; |
|
669 |
|
670 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
671 |
|
672 MODULE_AUTHOR("Florian Pose <fp@igh-essen.com>"); |
|
673 MODULE_DESCRIPTION("RealTek RTL-8139 EtherCAT driver"); |
|
674 MODULE_LICENSE("GPL"); |
|
675 MODULE_VERSION(EC_MASTER_VERSION); |
|
676 |
|
677 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
678 |
|
679 module_param(multicast_filter_limit, int, 0); |
|
680 module_param_array(media, int, NULL, 0); |
|
681 module_param_array(full_duplex, int, NULL, 0); |
|
682 module_param(debug, int, 0); |
|
683 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number"); |
|
684 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses"); |
|
685 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps"); |
|
686 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)"); |
|
687 |
|
688 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
689 |
|
690 module_param(ec_device_index, int, -1); |
|
691 module_param(ec_device_master_index, int, 0); |
|
692 MODULE_PARM_DESC(ec_device_index, |
|
693 "Index of the device reserved for EtherCAT."); |
|
694 MODULE_PARM_DESC(ec_device_master_index, |
|
695 "Index of the EtherCAT master to register the device."); |
|
696 |
|
697 void ec_poll(struct net_device *); |
|
698 |
|
699 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
700 |
|
701 static int read_eeprom (void __iomem *ioaddr, int location, int addr_len); |
|
702 static int rtl8139_open (struct net_device *dev); |
|
703 static int mdio_read (struct net_device *dev, int phy_id, int location); |
|
704 static void mdio_write (struct net_device *dev, int phy_id, int location, |
|
705 int val); |
|
706 static void rtl8139_start_thread(struct rtl8139_private *tp); |
|
707 static void rtl8139_tx_timeout (struct net_device *dev); |
|
708 static void rtl8139_init_ring (struct net_device *dev); |
|
709 static int rtl8139_start_xmit (struct sk_buff *skb, |
|
710 struct net_device *dev); |
|
711 static int rtl8139_poll(struct net_device *dev, int *budget); |
|
712 #ifdef CONFIG_NET_POLL_CONTROLLER |
|
713 static void rtl8139_poll_controller(struct net_device *dev); |
|
714 #endif |
|
715 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance); |
|
716 static int rtl8139_close (struct net_device *dev); |
|
717 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd); |
|
718 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev); |
|
719 static void rtl8139_set_rx_mode (struct net_device *dev); |
|
720 static void __set_rx_mode (struct net_device *dev); |
|
721 static void rtl8139_hw_start (struct net_device *dev); |
|
722 static void rtl8139_thread (void *_data); |
|
723 static void rtl8139_tx_timeout_task(void *_data); |
|
724 static const struct ethtool_ops rtl8139_ethtool_ops; |
|
725 |
|
726 /* write MMIO register, with flush */ |
|
727 /* Flush avoids rtl8139 bug w/ posted MMIO writes */ |
|
728 #define RTL_W8_F(reg, val8) do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0) |
|
729 #define RTL_W16_F(reg, val16) do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0) |
|
730 #define RTL_W32_F(reg, val32) do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0) |
|
731 |
|
732 |
|
733 #define MMIO_FLUSH_AUDIT_COMPLETE 1 |
|
734 #if MMIO_FLUSH_AUDIT_COMPLETE |
|
735 |
|
736 /* write MMIO register */ |
|
737 #define RTL_W8(reg, val8) iowrite8 ((val8), ioaddr + (reg)) |
|
738 #define RTL_W16(reg, val16) iowrite16 ((val16), ioaddr + (reg)) |
|
739 #define RTL_W32(reg, val32) iowrite32 ((val32), ioaddr + (reg)) |
|
740 |
|
741 #else |
|
742 |
|
743 /* write MMIO register, then flush */ |
|
744 #define RTL_W8 RTL_W8_F |
|
745 #define RTL_W16 RTL_W16_F |
|
746 #define RTL_W32 RTL_W32_F |
|
747 |
|
748 #endif /* MMIO_FLUSH_AUDIT_COMPLETE */ |
|
749 |
|
750 /* read MMIO register */ |
|
751 #define RTL_R8(reg) ioread8 (ioaddr + (reg)) |
|
752 #define RTL_R16(reg) ioread16 (ioaddr + (reg)) |
|
753 #define RTL_R32(reg) ((unsigned long) ioread32 (ioaddr + (reg))) |
|
754 |
|
755 |
|
756 static const u16 rtl8139_intr_mask = |
|
757 PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver | |
|
758 TxErr | TxOK | RxErr | RxOK; |
|
759 |
|
760 static const u16 rtl8139_norx_intr_mask = |
|
761 PCIErr | PCSTimeout | RxUnderrun | |
|
762 TxErr | TxOK | RxErr ; |
|
763 |
|
764 #if RX_BUF_IDX == 0 |
|
765 static const unsigned int rtl8139_rx_config = |
|
766 RxCfgRcv8K | RxNoWrap | |
|
767 (RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
768 (RX_DMA_BURST << RxCfgDMAShift); |
|
769 #elif RX_BUF_IDX == 1 |
|
770 static const unsigned int rtl8139_rx_config = |
|
771 RxCfgRcv16K | RxNoWrap | |
|
772 (RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
773 (RX_DMA_BURST << RxCfgDMAShift); |
|
774 #elif RX_BUF_IDX == 2 |
|
775 static const unsigned int rtl8139_rx_config = |
|
776 RxCfgRcv32K | RxNoWrap | |
|
777 (RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
778 (RX_DMA_BURST << RxCfgDMAShift); |
|
779 #elif RX_BUF_IDX == 3 |
|
780 static const unsigned int rtl8139_rx_config = |
|
781 RxCfgRcv64K | |
|
782 (RX_FIFO_THRESH << RxCfgFIFOShift) | |
|
783 (RX_DMA_BURST << RxCfgDMAShift); |
|
784 #else |
|
785 #error "Invalid configuration for 8139_RXBUF_IDX" |
|
786 #endif |
|
787 |
|
788 static const unsigned int rtl8139_tx_config = |
|
789 TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift); |
|
790 |
|
791 static void __rtl8139_cleanup_dev (struct net_device *dev) |
|
792 { |
|
793 struct rtl8139_private *tp = netdev_priv(dev); |
|
794 struct pci_dev *pdev; |
|
795 |
|
796 assert (dev != NULL); |
|
797 assert (tp->pci_dev != NULL); |
|
798 pdev = tp->pci_dev; |
|
799 |
|
800 #ifdef USE_IO_OPS |
|
801 if (tp->mmio_addr) |
|
802 ioport_unmap (tp->mmio_addr); |
|
803 #else |
|
804 if (tp->mmio_addr) |
|
805 pci_iounmap (pdev, tp->mmio_addr); |
|
806 #endif /* USE_IO_OPS */ |
|
807 |
|
808 /* it's ok to call this even if we have no regions to free */ |
|
809 pci_release_regions (pdev); |
|
810 |
|
811 free_netdev(dev); |
|
812 pci_set_drvdata (pdev, NULL); |
|
813 } |
|
814 |
|
815 |
|
816 static void rtl8139_chip_reset (void __iomem *ioaddr) |
|
817 { |
|
818 int i; |
|
819 |
|
820 /* Soft reset the chip. */ |
|
821 RTL_W8 (ChipCmd, CmdReset); |
|
822 |
|
823 /* Check that the chip has finished the reset. */ |
|
824 for (i = 1000; i > 0; i--) { |
|
825 barrier(); |
|
826 if ((RTL_R8 (ChipCmd) & CmdReset) == 0) |
|
827 break; |
|
828 udelay (10); |
|
829 } |
|
830 } |
|
831 |
|
832 |
|
833 static int __devinit rtl8139_init_board (struct pci_dev *pdev, |
|
834 struct net_device **dev_out) |
|
835 { |
|
836 void __iomem *ioaddr; |
|
837 struct net_device *dev; |
|
838 struct rtl8139_private *tp; |
|
839 u8 tmp8; |
|
840 int rc, disable_dev_on_err = 0; |
|
841 unsigned int i; |
|
842 unsigned long pio_start, pio_end, pio_flags, pio_len; |
|
843 unsigned long mmio_start, mmio_end, mmio_flags, mmio_len; |
|
844 u32 version; |
|
845 |
|
846 assert (pdev != NULL); |
|
847 |
|
848 *dev_out = NULL; |
|
849 |
|
850 /* dev and priv zeroed in alloc_etherdev */ |
|
851 dev = alloc_etherdev (sizeof (*tp)); |
|
852 if (dev == NULL) { |
|
853 dev_err(&pdev->dev, "Unable to alloc new net device\n"); |
|
854 return -ENOMEM; |
|
855 } |
|
856 SET_MODULE_OWNER(dev); |
|
857 SET_NETDEV_DEV(dev, &pdev->dev); |
|
858 |
|
859 tp = netdev_priv(dev); |
|
860 tp->pci_dev = pdev; |
|
861 |
|
862 /* enable device (incl. PCI PM wakeup and hotplug setup) */ |
|
863 rc = pci_enable_device (pdev); |
|
864 if (rc) |
|
865 goto err_out; |
|
866 |
|
867 pio_start = pci_resource_start (pdev, 0); |
|
868 pio_end = pci_resource_end (pdev, 0); |
|
869 pio_flags = pci_resource_flags (pdev, 0); |
|
870 pio_len = pci_resource_len (pdev, 0); |
|
871 |
|
872 mmio_start = pci_resource_start (pdev, 1); |
|
873 mmio_end = pci_resource_end (pdev, 1); |
|
874 mmio_flags = pci_resource_flags (pdev, 1); |
|
875 mmio_len = pci_resource_len (pdev, 1); |
|
876 |
|
877 /* set this immediately, we need to know before |
|
878 * we talk to the chip directly */ |
|
879 DPRINTK("PIO region size == 0x%02X\n", pio_len); |
|
880 DPRINTK("MMIO region size == 0x%02lX\n", mmio_len); |
|
881 |
|
882 #ifdef USE_IO_OPS |
|
883 /* make sure PCI base addr 0 is PIO */ |
|
884 if (!(pio_flags & IORESOURCE_IO)) { |
|
885 dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n"); |
|
886 rc = -ENODEV; |
|
887 goto err_out; |
|
888 } |
|
889 /* check for weird/broken PCI region reporting */ |
|
890 if (pio_len < RTL_MIN_IO_SIZE) { |
|
891 dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n"); |
|
892 rc = -ENODEV; |
|
893 goto err_out; |
|
894 } |
|
895 #else |
|
896 /* make sure PCI base addr 1 is MMIO */ |
|
897 if (!(mmio_flags & IORESOURCE_MEM)) { |
|
898 dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n"); |
|
899 rc = -ENODEV; |
|
900 goto err_out; |
|
901 } |
|
902 if (mmio_len < RTL_MIN_IO_SIZE) { |
|
903 dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n"); |
|
904 rc = -ENODEV; |
|
905 goto err_out; |
|
906 } |
|
907 #endif |
|
908 |
|
909 rc = pci_request_regions (pdev, DRV_NAME); |
|
910 if (rc) |
|
911 goto err_out; |
|
912 disable_dev_on_err = 1; |
|
913 |
|
914 /* enable PCI bus-mastering */ |
|
915 pci_set_master (pdev); |
|
916 |
|
917 #ifdef USE_IO_OPS |
|
918 ioaddr = ioport_map(pio_start, pio_len); |
|
919 if (!ioaddr) { |
|
920 dev_err(&pdev->dev, "cannot map PIO, aborting\n"); |
|
921 rc = -EIO; |
|
922 goto err_out; |
|
923 } |
|
924 dev->base_addr = pio_start; |
|
925 tp->mmio_addr = ioaddr; |
|
926 tp->regs_len = pio_len; |
|
927 #else |
|
928 /* ioremap MMIO region */ |
|
929 ioaddr = pci_iomap(pdev, 1, 0); |
|
930 if (ioaddr == NULL) { |
|
931 dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); |
|
932 rc = -EIO; |
|
933 goto err_out; |
|
934 } |
|
935 dev->base_addr = (long) ioaddr; |
|
936 tp->mmio_addr = ioaddr; |
|
937 tp->regs_len = mmio_len; |
|
938 #endif /* USE_IO_OPS */ |
|
939 |
|
940 /* Bring old chips out of low-power mode. */ |
|
941 RTL_W8 (HltClk, 'R'); |
|
942 |
|
943 /* check for missing/broken hardware */ |
|
944 if (RTL_R32 (TxConfig) == 0xFFFFFFFF) { |
|
945 dev_err(&pdev->dev, "Chip not responding, ignoring board\n"); |
|
946 rc = -EIO; |
|
947 goto err_out; |
|
948 } |
|
949 |
|
950 /* identify chip attached to board */ |
|
951 version = RTL_R32 (TxConfig) & HW_REVID_MASK; |
|
952 for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++) |
|
953 if (version == rtl_chip_info[i].version) { |
|
954 tp->chipset = i; |
|
955 goto match; |
|
956 } |
|
957 |
|
958 /* if unknown chip, assume array element #0, original RTL-8139 in this case */ |
|
959 dev_printk (KERN_DEBUG, &pdev->dev, |
|
960 "unknown chip version, assuming RTL-8139\n"); |
|
961 dev_printk (KERN_DEBUG, &pdev->dev, |
|
962 "TxConfig = 0x%lx\n", RTL_R32 (TxConfig)); |
|
963 tp->chipset = 0; |
|
964 |
|
965 match: |
|
966 DPRINTK ("chipset id (%d) == index %d, '%s'\n", |
|
967 version, i, rtl_chip_info[i].name); |
|
968 |
|
969 if (tp->chipset >= CH_8139B) { |
|
970 u8 new_tmp8 = tmp8 = RTL_R8 (Config1); |
|
971 DPRINTK("PCI PM wakeup\n"); |
|
972 if ((rtl_chip_info[tp->chipset].flags & HasLWake) && |
|
973 (tmp8 & LWAKE)) |
|
974 new_tmp8 &= ~LWAKE; |
|
975 new_tmp8 |= Cfg1_PM_Enable; |
|
976 if (new_tmp8 != tmp8) { |
|
977 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
978 RTL_W8 (Config1, tmp8); |
|
979 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
980 } |
|
981 if (rtl_chip_info[tp->chipset].flags & HasLWake) { |
|
982 tmp8 = RTL_R8 (Config4); |
|
983 if (tmp8 & LWPTN) { |
|
984 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
985 RTL_W8 (Config4, tmp8 & ~LWPTN); |
|
986 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
987 } |
|
988 } |
|
989 } else { |
|
990 DPRINTK("Old chip wakeup\n"); |
|
991 tmp8 = RTL_R8 (Config1); |
|
992 tmp8 &= ~(SLEEP | PWRDN); |
|
993 RTL_W8 (Config1, tmp8); |
|
994 } |
|
995 |
|
996 rtl8139_chip_reset (ioaddr); |
|
997 |
|
998 *dev_out = dev; |
|
999 return 0; |
|
1000 |
|
1001 err_out: |
|
1002 __rtl8139_cleanup_dev (dev); |
|
1003 if (disable_dev_on_err) |
|
1004 pci_disable_device (pdev); |
|
1005 return rc; |
|
1006 } |
|
1007 |
|
1008 |
|
1009 static int __devinit rtl8139_init_one (struct pci_dev *pdev, |
|
1010 const struct pci_device_id *ent) |
|
1011 { |
|
1012 struct net_device *dev = NULL; |
|
1013 struct rtl8139_private *tp; |
|
1014 int i, addr_len, option; |
|
1015 void __iomem *ioaddr; |
|
1016 static int board_idx = -1; |
|
1017 u8 pci_rev; |
|
1018 |
|
1019 assert (pdev != NULL); |
|
1020 assert (ent != NULL); |
|
1021 |
|
1022 board_idx++; |
|
1023 |
|
1024 /* when we're built into the kernel, the driver version message |
|
1025 * is only printed if at least one 8139 board has been found |
|
1026 */ |
|
1027 #ifndef MODULE |
|
1028 { |
|
1029 static int printed_version; |
|
1030 if (!printed_version++) |
|
1031 printk (KERN_INFO RTL8139_DRIVER_NAME "\n"); |
|
1032 } |
|
1033 #endif |
|
1034 |
|
1035 pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev); |
|
1036 |
|
1037 if (pdev->vendor == PCI_VENDOR_ID_REALTEK && |
|
1038 pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) { |
|
1039 dev_info(&pdev->dev, |
|
1040 "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n", |
|
1041 pdev->vendor, pdev->device, pci_rev); |
|
1042 dev_info(&pdev->dev, |
|
1043 "Use the \"8139cp\" driver for improved performance and stability.\n"); |
|
1044 } |
|
1045 |
|
1046 i = rtl8139_init_board (pdev, &dev); |
|
1047 if (i < 0) |
|
1048 return i; |
|
1049 |
|
1050 assert (dev != NULL); |
|
1051 tp = netdev_priv(dev); |
|
1052 |
|
1053 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1054 |
|
1055 if (board_idx == ec_device_index) { |
|
1056 rtl_ec_net_dev = dev; |
|
1057 strcpy(dev->name, "ec0"); |
|
1058 } |
|
1059 |
|
1060 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1061 |
|
1062 ioaddr = tp->mmio_addr; |
|
1063 assert (ioaddr != NULL); |
|
1064 |
|
1065 addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6; |
|
1066 for (i = 0; i < 3; i++) |
|
1067 ((u16 *) (dev->dev_addr))[i] = |
|
1068 le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len)); |
|
1069 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); |
|
1070 |
|
1071 /* The Rtl8139-specific entries in the device structure. */ |
|
1072 dev->open = rtl8139_open; |
|
1073 dev->hard_start_xmit = rtl8139_start_xmit; |
|
1074 dev->poll = rtl8139_poll; |
|
1075 dev->weight = 64; |
|
1076 dev->stop = rtl8139_close; |
|
1077 dev->get_stats = rtl8139_get_stats; |
|
1078 dev->set_multicast_list = rtl8139_set_rx_mode; |
|
1079 dev->do_ioctl = netdev_ioctl; |
|
1080 dev->ethtool_ops = &rtl8139_ethtool_ops; |
|
1081 dev->tx_timeout = rtl8139_tx_timeout; |
|
1082 dev->watchdog_timeo = TX_TIMEOUT; |
|
1083 #ifdef CONFIG_NET_POLL_CONTROLLER |
|
1084 dev->poll_controller = rtl8139_poll_controller; |
|
1085 #endif |
|
1086 |
|
1087 /* note: the hardware is not capable of sg/csum/highdma, however |
|
1088 * through the use of skb_copy_and_csum_dev we enable these |
|
1089 * features |
|
1090 */ |
|
1091 dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA; |
|
1092 |
|
1093 dev->irq = pdev->irq; |
|
1094 |
|
1095 /* tp zeroed and aligned in alloc_etherdev */ |
|
1096 tp = netdev_priv(dev); |
|
1097 |
|
1098 /* note: tp->chipset set in rtl8139_init_board */ |
|
1099 tp->drv_flags = board_info[ent->driver_data].hw_flags; |
|
1100 tp->mmio_addr = ioaddr; |
|
1101 tp->msg_enable = |
|
1102 (debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1)); |
|
1103 spin_lock_init (&tp->lock); |
|
1104 spin_lock_init (&tp->rx_lock); |
|
1105 INIT_WORK(&tp->thread, rtl8139_thread, dev); |
|
1106 tp->mii.dev = dev; |
|
1107 tp->mii.mdio_read = mdio_read; |
|
1108 tp->mii.mdio_write = mdio_write; |
|
1109 tp->mii.phy_id_mask = 0x3f; |
|
1110 tp->mii.reg_num_mask = 0x1f; |
|
1111 |
|
1112 /* dev is fully set up and ready to use now */ |
|
1113 |
|
1114 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1115 |
|
1116 if (dev != rtl_ec_net_dev) { |
|
1117 DPRINTK("about to register device named %s (%p)...\n", dev->name, dev); |
|
1118 i = register_netdev (dev); |
|
1119 if (i) goto err_out; |
|
1120 } |
|
1121 |
|
1122 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1123 |
|
1124 pci_set_drvdata (pdev, dev); |
|
1125 |
|
1126 printk (KERN_INFO "%s: %s at 0x%lx, " |
|
1127 "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " |
|
1128 "IRQ %d\n", |
|
1129 dev->name, |
|
1130 board_info[ent->driver_data].name, |
|
1131 dev->base_addr, |
|
1132 dev->dev_addr[0], dev->dev_addr[1], |
|
1133 dev->dev_addr[2], dev->dev_addr[3], |
|
1134 dev->dev_addr[4], dev->dev_addr[5], |
|
1135 dev->irq); |
|
1136 |
|
1137 printk (KERN_DEBUG "%s: Identified 8139 chip type '%s'\n", |
|
1138 dev->name, rtl_chip_info[tp->chipset].name); |
|
1139 |
|
1140 /* Find the connected MII xcvrs. |
|
1141 Doing this in open() would allow detecting external xcvrs later, but |
|
1142 takes too much time. */ |
|
1143 #ifdef CONFIG_8139TOO_8129 |
|
1144 if (tp->drv_flags & HAS_MII_XCVR) { |
|
1145 int phy, phy_idx = 0; |
|
1146 for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) { |
|
1147 int mii_status = mdio_read(dev, phy, 1); |
|
1148 if (mii_status != 0xffff && mii_status != 0x0000) { |
|
1149 u16 advertising = mdio_read(dev, phy, 4); |
|
1150 tp->phys[phy_idx++] = phy; |
|
1151 printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x " |
|
1152 "advertising %4.4x.\n", |
|
1153 dev->name, phy, mii_status, advertising); |
|
1154 } |
|
1155 } |
|
1156 if (phy_idx == 0) { |
|
1157 printk(KERN_INFO "%s: No MII transceivers found! Assuming SYM " |
|
1158 "transceiver.\n", |
|
1159 dev->name); |
|
1160 tp->phys[0] = 32; |
|
1161 } |
|
1162 } else |
|
1163 #endif |
|
1164 tp->phys[0] = 32; |
|
1165 tp->mii.phy_id = tp->phys[0]; |
|
1166 |
|
1167 /* The lower four bits are the media type. */ |
|
1168 option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx]; |
|
1169 if (option > 0) { |
|
1170 tp->mii.full_duplex = (option & 0x210) ? 1 : 0; |
|
1171 tp->default_port = option & 0xFF; |
|
1172 if (tp->default_port) |
|
1173 tp->mii.force_media = 1; |
|
1174 } |
|
1175 if (board_idx < MAX_UNITS && full_duplex[board_idx] > 0) |
|
1176 tp->mii.full_duplex = full_duplex[board_idx]; |
|
1177 if (tp->mii.full_duplex) { |
|
1178 printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name); |
|
1179 /* Changing the MII-advertised media because might prevent |
|
1180 re-connection. */ |
|
1181 tp->mii.force_media = 1; |
|
1182 } |
|
1183 if (tp->default_port) { |
|
1184 printk(KERN_INFO " Forcing %dMbps %s-duplex operation.\n", |
|
1185 (option & 0x20 ? 100 : 10), |
|
1186 (option & 0x10 ? "full" : "half")); |
|
1187 mdio_write(dev, tp->phys[0], 0, |
|
1188 ((option & 0x20) ? 0x2000 : 0) | /* 100Mbps? */ |
|
1189 ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */ |
|
1190 } |
|
1191 |
|
1192 /* Put the chip into low-power mode. */ |
|
1193 if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
1194 RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ |
|
1195 |
|
1196 return 0; |
|
1197 |
|
1198 err_out: |
|
1199 __rtl8139_cleanup_dev (dev); |
|
1200 pci_disable_device (pdev); |
|
1201 return i; |
|
1202 } |
|
1203 |
|
1204 |
|
1205 static void __devexit rtl8139_remove_one (struct pci_dev *pdev) |
|
1206 { |
|
1207 struct net_device *dev = pci_get_drvdata (pdev); |
|
1208 |
|
1209 assert (dev != NULL); |
|
1210 |
|
1211 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1212 |
|
1213 if (dev != rtl_ec_net_dev) { |
|
1214 unregister_netdev (dev); |
|
1215 } |
|
1216 |
|
1217 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1218 |
|
1219 __rtl8139_cleanup_dev (dev); |
|
1220 pci_disable_device (pdev); |
|
1221 } |
|
1222 |
|
1223 |
|
1224 /* Serial EEPROM section. */ |
|
1225 |
|
1226 /* EEPROM_Ctrl bits. */ |
|
1227 #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ |
|
1228 #define EE_CS 0x08 /* EEPROM chip select. */ |
|
1229 #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ |
|
1230 #define EE_WRITE_0 0x00 |
|
1231 #define EE_WRITE_1 0x02 |
|
1232 #define EE_DATA_READ 0x01 /* EEPROM chip data out. */ |
|
1233 #define EE_ENB (0x80 | EE_CS) |
|
1234 |
|
1235 /* Delay between EEPROM clock transitions. |
|
1236 No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. |
|
1237 */ |
|
1238 |
|
1239 #define eeprom_delay() (void)RTL_R32(Cfg9346) |
|
1240 |
|
1241 /* The EEPROM commands include the alway-set leading bit. */ |
|
1242 #define EE_WRITE_CMD (5) |
|
1243 #define EE_READ_CMD (6) |
|
1244 #define EE_ERASE_CMD (7) |
|
1245 |
|
1246 static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len) |
|
1247 { |
|
1248 int i; |
|
1249 unsigned retval = 0; |
|
1250 int read_cmd = location | (EE_READ_CMD << addr_len); |
|
1251 |
|
1252 RTL_W8 (Cfg9346, EE_ENB & ~EE_CS); |
|
1253 RTL_W8 (Cfg9346, EE_ENB); |
|
1254 eeprom_delay (); |
|
1255 |
|
1256 /* Shift the read command bits out. */ |
|
1257 for (i = 4 + addr_len; i >= 0; i--) { |
|
1258 int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; |
|
1259 RTL_W8 (Cfg9346, EE_ENB | dataval); |
|
1260 eeprom_delay (); |
|
1261 RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK); |
|
1262 eeprom_delay (); |
|
1263 } |
|
1264 RTL_W8 (Cfg9346, EE_ENB); |
|
1265 eeprom_delay (); |
|
1266 |
|
1267 for (i = 16; i > 0; i--) { |
|
1268 RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK); |
|
1269 eeprom_delay (); |
|
1270 retval = |
|
1271 (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 : |
|
1272 0); |
|
1273 RTL_W8 (Cfg9346, EE_ENB); |
|
1274 eeprom_delay (); |
|
1275 } |
|
1276 |
|
1277 /* Terminate the EEPROM access. */ |
|
1278 RTL_W8 (Cfg9346, ~EE_CS); |
|
1279 eeprom_delay (); |
|
1280 |
|
1281 return retval; |
|
1282 } |
|
1283 |
|
1284 /* MII serial management: mostly bogus for now. */ |
|
1285 /* Read and write the MII management registers using software-generated |
|
1286 serial MDIO protocol. |
|
1287 The maximum data clock rate is 2.5 Mhz. The minimum timing is usually |
|
1288 met by back-to-back PCI I/O cycles, but we insert a delay to avoid |
|
1289 "overclocking" issues. */ |
|
1290 #define MDIO_DIR 0x80 |
|
1291 #define MDIO_DATA_OUT 0x04 |
|
1292 #define MDIO_DATA_IN 0x02 |
|
1293 #define MDIO_CLK 0x01 |
|
1294 #define MDIO_WRITE0 (MDIO_DIR) |
|
1295 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) |
|
1296 |
|
1297 #define mdio_delay() RTL_R8(Config4) |
|
1298 |
|
1299 |
|
1300 static const char mii_2_8139_map[8] = { |
|
1301 BasicModeCtrl, |
|
1302 BasicModeStatus, |
|
1303 0, |
|
1304 0, |
|
1305 NWayAdvert, |
|
1306 NWayLPAR, |
|
1307 NWayExpansion, |
|
1308 0 |
|
1309 }; |
|
1310 |
|
1311 |
|
1312 #ifdef CONFIG_8139TOO_8129 |
|
1313 /* Syncronize the MII management interface by shifting 32 one bits out. */ |
|
1314 static void mdio_sync (void __iomem *ioaddr) |
|
1315 { |
|
1316 int i; |
|
1317 |
|
1318 for (i = 32; i >= 0; i--) { |
|
1319 RTL_W8 (Config4, MDIO_WRITE1); |
|
1320 mdio_delay (); |
|
1321 RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK); |
|
1322 mdio_delay (); |
|
1323 } |
|
1324 } |
|
1325 #endif |
|
1326 |
|
1327 static int mdio_read (struct net_device *dev, int phy_id, int location) |
|
1328 { |
|
1329 struct rtl8139_private *tp = netdev_priv(dev); |
|
1330 int retval = 0; |
|
1331 #ifdef CONFIG_8139TOO_8129 |
|
1332 void __iomem *ioaddr = tp->mmio_addr; |
|
1333 int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; |
|
1334 int i; |
|
1335 #endif |
|
1336 |
|
1337 if (phy_id > 31) { /* Really a 8139. Use internal registers. */ |
|
1338 void __iomem *ioaddr = tp->mmio_addr; |
|
1339 return location < 8 && mii_2_8139_map[location] ? |
|
1340 RTL_R16 (mii_2_8139_map[location]) : 0; |
|
1341 } |
|
1342 |
|
1343 #ifdef CONFIG_8139TOO_8129 |
|
1344 mdio_sync (ioaddr); |
|
1345 /* Shift the read command bits out. */ |
|
1346 for (i = 15; i >= 0; i--) { |
|
1347 int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; |
|
1348 |
|
1349 RTL_W8 (Config4, MDIO_DIR | dataval); |
|
1350 mdio_delay (); |
|
1351 RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK); |
|
1352 mdio_delay (); |
|
1353 } |
|
1354 |
|
1355 /* Read the two transition, 16 data, and wire-idle bits. */ |
|
1356 for (i = 19; i > 0; i--) { |
|
1357 RTL_W8 (Config4, 0); |
|
1358 mdio_delay (); |
|
1359 retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0); |
|
1360 RTL_W8 (Config4, MDIO_CLK); |
|
1361 mdio_delay (); |
|
1362 } |
|
1363 #endif |
|
1364 |
|
1365 return (retval >> 1) & 0xffff; |
|
1366 } |
|
1367 |
|
1368 |
|
1369 static void mdio_write (struct net_device *dev, int phy_id, int location, |
|
1370 int value) |
|
1371 { |
|
1372 struct rtl8139_private *tp = netdev_priv(dev); |
|
1373 #ifdef CONFIG_8139TOO_8129 |
|
1374 void __iomem *ioaddr = tp->mmio_addr; |
|
1375 int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; |
|
1376 int i; |
|
1377 #endif |
|
1378 |
|
1379 if (phy_id > 31) { /* Really a 8139. Use internal registers. */ |
|
1380 void __iomem *ioaddr = tp->mmio_addr; |
|
1381 if (location == 0) { |
|
1382 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
1383 RTL_W16 (BasicModeCtrl, value); |
|
1384 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1385 } else if (location < 8 && mii_2_8139_map[location]) |
|
1386 RTL_W16 (mii_2_8139_map[location], value); |
|
1387 return; |
|
1388 } |
|
1389 |
|
1390 #ifdef CONFIG_8139TOO_8129 |
|
1391 mdio_sync (ioaddr); |
|
1392 |
|
1393 /* Shift the command bits out. */ |
|
1394 for (i = 31; i >= 0; i--) { |
|
1395 int dataval = |
|
1396 (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; |
|
1397 RTL_W8 (Config4, dataval); |
|
1398 mdio_delay (); |
|
1399 RTL_W8 (Config4, dataval | MDIO_CLK); |
|
1400 mdio_delay (); |
|
1401 } |
|
1402 /* Clear out extra bits. */ |
|
1403 for (i = 2; i > 0; i--) { |
|
1404 RTL_W8 (Config4, 0); |
|
1405 mdio_delay (); |
|
1406 RTL_W8 (Config4, MDIO_CLK); |
|
1407 mdio_delay (); |
|
1408 } |
|
1409 #endif |
|
1410 } |
|
1411 |
|
1412 |
|
1413 static int rtl8139_open (struct net_device *dev) |
|
1414 { |
|
1415 struct rtl8139_private *tp = netdev_priv(dev); |
|
1416 int retval; |
|
1417 void __iomem *ioaddr = tp->mmio_addr; |
|
1418 |
|
1419 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1420 |
|
1421 if (dev != rtl_ec_net_dev) { |
|
1422 retval = request_irq(dev->irq, rtl8139_interrupt, |
|
1423 IRQF_SHARED, dev->name, dev); |
|
1424 if (retval) |
|
1425 return retval; |
|
1426 } |
|
1427 |
|
1428 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1429 |
|
1430 tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN, |
|
1431 &tp->tx_bufs_dma); |
|
1432 tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
|
1433 &tp->rx_ring_dma); |
|
1434 if (tp->tx_bufs == NULL || tp->rx_ring == NULL) { |
|
1435 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1436 |
|
1437 if (dev != rtl_ec_net_dev) { |
|
1438 free_irq(dev->irq, dev); |
|
1439 } |
|
1440 |
|
1441 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1442 |
|
1443 if (tp->tx_bufs) |
|
1444 pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN, |
|
1445 tp->tx_bufs, tp->tx_bufs_dma); |
|
1446 if (tp->rx_ring) |
|
1447 pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
|
1448 tp->rx_ring, tp->rx_ring_dma); |
|
1449 |
|
1450 return -ENOMEM; |
|
1451 |
|
1452 } |
|
1453 |
|
1454 tp->mii.full_duplex = tp->mii.force_media; |
|
1455 tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000; |
|
1456 |
|
1457 rtl8139_init_ring (dev); |
|
1458 rtl8139_hw_start (dev); |
|
1459 |
|
1460 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1461 |
|
1462 if (dev != rtl_ec_net_dev) { |
|
1463 netif_start_queue (dev); |
|
1464 |
|
1465 if (netif_msg_ifup(tp)) |
|
1466 printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#llx IRQ %d" |
|
1467 " GP Pins %2.2x %s-duplex.\n", dev->name, |
|
1468 (unsigned long long)pci_resource_start (tp->pci_dev, 1), |
|
1469 dev->irq, RTL_R8 (MediaStatus), |
|
1470 tp->mii.full_duplex ? "full" : "half"); |
|
1471 rtl8139_start_thread(tp); |
|
1472 } |
|
1473 |
|
1474 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1475 |
|
1476 return 0; |
|
1477 } |
|
1478 |
|
1479 |
|
1480 static void rtl_check_media (struct net_device *dev, unsigned int init_media) |
|
1481 { |
|
1482 struct rtl8139_private *tp = netdev_priv(dev); |
|
1483 |
|
1484 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1485 |
|
1486 if (dev != rtl_ec_net_dev) { |
|
1487 if (tp->phys[0] >= 0) { |
|
1488 mii_check_media(&tp->mii, netif_msg_link(tp), init_media); |
|
1489 } |
|
1490 } else { |
|
1491 void __iomem *ioaddr = tp->mmio_addr; |
|
1492 uint16_t state = RTL_R16(BasicModeStatus) & BMSR_LSTATUS; |
|
1493 ecdev_link_state(rtl_ec_dev, state ? 1 : 0); |
|
1494 } |
|
1495 |
|
1496 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1497 } |
|
1498 |
|
1499 /* Start the hardware at open or resume. */ |
|
1500 static void rtl8139_hw_start (struct net_device *dev) |
|
1501 { |
|
1502 struct rtl8139_private *tp = netdev_priv(dev); |
|
1503 void __iomem *ioaddr = tp->mmio_addr; |
|
1504 u32 i; |
|
1505 u8 tmp; |
|
1506 |
|
1507 /* Bring old chips out of low-power mode. */ |
|
1508 if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
1509 RTL_W8 (HltClk, 'R'); |
|
1510 |
|
1511 rtl8139_chip_reset (ioaddr); |
|
1512 |
|
1513 /* unlock Config[01234] and BMCR register writes */ |
|
1514 RTL_W8_F (Cfg9346, Cfg9346_Unlock); |
|
1515 /* Restore our idea of the MAC address. */ |
|
1516 RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0))); |
|
1517 RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4))); |
|
1518 |
|
1519 /* Must enable Tx/Rx before setting transfer thresholds! */ |
|
1520 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
1521 |
|
1522 tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; |
|
1523 RTL_W32 (RxConfig, tp->rx_config); |
|
1524 RTL_W32 (TxConfig, rtl8139_tx_config); |
|
1525 |
|
1526 tp->cur_rx = 0; |
|
1527 |
|
1528 rtl_check_media (dev, 1); |
|
1529 |
|
1530 if (tp->chipset >= CH_8139B) { |
|
1531 /* Disable magic packet scanning, which is enabled |
|
1532 * when PM is enabled in Config1. It can be reenabled |
|
1533 * via ETHTOOL_SWOL if desired. */ |
|
1534 RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic); |
|
1535 } |
|
1536 |
|
1537 DPRINTK("init buffer addresses\n"); |
|
1538 |
|
1539 /* Lock Config[01234] and BMCR register writes */ |
|
1540 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1541 |
|
1542 /* init Rx ring buffer DMA address */ |
|
1543 RTL_W32_F (RxBuf, tp->rx_ring_dma); |
|
1544 |
|
1545 /* init Tx buffer DMA addresses */ |
|
1546 for (i = 0; i < NUM_TX_DESC; i++) |
|
1547 RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs)); |
|
1548 |
|
1549 RTL_W32 (RxMissed, 0); |
|
1550 |
|
1551 rtl8139_set_rx_mode (dev); |
|
1552 |
|
1553 /* no early-rx interrupts */ |
|
1554 RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear); |
|
1555 |
|
1556 /* make sure RxTx has started */ |
|
1557 tmp = RTL_R8 (ChipCmd); |
|
1558 if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb))) |
|
1559 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
1560 |
|
1561 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1562 |
|
1563 if (dev != rtl_ec_net_dev) { |
|
1564 /* Enable all known interrupts by setting the interrupt mask. */ |
|
1565 RTL_W16 (IntrMask, rtl8139_intr_mask); |
|
1566 } |
|
1567 |
|
1568 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1569 } |
|
1570 |
|
1571 |
|
1572 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ |
|
1573 static void rtl8139_init_ring (struct net_device *dev) |
|
1574 { |
|
1575 struct rtl8139_private *tp = netdev_priv(dev); |
|
1576 int i; |
|
1577 |
|
1578 tp->cur_rx = 0; |
|
1579 tp->cur_tx = 0; |
|
1580 tp->dirty_tx = 0; |
|
1581 |
|
1582 for (i = 0; i < NUM_TX_DESC; i++) |
|
1583 tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE]; |
|
1584 } |
|
1585 |
|
1586 |
|
1587 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */ |
|
1588 static int next_tick = 3 * HZ; |
|
1589 |
|
1590 #ifndef CONFIG_8139TOO_TUNE_TWISTER |
|
1591 static inline void rtl8139_tune_twister (struct net_device *dev, |
|
1592 struct rtl8139_private *tp) {} |
|
1593 #else |
|
1594 enum TwisterParamVals { |
|
1595 PARA78_default = 0x78fa8388, |
|
1596 PARA7c_default = 0xcb38de43, /* param[0][3] */ |
|
1597 PARA7c_xxx = 0xcb38de43, |
|
1598 }; |
|
1599 |
|
1600 static const unsigned long param[4][4] = { |
|
1601 {0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43}, |
|
1602 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, |
|
1603 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83}, |
|
1604 {0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83} |
|
1605 }; |
|
1606 |
|
1607 static void rtl8139_tune_twister (struct net_device *dev, |
|
1608 struct rtl8139_private *tp) |
|
1609 { |
|
1610 int linkcase; |
|
1611 void __iomem *ioaddr = tp->mmio_addr; |
|
1612 |
|
1613 /* This is a complicated state machine to configure the "twister" for |
|
1614 impedance/echos based on the cable length. |
|
1615 All of this is magic and undocumented. |
|
1616 */ |
|
1617 switch (tp->twistie) { |
|
1618 case 1: |
|
1619 if (RTL_R16 (CSCR) & CSCR_LinkOKBit) { |
|
1620 /* We have link beat, let us tune the twister. */ |
|
1621 RTL_W16 (CSCR, CSCR_LinkDownOffCmd); |
|
1622 tp->twistie = 2; /* Change to state 2. */ |
|
1623 next_tick = HZ / 10; |
|
1624 } else { |
|
1625 /* Just put in some reasonable defaults for when beat returns. */ |
|
1626 RTL_W16 (CSCR, CSCR_LinkDownCmd); |
|
1627 RTL_W32 (FIFOTMS, 0x20); /* Turn on cable test mode. */ |
|
1628 RTL_W32 (PARA78, PARA78_default); |
|
1629 RTL_W32 (PARA7c, PARA7c_default); |
|
1630 tp->twistie = 0; /* Bail from future actions. */ |
|
1631 } |
|
1632 break; |
|
1633 case 2: |
|
1634 /* Read how long it took to hear the echo. */ |
|
1635 linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits; |
|
1636 if (linkcase == 0x7000) |
|
1637 tp->twist_row = 3; |
|
1638 else if (linkcase == 0x3000) |
|
1639 tp->twist_row = 2; |
|
1640 else if (linkcase == 0x1000) |
|
1641 tp->twist_row = 1; |
|
1642 else |
|
1643 tp->twist_row = 0; |
|
1644 tp->twist_col = 0; |
|
1645 tp->twistie = 3; /* Change to state 2. */ |
|
1646 next_tick = HZ / 10; |
|
1647 break; |
|
1648 case 3: |
|
1649 /* Put out four tuning parameters, one per 100msec. */ |
|
1650 if (tp->twist_col == 0) |
|
1651 RTL_W16 (FIFOTMS, 0); |
|
1652 RTL_W32 (PARA7c, param[(int) tp->twist_row] |
|
1653 [(int) tp->twist_col]); |
|
1654 next_tick = HZ / 10; |
|
1655 if (++tp->twist_col >= 4) { |
|
1656 /* For short cables we are done. |
|
1657 For long cables (row == 3) check for mistune. */ |
|
1658 tp->twistie = |
|
1659 (tp->twist_row == 3) ? 4 : 0; |
|
1660 } |
|
1661 break; |
|
1662 case 4: |
|
1663 /* Special case for long cables: check for mistune. */ |
|
1664 if ((RTL_R16 (CSCR) & |
|
1665 CSCR_LinkStatusBits) == 0x7000) { |
|
1666 tp->twistie = 0; |
|
1667 break; |
|
1668 } else { |
|
1669 RTL_W32 (PARA7c, 0xfb38de03); |
|
1670 tp->twistie = 5; |
|
1671 next_tick = HZ / 10; |
|
1672 } |
|
1673 break; |
|
1674 case 5: |
|
1675 /* Retune for shorter cable (column 2). */ |
|
1676 RTL_W32 (FIFOTMS, 0x20); |
|
1677 RTL_W32 (PARA78, PARA78_default); |
|
1678 RTL_W32 (PARA7c, PARA7c_default); |
|
1679 RTL_W32 (FIFOTMS, 0x00); |
|
1680 tp->twist_row = 2; |
|
1681 tp->twist_col = 0; |
|
1682 tp->twistie = 3; |
|
1683 next_tick = HZ / 10; |
|
1684 break; |
|
1685 |
|
1686 default: |
|
1687 /* do nothing */ |
|
1688 break; |
|
1689 } |
|
1690 } |
|
1691 #endif /* CONFIG_8139TOO_TUNE_TWISTER */ |
|
1692 |
|
1693 static inline void rtl8139_thread_iter (struct net_device *dev, |
|
1694 struct rtl8139_private *tp, |
|
1695 void __iomem *ioaddr) |
|
1696 { |
|
1697 int mii_lpa; |
|
1698 |
|
1699 mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA); |
|
1700 |
|
1701 if (!tp->mii.force_media && mii_lpa != 0xffff) { |
|
1702 int duplex = (mii_lpa & LPA_100FULL) |
|
1703 || (mii_lpa & 0x01C0) == 0x0040; |
|
1704 if (tp->mii.full_duplex != duplex) { |
|
1705 tp->mii.full_duplex = duplex; |
|
1706 |
|
1707 if (mii_lpa) { |
|
1708 printk (KERN_INFO |
|
1709 "%s: Setting %s-duplex based on MII #%d link" |
|
1710 " partner ability of %4.4x.\n", |
|
1711 dev->name, |
|
1712 tp->mii.full_duplex ? "full" : "half", |
|
1713 tp->phys[0], mii_lpa); |
|
1714 } else { |
|
1715 printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n", |
|
1716 dev->name); |
|
1717 } |
|
1718 #if 0 |
|
1719 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
1720 RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20); |
|
1721 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
1722 #endif |
|
1723 } |
|
1724 } |
|
1725 |
|
1726 next_tick = HZ * 60; |
|
1727 |
|
1728 rtl8139_tune_twister (dev, tp); |
|
1729 |
|
1730 DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n", |
|
1731 dev->name, RTL_R16 (NWayLPAR)); |
|
1732 DPRINTK ("%s: Other registers are IntMask %4.4x IntStatus %4.4x\n", |
|
1733 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus)); |
|
1734 DPRINTK ("%s: Chip config %2.2x %2.2x.\n", |
|
1735 dev->name, RTL_R8 (Config0), |
|
1736 RTL_R8 (Config1)); |
|
1737 } |
|
1738 |
|
1739 static void rtl8139_thread (void *_data) |
|
1740 { |
|
1741 struct net_device *dev = _data; |
|
1742 struct rtl8139_private *tp = netdev_priv(dev); |
|
1743 unsigned long thr_delay = next_tick; |
|
1744 |
|
1745 if (tp->watchdog_fired) { |
|
1746 tp->watchdog_fired = 0; |
|
1747 rtl8139_tx_timeout_task(_data); |
|
1748 } else if (rtnl_trylock()) { |
|
1749 rtl8139_thread_iter (dev, tp, tp->mmio_addr); |
|
1750 rtnl_unlock (); |
|
1751 } else { |
|
1752 /* unlikely race. mitigate with fast poll. */ |
|
1753 thr_delay = HZ / 2; |
|
1754 } |
|
1755 |
|
1756 schedule_delayed_work(&tp->thread, thr_delay); |
|
1757 } |
|
1758 |
|
1759 static void rtl8139_start_thread(struct rtl8139_private *tp) |
|
1760 { |
|
1761 tp->twistie = 0; |
|
1762 if (tp->chipset == CH_8139_K) |
|
1763 tp->twistie = 1; |
|
1764 else if (tp->drv_flags & HAS_LNK_CHNG) |
|
1765 return; |
|
1766 |
|
1767 tp->have_thread = 1; |
|
1768 |
|
1769 schedule_delayed_work(&tp->thread, next_tick); |
|
1770 } |
|
1771 |
|
1772 static void rtl8139_stop_thread(struct rtl8139_private *tp) |
|
1773 { |
|
1774 if (tp->have_thread) { |
|
1775 cancel_rearming_delayed_work(&tp->thread); |
|
1776 tp->have_thread = 0; |
|
1777 } else |
|
1778 flush_scheduled_work(); |
|
1779 } |
|
1780 |
|
1781 static inline void rtl8139_tx_clear (struct rtl8139_private *tp) |
|
1782 { |
|
1783 tp->cur_tx = 0; |
|
1784 tp->dirty_tx = 0; |
|
1785 |
|
1786 /* XXX account for unsent Tx packets in tp->stats.tx_dropped */ |
|
1787 } |
|
1788 |
|
1789 static void rtl8139_tx_timeout_task (void *_data) |
|
1790 { |
|
1791 struct net_device *dev = _data; |
|
1792 struct rtl8139_private *tp = netdev_priv(dev); |
|
1793 void __iomem *ioaddr = tp->mmio_addr; |
|
1794 int i; |
|
1795 u8 tmp8; |
|
1796 |
|
1797 printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x " |
|
1798 "media %2.2x.\n", dev->name, RTL_R8 (ChipCmd), |
|
1799 RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus)); |
|
1800 /* Emit info to figure out what went wrong. */ |
|
1801 printk (KERN_DEBUG "%s: Tx queue start entry %ld dirty entry %ld.\n", |
|
1802 dev->name, tp->cur_tx, tp->dirty_tx); |
|
1803 for (i = 0; i < NUM_TX_DESC; i++) |
|
1804 printk (KERN_DEBUG "%s: Tx descriptor %d is %8.8lx.%s\n", |
|
1805 dev->name, i, RTL_R32 (TxStatus0 + (i * 4)), |
|
1806 i == tp->dirty_tx % NUM_TX_DESC ? |
|
1807 " (queue head)" : ""); |
|
1808 |
|
1809 tp->xstats.tx_timeouts++; |
|
1810 |
|
1811 /* disable Tx ASAP, if not already */ |
|
1812 tmp8 = RTL_R8 (ChipCmd); |
|
1813 if (tmp8 & CmdTxEnb) |
|
1814 RTL_W8 (ChipCmd, CmdRxEnb); |
|
1815 |
|
1816 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1817 |
|
1818 if (dev != rtl_ec_net_dev) { |
|
1819 spin_lock_bh(&tp->rx_lock); |
|
1820 /* Disable interrupts by clearing the interrupt mask. */ |
|
1821 RTL_W16 (IntrMask, 0x0000); |
|
1822 |
|
1823 /* Stop a shared interrupt from scavenging while we are. */ |
|
1824 spin_lock_irq(&tp->lock); |
|
1825 rtl8139_tx_clear (tp); |
|
1826 spin_unlock_irq(&tp->lock); |
|
1827 |
|
1828 /* ...and finally, reset everything */ |
|
1829 if (netif_running(dev)) { |
|
1830 rtl8139_hw_start (dev); |
|
1831 netif_wake_queue (dev); |
|
1832 } |
|
1833 spin_unlock_bh(&tp->rx_lock); |
|
1834 } else { |
|
1835 rtl8139_tx_clear (tp); |
|
1836 rtl8139_hw_start (dev); |
|
1837 } |
|
1838 |
|
1839 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1840 } |
|
1841 |
|
1842 static void rtl8139_tx_timeout (struct net_device *dev) |
|
1843 { |
|
1844 struct rtl8139_private *tp = netdev_priv(dev); |
|
1845 |
|
1846 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1847 |
|
1848 if (dev != rtl_ec_net_dev && !tp->have_thread) { |
|
1849 INIT_WORK(&tp->thread, rtl8139_tx_timeout_task, dev); |
|
1850 schedule_delayed_work(&tp->thread, next_tick); |
|
1851 } else |
|
1852 tp->watchdog_fired = 1; |
|
1853 |
|
1854 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1855 } |
|
1856 |
|
1857 static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev) |
|
1858 { |
|
1859 struct rtl8139_private *tp = netdev_priv(dev); |
|
1860 void __iomem *ioaddr = tp->mmio_addr; |
|
1861 unsigned int entry; |
|
1862 unsigned int len = skb->len; |
|
1863 unsigned long flags; |
|
1864 |
|
1865 /* Calculate the next Tx descriptor entry. */ |
|
1866 entry = tp->cur_tx % NUM_TX_DESC; |
|
1867 |
|
1868 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1869 |
|
1870 /* Note: the chip doesn't have auto-pad! */ |
|
1871 if (likely(len < TX_BUF_SIZE)) { |
|
1872 if (len < ETH_ZLEN) |
|
1873 memset(tp->tx_buf[entry], 0, ETH_ZLEN); |
|
1874 skb_copy_and_csum_dev(skb, tp->tx_buf[entry]); |
|
1875 if (dev != rtl_ec_net_dev) { |
|
1876 dev_kfree_skb(skb); |
|
1877 } |
|
1878 } else { |
|
1879 if (dev != rtl_ec_net_dev) { |
|
1880 dev_kfree_skb(skb); |
|
1881 } |
|
1882 tp->stats.tx_dropped++; |
|
1883 return 0; |
|
1884 } |
|
1885 |
|
1886 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1887 |
|
1888 if (dev != rtl_ec_net_dev) { |
|
1889 spin_lock_irqsave(&tp->lock, flags); |
|
1890 |
|
1891 RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), |
|
1892 tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); |
|
1893 |
|
1894 dev->trans_start = jiffies; |
|
1895 |
|
1896 tp->cur_tx++; |
|
1897 wmb(); |
|
1898 |
|
1899 if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx) |
|
1900 netif_stop_queue (dev); |
|
1901 spin_unlock_irqrestore(&tp->lock, flags); |
|
1902 |
|
1903 if (netif_msg_tx_queued(tp)) |
|
1904 printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n", |
|
1905 dev->name, len, entry); |
|
1906 } |
|
1907 else { |
|
1908 RTL_W32_F (TxStatus0 + (entry * sizeof (u32)), |
|
1909 tp->tx_flag | max(len, (unsigned int)ETH_ZLEN)); |
|
1910 |
|
1911 dev->trans_start = jiffies; |
|
1912 |
|
1913 tp->cur_tx++; |
|
1914 wmb(); |
|
1915 } |
|
1916 |
|
1917 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1918 |
|
1919 return 0; |
|
1920 } |
|
1921 |
|
1922 |
|
1923 static void rtl8139_tx_interrupt (struct net_device *dev, |
|
1924 struct rtl8139_private *tp, |
|
1925 void __iomem *ioaddr) |
|
1926 { |
|
1927 unsigned long dirty_tx, tx_left; |
|
1928 |
|
1929 assert (dev != NULL); |
|
1930 assert (ioaddr != NULL); |
|
1931 |
|
1932 dirty_tx = tp->dirty_tx; |
|
1933 tx_left = tp->cur_tx - dirty_tx; |
|
1934 while (tx_left > 0) { |
|
1935 int entry = dirty_tx % NUM_TX_DESC; |
|
1936 int txstatus; |
|
1937 |
|
1938 txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32))); |
|
1939 |
|
1940 if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted))) |
|
1941 break; /* It still hasn't been Txed */ |
|
1942 |
|
1943 /* Note: TxCarrierLost is always asserted at 100mbps. */ |
|
1944 if (txstatus & (TxOutOfWindow | TxAborted)) { |
|
1945 /* There was an major error, log it. */ |
|
1946 if (netif_msg_tx_err(tp)) |
|
1947 printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n", |
|
1948 dev->name, txstatus); |
|
1949 tp->stats.tx_errors++; |
|
1950 if (txstatus & TxAborted) { |
|
1951 tp->stats.tx_aborted_errors++; |
|
1952 RTL_W32 (TxConfig, TxClearAbt); |
|
1953 RTL_W16 (IntrStatus, TxErr); |
|
1954 wmb(); |
|
1955 } |
|
1956 if (txstatus & TxCarrierLost) |
|
1957 tp->stats.tx_carrier_errors++; |
|
1958 if (txstatus & TxOutOfWindow) |
|
1959 tp->stats.tx_window_errors++; |
|
1960 } else { |
|
1961 if (txstatus & TxUnderrun) { |
|
1962 /* Add 64 to the Tx FIFO threshold. */ |
|
1963 if (tp->tx_flag < 0x00300000) |
|
1964 tp->tx_flag += 0x00020000; |
|
1965 tp->stats.tx_fifo_errors++; |
|
1966 } |
|
1967 tp->stats.collisions += (txstatus >> 24) & 15; |
|
1968 tp->stats.tx_bytes += txstatus & 0x7ff; |
|
1969 tp->stats.tx_packets++; |
|
1970 } |
|
1971 |
|
1972 dirty_tx++; |
|
1973 tx_left--; |
|
1974 } |
|
1975 |
|
1976 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
1977 |
|
1978 #ifndef RTL8139_NDEBUG |
|
1979 if (dev != rtl_ec_net_dev && tp->cur_tx - dirty_tx > NUM_TX_DESC) { |
|
1980 printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n", |
|
1981 dev->name, dirty_tx, tp->cur_tx); |
|
1982 dirty_tx += NUM_TX_DESC; |
|
1983 } |
|
1984 #endif /* RTL8139_NDEBUG */ |
|
1985 |
|
1986 /* only wake the queue if we did work, and the queue is stopped */ |
|
1987 if (tp->dirty_tx != dirty_tx) { |
|
1988 tp->dirty_tx = dirty_tx; |
|
1989 mb(); |
|
1990 |
|
1991 if (dev != rtl_ec_net_dev) { |
|
1992 netif_wake_queue (dev); |
|
1993 } |
|
1994 } |
|
1995 |
|
1996 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
1997 } |
|
1998 |
|
1999 |
|
2000 /* TODO: clean this up! Rx reset need not be this intensive */ |
|
2001 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, |
|
2002 struct rtl8139_private *tp, void __iomem *ioaddr) |
|
2003 { |
|
2004 u8 tmp8; |
|
2005 #ifdef CONFIG_8139_OLD_RX_RESET |
|
2006 int tmp_work; |
|
2007 #endif |
|
2008 |
|
2009 if (netif_msg_rx_err (tp)) |
|
2010 printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n", |
|
2011 dev->name, rx_status); |
|
2012 tp->stats.rx_errors++; |
|
2013 if (!(rx_status & RxStatusOK)) { |
|
2014 if (rx_status & RxTooLong) { |
|
2015 DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n", |
|
2016 dev->name, rx_status); |
|
2017 /* A.C.: The chip hangs here. */ |
|
2018 } |
|
2019 if (rx_status & (RxBadSymbol | RxBadAlign)) |
|
2020 tp->stats.rx_frame_errors++; |
|
2021 if (rx_status & (RxRunt | RxTooLong)) |
|
2022 tp->stats.rx_length_errors++; |
|
2023 if (rx_status & RxCRCErr) |
|
2024 tp->stats.rx_crc_errors++; |
|
2025 } else { |
|
2026 tp->xstats.rx_lost_in_ring++; |
|
2027 } |
|
2028 |
|
2029 #ifndef CONFIG_8139_OLD_RX_RESET |
|
2030 tmp8 = RTL_R8 (ChipCmd); |
|
2031 RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb); |
|
2032 RTL_W8 (ChipCmd, tmp8); |
|
2033 RTL_W32 (RxConfig, tp->rx_config); |
|
2034 tp->cur_rx = 0; |
|
2035 #else |
|
2036 /* Reset the receiver, based on RealTek recommendation. (Bug?) */ |
|
2037 |
|
2038 /* disable receive */ |
|
2039 RTL_W8_F (ChipCmd, CmdTxEnb); |
|
2040 tmp_work = 200; |
|
2041 while (--tmp_work > 0) { |
|
2042 udelay(1); |
|
2043 tmp8 = RTL_R8 (ChipCmd); |
|
2044 if (!(tmp8 & CmdRxEnb)) |
|
2045 break; |
|
2046 } |
|
2047 if (tmp_work <= 0) |
|
2048 printk (KERN_WARNING PFX "rx stop wait too long\n"); |
|
2049 /* restart receive */ |
|
2050 tmp_work = 200; |
|
2051 while (--tmp_work > 0) { |
|
2052 RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
2053 udelay(1); |
|
2054 tmp8 = RTL_R8 (ChipCmd); |
|
2055 if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb)) |
|
2056 break; |
|
2057 } |
|
2058 if (tmp_work <= 0) |
|
2059 printk (KERN_WARNING PFX "tx/rx enable wait too long\n"); |
|
2060 |
|
2061 /* and reinitialize all rx related registers */ |
|
2062 RTL_W8_F (Cfg9346, Cfg9346_Unlock); |
|
2063 /* Must enable Tx/Rx before setting transfer thresholds! */ |
|
2064 RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb); |
|
2065 |
|
2066 tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys; |
|
2067 RTL_W32 (RxConfig, tp->rx_config); |
|
2068 tp->cur_rx = 0; |
|
2069 |
|
2070 DPRINTK("init buffer addresses\n"); |
|
2071 |
|
2072 /* Lock Config[01234] and BMCR register writes */ |
|
2073 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
2074 |
|
2075 /* init Rx ring buffer DMA address */ |
|
2076 RTL_W32_F (RxBuf, tp->rx_ring_dma); |
|
2077 |
|
2078 /* A.C.: Reset the multicast list. */ |
|
2079 __set_rx_mode (dev); |
|
2080 #endif |
|
2081 } |
|
2082 |
|
2083 #if RX_BUF_IDX == 3 |
|
2084 static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring, |
|
2085 u32 offset, unsigned int size) |
|
2086 { |
|
2087 u32 left = RX_BUF_LEN - offset; |
|
2088 |
|
2089 if (size > left) { |
|
2090 memcpy(skb->data, ring + offset, left); |
|
2091 memcpy(skb->data+left, ring, size - left); |
|
2092 } else |
|
2093 memcpy(skb->data, ring + offset, size); |
|
2094 } |
|
2095 #endif |
|
2096 |
|
2097 static void rtl8139_isr_ack(struct rtl8139_private *tp) |
|
2098 { |
|
2099 void __iomem *ioaddr = tp->mmio_addr; |
|
2100 u16 status; |
|
2101 |
|
2102 status = RTL_R16 (IntrStatus) & RxAckBits; |
|
2103 |
|
2104 /* Clear out errors and receive interrupts */ |
|
2105 if (likely(status != 0)) { |
|
2106 if (unlikely(status & (RxFIFOOver | RxOverflow))) { |
|
2107 tp->stats.rx_errors++; |
|
2108 if (status & RxFIFOOver) |
|
2109 tp->stats.rx_fifo_errors++; |
|
2110 } |
|
2111 RTL_W16_F (IntrStatus, RxAckBits); |
|
2112 } |
|
2113 } |
|
2114 |
|
2115 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp, |
|
2116 int budget) |
|
2117 { |
|
2118 void __iomem *ioaddr = tp->mmio_addr; |
|
2119 int received = 0; |
|
2120 unsigned char *rx_ring = tp->rx_ring; |
|
2121 unsigned int cur_rx = tp->cur_rx; |
|
2122 unsigned int rx_size = 0; |
|
2123 |
|
2124 DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x," |
|
2125 " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx, |
|
2126 RTL_R16 (RxBufAddr), |
|
2127 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); |
|
2128 |
|
2129 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2130 |
|
2131 while ((dev == rtl_ec_net_dev || netif_running(dev)) |
|
2132 && received < budget |
|
2133 && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) { |
|
2134 |
|
2135 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2136 |
|
2137 u32 ring_offset = cur_rx % RX_BUF_LEN; |
|
2138 u32 rx_status; |
|
2139 unsigned int pkt_size; |
|
2140 struct sk_buff *skb; |
|
2141 |
|
2142 rmb(); |
|
2143 |
|
2144 /* read size+status of next frame from DMA ring buffer */ |
|
2145 rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset)); |
|
2146 rx_size = rx_status >> 16; |
|
2147 pkt_size = rx_size - 4; |
|
2148 |
|
2149 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2150 |
|
2151 if (dev != rtl_ec_net_dev) { |
|
2152 if (netif_msg_rx_status(tp)) |
|
2153 printk(KERN_DEBUG "%s: rtl8139_rx() status %4.4x, size %4.4x," |
|
2154 " cur %4.4x.\n", dev->name, rx_status, |
|
2155 rx_size, cur_rx); |
|
2156 } |
|
2157 |
|
2158 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2159 |
|
2160 #if RTL8139_DEBUG > 2 |
|
2161 { |
|
2162 int i; |
|
2163 DPRINTK ("%s: Frame contents ", dev->name); |
|
2164 for (i = 0; i < 70; i++) |
|
2165 printk (" %2.2x", |
|
2166 rx_ring[ring_offset + i]); |
|
2167 printk (".\n"); |
|
2168 } |
|
2169 #endif |
|
2170 |
|
2171 /* Packet copy from FIFO still in progress. |
|
2172 * Theoretically, this should never happen |
|
2173 * since EarlyRx is disabled. |
|
2174 */ |
|
2175 if (unlikely(rx_size == 0xfff0)) { |
|
2176 if (!tp->fifo_copy_timeout) |
|
2177 tp->fifo_copy_timeout = jiffies + 2; |
|
2178 else if (time_after(jiffies, tp->fifo_copy_timeout)) { |
|
2179 DPRINTK ("%s: hung FIFO. Reset.", dev->name); |
|
2180 rx_size = 0; |
|
2181 goto no_early_rx; |
|
2182 } |
|
2183 if (netif_msg_intr(tp)) { |
|
2184 printk(KERN_DEBUG "%s: fifo copy in progress.", |
|
2185 dev->name); |
|
2186 } |
|
2187 tp->xstats.early_rx++; |
|
2188 break; |
|
2189 } |
|
2190 |
|
2191 no_early_rx: |
|
2192 tp->fifo_copy_timeout = 0; |
|
2193 |
|
2194 /* If Rx err or invalid rx_size/rx_status received |
|
2195 * (which happens if we get lost in the ring), |
|
2196 * Rx process gets reset, so we abort any further |
|
2197 * Rx processing. |
|
2198 */ |
|
2199 if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) || |
|
2200 (rx_size < 8) || |
|
2201 (!(rx_status & RxStatusOK)))) { |
|
2202 rtl8139_rx_err (rx_status, dev, tp, ioaddr); |
|
2203 received = -1; |
|
2204 goto out; |
|
2205 } |
|
2206 |
|
2207 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2208 |
|
2209 if (dev != rtl_ec_net_dev) { |
|
2210 /* Malloc up new buffer, compatible with net-2e. */ |
|
2211 /* Omit the four octet CRC from the length. */ |
|
2212 |
|
2213 skb = dev_alloc_skb (pkt_size + 2); |
|
2214 if (likely(skb)) { |
|
2215 skb->dev = dev; |
|
2216 skb_reserve (skb, 2); /* 16 byte align the IP fields. */ |
|
2217 #if RX_BUF_IDX == 3 |
|
2218 wrap_copy(skb, rx_ring, ring_offset+4, pkt_size); |
|
2219 #else |
|
2220 eth_copy_and_sum (skb, &rx_ring[ring_offset + 4], pkt_size, 0); |
|
2221 #endif |
|
2222 skb_put (skb, pkt_size); |
|
2223 |
|
2224 skb->protocol = eth_type_trans (skb, dev); |
|
2225 |
|
2226 dev->last_rx = jiffies; |
|
2227 tp->stats.rx_bytes += pkt_size; |
|
2228 tp->stats.rx_packets++; |
|
2229 |
|
2230 netif_receive_skb (skb); |
|
2231 } else { |
|
2232 if (net_ratelimit()) |
|
2233 printk(KERN_WARNING |
|
2234 "%s: Memory squeeze, dropping packet.\n", |
|
2235 dev->name); |
|
2236 tp->stats.rx_dropped++; |
|
2237 } |
|
2238 } else { |
|
2239 ecdev_receive(rtl_ec_dev, |
|
2240 &rx_ring[ring_offset + 4], pkt_size); |
|
2241 dev->last_rx = jiffies; |
|
2242 tp->stats.rx_bytes += pkt_size; |
|
2243 tp->stats.rx_packets++; |
|
2244 } |
|
2245 |
|
2246 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2247 |
|
2248 received++; |
|
2249 |
|
2250 cur_rx = (cur_rx + rx_size + 4 + 3) & ~3; |
|
2251 RTL_W16 (RxBufPtr, (u16) (cur_rx - 16)); |
|
2252 |
|
2253 rtl8139_isr_ack(tp); |
|
2254 } |
|
2255 |
|
2256 if (unlikely(!received || rx_size == 0xfff0)) |
|
2257 rtl8139_isr_ack(tp); |
|
2258 |
|
2259 #if RTL8139_DEBUG > 1 |
|
2260 DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x," |
|
2261 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx, |
|
2262 RTL_R16 (RxBufAddr), |
|
2263 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd)); |
|
2264 #endif |
|
2265 |
|
2266 tp->cur_rx = cur_rx; |
|
2267 |
|
2268 /* |
|
2269 * The receive buffer should be mostly empty. |
|
2270 * Tell NAPI to reenable the Rx irq. |
|
2271 */ |
|
2272 if (tp->fifo_copy_timeout) |
|
2273 received = budget; |
|
2274 |
|
2275 out: |
|
2276 return received; |
|
2277 } |
|
2278 |
|
2279 |
|
2280 static void rtl8139_weird_interrupt (struct net_device *dev, |
|
2281 struct rtl8139_private *tp, |
|
2282 void __iomem *ioaddr, |
|
2283 int status, int link_changed) |
|
2284 { |
|
2285 DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n", |
|
2286 dev->name, status); |
|
2287 |
|
2288 assert (dev != NULL); |
|
2289 assert (tp != NULL); |
|
2290 assert (ioaddr != NULL); |
|
2291 |
|
2292 /* Update the error count. */ |
|
2293 tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2294 RTL_W32 (RxMissed, 0); |
|
2295 |
|
2296 if ((status & RxUnderrun) && link_changed && |
|
2297 (tp->drv_flags & HAS_LNK_CHNG)) { |
|
2298 rtl_check_media(dev, 0); |
|
2299 status &= ~RxUnderrun; |
|
2300 } |
|
2301 |
|
2302 if (status & (RxUnderrun | RxErr)) |
|
2303 tp->stats.rx_errors++; |
|
2304 |
|
2305 if (status & PCSTimeout) |
|
2306 tp->stats.rx_length_errors++; |
|
2307 if (status & RxUnderrun) |
|
2308 tp->stats.rx_fifo_errors++; |
|
2309 if (status & PCIErr) { |
|
2310 u16 pci_cmd_status; |
|
2311 pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status); |
|
2312 pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status); |
|
2313 |
|
2314 printk (KERN_ERR "%s: PCI Bus error %4.4x.\n", |
|
2315 dev->name, pci_cmd_status); |
|
2316 } |
|
2317 } |
|
2318 |
|
2319 static int rtl8139_poll(struct net_device *dev, int *budget) |
|
2320 { |
|
2321 struct rtl8139_private *tp = netdev_priv(dev); |
|
2322 void __iomem *ioaddr = tp->mmio_addr; |
|
2323 int orig_budget = min(*budget, dev->quota); |
|
2324 int done = 1; |
|
2325 |
|
2326 spin_lock(&tp->rx_lock); |
|
2327 if (likely(RTL_R16(IntrStatus) & RxAckBits)) { |
|
2328 int work_done; |
|
2329 |
|
2330 work_done = rtl8139_rx(dev, tp, orig_budget); |
|
2331 if (likely(work_done > 0)) { |
|
2332 *budget -= work_done; |
|
2333 dev->quota -= work_done; |
|
2334 done = (work_done < orig_budget); |
|
2335 } |
|
2336 } |
|
2337 |
|
2338 if (done) { |
|
2339 /* |
|
2340 * Order is important since data can get interrupted |
|
2341 * again when we think we are done. |
|
2342 */ |
|
2343 local_irq_disable(); |
|
2344 RTL_W16_F(IntrMask, rtl8139_intr_mask); |
|
2345 __netif_rx_complete(dev); |
|
2346 local_irq_enable(); |
|
2347 } |
|
2348 spin_unlock(&tp->rx_lock); |
|
2349 |
|
2350 return !done; |
|
2351 } |
|
2352 |
|
2353 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2354 |
|
2355 void ec_poll(struct net_device *dev) |
|
2356 { |
|
2357 rtl8139_interrupt(0, dev); |
|
2358 } |
|
2359 |
|
2360 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2361 |
|
2362 /* The interrupt handler does all of the Rx thread work and cleans up |
|
2363 after the Tx thread. */ |
|
2364 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance) |
|
2365 { |
|
2366 struct net_device *dev = (struct net_device *) dev_instance; |
|
2367 struct rtl8139_private *tp = netdev_priv(dev); |
|
2368 void __iomem *ioaddr = tp->mmio_addr; |
|
2369 u16 status, ackstat; |
|
2370 int link_changed = 0; /* avoid bogus "uninit" warning */ |
|
2371 int handled = 0; |
|
2372 |
|
2373 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2374 |
|
2375 if (dev != rtl_ec_net_dev) { |
|
2376 spin_lock (&tp->lock); |
|
2377 status = RTL_R16 (IntrStatus); |
|
2378 |
|
2379 /* shared irq? */ |
|
2380 if (unlikely((status & rtl8139_intr_mask) == 0)) |
|
2381 goto out; |
|
2382 } else { |
|
2383 status = RTL_R16 (IntrStatus); |
|
2384 } |
|
2385 |
|
2386 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2387 |
|
2388 handled = 1; |
|
2389 |
|
2390 /* h/w no longer present (hotplug?) or major error, bail */ |
|
2391 if (unlikely(status == 0xFFFF)) |
|
2392 goto out; |
|
2393 |
|
2394 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2395 |
|
2396 if (dev != rtl_ec_net_dev) { |
|
2397 /* close possible race's with dev_close */ |
|
2398 if (unlikely(!netif_running(dev))) { |
|
2399 RTL_W16 (IntrMask, 0); |
|
2400 goto out; |
|
2401 } |
|
2402 } |
|
2403 |
|
2404 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2405 |
|
2406 /* Acknowledge all of the current interrupt sources ASAP, but |
|
2407 an first get an additional status bit from CSCR. */ |
|
2408 if (unlikely(status & RxUnderrun)) |
|
2409 link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit; |
|
2410 |
|
2411 ackstat = status & ~(RxAckBits | TxErr); |
|
2412 if (ackstat) |
|
2413 RTL_W16 (IntrStatus, ackstat); |
|
2414 |
|
2415 /* Receive packets are processed by poll routine. |
|
2416 If not running start it now. */ |
|
2417 |
|
2418 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2419 |
|
2420 if (status & RxAckBits){ |
|
2421 if (dev != rtl_ec_net_dev) { |
|
2422 /* Mark for polling */ |
|
2423 if (netif_rx_schedule_prep(dev)) { |
|
2424 RTL_W16_F (IntrMask, rtl8139_norx_intr_mask); |
|
2425 __netif_rx_schedule (dev); |
|
2426 } |
|
2427 } else { |
|
2428 /* EtherCAT device: Just receive all frames */ |
|
2429 rtl8139_rx(dev, tp, 100); // FIXME |
|
2430 } |
|
2431 } |
|
2432 |
|
2433 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2434 |
|
2435 /* Check uncommon events with one test. */ |
|
2436 if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr))) |
|
2437 rtl8139_weird_interrupt (dev, tp, ioaddr, |
|
2438 status, link_changed); |
|
2439 |
|
2440 if (status & (TxOK | TxErr)) { |
|
2441 rtl8139_tx_interrupt (dev, tp, ioaddr); |
|
2442 if (status & TxErr) |
|
2443 RTL_W16 (IntrStatus, TxErr); |
|
2444 } |
|
2445 out: |
|
2446 |
|
2447 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2448 |
|
2449 if (dev != rtl_ec_net_dev) { |
|
2450 spin_unlock (&tp->lock); |
|
2451 } |
|
2452 |
|
2453 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2454 |
|
2455 DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n", |
|
2456 dev->name, RTL_R16 (IntrStatus)); |
|
2457 return IRQ_RETVAL(handled); |
|
2458 } |
|
2459 |
|
2460 #ifdef CONFIG_NET_POLL_CONTROLLER |
|
2461 /* |
|
2462 * Polling receive - used by netconsole and other diagnostic tools |
|
2463 * to allow network i/o with interrupts disabled. |
|
2464 */ |
|
2465 static void rtl8139_poll_controller(struct net_device *dev) |
|
2466 { |
|
2467 disable_irq(dev->irq); |
|
2468 rtl8139_interrupt(dev->irq, dev); |
|
2469 enable_irq(dev->irq); |
|
2470 } |
|
2471 #endif |
|
2472 |
|
2473 static int rtl8139_close (struct net_device *dev) |
|
2474 { |
|
2475 struct rtl8139_private *tp = netdev_priv(dev); |
|
2476 void __iomem *ioaddr = tp->mmio_addr; |
|
2477 unsigned long flags; |
|
2478 |
|
2479 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2480 |
|
2481 if (dev != rtl_ec_net_dev) { |
|
2482 netif_stop_queue (dev); |
|
2483 |
|
2484 rtl8139_stop_thread(tp); |
|
2485 |
|
2486 if (netif_msg_ifdown(tp)) |
|
2487 printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n", |
|
2488 dev->name, RTL_R16 (IntrStatus)); |
|
2489 |
|
2490 spin_lock_irqsave (&tp->lock, flags); |
|
2491 |
|
2492 /* Stop the chip's Tx and Rx DMA processes. */ |
|
2493 RTL_W8 (ChipCmd, 0); |
|
2494 |
|
2495 /* Disable interrupts by clearing the interrupt mask. */ |
|
2496 RTL_W16 (IntrMask, 0); |
|
2497 |
|
2498 /* Update the error counts. */ |
|
2499 tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2500 RTL_W32 (RxMissed, 0); |
|
2501 |
|
2502 spin_unlock_irqrestore (&tp->lock, flags); |
|
2503 |
|
2504 synchronize_irq (dev->irq); /* racy, but that's ok here */ |
|
2505 free_irq (dev->irq, dev); |
|
2506 } else { |
|
2507 /* Stop the chip's Tx and Rx DMA processes. */ |
|
2508 RTL_W8 (ChipCmd, 0); |
|
2509 |
|
2510 /* Disable interrupts by clearing the interrupt mask. */ |
|
2511 RTL_W16 (IntrMask, 0); |
|
2512 |
|
2513 /* Update the error counts. */ |
|
2514 tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2515 RTL_W32 (RxMissed, 0); |
|
2516 } |
|
2517 |
|
2518 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2519 |
|
2520 rtl8139_tx_clear (tp); |
|
2521 |
|
2522 pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN, |
|
2523 tp->rx_ring, tp->rx_ring_dma); |
|
2524 pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN, |
|
2525 tp->tx_bufs, tp->tx_bufs_dma); |
|
2526 tp->rx_ring = NULL; |
|
2527 tp->tx_bufs = NULL; |
|
2528 |
|
2529 /* Green! Put the chip in low-power mode. */ |
|
2530 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
2531 |
|
2532 if (rtl_chip_info[tp->chipset].flags & HasHltClk) |
|
2533 RTL_W8 (HltClk, 'H'); /* 'R' would leave the clock running. */ |
|
2534 |
|
2535 return 0; |
|
2536 } |
|
2537 |
|
2538 |
|
2539 /* Get the ethtool Wake-on-LAN settings. Assumes that wol points to |
|
2540 kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and |
|
2541 other threads or interrupts aren't messing with the 8139. */ |
|
2542 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
|
2543 { |
|
2544 struct rtl8139_private *np = netdev_priv(dev); |
|
2545 void __iomem *ioaddr = np->mmio_addr; |
|
2546 |
|
2547 spin_lock_irq(&np->lock); |
|
2548 if (rtl_chip_info[np->chipset].flags & HasLWake) { |
|
2549 u8 cfg3 = RTL_R8 (Config3); |
|
2550 u8 cfg5 = RTL_R8 (Config5); |
|
2551 |
|
2552 wol->supported = WAKE_PHY | WAKE_MAGIC |
|
2553 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST; |
|
2554 |
|
2555 wol->wolopts = 0; |
|
2556 if (cfg3 & Cfg3_LinkUp) |
|
2557 wol->wolopts |= WAKE_PHY; |
|
2558 if (cfg3 & Cfg3_Magic) |
|
2559 wol->wolopts |= WAKE_MAGIC; |
|
2560 /* (KON)FIXME: See how netdev_set_wol() handles the |
|
2561 following constants. */ |
|
2562 if (cfg5 & Cfg5_UWF) |
|
2563 wol->wolopts |= WAKE_UCAST; |
|
2564 if (cfg5 & Cfg5_MWF) |
|
2565 wol->wolopts |= WAKE_MCAST; |
|
2566 if (cfg5 & Cfg5_BWF) |
|
2567 wol->wolopts |= WAKE_BCAST; |
|
2568 } |
|
2569 spin_unlock_irq(&np->lock); |
|
2570 } |
|
2571 |
|
2572 |
|
2573 /* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes |
|
2574 that wol points to kernel memory and other threads or interrupts |
|
2575 aren't messing with the 8139. */ |
|
2576 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
|
2577 { |
|
2578 struct rtl8139_private *np = netdev_priv(dev); |
|
2579 void __iomem *ioaddr = np->mmio_addr; |
|
2580 u32 support; |
|
2581 u8 cfg3, cfg5; |
|
2582 |
|
2583 support = ((rtl_chip_info[np->chipset].flags & HasLWake) |
|
2584 ? (WAKE_PHY | WAKE_MAGIC |
|
2585 | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST) |
|
2586 : 0); |
|
2587 if (wol->wolopts & ~support) |
|
2588 return -EINVAL; |
|
2589 |
|
2590 spin_lock_irq(&np->lock); |
|
2591 cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic); |
|
2592 if (wol->wolopts & WAKE_PHY) |
|
2593 cfg3 |= Cfg3_LinkUp; |
|
2594 if (wol->wolopts & WAKE_MAGIC) |
|
2595 cfg3 |= Cfg3_Magic; |
|
2596 RTL_W8 (Cfg9346, Cfg9346_Unlock); |
|
2597 RTL_W8 (Config3, cfg3); |
|
2598 RTL_W8 (Cfg9346, Cfg9346_Lock); |
|
2599 |
|
2600 cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF); |
|
2601 /* (KON)FIXME: These are untested. We may have to set the |
|
2602 CRC0, Wakeup0 and LSBCRC0 registers too, but I have no |
|
2603 documentation. */ |
|
2604 if (wol->wolopts & WAKE_UCAST) |
|
2605 cfg5 |= Cfg5_UWF; |
|
2606 if (wol->wolopts & WAKE_MCAST) |
|
2607 cfg5 |= Cfg5_MWF; |
|
2608 if (wol->wolopts & WAKE_BCAST) |
|
2609 cfg5 |= Cfg5_BWF; |
|
2610 RTL_W8 (Config5, cfg5); /* need not unlock via Cfg9346 */ |
|
2611 spin_unlock_irq(&np->lock); |
|
2612 |
|
2613 return 0; |
|
2614 } |
|
2615 |
|
2616 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
|
2617 { |
|
2618 struct rtl8139_private *np = netdev_priv(dev); |
|
2619 strcpy(info->driver, DRV_NAME); |
|
2620 strcpy(info->version, DRV_VERSION); |
|
2621 strcpy(info->bus_info, pci_name(np->pci_dev)); |
|
2622 info->regdump_len = np->regs_len; |
|
2623 } |
|
2624 |
|
2625 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
|
2626 { |
|
2627 struct rtl8139_private *np = netdev_priv(dev); |
|
2628 spin_lock_irq(&np->lock); |
|
2629 mii_ethtool_gset(&np->mii, cmd); |
|
2630 spin_unlock_irq(&np->lock); |
|
2631 return 0; |
|
2632 } |
|
2633 |
|
2634 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
|
2635 { |
|
2636 struct rtl8139_private *np = netdev_priv(dev); |
|
2637 int rc; |
|
2638 spin_lock_irq(&np->lock); |
|
2639 rc = mii_ethtool_sset(&np->mii, cmd); |
|
2640 spin_unlock_irq(&np->lock); |
|
2641 return rc; |
|
2642 } |
|
2643 |
|
2644 static int rtl8139_nway_reset(struct net_device *dev) |
|
2645 { |
|
2646 struct rtl8139_private *np = netdev_priv(dev); |
|
2647 return mii_nway_restart(&np->mii); |
|
2648 } |
|
2649 |
|
2650 static u32 rtl8139_get_link(struct net_device *dev) |
|
2651 { |
|
2652 struct rtl8139_private *np = netdev_priv(dev); |
|
2653 return mii_link_ok(&np->mii); |
|
2654 } |
|
2655 |
|
2656 static u32 rtl8139_get_msglevel(struct net_device *dev) |
|
2657 { |
|
2658 struct rtl8139_private *np = netdev_priv(dev); |
|
2659 return np->msg_enable; |
|
2660 } |
|
2661 |
|
2662 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum) |
|
2663 { |
|
2664 struct rtl8139_private *np = netdev_priv(dev); |
|
2665 np->msg_enable = datum; |
|
2666 } |
|
2667 |
|
2668 /* TODO: we are too slack to do reg dumping for pio, for now */ |
|
2669 #ifdef CONFIG_8139TOO_PIO |
|
2670 #define rtl8139_get_regs_len NULL |
|
2671 #define rtl8139_get_regs NULL |
|
2672 #else |
|
2673 static int rtl8139_get_regs_len(struct net_device *dev) |
|
2674 { |
|
2675 struct rtl8139_private *np = netdev_priv(dev); |
|
2676 return np->regs_len; |
|
2677 } |
|
2678 |
|
2679 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf) |
|
2680 { |
|
2681 struct rtl8139_private *np = netdev_priv(dev); |
|
2682 |
|
2683 regs->version = RTL_REGS_VER; |
|
2684 |
|
2685 spin_lock_irq(&np->lock); |
|
2686 memcpy_fromio(regbuf, np->mmio_addr, regs->len); |
|
2687 spin_unlock_irq(&np->lock); |
|
2688 } |
|
2689 #endif /* CONFIG_8139TOO_MMIO */ |
|
2690 |
|
2691 static int rtl8139_get_stats_count(struct net_device *dev) |
|
2692 { |
|
2693 return RTL_NUM_STATS; |
|
2694 } |
|
2695 |
|
2696 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data) |
|
2697 { |
|
2698 struct rtl8139_private *np = netdev_priv(dev); |
|
2699 |
|
2700 data[0] = np->xstats.early_rx; |
|
2701 data[1] = np->xstats.tx_buf_mapped; |
|
2702 data[2] = np->xstats.tx_timeouts; |
|
2703 data[3] = np->xstats.rx_lost_in_ring; |
|
2704 } |
|
2705 |
|
2706 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data) |
|
2707 { |
|
2708 memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys)); |
|
2709 } |
|
2710 |
|
2711 static const struct ethtool_ops rtl8139_ethtool_ops = { |
|
2712 .get_drvinfo = rtl8139_get_drvinfo, |
|
2713 .get_settings = rtl8139_get_settings, |
|
2714 .set_settings = rtl8139_set_settings, |
|
2715 .get_regs_len = rtl8139_get_regs_len, |
|
2716 .get_regs = rtl8139_get_regs, |
|
2717 .nway_reset = rtl8139_nway_reset, |
|
2718 .get_link = rtl8139_get_link, |
|
2719 .get_msglevel = rtl8139_get_msglevel, |
|
2720 .set_msglevel = rtl8139_set_msglevel, |
|
2721 .get_wol = rtl8139_get_wol, |
|
2722 .set_wol = rtl8139_set_wol, |
|
2723 .get_strings = rtl8139_get_strings, |
|
2724 .get_stats_count = rtl8139_get_stats_count, |
|
2725 .get_ethtool_stats = rtl8139_get_ethtool_stats, |
|
2726 .get_perm_addr = ethtool_op_get_perm_addr, |
|
2727 }; |
|
2728 |
|
2729 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
|
2730 { |
|
2731 struct rtl8139_private *np = netdev_priv(dev); |
|
2732 int rc; |
|
2733 |
|
2734 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2735 |
|
2736 if (dev == rtl_ec_net_dev || !netif_running(dev)) |
|
2737 return -EINVAL; |
|
2738 |
|
2739 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2740 |
|
2741 spin_lock_irq(&np->lock); |
|
2742 rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL); |
|
2743 spin_unlock_irq(&np->lock); |
|
2744 |
|
2745 return rc; |
|
2746 } |
|
2747 |
|
2748 |
|
2749 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) |
|
2750 { |
|
2751 struct rtl8139_private *tp = netdev_priv(dev); |
|
2752 void __iomem *ioaddr = tp->mmio_addr; |
|
2753 unsigned long flags; |
|
2754 |
|
2755 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2756 |
|
2757 if (dev == rtl_ec_net_dev || netif_running(dev)) { |
|
2758 spin_lock_irqsave (&tp->lock, flags); |
|
2759 tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2760 RTL_W32 (RxMissed, 0); |
|
2761 spin_unlock_irqrestore (&tp->lock, flags); |
|
2762 } |
|
2763 |
|
2764 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2765 |
|
2766 return &tp->stats; |
|
2767 } |
|
2768 |
|
2769 /* Set or clear the multicast filter for this adaptor. |
|
2770 This routine is not state sensitive and need not be SMP locked. */ |
|
2771 |
|
2772 static void __set_rx_mode (struct net_device *dev) |
|
2773 { |
|
2774 struct rtl8139_private *tp = netdev_priv(dev); |
|
2775 void __iomem *ioaddr = tp->mmio_addr; |
|
2776 u32 mc_filter[2]; /* Multicast hash filter */ |
|
2777 int i, rx_mode; |
|
2778 u32 tmp; |
|
2779 |
|
2780 DPRINTK ("%s: rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n", |
|
2781 dev->name, dev->flags, RTL_R32 (RxConfig)); |
|
2782 |
|
2783 /* Note: do not reorder, GCC is clever about common statements. */ |
|
2784 if (dev->flags & IFF_PROMISC) { |
|
2785 rx_mode = |
|
2786 AcceptBroadcast | AcceptMulticast | AcceptMyPhys | |
|
2787 AcceptAllPhys; |
|
2788 mc_filter[1] = mc_filter[0] = 0xffffffff; |
|
2789 } else if ((dev->mc_count > multicast_filter_limit) |
|
2790 || (dev->flags & IFF_ALLMULTI)) { |
|
2791 /* Too many to filter perfectly -- accept all multicasts. */ |
|
2792 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; |
|
2793 mc_filter[1] = mc_filter[0] = 0xffffffff; |
|
2794 } else { |
|
2795 struct dev_mc_list *mclist; |
|
2796 rx_mode = AcceptBroadcast | AcceptMyPhys; |
|
2797 mc_filter[1] = mc_filter[0] = 0; |
|
2798 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; |
|
2799 i++, mclist = mclist->next) { |
|
2800 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; |
|
2801 |
|
2802 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); |
|
2803 rx_mode |= AcceptMulticast; |
|
2804 } |
|
2805 } |
|
2806 |
|
2807 /* We can safely update without stopping the chip. */ |
|
2808 tmp = rtl8139_rx_config | rx_mode; |
|
2809 if (tp->rx_config != tmp) { |
|
2810 RTL_W32_F (RxConfig, tmp); |
|
2811 tp->rx_config = tmp; |
|
2812 } |
|
2813 RTL_W32_F (MAR0 + 0, mc_filter[0]); |
|
2814 RTL_W32_F (MAR0 + 4, mc_filter[1]); |
|
2815 } |
|
2816 |
|
2817 static void rtl8139_set_rx_mode (struct net_device *dev) |
|
2818 { |
|
2819 unsigned long flags; |
|
2820 struct rtl8139_private *tp = netdev_priv(dev); |
|
2821 |
|
2822 spin_lock_irqsave (&tp->lock, flags); |
|
2823 __set_rx_mode(dev); |
|
2824 spin_unlock_irqrestore (&tp->lock, flags); |
|
2825 } |
|
2826 |
|
2827 #ifdef CONFIG_PM |
|
2828 |
|
2829 static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state) |
|
2830 { |
|
2831 struct net_device *dev = pci_get_drvdata (pdev); |
|
2832 struct rtl8139_private *tp = netdev_priv(dev); |
|
2833 void __iomem *ioaddr = tp->mmio_addr; |
|
2834 unsigned long flags; |
|
2835 |
|
2836 pci_save_state (pdev); |
|
2837 |
|
2838 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2839 |
|
2840 if (dev == rtl_ec_net_dev || !netif_running (dev)) |
|
2841 return 0; |
|
2842 |
|
2843 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2844 |
|
2845 netif_device_detach (dev); |
|
2846 |
|
2847 spin_lock_irqsave (&tp->lock, flags); |
|
2848 |
|
2849 /* Disable interrupts, stop Tx and Rx. */ |
|
2850 RTL_W16 (IntrMask, 0); |
|
2851 RTL_W8 (ChipCmd, 0); |
|
2852 |
|
2853 /* Update the error counts. */ |
|
2854 tp->stats.rx_missed_errors += RTL_R32 (RxMissed); |
|
2855 RTL_W32 (RxMissed, 0); |
|
2856 |
|
2857 spin_unlock_irqrestore (&tp->lock, flags); |
|
2858 |
|
2859 pci_set_power_state (pdev, PCI_D3hot); |
|
2860 |
|
2861 return 0; |
|
2862 } |
|
2863 |
|
2864 |
|
2865 static int rtl8139_resume (struct pci_dev *pdev) |
|
2866 { |
|
2867 struct net_device *dev = pci_get_drvdata (pdev); |
|
2868 |
|
2869 pci_restore_state (pdev); |
|
2870 |
|
2871 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2872 |
|
2873 if (dev == rtl_ec_net_dev || !netif_running (dev)) |
|
2874 return 0; |
|
2875 |
|
2876 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2877 |
|
2878 pci_set_power_state (pdev, PCI_D0); |
|
2879 rtl8139_init_ring (dev); |
|
2880 rtl8139_hw_start (dev); |
|
2881 netif_device_attach (dev); |
|
2882 return 0; |
|
2883 } |
|
2884 |
|
2885 #endif /* CONFIG_PM */ |
|
2886 |
|
2887 |
|
2888 static struct pci_driver rtl8139_pci_driver = { |
|
2889 .name = DRV_NAME, |
|
2890 .id_table = rtl8139_pci_tbl, |
|
2891 .probe = rtl8139_init_one, |
|
2892 .remove = __devexit_p(rtl8139_remove_one), |
|
2893 #ifdef CONFIG_PM |
|
2894 .suspend = rtl8139_suspend, |
|
2895 .resume = rtl8139_resume, |
|
2896 #endif /* CONFIG_PM */ |
|
2897 }; |
|
2898 |
|
2899 |
|
2900 static int __init rtl8139_init_module (void) |
|
2901 { |
|
2902 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2903 |
|
2904 printk(KERN_INFO RTL8139_DRIVER_NAME "\n"); |
|
2905 printk(KERN_INFO "ec_device_index is %i\n", ec_device_index); |
|
2906 |
|
2907 if (pci_register_driver(&rtl8139_pci_driver) < 0) { |
|
2908 printk(KERN_ERR "Failed to init PCI module.\n"); |
|
2909 goto out_return; |
|
2910 } |
|
2911 |
|
2912 if (rtl_ec_net_dev) { |
|
2913 printk(KERN_INFO "Registering EtherCAT device...\n"); |
|
2914 if (!(rtl_ec_dev = ecdev_register(ec_device_master_index, |
|
2915 rtl_ec_net_dev, ec_poll, THIS_MODULE))) { |
|
2916 printk(KERN_ERR "Failed to register EtherCAT device!\n"); |
|
2917 goto out_pci; |
|
2918 } |
|
2919 |
|
2920 printk(KERN_INFO "Opening EtherCAT device...\n"); |
|
2921 if (ecdev_open(rtl_ec_dev)) { |
|
2922 printk(KERN_ERR "Failed to open EtherCAT device!\n"); |
|
2923 goto out_unregister; |
|
2924 } |
|
2925 |
|
2926 printk(KERN_INFO "EtherCAT device ready.\n"); |
|
2927 } else { |
|
2928 printk(KERN_WARNING "No EtherCAT device registered!\n"); |
|
2929 } |
|
2930 |
|
2931 return 0; |
|
2932 |
|
2933 out_unregister: |
|
2934 printk(KERN_INFO "Unregistering EtherCAT device...\n"); |
|
2935 ecdev_unregister(ec_device_master_index, rtl_ec_dev); |
|
2936 rtl_ec_dev = NULL; |
|
2937 out_pci: |
|
2938 pci_unregister_driver(&rtl8139_pci_driver); |
|
2939 out_return: |
|
2940 return -1; |
|
2941 |
|
2942 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2943 } |
|
2944 |
|
2945 |
|
2946 static void __exit rtl8139_cleanup_module (void) |
|
2947 { |
|
2948 /* EtherCAT >>>>>>>>>>>>>>>>>>>>>>>>>>>>*/ |
|
2949 |
|
2950 printk(KERN_INFO "Cleaning up RTL8139-EtherCAT module...\n"); |
|
2951 |
|
2952 if (rtl_ec_net_dev) { |
|
2953 printk(KERN_INFO "Closing EtherCAT device...\n"); |
|
2954 ecdev_close(rtl_ec_dev); |
|
2955 printk(KERN_INFO "Unregistering EtherCAT device...\n"); |
|
2956 ecdev_unregister(ec_device_master_index, rtl_ec_dev); |
|
2957 rtl_ec_dev = NULL; |
|
2958 } |
|
2959 |
|
2960 pci_unregister_driver(&rtl8139_pci_driver); |
|
2961 |
|
2962 printk(KERN_INFO "RTL8139-EtherCAT module cleaned up.\n"); |
|
2963 |
|
2964 /* EtherCAT <<<<<<<<<<<<<<<<<<<<<<<<<<<<*/ |
|
2965 } |
|
2966 |
|
2967 |
|
2968 module_init(rtl8139_init_module); |
|
2969 module_exit(rtl8139_cleanup_module); |