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1 /******************************************************************************* |
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2 |
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3 Intel PRO/1000 Linux driver |
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4 Copyright(c) 1999 - 2012 Intel Corporation. |
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5 |
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6 This program is free software; you can redistribute it and/or modify it |
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7 under the terms and conditions of the GNU General Public License, |
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8 version 2, as published by the Free Software Foundation. |
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9 |
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10 This program is distributed in the hope it will be useful, but WITHOUT |
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11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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13 more details. |
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14 |
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15 You should have received a copy of the GNU General Public License along with |
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16 this program; if not, write to the Free Software Foundation, Inc., |
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17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
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18 |
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19 The full GNU General Public License is included in this distribution in |
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20 the file called "COPYING". |
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21 |
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22 Contact Information: |
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23 Linux NICS <linux.nics@intel.com> |
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24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
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25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
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26 |
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27 *******************************************************************************/ |
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28 |
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29 #include "e1000-3.4-ethercat.h" |
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30 |
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31 enum e1000_mng_mode { |
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32 e1000_mng_mode_none = 0, |
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33 e1000_mng_mode_asf, |
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34 e1000_mng_mode_pt, |
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35 e1000_mng_mode_ipmi, |
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36 e1000_mng_mode_host_if_only |
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37 }; |
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38 |
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39 #define E1000_FACTPS_MNGCG 0x20000000 |
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40 |
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41 /* Intel(R) Active Management Technology signature */ |
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42 #define E1000_IAMT_SIGNATURE 0x544D4149 |
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43 |
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44 /** |
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45 * e1000_calculate_checksum - Calculate checksum for buffer |
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46 * @buffer: pointer to EEPROM |
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47 * @length: size of EEPROM to calculate a checksum for |
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48 * |
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49 * Calculates the checksum for some buffer on a specified length. The |
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50 * checksum calculated is returned. |
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51 **/ |
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52 static u8 e1000_calculate_checksum(u8 *buffer, u32 length) |
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53 { |
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54 u32 i; |
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55 u8 sum = 0; |
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56 |
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57 if (!buffer) |
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58 return 0; |
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59 |
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60 for (i = 0; i < length; i++) |
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61 sum += buffer[i]; |
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62 |
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63 return (u8)(0 - sum); |
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64 } |
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65 |
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66 /** |
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67 * e1000_mng_enable_host_if - Checks host interface is enabled |
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68 * @hw: pointer to the HW structure |
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69 * |
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70 * Returns E1000_success upon success, else E1000_ERR_HOST_INTERFACE_COMMAND |
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71 * |
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72 * This function checks whether the HOST IF is enabled for command operation |
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73 * and also checks whether the previous command is completed. It busy waits |
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74 * in case of previous command is not completed. |
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75 **/ |
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76 static s32 e1000_mng_enable_host_if(struct e1000_hw *hw) |
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77 { |
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78 u32 hicr; |
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79 u8 i; |
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80 |
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81 if (!hw->mac.arc_subsystem_valid) { |
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82 e_dbg("ARC subsystem not valid.\n"); |
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83 return -E1000_ERR_HOST_INTERFACE_COMMAND; |
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84 } |
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85 |
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86 /* Check that the host interface is enabled. */ |
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87 hicr = er32(HICR); |
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88 if ((hicr & E1000_HICR_EN) == 0) { |
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89 e_dbg("E1000_HOST_EN bit disabled.\n"); |
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90 return -E1000_ERR_HOST_INTERFACE_COMMAND; |
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91 } |
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92 /* check the previous command is completed */ |
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93 for (i = 0; i < E1000_MNG_DHCP_COMMAND_TIMEOUT; i++) { |
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94 hicr = er32(HICR); |
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95 if (!(hicr & E1000_HICR_C)) |
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96 break; |
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97 mdelay(1); |
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98 } |
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99 |
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100 if (i == E1000_MNG_DHCP_COMMAND_TIMEOUT) { |
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101 e_dbg("Previous command timeout failed .\n"); |
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102 return -E1000_ERR_HOST_INTERFACE_COMMAND; |
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103 } |
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104 |
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105 return 0; |
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106 } |
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107 |
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108 /** |
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109 * e1000e_check_mng_mode_generic - Generic check management mode |
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110 * @hw: pointer to the HW structure |
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111 * |
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112 * Reads the firmware semaphore register and returns true (>0) if |
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113 * manageability is enabled, else false (0). |
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114 **/ |
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115 bool e1000e_check_mng_mode_generic(struct e1000_hw *hw) |
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116 { |
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117 u32 fwsm = er32(FWSM); |
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118 |
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119 return (fwsm & E1000_FWSM_MODE_MASK) == |
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120 (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT); |
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121 } |
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122 |
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123 /** |
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124 * e1000e_enable_tx_pkt_filtering - Enable packet filtering on Tx |
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125 * @hw: pointer to the HW structure |
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126 * |
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127 * Enables packet filtering on transmit packets if manageability is enabled |
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128 * and host interface is enabled. |
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129 **/ |
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130 bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw) |
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131 { |
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132 struct e1000_host_mng_dhcp_cookie *hdr = &hw->mng_cookie; |
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133 u32 *buffer = (u32 *)&hw->mng_cookie; |
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134 u32 offset; |
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135 s32 ret_val, hdr_csum, csum; |
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136 u8 i, len; |
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137 |
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138 hw->mac.tx_pkt_filtering = true; |
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139 |
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140 /* No manageability, no filtering */ |
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141 if (!hw->mac.ops.check_mng_mode(hw)) { |
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142 hw->mac.tx_pkt_filtering = false; |
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143 return hw->mac.tx_pkt_filtering; |
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144 } |
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145 |
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146 /* |
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147 * If we can't read from the host interface for whatever |
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148 * reason, disable filtering. |
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149 */ |
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150 ret_val = e1000_mng_enable_host_if(hw); |
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151 if (ret_val) { |
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152 hw->mac.tx_pkt_filtering = false; |
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153 return hw->mac.tx_pkt_filtering; |
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154 } |
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155 |
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156 /* Read in the header. Length and offset are in dwords. */ |
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157 len = E1000_MNG_DHCP_COOKIE_LENGTH >> 2; |
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158 offset = E1000_MNG_DHCP_COOKIE_OFFSET >> 2; |
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159 for (i = 0; i < len; i++) |
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160 *(buffer + i) = E1000_READ_REG_ARRAY(hw, E1000_HOST_IF, |
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161 offset + i); |
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162 hdr_csum = hdr->checksum; |
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163 hdr->checksum = 0; |
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164 csum = e1000_calculate_checksum((u8 *)hdr, |
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165 E1000_MNG_DHCP_COOKIE_LENGTH); |
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166 /* |
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167 * If either the checksums or signature don't match, then |
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168 * the cookie area isn't considered valid, in which case we |
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169 * take the safe route of assuming Tx filtering is enabled. |
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170 */ |
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171 if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) { |
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172 hw->mac.tx_pkt_filtering = true; |
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173 return hw->mac.tx_pkt_filtering; |
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174 } |
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175 |
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176 /* Cookie area is valid, make the final check for filtering. */ |
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177 if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING)) |
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178 hw->mac.tx_pkt_filtering = false; |
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179 |
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180 return hw->mac.tx_pkt_filtering; |
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181 } |
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182 |
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183 /** |
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184 * e1000_mng_write_cmd_header - Writes manageability command header |
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185 * @hw: pointer to the HW structure |
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186 * @hdr: pointer to the host interface command header |
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187 * |
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188 * Writes the command header after does the checksum calculation. |
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189 **/ |
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190 static s32 e1000_mng_write_cmd_header(struct e1000_hw *hw, |
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191 struct e1000_host_mng_command_header *hdr) |
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192 { |
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193 u16 i, length = sizeof(struct e1000_host_mng_command_header); |
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194 |
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195 /* Write the whole command header structure with new checksum. */ |
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196 |
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197 hdr->checksum = e1000_calculate_checksum((u8 *)hdr, length); |
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198 |
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199 length >>= 2; |
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200 /* Write the relevant command block into the ram area. */ |
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201 for (i = 0; i < length; i++) { |
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202 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, i, *((u32 *)hdr + i)); |
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203 e1e_flush(); |
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204 } |
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205 |
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206 return 0; |
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207 } |
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208 |
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209 /** |
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210 * e1000_mng_host_if_write - Write to the manageability host interface |
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211 * @hw: pointer to the HW structure |
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212 * @buffer: pointer to the host interface buffer |
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213 * @length: size of the buffer |
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214 * @offset: location in the buffer to write to |
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215 * @sum: sum of the data (not checksum) |
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216 * |
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217 * This function writes the buffer content at the offset given on the host if. |
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218 * It also does alignment considerations to do the writes in most efficient |
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219 * way. Also fills up the sum of the buffer in *buffer parameter. |
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220 **/ |
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221 static s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer, |
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222 u16 length, u16 offset, u8 *sum) |
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223 { |
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224 u8 *tmp; |
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225 u8 *bufptr = buffer; |
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226 u32 data = 0; |
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227 u16 remaining, i, j, prev_bytes; |
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228 |
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229 /* sum = only sum of the data and it is not checksum */ |
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230 |
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231 if (length == 0 || offset + length > E1000_HI_MAX_MNG_DATA_LENGTH) |
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232 return -E1000_ERR_PARAM; |
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233 |
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234 tmp = (u8 *)&data; |
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235 prev_bytes = offset & 0x3; |
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236 offset >>= 2; |
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237 |
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238 if (prev_bytes) { |
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239 data = E1000_READ_REG_ARRAY(hw, E1000_HOST_IF, offset); |
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240 for (j = prev_bytes; j < sizeof(u32); j++) { |
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241 *(tmp + j) = *bufptr++; |
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242 *sum += *(tmp + j); |
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243 } |
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244 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset, data); |
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245 length -= j - prev_bytes; |
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246 offset++; |
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247 } |
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248 |
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249 remaining = length & 0x3; |
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250 length -= remaining; |
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251 |
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252 /* Calculate length in DWORDs */ |
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253 length >>= 2; |
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254 |
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255 /* |
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256 * The device driver writes the relevant command block into the |
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257 * ram area. |
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258 */ |
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259 for (i = 0; i < length; i++) { |
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260 for (j = 0; j < sizeof(u32); j++) { |
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261 *(tmp + j) = *bufptr++; |
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262 *sum += *(tmp + j); |
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263 } |
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264 |
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265 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset + i, data); |
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266 } |
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267 if (remaining) { |
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268 for (j = 0; j < sizeof(u32); j++) { |
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269 if (j < remaining) |
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270 *(tmp + j) = *bufptr++; |
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271 else |
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272 *(tmp + j) = 0; |
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273 |
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274 *sum += *(tmp + j); |
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275 } |
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276 E1000_WRITE_REG_ARRAY(hw, E1000_HOST_IF, offset + i, data); |
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277 } |
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278 |
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279 return 0; |
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280 } |
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281 |
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282 /** |
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283 * e1000e_mng_write_dhcp_info - Writes DHCP info to host interface |
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284 * @hw: pointer to the HW structure |
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285 * @buffer: pointer to the host interface |
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286 * @length: size of the buffer |
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287 * |
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288 * Writes the DHCP information to the host interface. |
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289 **/ |
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290 s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length) |
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291 { |
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292 struct e1000_host_mng_command_header hdr; |
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293 s32 ret_val; |
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294 u32 hicr; |
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295 |
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296 hdr.command_id = E1000_MNG_DHCP_TX_PAYLOAD_CMD; |
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297 hdr.command_length = length; |
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298 hdr.reserved1 = 0; |
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299 hdr.reserved2 = 0; |
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300 hdr.checksum = 0; |
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301 |
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302 /* Enable the host interface */ |
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303 ret_val = e1000_mng_enable_host_if(hw); |
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304 if (ret_val) |
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305 return ret_val; |
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306 |
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307 /* Populate the host interface with the contents of "buffer". */ |
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308 ret_val = e1000_mng_host_if_write(hw, buffer, length, |
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309 sizeof(hdr), &(hdr.checksum)); |
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310 if (ret_val) |
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311 return ret_val; |
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312 |
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313 /* Write the manageability command header */ |
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314 ret_val = e1000_mng_write_cmd_header(hw, &hdr); |
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315 if (ret_val) |
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316 return ret_val; |
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317 |
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318 /* Tell the ARC a new command is pending. */ |
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319 hicr = er32(HICR); |
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320 ew32(HICR, hicr | E1000_HICR_C); |
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321 |
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322 return 0; |
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323 } |
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324 |
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325 /** |
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326 * e1000e_enable_mng_pass_thru - Check if management passthrough is needed |
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327 * @hw: pointer to the HW structure |
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328 * |
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329 * Verifies the hardware needs to leave interface enabled so that frames can |
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330 * be directed to and from the management interface. |
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331 **/ |
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332 bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw) |
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333 { |
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334 u32 manc; |
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335 u32 fwsm, factps; |
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336 |
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337 manc = er32(MANC); |
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338 |
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339 if (!(manc & E1000_MANC_RCV_TCO_EN)) |
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340 return false; |
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341 |
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342 if (hw->mac.has_fwsm) { |
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343 fwsm = er32(FWSM); |
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344 factps = er32(FACTPS); |
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345 |
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346 if (!(factps & E1000_FACTPS_MNGCG) && |
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347 ((fwsm & E1000_FWSM_MODE_MASK) == |
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348 (e1000_mng_mode_pt << E1000_FWSM_MODE_SHIFT))) |
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349 return true; |
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350 } else if ((hw->mac.type == e1000_82574) || |
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351 (hw->mac.type == e1000_82583)) { |
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352 u16 data; |
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353 |
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354 factps = er32(FACTPS); |
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355 e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &data); |
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356 |
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357 if (!(factps & E1000_FACTPS_MNGCG) && |
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358 ((data & E1000_NVM_INIT_CTRL2_MNGM) == |
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359 (e1000_mng_mode_pt << 13))) |
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360 return true; |
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361 } else if ((manc & E1000_MANC_SMBUS_EN) && |
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362 !(manc & E1000_MANC_ASF_EN)) { |
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363 return true; |
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364 } |
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365 |
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366 return false; |
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367 } |