devices/8139too-2.6.22-ethercat.c
changeset 774 40e9190072a6
child 1011 a0759d0dded4
equal deleted inserted replaced
773:6c4646a03d68 774:40e9190072a6
       
     1 /******************************************************************************
       
     2  *
       
     3  *  $Id$
       
     4  *
       
     5  *  Copyright (C) 2006  Florian Pose, Ingenieurgemeinschaft IgH
       
     6  *
       
     7  *  This file is part of the IgH EtherCAT Master.
       
     8  *
       
     9  *  The IgH EtherCAT Master is free software; you can redistribute it
       
    10  *  and/or modify it under the terms of the GNU General Public License
       
    11  *  as published by the Free Software Foundation; either version 2 of the
       
    12  *  License, or (at your option) any later version.
       
    13  *
       
    14  *  The IgH EtherCAT Master is distributed in the hope that it will be
       
    15  *  useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
       
    16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
       
    17  *  GNU General Public License for more details.
       
    18  *
       
    19  *  You should have received a copy of the GNU General Public License
       
    20  *  along with the IgH EtherCAT Master; if not, write to the Free Software
       
    21  *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
       
    22  *
       
    23  *  The right to use EtherCAT Technology is granted and comes free of
       
    24  *  charge under condition of compatibility of product made by
       
    25  *  Licensee. People intending to distribute/sell products based on the
       
    26  *  code, have to sign an agreement to guarantee that products using
       
    27  *  software based on IgH EtherCAT master stay compatible with the actual
       
    28  *  EtherCAT specification (which are released themselves as an open
       
    29  *  standard) as the (only) precondition to have the right to use EtherCAT
       
    30  *  Technology, IP and trade marks.
       
    31  *
       
    32  *****************************************************************************/
       
    33 
       
    34 /**
       
    35    \file
       
    36    EtherCAT driver for RTL8139-compatible NICs.
       
    37 */
       
    38 
       
    39 /*****************************************************************************/
       
    40 
       
    41 /*
       
    42   Former documentation:
       
    43 
       
    44 	8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
       
    45 
       
    46 	Maintained by Jeff Garzik <jgarzik@pobox.com>
       
    47 	Copyright 2000-2002 Jeff Garzik
       
    48 
       
    49 	Much code comes from Donald Becker's rtl8139.c driver,
       
    50 	versions 1.13 and older.  This driver was originally based
       
    51 	on rtl8139.c version 1.07.  Header of rtl8139.c version 1.13:
       
    52 
       
    53 	-----<snip>-----
       
    54 
       
    55         	Written 1997-2001 by Donald Becker.
       
    56 		This software may be used and distributed according to the
       
    57 		terms of the GNU General Public License (GPL), incorporated
       
    58 		herein by reference.  Drivers based on or derived from this
       
    59 		code fall under the GPL and must retain the authorship,
       
    60 		copyright and license notice.  This file is not a complete
       
    61 		program and may only be used when the entire operating
       
    62 		system is licensed under the GPL.
       
    63 
       
    64 		This driver is for boards based on the RTL8129 and RTL8139
       
    65 		PCI ethernet chips.
       
    66 
       
    67 		The author may be reached as becker@scyld.com, or C/O Scyld
       
    68 		Computing Corporation 410 Severn Ave., Suite 210 Annapolis
       
    69 		MD 21403
       
    70 
       
    71 		Support and updates available at
       
    72 		http://www.scyld.com/network/rtl8139.html
       
    73 
       
    74 		Twister-tuning table provided by Kinston
       
    75 		<shangh@realtek.com.tw>.
       
    76 
       
    77 	-----<snip>-----
       
    78 
       
    79 	This software may be used and distributed according to the terms
       
    80 	of the GNU General Public License, incorporated herein by reference.
       
    81 
       
    82 	Contributors:
       
    83 
       
    84 		Donald Becker - he wrote the original driver, kudos to him!
       
    85 		(but please don't e-mail him for support, this isn't his driver)
       
    86 
       
    87 		Tigran Aivazian - bug fixes, skbuff free cleanup
       
    88 
       
    89 		Martin Mares - suggestions for PCI cleanup
       
    90 
       
    91 		David S. Miller - PCI DMA and softnet updates
       
    92 
       
    93 		Ernst Gill - fixes ported from BSD driver
       
    94 
       
    95 		Daniel Kobras - identified specific locations of
       
    96 			posted MMIO write bugginess
       
    97 
       
    98 		Gerard Sharp - bug fix, testing and feedback
       
    99 
       
   100 		David Ford - Rx ring wrap fix
       
   101 
       
   102 		Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
       
   103 		to find and fix a crucial bug on older chipsets.
       
   104 
       
   105 		Donald Becker/Chris Butterworth/Marcus Westergren -
       
   106 		Noticed various Rx packet size-related buglets.
       
   107 
       
   108 		Santiago Garcia Mantinan - testing and feedback
       
   109 
       
   110 		Jens David - 2.2.x kernel backports
       
   111 
       
   112 		Martin Dennett - incredibly helpful insight on undocumented
       
   113 		features of the 8139 chips
       
   114 
       
   115 		Jean-Jacques Michel - bug fix
       
   116 
       
   117 		Tobias Ringström - Rx interrupt status checking suggestion
       
   118 
       
   119 		Andrew Morton - Clear blocked signals, avoid
       
   120 		buffer overrun setting current->comm.
       
   121 
       
   122 		Kalle Olavi Niemitalo - Wake-on-LAN ioctls
       
   123 
       
   124 		Robert Kuebel - Save kernel thread from dying on any signal.
       
   125 
       
   126 	Submitting bug reports:
       
   127 
       
   128 		"rtl8139-diag -mmmaaavvveefN" output
       
   129 		enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
       
   130 
       
   131 */
       
   132 
       
   133 #define DRV_NAME	"ec_8139too"
       
   134 #define DRV_VERSION	"0.9.28"
       
   135 
       
   136 
       
   137 #include <linux/module.h>
       
   138 #include <linux/kernel.h>
       
   139 #include <linux/compiler.h>
       
   140 #include <linux/pci.h>
       
   141 #include <linux/init.h>
       
   142 #include <linux/ioport.h>
       
   143 #include <linux/netdevice.h>
       
   144 #include <linux/etherdevice.h>
       
   145 #include <linux/rtnetlink.h>
       
   146 #include <linux/delay.h>
       
   147 #include <linux/ethtool.h>
       
   148 #include <linux/mii.h>
       
   149 #include <linux/completion.h>
       
   150 #include <linux/crc32.h>
       
   151 #include <asm/io.h>
       
   152 #include <asm/uaccess.h>
       
   153 #include <asm/irq.h>
       
   154 
       
   155 #include "../globals.h"
       
   156 #include "ecdev.h"
       
   157 
       
   158 #define RTL8139_DRIVER_NAME DRV_NAME \
       
   159                             " EtherCAT-capable Fast Ethernet driver " \
       
   160                             DRV_VERSION ", master " EC_MASTER_VERSION
       
   161 
       
   162 #define PFX DRV_NAME ": "
       
   163 
       
   164 /* Default Message level */
       
   165 #define RTL8139_DEF_MSG_ENABLE   (NETIF_MSG_DRV   | \
       
   166                                  NETIF_MSG_PROBE  | \
       
   167                                  NETIF_MSG_LINK)
       
   168 
       
   169 
       
   170 /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */
       
   171 #ifdef CONFIG_8139TOO_PIO
       
   172 #define USE_IO_OPS 1
       
   173 #endif
       
   174 
       
   175 /* define to 1, 2 or 3 to enable copious debugging info */
       
   176 #define RTL8139_DEBUG 0
       
   177 
       
   178 /* define to 1 to disable lightweight runtime debugging checks */
       
   179 #undef RTL8139_NDEBUG
       
   180 
       
   181 
       
   182 #if RTL8139_DEBUG
       
   183 /* note: prints function name for you */
       
   184 #  define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
       
   185 #else
       
   186 #  define DPRINTK(fmt, args...)
       
   187 #endif
       
   188 
       
   189 #ifdef RTL8139_NDEBUG
       
   190 #  define assert(expr) do {} while (0)
       
   191 #else
       
   192 #  define assert(expr) \
       
   193         if(unlikely(!(expr))) {				        \
       
   194         printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n",	\
       
   195         #expr,__FILE__,__FUNCTION__,__LINE__);		        \
       
   196         }
       
   197 #endif
       
   198 
       
   199 
       
   200 /* A few user-configurable values. */
       
   201 /* media options */
       
   202 #define MAX_UNITS 8
       
   203 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   204 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   205 
       
   206 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
       
   207    The RTL chips use a 64 element hash table based on the Ethernet CRC.  */
       
   208 static int multicast_filter_limit = 32;
       
   209 
       
   210 /* bitmapped message enable number */
       
   211 static int debug = -1;
       
   212 
       
   213 /*
       
   214  * Receive ring size
       
   215  * Warning: 64K ring has hardware issues and may lock up.
       
   216  */
       
   217 #if defined(CONFIG_SH_DREAMCAST)
       
   218 #define RX_BUF_IDX	1	/* 16K ring */
       
   219 #else
       
   220 #define RX_BUF_IDX	2	/* 32K ring */
       
   221 #endif
       
   222 #define RX_BUF_LEN	(8192 << RX_BUF_IDX)
       
   223 #define RX_BUF_PAD	16
       
   224 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
       
   225 
       
   226 #if RX_BUF_LEN == 65536
       
   227 #define RX_BUF_TOT_LEN	RX_BUF_LEN
       
   228 #else
       
   229 #define RX_BUF_TOT_LEN	(RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
       
   230 #endif
       
   231 
       
   232 /* Number of Tx descriptor registers. */
       
   233 #define NUM_TX_DESC	4
       
   234 
       
   235 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
       
   236 #define MAX_ETH_FRAME_SIZE	1536
       
   237 
       
   238 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
       
   239 #define TX_BUF_SIZE	MAX_ETH_FRAME_SIZE
       
   240 #define TX_BUF_TOT_LEN	(TX_BUF_SIZE * NUM_TX_DESC)
       
   241 
       
   242 /* PCI Tuning Parameters
       
   243    Threshold is bytes transferred to chip before transmission starts. */
       
   244 #define TX_FIFO_THRESH 256	/* In bytes, rounded down to 32 byte units. */
       
   245 
       
   246 /* The following settings are log_2(bytes)-4:  0 == 16 bytes .. 6==1024, 7==end of packet. */
       
   247 #define RX_FIFO_THRESH	7	/* Rx buffer level before first PCI xfer.  */
       
   248 #define RX_DMA_BURST	7	/* Maximum PCI burst, '6' is 1024 */
       
   249 #define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
       
   250 #define TX_RETRY	8	/* 0-15.  retries = 16 + (TX_RETRY * 16) */
       
   251 
       
   252 /* Operational parameters that usually are not changed. */
       
   253 /* Time in jiffies before concluding the transmitter is hung. */
       
   254 #define TX_TIMEOUT  (6*HZ)
       
   255 
       
   256 
       
   257 enum {
       
   258 	HAS_MII_XCVR = 0x010000,
       
   259 	HAS_CHIP_XCVR = 0x020000,
       
   260 	HAS_LNK_CHNG = 0x040000,
       
   261 };
       
   262 
       
   263 #define RTL_NUM_STATS 4		/* number of ETHTOOL_GSTATS u64's */
       
   264 #define RTL_REGS_VER 1		/* version of reg. data in ETHTOOL_GREGS */
       
   265 #define RTL_MIN_IO_SIZE 0x80
       
   266 #define RTL8139B_IO_SIZE 256
       
   267 
       
   268 #define RTL8129_CAPS	HAS_MII_XCVR
       
   269 #define RTL8139_CAPS	HAS_CHIP_XCVR|HAS_LNK_CHNG
       
   270 
       
   271 typedef enum {
       
   272 	RTL8139 = 0,
       
   273 	RTL8129,
       
   274 } board_t;
       
   275 
       
   276 
       
   277 /* indexed by board_t, above */
       
   278 static const struct {
       
   279 	const char *name;
       
   280 	u32 hw_flags;
       
   281 } board_info[] __devinitdata = {
       
   282 	{ "RealTek RTL8139", RTL8139_CAPS },
       
   283 	{ "RealTek RTL8129", RTL8129_CAPS },
       
   284 };
       
   285 
       
   286 
       
   287 static struct pci_device_id rtl8139_pci_tbl[] = {
       
   288 	{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   289 	{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   290 	{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   291 	{0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   292 	{0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   293 	{0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   294 	{0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   295 	{0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   296 	{0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   297 	{0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   298 	{0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   299 	{0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   300 	{0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   301 	{0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   302 	{0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   303 	{0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   304 	{0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   305 	{0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   306 	{0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   307 
       
   308 #ifdef CONFIG_SH_SECUREEDGE5410
       
   309 	/* Bogus 8139 silicon reports 8129 without external PROM :-( */
       
   310 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   311 #endif
       
   312 #ifdef CONFIG_8139TOO_8129
       
   313 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
       
   314 #endif
       
   315 
       
   316 	/* some crazy cards report invalid vendor ids like
       
   317 	 * 0x0001 here.  The other ids are valid and constant,
       
   318 	 * so we simply don't match on the main vendor id.
       
   319 	 */
       
   320 	{PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
       
   321 	{PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
       
   322 	{PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
       
   323 
       
   324 	{0,}
       
   325 };
       
   326 
       
   327 /* prevent driver from being loaded automatically */
       
   328 //MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
       
   329 
       
   330 static struct {
       
   331 	const char str[ETH_GSTRING_LEN];
       
   332 } ethtool_stats_keys[] = {
       
   333 	{ "early_rx" },
       
   334 	{ "tx_buf_mapped" },
       
   335 	{ "tx_timeouts" },
       
   336 	{ "rx_lost_in_ring" },
       
   337 };
       
   338 
       
   339 /* The rest of these values should never change. */
       
   340 
       
   341 /* Symbolic offsets to registers. */
       
   342 enum RTL8139_registers {
       
   343 	MAC0 = 0,		/* Ethernet hardware address. */
       
   344 	MAR0 = 8,		/* Multicast filter. */
       
   345 	TxStatus0 = 0x10,	/* Transmit status (Four 32bit registers). */
       
   346 	TxAddr0 = 0x20,		/* Tx descriptors (also four 32bit). */
       
   347 	RxBuf = 0x30,
       
   348 	ChipCmd = 0x37,
       
   349 	RxBufPtr = 0x38,
       
   350 	RxBufAddr = 0x3A,
       
   351 	IntrMask = 0x3C,
       
   352 	IntrStatus = 0x3E,
       
   353 	TxConfig = 0x40,
       
   354 	RxConfig = 0x44,
       
   355 	Timer = 0x48,		/* A general-purpose counter. */
       
   356 	RxMissed = 0x4C,	/* 24 bits valid, write clears. */
       
   357 	Cfg9346 = 0x50,
       
   358 	Config0 = 0x51,
       
   359 	Config1 = 0x52,
       
   360 	FlashReg = 0x54,
       
   361 	MediaStatus = 0x58,
       
   362 	Config3 = 0x59,
       
   363 	Config4 = 0x5A,		/* absent on RTL-8139A */
       
   364 	HltClk = 0x5B,
       
   365 	MultiIntr = 0x5C,
       
   366 	TxSummary = 0x60,
       
   367 	BasicModeCtrl = 0x62,
       
   368 	BasicModeStatus = 0x64,
       
   369 	NWayAdvert = 0x66,
       
   370 	NWayLPAR = 0x68,
       
   371 	NWayExpansion = 0x6A,
       
   372 	/* Undocumented registers, but required for proper operation. */
       
   373 	FIFOTMS = 0x70,		/* FIFO Control and test. */
       
   374 	CSCR = 0x74,		/* Chip Status and Configuration Register. */
       
   375 	PARA78 = 0x78,
       
   376 	PARA7c = 0x7c,		/* Magic transceiver parameter register. */
       
   377 	Config5 = 0xD8,		/* absent on RTL-8139A */
       
   378 };
       
   379 
       
   380 enum ClearBitMasks {
       
   381 	MultiIntrClear = 0xF000,
       
   382 	ChipCmdClear = 0xE2,
       
   383 	Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
       
   384 };
       
   385 
       
   386 enum ChipCmdBits {
       
   387 	CmdReset = 0x10,
       
   388 	CmdRxEnb = 0x08,
       
   389 	CmdTxEnb = 0x04,
       
   390 	RxBufEmpty = 0x01,
       
   391 };
       
   392 
       
   393 /* Interrupt register bits, using my own meaningful names. */
       
   394 enum IntrStatusBits {
       
   395 	PCIErr = 0x8000,
       
   396 	PCSTimeout = 0x4000,
       
   397 	RxFIFOOver = 0x40,
       
   398 	RxUnderrun = 0x20,
       
   399 	RxOverflow = 0x10,
       
   400 	TxErr = 0x08,
       
   401 	TxOK = 0x04,
       
   402 	RxErr = 0x02,
       
   403 	RxOK = 0x01,
       
   404 
       
   405 	RxAckBits = RxFIFOOver | RxOverflow | RxOK,
       
   406 };
       
   407 
       
   408 enum TxStatusBits {
       
   409 	TxHostOwns = 0x2000,
       
   410 	TxUnderrun = 0x4000,
       
   411 	TxStatOK = 0x8000,
       
   412 	TxOutOfWindow = 0x20000000,
       
   413 	TxAborted = 0x40000000,
       
   414 	TxCarrierLost = 0x80000000,
       
   415 };
       
   416 enum RxStatusBits {
       
   417 	RxMulticast = 0x8000,
       
   418 	RxPhysical = 0x4000,
       
   419 	RxBroadcast = 0x2000,
       
   420 	RxBadSymbol = 0x0020,
       
   421 	RxRunt = 0x0010,
       
   422 	RxTooLong = 0x0008,
       
   423 	RxCRCErr = 0x0004,
       
   424 	RxBadAlign = 0x0002,
       
   425 	RxStatusOK = 0x0001,
       
   426 };
       
   427 
       
   428 /* Bits in RxConfig. */
       
   429 enum rx_mode_bits {
       
   430 	AcceptErr = 0x20,
       
   431 	AcceptRunt = 0x10,
       
   432 	AcceptBroadcast = 0x08,
       
   433 	AcceptMulticast = 0x04,
       
   434 	AcceptMyPhys = 0x02,
       
   435 	AcceptAllPhys = 0x01,
       
   436 };
       
   437 
       
   438 /* Bits in TxConfig. */
       
   439 enum tx_config_bits {
       
   440 
       
   441         /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */
       
   442         TxIFGShift = 24,
       
   443         TxIFG84 = (0 << TxIFGShift),    /* 8.4us / 840ns (10 / 100Mbps) */
       
   444         TxIFG88 = (1 << TxIFGShift),    /* 8.8us / 880ns (10 / 100Mbps) */
       
   445         TxIFG92 = (2 << TxIFGShift),    /* 9.2us / 920ns (10 / 100Mbps) */
       
   446         TxIFG96 = (3 << TxIFGShift),    /* 9.6us / 960ns (10 / 100Mbps) */
       
   447 
       
   448 	TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */
       
   449 	TxCRC = (1 << 16),	/* DISABLE appending CRC to end of Tx packets */
       
   450 	TxClearAbt = (1 << 0),	/* Clear abort (WO) */
       
   451 	TxDMAShift = 8,		/* DMA burst value (0-7) is shifted this many bits */
       
   452 	TxRetryShift = 4,	/* TXRR value (0-15) is shifted this many bits */
       
   453 
       
   454 	TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */
       
   455 };
       
   456 
       
   457 /* Bits in Config1 */
       
   458 enum Config1Bits {
       
   459 	Cfg1_PM_Enable = 0x01,
       
   460 	Cfg1_VPD_Enable = 0x02,
       
   461 	Cfg1_PIO = 0x04,
       
   462 	Cfg1_MMIO = 0x08,
       
   463 	LWAKE = 0x10,		/* not on 8139, 8139A */
       
   464 	Cfg1_Driver_Load = 0x20,
       
   465 	Cfg1_LED0 = 0x40,
       
   466 	Cfg1_LED1 = 0x80,
       
   467 	SLEEP = (1 << 1),	/* only on 8139, 8139A */
       
   468 	PWRDN = (1 << 0),	/* only on 8139, 8139A */
       
   469 };
       
   470 
       
   471 /* Bits in Config3 */
       
   472 enum Config3Bits {
       
   473 	Cfg3_FBtBEn    = (1 << 0), /* 1 = Fast Back to Back */
       
   474 	Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */
       
   475 	Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */
       
   476 	Cfg3_CardB_En  = (1 << 3), /* 1 = enable CardBus registers */
       
   477 	Cfg3_LinkUp    = (1 << 4), /* 1 = wake up on link up */
       
   478 	Cfg3_Magic     = (1 << 5), /* 1 = wake up on Magic Packet (tm) */
       
   479 	Cfg3_PARM_En   = (1 << 6), /* 0 = software can set twister parameters */
       
   480 	Cfg3_GNTSel    = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */
       
   481 };
       
   482 
       
   483 /* Bits in Config4 */
       
   484 enum Config4Bits {
       
   485 	LWPTN = (1 << 2),	/* not on 8139, 8139A */
       
   486 };
       
   487 
       
   488 /* Bits in Config5 */
       
   489 enum Config5Bits {
       
   490 	Cfg5_PME_STS     = (1 << 0), /* 1 = PCI reset resets PME_Status */
       
   491 	Cfg5_LANWake     = (1 << 1), /* 1 = enable LANWake signal */
       
   492 	Cfg5_LDPS        = (1 << 2), /* 0 = save power when link is down */
       
   493 	Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */
       
   494 	Cfg5_UWF         = (1 << 4), /* 1 = accept unicast wakeup frame */
       
   495 	Cfg5_MWF         = (1 << 5), /* 1 = accept multicast wakeup frame */
       
   496 	Cfg5_BWF         = (1 << 6), /* 1 = accept broadcast wakeup frame */
       
   497 };
       
   498 
       
   499 enum RxConfigBits {
       
   500 	/* rx fifo threshold */
       
   501 	RxCfgFIFOShift = 13,
       
   502 	RxCfgFIFONone = (7 << RxCfgFIFOShift),
       
   503 
       
   504 	/* Max DMA burst */
       
   505 	RxCfgDMAShift = 8,
       
   506 	RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
       
   507 
       
   508 	/* rx ring buffer length */
       
   509 	RxCfgRcv8K = 0,
       
   510 	RxCfgRcv16K = (1 << 11),
       
   511 	RxCfgRcv32K = (1 << 12),
       
   512 	RxCfgRcv64K = (1 << 11) | (1 << 12),
       
   513 
       
   514 	/* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
       
   515 	RxNoWrap = (1 << 7),
       
   516 };
       
   517 
       
   518 /* Twister tuning parameters from RealTek.
       
   519    Completely undocumented, but required to tune bad links on some boards. */
       
   520 enum CSCRBits {
       
   521 	CSCR_LinkOKBit = 0x0400,
       
   522 	CSCR_LinkChangeBit = 0x0800,
       
   523 	CSCR_LinkStatusBits = 0x0f000,
       
   524 	CSCR_LinkDownOffCmd = 0x003c0,
       
   525 	CSCR_LinkDownCmd = 0x0f3c0,
       
   526 };
       
   527 
       
   528 enum Cfg9346Bits {
       
   529 	Cfg9346_Lock = 0x00,
       
   530 	Cfg9346_Unlock = 0xC0,
       
   531 };
       
   532 
       
   533 typedef enum {
       
   534 	CH_8139 = 0,
       
   535 	CH_8139_K,
       
   536 	CH_8139A,
       
   537 	CH_8139A_G,
       
   538 	CH_8139B,
       
   539 	CH_8130,
       
   540 	CH_8139C,
       
   541 	CH_8100,
       
   542 	CH_8100B_8139D,
       
   543 	CH_8101,
       
   544 } chip_t;
       
   545 
       
   546 enum chip_flags {
       
   547 	HasHltClk = (1 << 0),
       
   548 	HasLWake = (1 << 1),
       
   549 };
       
   550 
       
   551 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
       
   552 	(b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
       
   553 #define HW_REVID_MASK	HW_REVID(1, 1, 1, 1, 1, 1, 1)
       
   554 
       
   555 /* directly indexed by chip_t, above */
       
   556 static const struct {
       
   557 	const char *name;
       
   558 	u32 version; /* from RTL8139C/RTL8139D docs */
       
   559 	u32 flags;
       
   560 } rtl_chip_info[] = {
       
   561 	{ "RTL-8139",
       
   562 	  HW_REVID(1, 0, 0, 0, 0, 0, 0),
       
   563 	  HasHltClk,
       
   564 	},
       
   565 
       
   566 	{ "RTL-8139 rev K",
       
   567 	  HW_REVID(1, 1, 0, 0, 0, 0, 0),
       
   568 	  HasHltClk,
       
   569 	},
       
   570 
       
   571 	{ "RTL-8139A",
       
   572 	  HW_REVID(1, 1, 1, 0, 0, 0, 0),
       
   573 	  HasHltClk, /* XXX undocumented? */
       
   574 	},
       
   575 
       
   576 	{ "RTL-8139A rev G",
       
   577 	  HW_REVID(1, 1, 1, 0, 0, 1, 0),
       
   578 	  HasHltClk, /* XXX undocumented? */
       
   579 	},
       
   580 
       
   581 	{ "RTL-8139B",
       
   582 	  HW_REVID(1, 1, 1, 1, 0, 0, 0),
       
   583 	  HasLWake,
       
   584 	},
       
   585 
       
   586 	{ "RTL-8130",
       
   587 	  HW_REVID(1, 1, 1, 1, 1, 0, 0),
       
   588 	  HasLWake,
       
   589 	},
       
   590 
       
   591 	{ "RTL-8139C",
       
   592 	  HW_REVID(1, 1, 1, 0, 1, 0, 0),
       
   593 	  HasLWake,
       
   594 	},
       
   595 
       
   596 	{ "RTL-8100",
       
   597 	  HW_REVID(1, 1, 1, 1, 0, 1, 0),
       
   598  	  HasLWake,
       
   599  	},
       
   600 
       
   601 	{ "RTL-8100B/8139D",
       
   602 	  HW_REVID(1, 1, 1, 0, 1, 0, 1),
       
   603 	  HasHltClk /* XXX undocumented? */
       
   604 	| HasLWake,
       
   605 	},
       
   606 
       
   607 	{ "RTL-8101",
       
   608 	  HW_REVID(1, 1, 1, 0, 1, 1, 1),
       
   609 	  HasLWake,
       
   610 	},
       
   611 };
       
   612 
       
   613 struct rtl_extra_stats {
       
   614 	unsigned long early_rx;
       
   615 	unsigned long tx_buf_mapped;
       
   616 	unsigned long tx_timeouts;
       
   617 	unsigned long rx_lost_in_ring;
       
   618 };
       
   619 
       
   620 struct rtl8139_private {
       
   621 	void __iomem *mmio_addr;
       
   622 	int drv_flags;
       
   623 	struct pci_dev *pci_dev;
       
   624 	u32 msg_enable;
       
   625 	struct net_device_stats stats;
       
   626 	unsigned char *rx_ring;
       
   627 	unsigned int cur_rx;	/* Index into the Rx buffer of next Rx pkt. */
       
   628 	unsigned int tx_flag;
       
   629 	unsigned long cur_tx;
       
   630 	unsigned long dirty_tx;
       
   631 	unsigned char *tx_buf[NUM_TX_DESC];	/* Tx bounce buffers */
       
   632 	unsigned char *tx_bufs;	/* Tx bounce buffer region. */
       
   633 	dma_addr_t rx_ring_dma;
       
   634 	dma_addr_t tx_bufs_dma;
       
   635 	signed char phys[4];		/* MII device addresses. */
       
   636 	char twistie, twist_row, twist_col;	/* Twister tune state. */
       
   637 	unsigned int watchdog_fired : 1;
       
   638 	unsigned int default_port : 4;	/* Last dev->if_port value. */
       
   639 	unsigned int have_thread : 1;
       
   640 	spinlock_t lock;
       
   641 	spinlock_t rx_lock;
       
   642 	chip_t chipset;
       
   643 	u32 rx_config;
       
   644 	struct rtl_extra_stats xstats;
       
   645 
       
   646 	struct delayed_work thread;
       
   647 
       
   648 	struct mii_if_info mii;
       
   649 	unsigned int regs_len;
       
   650 	unsigned long fifo_copy_timeout;
       
   651     
       
   652 	ec_device_t *ecdev;
       
   653 };
       
   654 
       
   655 MODULE_AUTHOR("Florian Pose <fp@igh-essen.com>");
       
   656 MODULE_DESCRIPTION("RealTek RTL-8139 EtherCAT driver");
       
   657 MODULE_LICENSE("GPL");
       
   658 MODULE_VERSION(EC_MASTER_VERSION);
       
   659 
       
   660 module_param(multicast_filter_limit, int, 0);
       
   661 module_param_array(media, int, NULL, 0);
       
   662 module_param_array(full_duplex, int, NULL, 0);
       
   663 module_param(debug, int, 0);
       
   664 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
       
   665 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
       
   666 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
       
   667 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
       
   668 
       
   669 void ec_poll(struct net_device *);
       
   670 
       
   671 static int read_eeprom (void __iomem *ioaddr, int location, int addr_len);
       
   672 static int rtl8139_open (struct net_device *dev);
       
   673 static int mdio_read (struct net_device *dev, int phy_id, int location);
       
   674 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
   675 			int val);
       
   676 static void rtl8139_start_thread(struct rtl8139_private *tp);
       
   677 static void rtl8139_tx_timeout (struct net_device *dev);
       
   678 static void rtl8139_init_ring (struct net_device *dev);
       
   679 static int rtl8139_start_xmit (struct sk_buff *skb,
       
   680 			       struct net_device *dev);
       
   681 static int rtl8139_poll(struct net_device *dev, int *budget);
       
   682 #ifdef CONFIG_NET_POLL_CONTROLLER
       
   683 static void rtl8139_poll_controller(struct net_device *dev);
       
   684 #endif
       
   685 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance);
       
   686 static int rtl8139_close (struct net_device *dev);
       
   687 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
       
   688 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev);
       
   689 static void rtl8139_set_rx_mode (struct net_device *dev);
       
   690 static void __set_rx_mode (struct net_device *dev);
       
   691 static void rtl8139_hw_start (struct net_device *dev);
       
   692 static void rtl8139_thread (struct work_struct *work);
       
   693 static void rtl8139_tx_timeout_task(struct work_struct *work);
       
   694 static const struct ethtool_ops rtl8139_ethtool_ops;
       
   695 
       
   696 /* write MMIO register, with flush */
       
   697 /* Flush avoids rtl8139 bug w/ posted MMIO writes */
       
   698 #define RTL_W8_F(reg, val8)	do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0)
       
   699 #define RTL_W16_F(reg, val16)	do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0)
       
   700 #define RTL_W32_F(reg, val32)	do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0)
       
   701 
       
   702 
       
   703 #define MMIO_FLUSH_AUDIT_COMPLETE 1
       
   704 #if MMIO_FLUSH_AUDIT_COMPLETE
       
   705 
       
   706 /* write MMIO register */
       
   707 #define RTL_W8(reg, val8)	iowrite8 ((val8), ioaddr + (reg))
       
   708 #define RTL_W16(reg, val16)	iowrite16 ((val16), ioaddr + (reg))
       
   709 #define RTL_W32(reg, val32)	iowrite32 ((val32), ioaddr + (reg))
       
   710 
       
   711 #else
       
   712 
       
   713 /* write MMIO register, then flush */
       
   714 #define RTL_W8		RTL_W8_F
       
   715 #define RTL_W16		RTL_W16_F
       
   716 #define RTL_W32		RTL_W32_F
       
   717 
       
   718 #endif /* MMIO_FLUSH_AUDIT_COMPLETE */
       
   719 
       
   720 /* read MMIO register */
       
   721 #define RTL_R8(reg)		ioread8 (ioaddr + (reg))
       
   722 #define RTL_R16(reg)		ioread16 (ioaddr + (reg))
       
   723 #define RTL_R32(reg)		((unsigned long) ioread32 (ioaddr + (reg)))
       
   724 
       
   725 
       
   726 static const u16 rtl8139_intr_mask =
       
   727 	PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
       
   728 	TxErr | TxOK | RxErr | RxOK;
       
   729 
       
   730 static const u16 rtl8139_norx_intr_mask =
       
   731 	PCIErr | PCSTimeout | RxUnderrun |
       
   732 	TxErr | TxOK | RxErr ;
       
   733 
       
   734 #if RX_BUF_IDX == 0
       
   735 static const unsigned int rtl8139_rx_config =
       
   736 	RxCfgRcv8K | RxNoWrap |
       
   737 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   738 	(RX_DMA_BURST << RxCfgDMAShift);
       
   739 #elif RX_BUF_IDX == 1
       
   740 static const unsigned int rtl8139_rx_config =
       
   741 	RxCfgRcv16K | RxNoWrap |
       
   742 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   743 	(RX_DMA_BURST << RxCfgDMAShift);
       
   744 #elif RX_BUF_IDX == 2
       
   745 static const unsigned int rtl8139_rx_config =
       
   746 	RxCfgRcv32K | RxNoWrap |
       
   747 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   748 	(RX_DMA_BURST << RxCfgDMAShift);
       
   749 #elif RX_BUF_IDX == 3
       
   750 static const unsigned int rtl8139_rx_config =
       
   751 	RxCfgRcv64K |
       
   752 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   753 	(RX_DMA_BURST << RxCfgDMAShift);
       
   754 #else
       
   755 #error "Invalid configuration for 8139_RXBUF_IDX"
       
   756 #endif
       
   757 
       
   758 static const unsigned int rtl8139_tx_config =
       
   759 	TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
       
   760 
       
   761 static void __rtl8139_cleanup_dev (struct net_device *dev)
       
   762 {
       
   763 	struct rtl8139_private *tp = netdev_priv(dev);
       
   764 	struct pci_dev *pdev;
       
   765 
       
   766 	assert (dev != NULL);
       
   767 	assert (tp->pci_dev != NULL);
       
   768 	pdev = tp->pci_dev;
       
   769 
       
   770 #ifdef USE_IO_OPS
       
   771 	if (tp->mmio_addr)
       
   772 		ioport_unmap (tp->mmio_addr);
       
   773 #else
       
   774 	if (tp->mmio_addr)
       
   775 		pci_iounmap (pdev, tp->mmio_addr);
       
   776 #endif /* USE_IO_OPS */
       
   777 
       
   778 	/* it's ok to call this even if we have no regions to free */
       
   779 	pci_release_regions (pdev);
       
   780 
       
   781 	free_netdev(dev);
       
   782 	pci_set_drvdata (pdev, NULL);
       
   783 }
       
   784 
       
   785 
       
   786 static void rtl8139_chip_reset (void __iomem *ioaddr)
       
   787 {
       
   788 	int i;
       
   789 
       
   790 	/* Soft reset the chip. */
       
   791 	RTL_W8 (ChipCmd, CmdReset);
       
   792 
       
   793 	/* Check that the chip has finished the reset. */
       
   794 	for (i = 1000; i > 0; i--) {
       
   795 		barrier();
       
   796 		if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
       
   797 			break;
       
   798 		udelay (10);
       
   799 	}
       
   800 }
       
   801 
       
   802 
       
   803 static int __devinit rtl8139_init_board (struct pci_dev *pdev,
       
   804 					 struct net_device **dev_out)
       
   805 {
       
   806 	void __iomem *ioaddr;
       
   807 	struct net_device *dev;
       
   808 	struct rtl8139_private *tp;
       
   809 	u8 tmp8;
       
   810 	int rc, disable_dev_on_err = 0;
       
   811 	unsigned int i;
       
   812 	unsigned long pio_start, pio_end, pio_flags, pio_len;
       
   813 	unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
       
   814 	u32 version;
       
   815 
       
   816 	assert (pdev != NULL);
       
   817 
       
   818 	*dev_out = NULL;
       
   819 
       
   820 	/* dev and priv zeroed in alloc_etherdev */
       
   821 	dev = alloc_etherdev (sizeof (*tp));
       
   822 	if (dev == NULL) {
       
   823 		dev_err(&pdev->dev, "Unable to alloc new net device\n");
       
   824 		return -ENOMEM;
       
   825 	}
       
   826 	SET_MODULE_OWNER(dev);
       
   827 	SET_NETDEV_DEV(dev, &pdev->dev);
       
   828 
       
   829 	tp = netdev_priv(dev);
       
   830 	tp->pci_dev = pdev;
       
   831 
       
   832 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
       
   833 	rc = pci_enable_device (pdev);
       
   834 	if (rc)
       
   835 		goto err_out;
       
   836 
       
   837 	pio_start = pci_resource_start (pdev, 0);
       
   838 	pio_end = pci_resource_end (pdev, 0);
       
   839 	pio_flags = pci_resource_flags (pdev, 0);
       
   840 	pio_len = pci_resource_len (pdev, 0);
       
   841 
       
   842 	mmio_start = pci_resource_start (pdev, 1);
       
   843 	mmio_end = pci_resource_end (pdev, 1);
       
   844 	mmio_flags = pci_resource_flags (pdev, 1);
       
   845 	mmio_len = pci_resource_len (pdev, 1);
       
   846 
       
   847 	/* set this immediately, we need to know before
       
   848 	 * we talk to the chip directly */
       
   849 	DPRINTK("PIO region size == 0x%02X\n", pio_len);
       
   850 	DPRINTK("MMIO region size == 0x%02lX\n", mmio_len);
       
   851 
       
   852 #ifdef USE_IO_OPS
       
   853 	/* make sure PCI base addr 0 is PIO */
       
   854 	if (!(pio_flags & IORESOURCE_IO)) {
       
   855 		dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n");
       
   856 		rc = -ENODEV;
       
   857 		goto err_out;
       
   858 	}
       
   859 	/* check for weird/broken PCI region reporting */
       
   860 	if (pio_len < RTL_MIN_IO_SIZE) {
       
   861 		dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n");
       
   862 		rc = -ENODEV;
       
   863 		goto err_out;
       
   864 	}
       
   865 #else
       
   866 	/* make sure PCI base addr 1 is MMIO */
       
   867 	if (!(mmio_flags & IORESOURCE_MEM)) {
       
   868 		dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
       
   869 		rc = -ENODEV;
       
   870 		goto err_out;
       
   871 	}
       
   872 	if (mmio_len < RTL_MIN_IO_SIZE) {
       
   873 		dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n");
       
   874 		rc = -ENODEV;
       
   875 		goto err_out;
       
   876 	}
       
   877 #endif
       
   878 
       
   879 	rc = pci_request_regions (pdev, DRV_NAME);
       
   880 	if (rc)
       
   881 		goto err_out;
       
   882 	disable_dev_on_err = 1;
       
   883 
       
   884 	/* enable PCI bus-mastering */
       
   885 	pci_set_master (pdev);
       
   886 
       
   887 #ifdef USE_IO_OPS
       
   888 	ioaddr = ioport_map(pio_start, pio_len);
       
   889 	if (!ioaddr) {
       
   890 		dev_err(&pdev->dev, "cannot map PIO, aborting\n");
       
   891 		rc = -EIO;
       
   892 		goto err_out;
       
   893 	}
       
   894 	dev->base_addr = pio_start;
       
   895 	tp->mmio_addr = ioaddr;
       
   896 	tp->regs_len = pio_len;
       
   897 #else
       
   898 	/* ioremap MMIO region */
       
   899 	ioaddr = pci_iomap(pdev, 1, 0);
       
   900 	if (ioaddr == NULL) {
       
   901 		dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
       
   902 		rc = -EIO;
       
   903 		goto err_out;
       
   904 	}
       
   905 	dev->base_addr = (long) ioaddr;
       
   906 	tp->mmio_addr = ioaddr;
       
   907 	tp->regs_len = mmio_len;
       
   908 #endif /* USE_IO_OPS */
       
   909 
       
   910 	/* Bring old chips out of low-power mode. */
       
   911 	RTL_W8 (HltClk, 'R');
       
   912 
       
   913 	/* check for missing/broken hardware */
       
   914 	if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
       
   915 		dev_err(&pdev->dev, "Chip not responding, ignoring board\n");
       
   916 		rc = -EIO;
       
   917 		goto err_out;
       
   918 	}
       
   919 
       
   920 	/* identify chip attached to board */
       
   921 	version = RTL_R32 (TxConfig) & HW_REVID_MASK;
       
   922 	for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
       
   923 		if (version == rtl_chip_info[i].version) {
       
   924 			tp->chipset = i;
       
   925 			goto match;
       
   926 		}
       
   927 
       
   928 	/* if unknown chip, assume array element #0, original RTL-8139 in this case */
       
   929 	dev_printk (KERN_DEBUG, &pdev->dev,
       
   930 		    "unknown chip version, assuming RTL-8139\n");
       
   931 	dev_printk (KERN_DEBUG, &pdev->dev,
       
   932 		    "TxConfig = 0x%lx\n", RTL_R32 (TxConfig));
       
   933 	tp->chipset = 0;
       
   934 
       
   935 match:
       
   936 	DPRINTK ("chipset id (%d) == index %d, '%s'\n",
       
   937 		 version, i, rtl_chip_info[i].name);
       
   938 
       
   939 	if (tp->chipset >= CH_8139B) {
       
   940 		u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
       
   941 		DPRINTK("PCI PM wakeup\n");
       
   942 		if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
       
   943 		    (tmp8 & LWAKE))
       
   944 			new_tmp8 &= ~LWAKE;
       
   945 		new_tmp8 |= Cfg1_PM_Enable;
       
   946 		if (new_tmp8 != tmp8) {
       
   947 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   948 			RTL_W8 (Config1, tmp8);
       
   949 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   950 		}
       
   951 		if (rtl_chip_info[tp->chipset].flags & HasLWake) {
       
   952 			tmp8 = RTL_R8 (Config4);
       
   953 			if (tmp8 & LWPTN) {
       
   954 				RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   955 				RTL_W8 (Config4, tmp8 & ~LWPTN);
       
   956 				RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   957 			}
       
   958 		}
       
   959 	} else {
       
   960 		DPRINTK("Old chip wakeup\n");
       
   961 		tmp8 = RTL_R8 (Config1);
       
   962 		tmp8 &= ~(SLEEP | PWRDN);
       
   963 		RTL_W8 (Config1, tmp8);
       
   964 	}
       
   965 
       
   966 	rtl8139_chip_reset (ioaddr);
       
   967 
       
   968 	*dev_out = dev;
       
   969 	return 0;
       
   970 
       
   971 err_out:
       
   972 	__rtl8139_cleanup_dev (dev);
       
   973 	if (disable_dev_on_err)
       
   974 		pci_disable_device (pdev);
       
   975 	return rc;
       
   976 }
       
   977 
       
   978 
       
   979 static int __devinit rtl8139_init_one (struct pci_dev *pdev,
       
   980 				       const struct pci_device_id *ent)
       
   981 {
       
   982 	struct net_device *dev = NULL;
       
   983 	struct rtl8139_private *tp;
       
   984 	int i, addr_len, option;
       
   985 	void __iomem *ioaddr;
       
   986 	static int board_idx = -1;
       
   987 	u8 pci_rev;
       
   988 
       
   989 	assert (pdev != NULL);
       
   990 	assert (ent != NULL);
       
   991 
       
   992 	board_idx++;
       
   993 
       
   994 	/* when we're built into the kernel, the driver version message
       
   995 	 * is only printed if at least one 8139 board has been found
       
   996 	 */
       
   997 #ifndef MODULE
       
   998 	{
       
   999 		static int printed_version;
       
  1000 		if (!printed_version++)
       
  1001 			printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
       
  1002 	}
       
  1003 #endif
       
  1004 
       
  1005 	pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev);
       
  1006 
       
  1007 	if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
       
  1008 	    pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) {
       
  1009 		dev_info(&pdev->dev,
       
  1010 			   "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n",
       
  1011 		       	   pdev->vendor, pdev->device, pci_rev);
       
  1012 		dev_info(&pdev->dev,
       
  1013 			   "Use the \"8139cp\" driver for improved performance and stability.\n");
       
  1014 	}
       
  1015 
       
  1016 	i = rtl8139_init_board (pdev, &dev);
       
  1017 	if (i < 0)
       
  1018 		return i;
       
  1019 
       
  1020 	assert (dev != NULL);
       
  1021 	tp = netdev_priv(dev);
       
  1022 
       
  1023 	ioaddr = tp->mmio_addr;
       
  1024 	assert (ioaddr != NULL);
       
  1025 
       
  1026 	addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
       
  1027 	for (i = 0; i < 3; i++)
       
  1028 		((u16 *) (dev->dev_addr))[i] =
       
  1029 		    le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len));
       
  1030 	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
       
  1031 
       
  1032 	/* The Rtl8139-specific entries in the device structure. */
       
  1033 	dev->open = rtl8139_open;
       
  1034 	dev->hard_start_xmit = rtl8139_start_xmit;
       
  1035 	dev->poll = rtl8139_poll;
       
  1036 	dev->weight = 64;
       
  1037 	dev->stop = rtl8139_close;
       
  1038 	dev->get_stats = rtl8139_get_stats;
       
  1039 	dev->set_multicast_list = rtl8139_set_rx_mode;
       
  1040 	dev->do_ioctl = netdev_ioctl;
       
  1041 	dev->ethtool_ops = &rtl8139_ethtool_ops;
       
  1042 	dev->tx_timeout = rtl8139_tx_timeout;
       
  1043 	dev->watchdog_timeo = TX_TIMEOUT;
       
  1044 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  1045 	dev->poll_controller = rtl8139_poll_controller;
       
  1046 #endif
       
  1047 
       
  1048 	/* note: the hardware is not capable of sg/csum/highdma, however
       
  1049 	 * through the use of skb_copy_and_csum_dev we enable these
       
  1050 	 * features
       
  1051 	 */
       
  1052 	dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
       
  1053 
       
  1054 	dev->irq = pdev->irq;
       
  1055 
       
  1056 	/* tp zeroed and aligned in alloc_etherdev */
       
  1057 	tp = netdev_priv(dev);
       
  1058 
       
  1059 	/* note: tp->chipset set in rtl8139_init_board */
       
  1060 	tp->drv_flags = board_info[ent->driver_data].hw_flags;
       
  1061 	tp->mmio_addr = ioaddr;
       
  1062 	tp->msg_enable =
       
  1063 		(debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1));
       
  1064 	spin_lock_init (&tp->lock);
       
  1065 	spin_lock_init (&tp->rx_lock);
       
  1066 	INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
       
  1067 	tp->mii.dev = dev;
       
  1068 	tp->mii.mdio_read = mdio_read;
       
  1069 	tp->mii.mdio_write = mdio_write;
       
  1070 	tp->mii.phy_id_mask = 0x3f;
       
  1071 	tp->mii.reg_num_mask = 0x1f;
       
  1072 
       
  1073 	/* dev is fully set up and ready to use now */
       
  1074     
       
  1075 	// offer device to EtherCAT master module
       
  1076 	if (ecdev_offer(dev, ec_poll, THIS_MODULE, &tp->ecdev)) {
       
  1077 		printk(KERN_ERR PFX "Failed to offer device.\n");
       
  1078 		goto err_out;
       
  1079 	}
       
  1080 
       
  1081 	if (!tp->ecdev) {
       
  1082 		DPRINTK("about to register device named %s (%p)...\n", dev->name, dev);
       
  1083 		i = register_netdev (dev);
       
  1084 		if (i) goto err_out;
       
  1085 	}
       
  1086 
       
  1087 	pci_set_drvdata (pdev, dev);
       
  1088 
       
  1089 	printk (KERN_INFO "%s: %s at 0x%lx, "
       
  1090 		"%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
       
  1091 		"IRQ %d\n",
       
  1092 		dev->name,
       
  1093 		board_info[ent->driver_data].name,
       
  1094 		dev->base_addr,
       
  1095 		dev->dev_addr[0], dev->dev_addr[1],
       
  1096 		dev->dev_addr[2], dev->dev_addr[3],
       
  1097 		dev->dev_addr[4], dev->dev_addr[5],
       
  1098 		dev->irq);
       
  1099 
       
  1100 	printk (KERN_DEBUG "%s:  Identified 8139 chip type '%s'\n",
       
  1101 		dev->name, rtl_chip_info[tp->chipset].name);
       
  1102 
       
  1103 	/* Find the connected MII xcvrs.
       
  1104 	   Doing this in open() would allow detecting external xcvrs later, but
       
  1105 	   takes too much time. */
       
  1106 #ifdef CONFIG_8139TOO_8129
       
  1107 	if (tp->drv_flags & HAS_MII_XCVR) {
       
  1108 		int phy, phy_idx = 0;
       
  1109 		for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
       
  1110 			int mii_status = mdio_read(dev, phy, 1);
       
  1111 			if (mii_status != 0xffff  &&  mii_status != 0x0000) {
       
  1112 				u16 advertising = mdio_read(dev, phy, 4);
       
  1113 				tp->phys[phy_idx++] = phy;
       
  1114 				printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x "
       
  1115 					   "advertising %4.4x.\n",
       
  1116 					   dev->name, phy, mii_status, advertising);
       
  1117 			}
       
  1118 		}
       
  1119 		if (phy_idx == 0) {
       
  1120 			printk(KERN_INFO "%s: No MII transceivers found!  Assuming SYM "
       
  1121 				   "transceiver.\n",
       
  1122 				   dev->name);
       
  1123 			tp->phys[0] = 32;
       
  1124 		}
       
  1125 	} else
       
  1126 #endif
       
  1127 		tp->phys[0] = 32;
       
  1128 	tp->mii.phy_id = tp->phys[0];
       
  1129 
       
  1130 	/* The lower four bits are the media type. */
       
  1131 	option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
       
  1132 	if (option > 0) {
       
  1133 		tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
       
  1134 		tp->default_port = option & 0xFF;
       
  1135 		if (tp->default_port)
       
  1136 			tp->mii.force_media = 1;
       
  1137 	}
       
  1138 	if (board_idx < MAX_UNITS  &&  full_duplex[board_idx] > 0)
       
  1139 		tp->mii.full_duplex = full_duplex[board_idx];
       
  1140 	if (tp->mii.full_duplex) {
       
  1141 		printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name);
       
  1142 		/* Changing the MII-advertised media because might prevent
       
  1143 		   re-connection. */
       
  1144 		tp->mii.force_media = 1;
       
  1145 	}
       
  1146 	if (tp->default_port) {
       
  1147 		printk(KERN_INFO "  Forcing %dMbps %s-duplex operation.\n",
       
  1148 			   (option & 0x20 ? 100 : 10),
       
  1149 			   (option & 0x10 ? "full" : "half"));
       
  1150 		mdio_write(dev, tp->phys[0], 0,
       
  1151 				   ((option & 0x20) ? 0x2000 : 0) | 	/* 100Mbps? */
       
  1152 				   ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
       
  1153 	}
       
  1154 
       
  1155 	/* Put the chip into low-power mode. */
       
  1156 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1157 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  1158 
       
  1159 	if (tp->ecdev && ecdev_open(tp->ecdev)) {
       
  1160 		ecdev_withdraw(tp->ecdev);
       
  1161 		goto err_out;
       
  1162 	}
       
  1163 
       
  1164 	return 0;
       
  1165 
       
  1166 err_out:
       
  1167 	__rtl8139_cleanup_dev (dev);
       
  1168 	pci_disable_device (pdev);
       
  1169 	return i;
       
  1170 }
       
  1171 
       
  1172 
       
  1173 static void __devexit rtl8139_remove_one (struct pci_dev *pdev)
       
  1174 {
       
  1175 	struct net_device *dev = pci_get_drvdata (pdev);
       
  1176 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1177 
       
  1178 	assert (dev != NULL);
       
  1179 
       
  1180 	flush_scheduled_work();
       
  1181 
       
  1182 	if (tp->ecdev) {
       
  1183 		ecdev_close(tp->ecdev);
       
  1184 		ecdev_withdraw(tp->ecdev);
       
  1185 	}
       
  1186 	else {
       
  1187 		unregister_netdev (dev);
       
  1188 	}
       
  1189 
       
  1190 	__rtl8139_cleanup_dev (dev);
       
  1191 	pci_disable_device (pdev);
       
  1192 }
       
  1193 
       
  1194 
       
  1195 /* Serial EEPROM section. */
       
  1196 
       
  1197 /*  EEPROM_Ctrl bits. */
       
  1198 #define EE_SHIFT_CLK	0x04	/* EEPROM shift clock. */
       
  1199 #define EE_CS			0x08	/* EEPROM chip select. */
       
  1200 #define EE_DATA_WRITE	0x02	/* EEPROM chip data in. */
       
  1201 #define EE_WRITE_0		0x00
       
  1202 #define EE_WRITE_1		0x02
       
  1203 #define EE_DATA_READ	0x01	/* EEPROM chip data out. */
       
  1204 #define EE_ENB			(0x80 | EE_CS)
       
  1205 
       
  1206 /* Delay between EEPROM clock transitions.
       
  1207    No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
       
  1208  */
       
  1209 
       
  1210 #define eeprom_delay()	(void)RTL_R32(Cfg9346)
       
  1211 
       
  1212 /* The EEPROM commands include the alway-set leading bit. */
       
  1213 #define EE_WRITE_CMD	(5)
       
  1214 #define EE_READ_CMD		(6)
       
  1215 #define EE_ERASE_CMD	(7)
       
  1216 
       
  1217 static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len)
       
  1218 {
       
  1219 	int i;
       
  1220 	unsigned retval = 0;
       
  1221 	int read_cmd = location | (EE_READ_CMD << addr_len);
       
  1222 
       
  1223 	RTL_W8 (Cfg9346, EE_ENB & ~EE_CS);
       
  1224 	RTL_W8 (Cfg9346, EE_ENB);
       
  1225 	eeprom_delay ();
       
  1226 
       
  1227 	/* Shift the read command bits out. */
       
  1228 	for (i = 4 + addr_len; i >= 0; i--) {
       
  1229 		int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
       
  1230 		RTL_W8 (Cfg9346, EE_ENB | dataval);
       
  1231 		eeprom_delay ();
       
  1232 		RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK);
       
  1233 		eeprom_delay ();
       
  1234 	}
       
  1235 	RTL_W8 (Cfg9346, EE_ENB);
       
  1236 	eeprom_delay ();
       
  1237 
       
  1238 	for (i = 16; i > 0; i--) {
       
  1239 		RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK);
       
  1240 		eeprom_delay ();
       
  1241 		retval =
       
  1242 		    (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 :
       
  1243 				     0);
       
  1244 		RTL_W8 (Cfg9346, EE_ENB);
       
  1245 		eeprom_delay ();
       
  1246 	}
       
  1247 
       
  1248 	/* Terminate the EEPROM access. */
       
  1249 	RTL_W8 (Cfg9346, ~EE_CS);
       
  1250 	eeprom_delay ();
       
  1251 
       
  1252 	return retval;
       
  1253 }
       
  1254 
       
  1255 /* MII serial management: mostly bogus for now. */
       
  1256 /* Read and write the MII management registers using software-generated
       
  1257    serial MDIO protocol.
       
  1258    The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
       
  1259    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
       
  1260    "overclocking" issues. */
       
  1261 #define MDIO_DIR		0x80
       
  1262 #define MDIO_DATA_OUT	0x04
       
  1263 #define MDIO_DATA_IN	0x02
       
  1264 #define MDIO_CLK		0x01
       
  1265 #define MDIO_WRITE0 (MDIO_DIR)
       
  1266 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
       
  1267 
       
  1268 #define mdio_delay()	RTL_R8(Config4)
       
  1269 
       
  1270 
       
  1271 static const char mii_2_8139_map[8] = {
       
  1272 	BasicModeCtrl,
       
  1273 	BasicModeStatus,
       
  1274 	0,
       
  1275 	0,
       
  1276 	NWayAdvert,
       
  1277 	NWayLPAR,
       
  1278 	NWayExpansion,
       
  1279 	0
       
  1280 };
       
  1281 
       
  1282 
       
  1283 #ifdef CONFIG_8139TOO_8129
       
  1284 /* Syncronize the MII management interface by shifting 32 one bits out. */
       
  1285 static void mdio_sync (void __iomem *ioaddr)
       
  1286 {
       
  1287 	int i;
       
  1288 
       
  1289 	for (i = 32; i >= 0; i--) {
       
  1290 		RTL_W8 (Config4, MDIO_WRITE1);
       
  1291 		mdio_delay ();
       
  1292 		RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK);
       
  1293 		mdio_delay ();
       
  1294 	}
       
  1295 }
       
  1296 #endif
       
  1297 
       
  1298 static int mdio_read (struct net_device *dev, int phy_id, int location)
       
  1299 {
       
  1300 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1301 	int retval = 0;
       
  1302 #ifdef CONFIG_8139TOO_8129
       
  1303 	void __iomem *ioaddr = tp->mmio_addr;
       
  1304 	int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
       
  1305 	int i;
       
  1306 #endif
       
  1307 
       
  1308 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1309 		void __iomem *ioaddr = tp->mmio_addr;
       
  1310 		return location < 8 && mii_2_8139_map[location] ?
       
  1311 		    RTL_R16 (mii_2_8139_map[location]) : 0;
       
  1312 	}
       
  1313 
       
  1314 #ifdef CONFIG_8139TOO_8129
       
  1315 	mdio_sync (ioaddr);
       
  1316 	/* Shift the read command bits out. */
       
  1317 	for (i = 15; i >= 0; i--) {
       
  1318 		int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
       
  1319 
       
  1320 		RTL_W8 (Config4, MDIO_DIR | dataval);
       
  1321 		mdio_delay ();
       
  1322 		RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK);
       
  1323 		mdio_delay ();
       
  1324 	}
       
  1325 
       
  1326 	/* Read the two transition, 16 data, and wire-idle bits. */
       
  1327 	for (i = 19; i > 0; i--) {
       
  1328 		RTL_W8 (Config4, 0);
       
  1329 		mdio_delay ();
       
  1330 		retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0);
       
  1331 		RTL_W8 (Config4, MDIO_CLK);
       
  1332 		mdio_delay ();
       
  1333 	}
       
  1334 #endif
       
  1335 
       
  1336 	return (retval >> 1) & 0xffff;
       
  1337 }
       
  1338 
       
  1339 
       
  1340 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
  1341 			int value)
       
  1342 {
       
  1343 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1344 #ifdef CONFIG_8139TOO_8129
       
  1345 	void __iomem *ioaddr = tp->mmio_addr;
       
  1346 	int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
       
  1347 	int i;
       
  1348 #endif
       
  1349 
       
  1350 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1351 		void __iomem *ioaddr = tp->mmio_addr;
       
  1352 		if (location == 0) {
       
  1353 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1354 			RTL_W16 (BasicModeCtrl, value);
       
  1355 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1356 		} else if (location < 8 && mii_2_8139_map[location])
       
  1357 			RTL_W16 (mii_2_8139_map[location], value);
       
  1358 		return;
       
  1359 	}
       
  1360 
       
  1361 #ifdef CONFIG_8139TOO_8129
       
  1362 	mdio_sync (ioaddr);
       
  1363 
       
  1364 	/* Shift the command bits out. */
       
  1365 	for (i = 31; i >= 0; i--) {
       
  1366 		int dataval =
       
  1367 		    (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
       
  1368 		RTL_W8 (Config4, dataval);
       
  1369 		mdio_delay ();
       
  1370 		RTL_W8 (Config4, dataval | MDIO_CLK);
       
  1371 		mdio_delay ();
       
  1372 	}
       
  1373 	/* Clear out extra bits. */
       
  1374 	for (i = 2; i > 0; i--) {
       
  1375 		RTL_W8 (Config4, 0);
       
  1376 		mdio_delay ();
       
  1377 		RTL_W8 (Config4, MDIO_CLK);
       
  1378 		mdio_delay ();
       
  1379 	}
       
  1380 #endif
       
  1381 }
       
  1382 
       
  1383 
       
  1384 static int rtl8139_open (struct net_device *dev)
       
  1385 {
       
  1386 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1387 	int retval;
       
  1388 	void __iomem *ioaddr = tp->mmio_addr;
       
  1389 
       
  1390 	if (!tp->ecdev) {
       
  1391 		retval = request_irq(dev->irq, rtl8139_interrupt,
       
  1392 			IRQF_SHARED, dev->name, dev);
       
  1393 		if (retval)
       
  1394 			return retval;
       
  1395 	}
       
  1396 
       
  1397 	tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  1398 					   &tp->tx_bufs_dma);
       
  1399 	tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  1400 					   &tp->rx_ring_dma);
       
  1401 	if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
       
  1402 		if (!tp->ecdev) free_irq(dev->irq, dev);
       
  1403 
       
  1404 		if (tp->tx_bufs)
       
  1405 			pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  1406 					    tp->tx_bufs, tp->tx_bufs_dma);
       
  1407 		if (tp->rx_ring)
       
  1408 			pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  1409 					    tp->rx_ring, tp->rx_ring_dma);
       
  1410 
       
  1411 		return -ENOMEM;
       
  1412 
       
  1413 	}
       
  1414 
       
  1415 	tp->mii.full_duplex = tp->mii.force_media;
       
  1416 	tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
       
  1417 
       
  1418 	rtl8139_init_ring (dev);
       
  1419 	rtl8139_hw_start (dev);
       
  1420 
       
  1421 	if (!tp->ecdev) {
       
  1422 		netif_start_queue (dev);
       
  1423 
       
  1424 		if (netif_msg_ifup(tp))
       
  1425 			printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#llx IRQ %d"
       
  1426 					" GP Pins %2.2x %s-duplex.\n", dev->name,
       
  1427 					(unsigned long long)pci_resource_start (tp->pci_dev, 1),
       
  1428 					dev->irq, RTL_R8 (MediaStatus),
       
  1429 					tp->mii.full_duplex ? "full" : "half");
       
  1430 		rtl8139_start_thread(tp);
       
  1431 	}
       
  1432 
       
  1433 	return 0;
       
  1434 }
       
  1435 
       
  1436 
       
  1437 static void rtl_check_media (struct net_device *dev, unsigned int init_media)
       
  1438 {
       
  1439 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1440 
       
  1441 	if (tp->ecdev) {
       
  1442 		void __iomem *ioaddr = tp->mmio_addr;
       
  1443 		uint16_t state = RTL_R16(BasicModeStatus) & BMSR_LSTATUS;
       
  1444 		ecdev_set_link(tp->ecdev, state ? 1 : 0);
       
  1445 	}
       
  1446 	else {
       
  1447 		if (tp->phys[0] >= 0) {
       
  1448 			mii_check_media(&tp->mii, netif_msg_link(tp), init_media);
       
  1449 		}
       
  1450 	}
       
  1451 }
       
  1452 
       
  1453 /* Start the hardware at open or resume. */
       
  1454 static void rtl8139_hw_start (struct net_device *dev)
       
  1455 {
       
  1456 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1457 	void __iomem *ioaddr = tp->mmio_addr;
       
  1458 	u32 i;
       
  1459 	u8 tmp;
       
  1460 
       
  1461 	/* Bring old chips out of low-power mode. */
       
  1462 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1463 		RTL_W8 (HltClk, 'R');
       
  1464 
       
  1465 	rtl8139_chip_reset (ioaddr);
       
  1466 
       
  1467 	/* unlock Config[01234] and BMCR register writes */
       
  1468 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1469 	/* Restore our idea of the MAC address. */
       
  1470 	RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
       
  1471 	RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
       
  1472 
       
  1473 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1474 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1475 
       
  1476 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1477 	RTL_W32 (RxConfig, tp->rx_config);
       
  1478 	RTL_W32 (TxConfig, rtl8139_tx_config);
       
  1479 
       
  1480 	tp->cur_rx = 0;
       
  1481 
       
  1482 	rtl_check_media (dev, 1);
       
  1483 
       
  1484 	if (tp->chipset >= CH_8139B) {
       
  1485 		/* Disable magic packet scanning, which is enabled
       
  1486 		 * when PM is enabled in Config1.  It can be reenabled
       
  1487 		 * via ETHTOOL_SWOL if desired.  */
       
  1488 		RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
       
  1489 	}
       
  1490 
       
  1491 	DPRINTK("init buffer addresses\n");
       
  1492 
       
  1493 	/* Lock Config[01234] and BMCR register writes */
       
  1494 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1495 
       
  1496 	/* init Rx ring buffer DMA address */
       
  1497 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1498 
       
  1499 	/* init Tx buffer DMA addresses */
       
  1500 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1501 		RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
       
  1502 
       
  1503 	RTL_W32 (RxMissed, 0);
       
  1504 
       
  1505 	rtl8139_set_rx_mode (dev);
       
  1506 
       
  1507 	/* no early-rx interrupts */
       
  1508 	RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
       
  1509 
       
  1510 	/* make sure RxTx has started */
       
  1511 	tmp = RTL_R8 (ChipCmd);
       
  1512 	if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
       
  1513 		RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1514 
       
  1515 	if (!tp->ecdev)
       
  1516 		/* Enable all known interrupts by setting the interrupt mask. */
       
  1517 		RTL_W16 (IntrMask, rtl8139_intr_mask);
       
  1518 }
       
  1519 
       
  1520 
       
  1521 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
       
  1522 static void rtl8139_init_ring (struct net_device *dev)
       
  1523 {
       
  1524 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1525 	int i;
       
  1526 
       
  1527 	tp->cur_rx = 0;
       
  1528 	tp->cur_tx = 0;
       
  1529 	tp->dirty_tx = 0;
       
  1530 
       
  1531 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1532 		tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
       
  1533 }
       
  1534 
       
  1535 
       
  1536 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
       
  1537 static int next_tick = 3 * HZ;
       
  1538 
       
  1539 #ifndef CONFIG_8139TOO_TUNE_TWISTER
       
  1540 static inline void rtl8139_tune_twister (struct net_device *dev,
       
  1541 				  struct rtl8139_private *tp) {}
       
  1542 #else
       
  1543 enum TwisterParamVals {
       
  1544 	PARA78_default	= 0x78fa8388,
       
  1545 	PARA7c_default	= 0xcb38de43,	/* param[0][3] */
       
  1546 	PARA7c_xxx	= 0xcb38de43,
       
  1547 };
       
  1548 
       
  1549 static const unsigned long param[4][4] = {
       
  1550 	{0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
       
  1551 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1552 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1553 	{0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
       
  1554 };
       
  1555 
       
  1556 static void rtl8139_tune_twister (struct net_device *dev,
       
  1557 				  struct rtl8139_private *tp)
       
  1558 {
       
  1559 	int linkcase;
       
  1560 	void __iomem *ioaddr = tp->mmio_addr;
       
  1561 
       
  1562 	/* This is a complicated state machine to configure the "twister" for
       
  1563 	   impedance/echos based on the cable length.
       
  1564 	   All of this is magic and undocumented.
       
  1565 	 */
       
  1566 	switch (tp->twistie) {
       
  1567 	case 1:
       
  1568 		if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
       
  1569 			/* We have link beat, let us tune the twister. */
       
  1570 			RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
       
  1571 			tp->twistie = 2;	/* Change to state 2. */
       
  1572 			next_tick = HZ / 10;
       
  1573 		} else {
       
  1574 			/* Just put in some reasonable defaults for when beat returns. */
       
  1575 			RTL_W16 (CSCR, CSCR_LinkDownCmd);
       
  1576 			RTL_W32 (FIFOTMS, 0x20);	/* Turn on cable test mode. */
       
  1577 			RTL_W32 (PARA78, PARA78_default);
       
  1578 			RTL_W32 (PARA7c, PARA7c_default);
       
  1579 			tp->twistie = 0;	/* Bail from future actions. */
       
  1580 		}
       
  1581 		break;
       
  1582 	case 2:
       
  1583 		/* Read how long it took to hear the echo. */
       
  1584 		linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
       
  1585 		if (linkcase == 0x7000)
       
  1586 			tp->twist_row = 3;
       
  1587 		else if (linkcase == 0x3000)
       
  1588 			tp->twist_row = 2;
       
  1589 		else if (linkcase == 0x1000)
       
  1590 			tp->twist_row = 1;
       
  1591 		else
       
  1592 			tp->twist_row = 0;
       
  1593 		tp->twist_col = 0;
       
  1594 		tp->twistie = 3;	/* Change to state 2. */
       
  1595 		next_tick = HZ / 10;
       
  1596 		break;
       
  1597 	case 3:
       
  1598 		/* Put out four tuning parameters, one per 100msec. */
       
  1599 		if (tp->twist_col == 0)
       
  1600 			RTL_W16 (FIFOTMS, 0);
       
  1601 		RTL_W32 (PARA7c, param[(int) tp->twist_row]
       
  1602 			 [(int) tp->twist_col]);
       
  1603 		next_tick = HZ / 10;
       
  1604 		if (++tp->twist_col >= 4) {
       
  1605 			/* For short cables we are done.
       
  1606 			   For long cables (row == 3) check for mistune. */
       
  1607 			tp->twistie =
       
  1608 			    (tp->twist_row == 3) ? 4 : 0;
       
  1609 		}
       
  1610 		break;
       
  1611 	case 4:
       
  1612 		/* Special case for long cables: check for mistune. */
       
  1613 		if ((RTL_R16 (CSCR) &
       
  1614 		     CSCR_LinkStatusBits) == 0x7000) {
       
  1615 			tp->twistie = 0;
       
  1616 			break;
       
  1617 		} else {
       
  1618 			RTL_W32 (PARA7c, 0xfb38de03);
       
  1619 			tp->twistie = 5;
       
  1620 			next_tick = HZ / 10;
       
  1621 		}
       
  1622 		break;
       
  1623 	case 5:
       
  1624 		/* Retune for shorter cable (column 2). */
       
  1625 		RTL_W32 (FIFOTMS, 0x20);
       
  1626 		RTL_W32 (PARA78, PARA78_default);
       
  1627 		RTL_W32 (PARA7c, PARA7c_default);
       
  1628 		RTL_W32 (FIFOTMS, 0x00);
       
  1629 		tp->twist_row = 2;
       
  1630 		tp->twist_col = 0;
       
  1631 		tp->twistie = 3;
       
  1632 		next_tick = HZ / 10;
       
  1633 		break;
       
  1634 
       
  1635 	default:
       
  1636 		/* do nothing */
       
  1637 		break;
       
  1638 	}
       
  1639 }
       
  1640 #endif /* CONFIG_8139TOO_TUNE_TWISTER */
       
  1641 
       
  1642 static inline void rtl8139_thread_iter (struct net_device *dev,
       
  1643 				 struct rtl8139_private *tp,
       
  1644 				 void __iomem *ioaddr)
       
  1645 {
       
  1646 	int mii_lpa;
       
  1647 
       
  1648 	mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
       
  1649 
       
  1650 	if (!tp->mii.force_media && mii_lpa != 0xffff) {
       
  1651 		int duplex = (mii_lpa & LPA_100FULL)
       
  1652 		    || (mii_lpa & 0x01C0) == 0x0040;
       
  1653 		if (tp->mii.full_duplex != duplex) {
       
  1654 			tp->mii.full_duplex = duplex;
       
  1655 
       
  1656 			if (mii_lpa) {
       
  1657 				printk (KERN_INFO
       
  1658 					"%s: Setting %s-duplex based on MII #%d link"
       
  1659 					" partner ability of %4.4x.\n",
       
  1660 					dev->name,
       
  1661 					tp->mii.full_duplex ? "full" : "half",
       
  1662 					tp->phys[0], mii_lpa);
       
  1663 			} else {
       
  1664 				printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n",
       
  1665 				       dev->name);
       
  1666 			}
       
  1667 #if 0
       
  1668 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1669 			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
       
  1670 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1671 #endif
       
  1672 		}
       
  1673 	}
       
  1674 
       
  1675 	next_tick = HZ * 60;
       
  1676 
       
  1677 	rtl8139_tune_twister (dev, tp);
       
  1678 
       
  1679 	DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n",
       
  1680 		 dev->name, RTL_R16 (NWayLPAR));
       
  1681 	DPRINTK ("%s:  Other registers are IntMask %4.4x IntStatus %4.4x\n",
       
  1682 		 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus));
       
  1683 	DPRINTK ("%s:  Chip config %2.2x %2.2x.\n",
       
  1684 		 dev->name, RTL_R8 (Config0),
       
  1685 		 RTL_R8 (Config1));
       
  1686 }
       
  1687 
       
  1688 static void rtl8139_thread (struct work_struct *work)
       
  1689 {
       
  1690 	struct rtl8139_private *tp =
       
  1691 		container_of(work, struct rtl8139_private, thread.work);
       
  1692 	struct net_device *dev = tp->mii.dev;
       
  1693 	unsigned long thr_delay = next_tick;
       
  1694 
       
  1695 	rtnl_lock();
       
  1696 
       
  1697 	if (!netif_running(dev))
       
  1698 		goto out_unlock;
       
  1699 
       
  1700 	if (tp->watchdog_fired) {
       
  1701 		tp->watchdog_fired = 0;
       
  1702 		rtl8139_tx_timeout_task(work);
       
  1703 	} else
       
  1704 		rtl8139_thread_iter(dev, tp, tp->mmio_addr);
       
  1705 
       
  1706 	if (tp->have_thread)
       
  1707 		schedule_delayed_work(&tp->thread, thr_delay);
       
  1708 out_unlock:
       
  1709 	rtnl_unlock ();
       
  1710 }
       
  1711 
       
  1712 static void rtl8139_start_thread(struct rtl8139_private *tp)
       
  1713 {
       
  1714 	tp->twistie = 0;
       
  1715 	if (tp->chipset == CH_8139_K)
       
  1716 		tp->twistie = 1;
       
  1717 	else if (tp->drv_flags & HAS_LNK_CHNG)
       
  1718 		return;
       
  1719 
       
  1720 	tp->have_thread = 1;
       
  1721 	tp->watchdog_fired = 0;
       
  1722 
       
  1723 	schedule_delayed_work(&tp->thread, next_tick);
       
  1724 }
       
  1725 
       
  1726 static inline void rtl8139_tx_clear (struct rtl8139_private *tp)
       
  1727 {
       
  1728 	tp->cur_tx = 0;
       
  1729 	tp->dirty_tx = 0;
       
  1730 
       
  1731 	/* XXX account for unsent Tx packets in tp->stats.tx_dropped */
       
  1732 }
       
  1733 
       
  1734 static void rtl8139_tx_timeout_task (struct work_struct *work)
       
  1735 {
       
  1736 	struct rtl8139_private *tp =
       
  1737 		container_of(work, struct rtl8139_private, thread.work);
       
  1738 	struct net_device *dev = tp->mii.dev;
       
  1739 	void __iomem *ioaddr = tp->mmio_addr;
       
  1740 	int i;
       
  1741 	u8 tmp8;
       
  1742 
       
  1743 	printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x "
       
  1744 		"media %2.2x.\n", dev->name, RTL_R8 (ChipCmd),
       
  1745 		RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus));
       
  1746 	/* Emit info to figure out what went wrong. */
       
  1747 	printk (KERN_DEBUG "%s: Tx queue start entry %ld  dirty entry %ld.\n",
       
  1748 		dev->name, tp->cur_tx, tp->dirty_tx);
       
  1749 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1750 		printk (KERN_DEBUG "%s:  Tx descriptor %d is %8.8lx.%s\n",
       
  1751 			dev->name, i, RTL_R32 (TxStatus0 + (i * 4)),
       
  1752 			i == tp->dirty_tx % NUM_TX_DESC ?
       
  1753 				" (queue head)" : "");
       
  1754 
       
  1755 	tp->xstats.tx_timeouts++;
       
  1756 
       
  1757 	/* disable Tx ASAP, if not already */
       
  1758 	tmp8 = RTL_R8 (ChipCmd);
       
  1759 	if (tmp8 & CmdTxEnb)
       
  1760 		RTL_W8 (ChipCmd, CmdRxEnb);
       
  1761 
       
  1762 	if (tp->ecdev) {
       
  1763 		rtl8139_tx_clear (tp);
       
  1764 		rtl8139_hw_start (dev);
       
  1765 	}
       
  1766 	else {
       
  1767 	  spin_lock_bh(&tp->rx_lock);
       
  1768 	  /* Disable interrupts by clearing the interrupt mask. */
       
  1769 	  RTL_W16 (IntrMask, 0x0000);
       
  1770 
       
  1771 	  /* Stop a shared interrupt from scavenging while we are. */
       
  1772 	  spin_lock_irq(&tp->lock);
       
  1773 	  rtl8139_tx_clear (tp);
       
  1774 	  spin_unlock_irq(&tp->lock);
       
  1775 
       
  1776 	  /* ...and finally, reset everything */
       
  1777 	  if (netif_running(dev)) {
       
  1778 	    rtl8139_hw_start (dev);
       
  1779 	    netif_wake_queue (dev);
       
  1780 	  }
       
  1781 	  spin_unlock_bh(&tp->rx_lock);
       
  1782 	}
       
  1783 }
       
  1784 
       
  1785 static void rtl8139_tx_timeout (struct net_device *dev)
       
  1786 {
       
  1787 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1788 
       
  1789 	tp->watchdog_fired = 1;
       
  1790 	if (!tp->ecdev && !tp->have_thread) {
       
  1791 		INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
       
  1792 		schedule_delayed_work(&tp->thread, next_tick);
       
  1793 	}
       
  1794 }
       
  1795 
       
  1796 static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
       
  1797 {
       
  1798 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1799 	void __iomem *ioaddr = tp->mmio_addr;
       
  1800 	unsigned int entry;
       
  1801 	unsigned int len = skb->len;
       
  1802 	unsigned long flags;
       
  1803 
       
  1804 	/* Calculate the next Tx descriptor entry. */
       
  1805 	entry = tp->cur_tx % NUM_TX_DESC;
       
  1806 
       
  1807 	/* Note: the chip doesn't have auto-pad! */
       
  1808 	if (likely(len < TX_BUF_SIZE)) {
       
  1809 		if (len < ETH_ZLEN)
       
  1810 			memset(tp->tx_buf[entry], 0, ETH_ZLEN);
       
  1811 		skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
       
  1812 		if (!tp->ecdev) dev_kfree_skb(skb);
       
  1813 	} else {
       
  1814 		if (!tp->ecdev) dev_kfree_skb(skb);
       
  1815 		tp->stats.tx_dropped++;
       
  1816 		return 0;
       
  1817 	}
       
  1818 
       
  1819 	if (tp->ecdev) {
       
  1820 		RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
       
  1821 				tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
       
  1822 
       
  1823 		dev->trans_start = jiffies;
       
  1824 
       
  1825 		tp->cur_tx++;
       
  1826 		wmb();
       
  1827 	}
       
  1828 	else {
       
  1829 		spin_lock_irqsave(&tp->lock, flags);
       
  1830 
       
  1831 		RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
       
  1832 				tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
       
  1833 
       
  1834 		dev->trans_start = jiffies;
       
  1835 
       
  1836 		tp->cur_tx++;
       
  1837 		wmb();
       
  1838 
       
  1839 		if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
       
  1840 			netif_stop_queue (dev);
       
  1841 		spin_unlock_irqrestore(&tp->lock, flags);
       
  1842 
       
  1843 		if (netif_msg_tx_queued(tp))
       
  1844 			printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n",
       
  1845 					dev->name, len, entry);
       
  1846 	}
       
  1847 
       
  1848 	return 0;
       
  1849 }
       
  1850 
       
  1851 
       
  1852 static void rtl8139_tx_interrupt (struct net_device *dev,
       
  1853 				  struct rtl8139_private *tp,
       
  1854 				  void __iomem *ioaddr)
       
  1855 {
       
  1856 	unsigned long dirty_tx, tx_left;
       
  1857 
       
  1858 	assert (dev != NULL);
       
  1859 	assert (ioaddr != NULL);
       
  1860 
       
  1861 	dirty_tx = tp->dirty_tx;
       
  1862 	tx_left = tp->cur_tx - dirty_tx;
       
  1863 	while (tx_left > 0) {
       
  1864 		int entry = dirty_tx % NUM_TX_DESC;
       
  1865 		int txstatus;
       
  1866 
       
  1867 		txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
       
  1868 
       
  1869 		if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
       
  1870 			break;	/* It still hasn't been Txed */
       
  1871 
       
  1872 		/* Note: TxCarrierLost is always asserted at 100mbps. */
       
  1873 		if (txstatus & (TxOutOfWindow | TxAborted)) {
       
  1874 			/* There was an major error, log it. */
       
  1875 			if (netif_msg_tx_err(tp))
       
  1876 				printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
       
  1877 					dev->name, txstatus);
       
  1878 			tp->stats.tx_errors++;
       
  1879 			if (txstatus & TxAborted) {
       
  1880 				tp->stats.tx_aborted_errors++;
       
  1881 				RTL_W32 (TxConfig, TxClearAbt);
       
  1882 				RTL_W16 (IntrStatus, TxErr);
       
  1883 				wmb();
       
  1884 			}
       
  1885 			if (txstatus & TxCarrierLost)
       
  1886 				tp->stats.tx_carrier_errors++;
       
  1887 			if (txstatus & TxOutOfWindow)
       
  1888 				tp->stats.tx_window_errors++;
       
  1889 		} else {
       
  1890 			if (txstatus & TxUnderrun) {
       
  1891 				/* Add 64 to the Tx FIFO threshold. */
       
  1892 				if (tp->tx_flag < 0x00300000)
       
  1893 					tp->tx_flag += 0x00020000;
       
  1894 				tp->stats.tx_fifo_errors++;
       
  1895 			}
       
  1896 			tp->stats.collisions += (txstatus >> 24) & 15;
       
  1897 			tp->stats.tx_bytes += txstatus & 0x7ff;
       
  1898 			tp->stats.tx_packets++;
       
  1899 		}
       
  1900 
       
  1901 		dirty_tx++;
       
  1902 		tx_left--;
       
  1903 	}
       
  1904 
       
  1905 #ifndef RTL8139_NDEBUG
       
  1906 	if (!tp->ecdev && tp->cur_tx - dirty_tx > NUM_TX_DESC) {
       
  1907 		printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n",
       
  1908 		        dev->name, dirty_tx, tp->cur_tx);
       
  1909 		dirty_tx += NUM_TX_DESC;
       
  1910 	}
       
  1911 #endif /* RTL8139_NDEBUG */
       
  1912 
       
  1913 	/* only wake the queue if we did work, and the queue is stopped */
       
  1914 	if (tp->dirty_tx != dirty_tx) {
       
  1915 		tp->dirty_tx = dirty_tx;
       
  1916 		mb();
       
  1917 		if (!tp->ecdev) netif_wake_queue (dev);
       
  1918 	}
       
  1919 }
       
  1920 
       
  1921 
       
  1922 /* TODO: clean this up!  Rx reset need not be this intensive */
       
  1923 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
       
  1924 			    struct rtl8139_private *tp, void __iomem *ioaddr)
       
  1925 {
       
  1926 	u8 tmp8;
       
  1927 #ifdef CONFIG_8139_OLD_RX_RESET
       
  1928 	int tmp_work;
       
  1929 #endif
       
  1930 
       
  1931 	if (netif_msg_rx_err (tp))
       
  1932 		printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n",
       
  1933 			dev->name, rx_status);
       
  1934 	tp->stats.rx_errors++;
       
  1935 	if (!(rx_status & RxStatusOK)) {
       
  1936 		if (rx_status & RxTooLong) {
       
  1937 			DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
       
  1938 			 	dev->name, rx_status);
       
  1939 			/* A.C.: The chip hangs here. */
       
  1940 		}
       
  1941 		if (rx_status & (RxBadSymbol | RxBadAlign))
       
  1942 			tp->stats.rx_frame_errors++;
       
  1943 		if (rx_status & (RxRunt | RxTooLong))
       
  1944 			tp->stats.rx_length_errors++;
       
  1945 		if (rx_status & RxCRCErr)
       
  1946 			tp->stats.rx_crc_errors++;
       
  1947 	} else {
       
  1948 		tp->xstats.rx_lost_in_ring++;
       
  1949 	}
       
  1950 
       
  1951 #ifndef CONFIG_8139_OLD_RX_RESET
       
  1952 	tmp8 = RTL_R8 (ChipCmd);
       
  1953 	RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
       
  1954 	RTL_W8 (ChipCmd, tmp8);
       
  1955 	RTL_W32 (RxConfig, tp->rx_config);
       
  1956 	tp->cur_rx = 0;
       
  1957 #else
       
  1958 	/* Reset the receiver, based on RealTek recommendation. (Bug?) */
       
  1959 
       
  1960 	/* disable receive */
       
  1961 	RTL_W8_F (ChipCmd, CmdTxEnb);
       
  1962 	tmp_work = 200;
       
  1963 	while (--tmp_work > 0) {
       
  1964 		udelay(1);
       
  1965 		tmp8 = RTL_R8 (ChipCmd);
       
  1966 		if (!(tmp8 & CmdRxEnb))
       
  1967 			break;
       
  1968 	}
       
  1969 	if (tmp_work <= 0)
       
  1970 		printk (KERN_WARNING PFX "rx stop wait too long\n");
       
  1971 	/* restart receive */
       
  1972 	tmp_work = 200;
       
  1973 	while (--tmp_work > 0) {
       
  1974 		RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1975 		udelay(1);
       
  1976 		tmp8 = RTL_R8 (ChipCmd);
       
  1977 		if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
       
  1978 			break;
       
  1979 	}
       
  1980 	if (tmp_work <= 0)
       
  1981 		printk (KERN_WARNING PFX "tx/rx enable wait too long\n");
       
  1982 
       
  1983 	/* and reinitialize all rx related registers */
       
  1984 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1985 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1986 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1987 
       
  1988 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1989 	RTL_W32 (RxConfig, tp->rx_config);
       
  1990 	tp->cur_rx = 0;
       
  1991 
       
  1992 	DPRINTK("init buffer addresses\n");
       
  1993 
       
  1994 	/* Lock Config[01234] and BMCR register writes */
       
  1995 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1996 
       
  1997 	/* init Rx ring buffer DMA address */
       
  1998 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1999 
       
  2000 	/* A.C.: Reset the multicast list. */
       
  2001 	__set_rx_mode (dev);
       
  2002 #endif
       
  2003 }
       
  2004 
       
  2005 #if RX_BUF_IDX == 3
       
  2006 static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
       
  2007 				 u32 offset, unsigned int size)
       
  2008 {
       
  2009 	u32 left = RX_BUF_LEN - offset;
       
  2010 
       
  2011 	if (size > left) {
       
  2012 		skb_copy_to_linear_data(skb, ring + offset, left);
       
  2013 		skb_copy_to_linear_data_offset(skb, left, ring, size - left);
       
  2014 	} else
       
  2015 		skb_copy_to_linear_data(skb, ring + offset, size);
       
  2016 }
       
  2017 #endif
       
  2018 
       
  2019 static void rtl8139_isr_ack(struct rtl8139_private *tp)
       
  2020 {
       
  2021 	void __iomem *ioaddr = tp->mmio_addr;
       
  2022 	u16 status;
       
  2023 
       
  2024 	status = RTL_R16 (IntrStatus) & RxAckBits;
       
  2025 
       
  2026 	/* Clear out errors and receive interrupts */
       
  2027 	if (likely(status != 0)) {
       
  2028 		if (unlikely(status & (RxFIFOOver | RxOverflow))) {
       
  2029 			tp->stats.rx_errors++;
       
  2030 			if (status & RxFIFOOver)
       
  2031 				tp->stats.rx_fifo_errors++;
       
  2032 		}
       
  2033 		RTL_W16_F (IntrStatus, RxAckBits);
       
  2034 	}
       
  2035 }
       
  2036 
       
  2037 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
       
  2038 		      int budget)
       
  2039 {
       
  2040 	void __iomem *ioaddr = tp->mmio_addr;
       
  2041 	int received = 0;
       
  2042 	unsigned char *rx_ring = tp->rx_ring;
       
  2043 	unsigned int cur_rx = tp->cur_rx;
       
  2044 	unsigned int rx_size = 0;
       
  2045 
       
  2046 	DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
       
  2047 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx,
       
  2048 		 RTL_R16 (RxBufAddr),
       
  2049 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
       
  2050 
       
  2051 	while ((tp->ecdev || netif_running(dev))
       
  2052 			&& received < budget
       
  2053 			&& (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
       
  2054 		u32 ring_offset = cur_rx % RX_BUF_LEN;
       
  2055 		u32 rx_status;
       
  2056 		unsigned int pkt_size;
       
  2057 		struct sk_buff *skb;
       
  2058 
       
  2059 		rmb();
       
  2060 
       
  2061 		/* read size+status of next frame from DMA ring buffer */
       
  2062 		rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset));
       
  2063 		rx_size = rx_status >> 16;
       
  2064 		pkt_size = rx_size - 4;
       
  2065 
       
  2066 		if (!tp->ecdev) {
       
  2067 			if (netif_msg_rx_status(tp))
       
  2068 				printk(KERN_DEBUG "%s:  rtl8139_rx() status %4.4x, size %4.4x,"
       
  2069 				       " cur %4.4x.\n", dev->name, rx_status,
       
  2070 				       rx_size, cur_rx);
       
  2071 		}
       
  2072 #if RTL8139_DEBUG > 2
       
  2073 		{
       
  2074 			int i;
       
  2075 			DPRINTK ("%s: Frame contents ", dev->name);
       
  2076 			for (i = 0; i < 70; i++)
       
  2077 				printk (" %2.2x",
       
  2078 					rx_ring[ring_offset + i]);
       
  2079 			printk (".\n");
       
  2080 		}
       
  2081 #endif
       
  2082 
       
  2083 		/* Packet copy from FIFO still in progress.
       
  2084 		 * Theoretically, this should never happen
       
  2085 		 * since EarlyRx is disabled.
       
  2086 		 */
       
  2087 		if (unlikely(rx_size == 0xfff0)) {
       
  2088 			if (!tp->fifo_copy_timeout)
       
  2089 				tp->fifo_copy_timeout = jiffies + 2;
       
  2090 			else if (time_after(jiffies, tp->fifo_copy_timeout)) {
       
  2091 				DPRINTK ("%s: hung FIFO. Reset.", dev->name);
       
  2092 				rx_size = 0;
       
  2093 				goto no_early_rx;
       
  2094 			}
       
  2095 			if (netif_msg_intr(tp)) {
       
  2096 				printk(KERN_DEBUG "%s: fifo copy in progress.",
       
  2097 				       dev->name);
       
  2098 			}
       
  2099 			tp->xstats.early_rx++;
       
  2100 			break;
       
  2101 		}
       
  2102 
       
  2103 no_early_rx:
       
  2104 		tp->fifo_copy_timeout = 0;
       
  2105 
       
  2106 		/* If Rx err or invalid rx_size/rx_status received
       
  2107 		 * (which happens if we get lost in the ring),
       
  2108 		 * Rx process gets reset, so we abort any further
       
  2109 		 * Rx processing.
       
  2110 		 */
       
  2111 		if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
       
  2112 			     (rx_size < 8) ||
       
  2113 			     (!(rx_status & RxStatusOK)))) {
       
  2114 			rtl8139_rx_err (rx_status, dev, tp, ioaddr);
       
  2115 			received = -1;
       
  2116 			goto out;
       
  2117 		}
       
  2118 
       
  2119       		if (tp->ecdev) {
       
  2120  			ecdev_receive(tp->ecdev,
       
  2121  					&rx_ring[ring_offset + 4], pkt_size);
       
  2122  			dev->last_rx = jiffies;
       
  2123  			tp->stats.rx_bytes += pkt_size;
       
  2124  			tp->stats.rx_packets++;
       
  2125  		}
       
  2126  		else {
       
  2127 
       
  2128 		  /* Malloc up new buffer, compatible with net-2e. */
       
  2129 		  /* Omit the four octet CRC from the length. */
       
  2130 
       
  2131 		  skb = dev_alloc_skb (pkt_size + 2);
       
  2132 		  if (likely(skb)) {
       
  2133 		    skb_reserve (skb, 2);	/* 16 byte align the IP fields. */
       
  2134 #if RX_BUF_IDX == 3
       
  2135 		    wrap_copy(skb, rx_ring, ring_offset+4, pkt_size);
       
  2136 #else
       
  2137 		    eth_copy_and_sum (skb, &rx_ring[ring_offset + 4], pkt_size, 0);
       
  2138 #endif
       
  2139 		    skb_put (skb, pkt_size);
       
  2140 
       
  2141 		    skb->protocol = eth_type_trans (skb, dev);
       
  2142 
       
  2143 		    dev->last_rx = jiffies;
       
  2144 		    tp->stats.rx_bytes += pkt_size;
       
  2145 		    tp->stats.rx_packets++;
       
  2146 
       
  2147 		    netif_receive_skb (skb);
       
  2148 		  } else {
       
  2149 		    if (net_ratelimit())
       
  2150 		      printk (KERN_WARNING
       
  2151 			      "%s: Memory squeeze, dropping packet.\n",
       
  2152 			      dev->name);
       
  2153 		    tp->stats.rx_dropped++;
       
  2154 		  }
       
  2155 		}
       
  2156 		received++;
       
  2157 
       
  2158 		cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
       
  2159 		RTL_W16 (RxBufPtr, (u16) (cur_rx - 16));
       
  2160 
       
  2161 		rtl8139_isr_ack(tp);
       
  2162 	}
       
  2163 
       
  2164 	if (unlikely(!received || rx_size == 0xfff0))
       
  2165 		rtl8139_isr_ack(tp);
       
  2166 
       
  2167 #if RTL8139_DEBUG > 1
       
  2168 	DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
       
  2169 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
       
  2170 		 RTL_R16 (RxBufAddr),
       
  2171 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
       
  2172 #endif
       
  2173 
       
  2174 	tp->cur_rx = cur_rx;
       
  2175 
       
  2176 	/*
       
  2177 	 * The receive buffer should be mostly empty.
       
  2178 	 * Tell NAPI to reenable the Rx irq.
       
  2179 	 */
       
  2180 	if (tp->fifo_copy_timeout)
       
  2181 		received = budget;
       
  2182 
       
  2183 out:
       
  2184 	return received;
       
  2185 }
       
  2186 
       
  2187 
       
  2188 static void rtl8139_weird_interrupt (struct net_device *dev,
       
  2189 				     struct rtl8139_private *tp,
       
  2190 				     void __iomem *ioaddr,
       
  2191 				     int status, int link_changed)
       
  2192 {
       
  2193 	DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n",
       
  2194 		 dev->name, status);
       
  2195 
       
  2196 	assert (dev != NULL);
       
  2197 	assert (tp != NULL);
       
  2198 	assert (ioaddr != NULL);
       
  2199 
       
  2200 	/* Update the error count. */
       
  2201 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2202 	RTL_W32 (RxMissed, 0);
       
  2203 
       
  2204 	if ((status & RxUnderrun) && link_changed &&
       
  2205 	    (tp->drv_flags & HAS_LNK_CHNG)) {
       
  2206 		rtl_check_media(dev, 0);
       
  2207 		status &= ~RxUnderrun;
       
  2208 	}
       
  2209 
       
  2210 	if (status & (RxUnderrun | RxErr))
       
  2211 		tp->stats.rx_errors++;
       
  2212 
       
  2213 	if (status & PCSTimeout)
       
  2214 		tp->stats.rx_length_errors++;
       
  2215 	if (status & RxUnderrun)
       
  2216 		tp->stats.rx_fifo_errors++;
       
  2217 	if (status & PCIErr) {
       
  2218 		u16 pci_cmd_status;
       
  2219 		pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
       
  2220 		pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
       
  2221 
       
  2222 		printk (KERN_ERR "%s: PCI Bus error %4.4x.\n",
       
  2223 			dev->name, pci_cmd_status);
       
  2224 	}
       
  2225 }
       
  2226 
       
  2227 static int rtl8139_poll(struct net_device *dev, int *budget)
       
  2228 {
       
  2229 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2230 	void __iomem *ioaddr = tp->mmio_addr;
       
  2231 	int orig_budget = min(*budget, dev->quota);
       
  2232 	int done = 1;
       
  2233 
       
  2234 	spin_lock(&tp->rx_lock);
       
  2235 	if (likely(RTL_R16(IntrStatus) & RxAckBits)) {
       
  2236 		int work_done;
       
  2237 
       
  2238 		work_done = rtl8139_rx(dev, tp, orig_budget);
       
  2239 		if (likely(work_done > 0)) {
       
  2240 			*budget -= work_done;
       
  2241 			dev->quota -= work_done;
       
  2242 			done = (work_done < orig_budget);
       
  2243 		}
       
  2244 	}
       
  2245 
       
  2246 	if (done) {
       
  2247 		unsigned long flags;
       
  2248 		/*
       
  2249 		 * Order is important since data can get interrupted
       
  2250 		 * again when we think we are done.
       
  2251 		 */
       
  2252 		local_irq_save(flags);
       
  2253 		RTL_W16_F(IntrMask, rtl8139_intr_mask);
       
  2254 		__netif_rx_complete(dev);
       
  2255 		local_irq_restore(flags);
       
  2256 	}
       
  2257 	spin_unlock(&tp->rx_lock);
       
  2258 
       
  2259 	return !done;
       
  2260 }
       
  2261 
       
  2262 void ec_poll(struct net_device *dev)
       
  2263 {
       
  2264     rtl8139_interrupt(0, dev);
       
  2265 }
       
  2266 
       
  2267 /* The interrupt handler does all of the Rx thread work and cleans up
       
  2268    after the Tx thread. */
       
  2269 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance)
       
  2270 {
       
  2271 	struct net_device *dev = (struct net_device *) dev_instance;
       
  2272 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2273 	void __iomem *ioaddr = tp->mmio_addr;
       
  2274 	u16 status, ackstat;
       
  2275 	int link_changed = 0; /* avoid bogus "uninit" warning */
       
  2276 	int handled = 0;
       
  2277 
       
  2278 	if (tp->ecdev) {
       
  2279 		status = RTL_R16 (IntrStatus);
       
  2280 	}
       
  2281 	else {
       
  2282 		spin_lock (&tp->lock);
       
  2283 		status = RTL_R16 (IntrStatus);
       
  2284 
       
  2285 		/* shared irq? */
       
  2286 		if (unlikely((status & rtl8139_intr_mask) == 0))
       
  2287 			goto out;
       
  2288 	}
       
  2289 
       
  2290 	handled = 1;
       
  2291 
       
  2292 	/* h/w no longer present (hotplug?) or major error, bail */
       
  2293 	if (unlikely(status == 0xFFFF))
       
  2294 		goto out;
       
  2295 
       
  2296 	if (!tp->ecdev) {
       
  2297 		/* close possible race's with dev_close */
       
  2298 		if (unlikely(!netif_running(dev))) {
       
  2299 			RTL_W16 (IntrMask, 0);
       
  2300 			goto out;
       
  2301 		}
       
  2302 	}
       
  2303 
       
  2304 	/* Acknowledge all of the current interrupt sources ASAP, but
       
  2305 	   an first get an additional status bit from CSCR. */
       
  2306 	if (unlikely(status & RxUnderrun))
       
  2307 		link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
       
  2308 
       
  2309 	ackstat = status & ~(RxAckBits | TxErr);
       
  2310 	if (ackstat)
       
  2311 		RTL_W16 (IntrStatus, ackstat);
       
  2312 
       
  2313 	/* Receive packets are processed by poll routine.
       
  2314 	   If not running start it now. */
       
  2315 	if (status & RxAckBits){
       
  2316 		if (tp->ecdev) {
       
  2317 			/* EtherCAT device: Just receive all frames */
       
  2318 			rtl8139_rx(dev, tp, 100); // FIXME
       
  2319 		}
       
  2320 		else {
       
  2321 			/* Mark for polling */
       
  2322 			if (netif_rx_schedule_prep(dev)) {
       
  2323 				RTL_W16_F (IntrMask, rtl8139_norx_intr_mask);
       
  2324 				__netif_rx_schedule (dev);
       
  2325 			}
       
  2326 		}
       
  2327 	}
       
  2328 
       
  2329 	/* Check uncommon events with one test. */
       
  2330 	if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr)))
       
  2331 		rtl8139_weird_interrupt (dev, tp, ioaddr,
       
  2332 					 status, link_changed);
       
  2333 
       
  2334 	if (status & (TxOK | TxErr)) {
       
  2335 		rtl8139_tx_interrupt (dev, tp, ioaddr);
       
  2336 		if (status & TxErr)
       
  2337 			RTL_W16 (IntrStatus, TxErr);
       
  2338 	}
       
  2339  out:
       
  2340 	if (!tp->ecdev) spin_unlock (&tp->lock);
       
  2341 
       
  2342 	DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n",
       
  2343 		 dev->name, RTL_R16 (IntrStatus));
       
  2344 	return IRQ_RETVAL(handled);
       
  2345 }
       
  2346 
       
  2347 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  2348 /*
       
  2349  * Polling receive - used by netconsole and other diagnostic tools
       
  2350  * to allow network i/o with interrupts disabled.
       
  2351  */
       
  2352 static void rtl8139_poll_controller(struct net_device *dev)
       
  2353 {
       
  2354 	disable_irq(dev->irq);
       
  2355 	rtl8139_interrupt(dev->irq, dev);
       
  2356 	enable_irq(dev->irq);
       
  2357 }
       
  2358 #endif
       
  2359 
       
  2360 static int rtl8139_close (struct net_device *dev)
       
  2361 {
       
  2362 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2363 	void __iomem *ioaddr = tp->mmio_addr;
       
  2364 	unsigned long flags;
       
  2365 
       
  2366 	if (tp->ecdev) {
       
  2367 		/* Stop the chip's Tx and Rx DMA processes. */
       
  2368 		RTL_W8 (ChipCmd, 0);
       
  2369 
       
  2370 		/* Disable interrupts by clearing the interrupt mask. */
       
  2371 		RTL_W16 (IntrMask, 0);
       
  2372 
       
  2373 		/* Update the error counts. */
       
  2374 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2375 		RTL_W32 (RxMissed, 0);
       
  2376 	} else {
       
  2377 		netif_stop_queue (dev);
       
  2378 
       
  2379 		if (netif_msg_ifdown(tp))
       
  2380 			printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n",
       
  2381 			       dev->name, RTL_R16 (IntrStatus));
       
  2382 
       
  2383 		spin_lock_irqsave (&tp->lock, flags);
       
  2384 
       
  2385 		/* Stop the chip's Tx and Rx DMA processes. */
       
  2386 		RTL_W8 (ChipCmd, 0);
       
  2387 
       
  2388 		/* Disable interrupts by clearing the interrupt mask. */
       
  2389 		RTL_W16 (IntrMask, 0);
       
  2390 
       
  2391 		/* Update the error counts. */
       
  2392 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2393 		RTL_W32 (RxMissed, 0);
       
  2394 
       
  2395 		spin_unlock_irqrestore (&tp->lock, flags);
       
  2396 
       
  2397 		synchronize_irq (dev->irq);	/* racy, but that's ok here */
       
  2398 		free_irq (dev->irq, dev);
       
  2399 	}
       
  2400 
       
  2401 	rtl8139_tx_clear (tp);
       
  2402 
       
  2403 	pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  2404 			    tp->rx_ring, tp->rx_ring_dma);
       
  2405 	pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  2406 			    tp->tx_bufs, tp->tx_bufs_dma);
       
  2407 	tp->rx_ring = NULL;
       
  2408 	tp->tx_bufs = NULL;
       
  2409 
       
  2410 	/* Green! Put the chip in low-power mode. */
       
  2411 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2412 
       
  2413 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  2414 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  2415 
       
  2416 	return 0;
       
  2417 }
       
  2418 
       
  2419 
       
  2420 /* Get the ethtool Wake-on-LAN settings.  Assumes that wol points to
       
  2421    kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
       
  2422    other threads or interrupts aren't messing with the 8139.  */
       
  2423 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2424 {
       
  2425 	struct rtl8139_private *np = netdev_priv(dev);
       
  2426 	void __iomem *ioaddr = np->mmio_addr;
       
  2427 
       
  2428 	spin_lock_irq(&np->lock);
       
  2429 	if (rtl_chip_info[np->chipset].flags & HasLWake) {
       
  2430 		u8 cfg3 = RTL_R8 (Config3);
       
  2431 		u8 cfg5 = RTL_R8 (Config5);
       
  2432 
       
  2433 		wol->supported = WAKE_PHY | WAKE_MAGIC
       
  2434 			| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
       
  2435 
       
  2436 		wol->wolopts = 0;
       
  2437 		if (cfg3 & Cfg3_LinkUp)
       
  2438 			wol->wolopts |= WAKE_PHY;
       
  2439 		if (cfg3 & Cfg3_Magic)
       
  2440 			wol->wolopts |= WAKE_MAGIC;
       
  2441 		/* (KON)FIXME: See how netdev_set_wol() handles the
       
  2442 		   following constants.  */
       
  2443 		if (cfg5 & Cfg5_UWF)
       
  2444 			wol->wolopts |= WAKE_UCAST;
       
  2445 		if (cfg5 & Cfg5_MWF)
       
  2446 			wol->wolopts |= WAKE_MCAST;
       
  2447 		if (cfg5 & Cfg5_BWF)
       
  2448 			wol->wolopts |= WAKE_BCAST;
       
  2449 	}
       
  2450 	spin_unlock_irq(&np->lock);
       
  2451 }
       
  2452 
       
  2453 
       
  2454 /* Set the ethtool Wake-on-LAN settings.  Return 0 or -errno.  Assumes
       
  2455    that wol points to kernel memory and other threads or interrupts
       
  2456    aren't messing with the 8139.  */
       
  2457 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2458 {
       
  2459 	struct rtl8139_private *np = netdev_priv(dev);
       
  2460 	void __iomem *ioaddr = np->mmio_addr;
       
  2461 	u32 support;
       
  2462 	u8 cfg3, cfg5;
       
  2463 
       
  2464 	support = ((rtl_chip_info[np->chipset].flags & HasLWake)
       
  2465 		   ? (WAKE_PHY | WAKE_MAGIC
       
  2466 		      | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
       
  2467 		   : 0);
       
  2468 	if (wol->wolopts & ~support)
       
  2469 		return -EINVAL;
       
  2470 
       
  2471 	spin_lock_irq(&np->lock);
       
  2472 	cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
       
  2473 	if (wol->wolopts & WAKE_PHY)
       
  2474 		cfg3 |= Cfg3_LinkUp;
       
  2475 	if (wol->wolopts & WAKE_MAGIC)
       
  2476 		cfg3 |= Cfg3_Magic;
       
  2477 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2478 	RTL_W8 (Config3, cfg3);
       
  2479 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  2480 
       
  2481 	cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
       
  2482 	/* (KON)FIXME: These are untested.  We may have to set the
       
  2483 	   CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
       
  2484 	   documentation.  */
       
  2485 	if (wol->wolopts & WAKE_UCAST)
       
  2486 		cfg5 |= Cfg5_UWF;
       
  2487 	if (wol->wolopts & WAKE_MCAST)
       
  2488 		cfg5 |= Cfg5_MWF;
       
  2489 	if (wol->wolopts & WAKE_BCAST)
       
  2490 		cfg5 |= Cfg5_BWF;
       
  2491 	RTL_W8 (Config5, cfg5);	/* need not unlock via Cfg9346 */
       
  2492 	spin_unlock_irq(&np->lock);
       
  2493 
       
  2494 	return 0;
       
  2495 }
       
  2496 
       
  2497 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
       
  2498 {
       
  2499 	struct rtl8139_private *np = netdev_priv(dev);
       
  2500 	strcpy(info->driver, DRV_NAME);
       
  2501 	strcpy(info->version, DRV_VERSION);
       
  2502 	strcpy(info->bus_info, pci_name(np->pci_dev));
       
  2503 	info->regdump_len = np->regs_len;
       
  2504 }
       
  2505 
       
  2506 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2507 {
       
  2508 	struct rtl8139_private *np = netdev_priv(dev);
       
  2509 	spin_lock_irq(&np->lock);
       
  2510 	mii_ethtool_gset(&np->mii, cmd);
       
  2511 	spin_unlock_irq(&np->lock);
       
  2512 	return 0;
       
  2513 }
       
  2514 
       
  2515 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2516 {
       
  2517 	struct rtl8139_private *np = netdev_priv(dev);
       
  2518 	int rc;
       
  2519 	spin_lock_irq(&np->lock);
       
  2520 	rc = mii_ethtool_sset(&np->mii, cmd);
       
  2521 	spin_unlock_irq(&np->lock);
       
  2522 	return rc;
       
  2523 }
       
  2524 
       
  2525 static int rtl8139_nway_reset(struct net_device *dev)
       
  2526 {
       
  2527 	struct rtl8139_private *np = netdev_priv(dev);
       
  2528 	return mii_nway_restart(&np->mii);
       
  2529 }
       
  2530 
       
  2531 static u32 rtl8139_get_link(struct net_device *dev)
       
  2532 {
       
  2533 	struct rtl8139_private *np = netdev_priv(dev);
       
  2534 	return mii_link_ok(&np->mii);
       
  2535 }
       
  2536 
       
  2537 static u32 rtl8139_get_msglevel(struct net_device *dev)
       
  2538 {
       
  2539 	struct rtl8139_private *np = netdev_priv(dev);
       
  2540 	return np->msg_enable;
       
  2541 }
       
  2542 
       
  2543 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
       
  2544 {
       
  2545 	struct rtl8139_private *np = netdev_priv(dev);
       
  2546 	np->msg_enable = datum;
       
  2547 }
       
  2548 
       
  2549 /* TODO: we are too slack to do reg dumping for pio, for now */
       
  2550 #ifdef CONFIG_8139TOO_PIO
       
  2551 #define rtl8139_get_regs_len	NULL
       
  2552 #define rtl8139_get_regs	NULL
       
  2553 #else
       
  2554 static int rtl8139_get_regs_len(struct net_device *dev)
       
  2555 {
       
  2556 	struct rtl8139_private *np = netdev_priv(dev);
       
  2557 	return np->regs_len;
       
  2558 }
       
  2559 
       
  2560 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
       
  2561 {
       
  2562 	struct rtl8139_private *np = netdev_priv(dev);
       
  2563 
       
  2564 	regs->version = RTL_REGS_VER;
       
  2565 
       
  2566 	spin_lock_irq(&np->lock);
       
  2567 	memcpy_fromio(regbuf, np->mmio_addr, regs->len);
       
  2568 	spin_unlock_irq(&np->lock);
       
  2569 }
       
  2570 #endif /* CONFIG_8139TOO_MMIO */
       
  2571 
       
  2572 static int rtl8139_get_stats_count(struct net_device *dev)
       
  2573 {
       
  2574 	return RTL_NUM_STATS;
       
  2575 }
       
  2576 
       
  2577 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
       
  2578 {
       
  2579 	struct rtl8139_private *np = netdev_priv(dev);
       
  2580 
       
  2581 	data[0] = np->xstats.early_rx;
       
  2582 	data[1] = np->xstats.tx_buf_mapped;
       
  2583 	data[2] = np->xstats.tx_timeouts;
       
  2584 	data[3] = np->xstats.rx_lost_in_ring;
       
  2585 }
       
  2586 
       
  2587 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
       
  2588 {
       
  2589 	memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
       
  2590 }
       
  2591 
       
  2592 static const struct ethtool_ops rtl8139_ethtool_ops = {
       
  2593 	.get_drvinfo		= rtl8139_get_drvinfo,
       
  2594 	.get_settings		= rtl8139_get_settings,
       
  2595 	.set_settings		= rtl8139_set_settings,
       
  2596 	.get_regs_len		= rtl8139_get_regs_len,
       
  2597 	.get_regs		= rtl8139_get_regs,
       
  2598 	.nway_reset		= rtl8139_nway_reset,
       
  2599 	.get_link		= rtl8139_get_link,
       
  2600 	.get_msglevel		= rtl8139_get_msglevel,
       
  2601 	.set_msglevel		= rtl8139_set_msglevel,
       
  2602 	.get_wol		= rtl8139_get_wol,
       
  2603 	.set_wol		= rtl8139_set_wol,
       
  2604 	.get_strings		= rtl8139_get_strings,
       
  2605 	.get_stats_count	= rtl8139_get_stats_count,
       
  2606 	.get_ethtool_stats	= rtl8139_get_ethtool_stats,
       
  2607 	.get_perm_addr		= ethtool_op_get_perm_addr,
       
  2608 };
       
  2609 
       
  2610 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
       
  2611 {
       
  2612 	struct rtl8139_private *np = netdev_priv(dev);
       
  2613 	int rc;
       
  2614 
       
  2615 	if (np->ecdev || !netif_running(dev))
       
  2616 		return -EINVAL;
       
  2617 
       
  2618 	spin_lock_irq(&np->lock);
       
  2619 	rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL);
       
  2620 	spin_unlock_irq(&np->lock);
       
  2621 
       
  2622 	return rc;
       
  2623 }
       
  2624 
       
  2625 
       
  2626 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev)
       
  2627 {
       
  2628 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2629 	void __iomem *ioaddr = tp->mmio_addr;
       
  2630 	unsigned long flags;
       
  2631 
       
  2632 	if (tp->ecdev || netif_running(dev)) {
       
  2633 		spin_lock_irqsave (&tp->lock, flags);
       
  2634 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2635 		RTL_W32 (RxMissed, 0);
       
  2636 		spin_unlock_irqrestore (&tp->lock, flags);
       
  2637 	}
       
  2638 
       
  2639 	return &tp->stats;
       
  2640 }
       
  2641 
       
  2642 /* Set or clear the multicast filter for this adaptor.
       
  2643    This routine is not state sensitive and need not be SMP locked. */
       
  2644 
       
  2645 static void __set_rx_mode (struct net_device *dev)
       
  2646 {
       
  2647 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2648 	void __iomem *ioaddr = tp->mmio_addr;
       
  2649 	u32 mc_filter[2];	/* Multicast hash filter */
       
  2650 	int i, rx_mode;
       
  2651 	u32 tmp;
       
  2652 
       
  2653 	DPRINTK ("%s:   rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
       
  2654 			dev->name, dev->flags, RTL_R32 (RxConfig));
       
  2655 
       
  2656 	/* Note: do not reorder, GCC is clever about common statements. */
       
  2657 	if (dev->flags & IFF_PROMISC) {
       
  2658 		rx_mode =
       
  2659 		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
       
  2660 		    AcceptAllPhys;
       
  2661 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2662 	} else if ((dev->mc_count > multicast_filter_limit)
       
  2663 		   || (dev->flags & IFF_ALLMULTI)) {
       
  2664 		/* Too many to filter perfectly -- accept all multicasts. */
       
  2665 		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
       
  2666 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2667 	} else {
       
  2668 		struct dev_mc_list *mclist;
       
  2669 		rx_mode = AcceptBroadcast | AcceptMyPhys;
       
  2670 		mc_filter[1] = mc_filter[0] = 0;
       
  2671 		for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
       
  2672 		     i++, mclist = mclist->next) {
       
  2673 			int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
       
  2674 
       
  2675 			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
       
  2676 			rx_mode |= AcceptMulticast;
       
  2677 		}
       
  2678 	}
       
  2679 
       
  2680 	/* We can safely update without stopping the chip. */
       
  2681 	tmp = rtl8139_rx_config | rx_mode;
       
  2682 	if (tp->rx_config != tmp) {
       
  2683 		RTL_W32_F (RxConfig, tmp);
       
  2684 		tp->rx_config = tmp;
       
  2685 	}
       
  2686 	RTL_W32_F (MAR0 + 0, mc_filter[0]);
       
  2687 	RTL_W32_F (MAR0 + 4, mc_filter[1]);
       
  2688 }
       
  2689 
       
  2690 static void rtl8139_set_rx_mode (struct net_device *dev)
       
  2691 {
       
  2692 	unsigned long flags;
       
  2693 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2694 
       
  2695 	spin_lock_irqsave (&tp->lock, flags);
       
  2696 	__set_rx_mode(dev);
       
  2697 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2698 }
       
  2699 
       
  2700 #ifdef CONFIG_PM
       
  2701 
       
  2702 static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state)
       
  2703 {
       
  2704 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2705 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2706 	void __iomem *ioaddr = tp->mmio_addr;
       
  2707 	unsigned long flags;
       
  2708 
       
  2709 	pci_save_state (pdev);
       
  2710 
       
  2711 	if (tp->ecdev || !netif_running (dev))
       
  2712 		return 0;
       
  2713 
       
  2714 	netif_device_detach (dev);
       
  2715 
       
  2716 	spin_lock_irqsave (&tp->lock, flags);
       
  2717 
       
  2718 	/* Disable interrupts, stop Tx and Rx. */
       
  2719 	RTL_W16 (IntrMask, 0);
       
  2720 	RTL_W8 (ChipCmd, 0);
       
  2721 
       
  2722 	/* Update the error counts. */
       
  2723 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2724 	RTL_W32 (RxMissed, 0);
       
  2725 
       
  2726 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2727 
       
  2728 	pci_set_power_state (pdev, PCI_D3hot);
       
  2729 
       
  2730 	return 0;
       
  2731 }
       
  2732 
       
  2733 
       
  2734 static int rtl8139_resume (struct pci_dev *pdev)
       
  2735 {
       
  2736 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2737 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2738 
       
  2739 	pci_restore_state (pdev);
       
  2740 	if (tp->ecdev || !netif_running (dev))
       
  2741 		return 0;
       
  2742 	pci_set_power_state (pdev, PCI_D0);
       
  2743 	rtl8139_init_ring (dev);
       
  2744 	rtl8139_hw_start (dev);
       
  2745 	netif_device_attach (dev);
       
  2746 	return 0;
       
  2747 }
       
  2748 
       
  2749 #endif /* CONFIG_PM */
       
  2750 
       
  2751 
       
  2752 static struct pci_driver rtl8139_pci_driver = {
       
  2753 	.name		= DRV_NAME,
       
  2754 	.id_table	= rtl8139_pci_tbl,
       
  2755 	.probe		= rtl8139_init_one,
       
  2756 	.remove		= __devexit_p(rtl8139_remove_one),
       
  2757 #ifdef CONFIG_PM
       
  2758 	.suspend	= rtl8139_suspend,
       
  2759 	.resume		= rtl8139_resume,
       
  2760 #endif /* CONFIG_PM */
       
  2761 };
       
  2762 
       
  2763 
       
  2764 static int __init rtl8139_init_module (void)
       
  2765 {
       
  2766 	/* when we're a module, we always print a version message,
       
  2767 	 * even if no 8139 board is found.
       
  2768 	 */
       
  2769 #ifdef MODULE
       
  2770 	printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
       
  2771 #endif
       
  2772 
       
  2773 	return pci_register_driver(&rtl8139_pci_driver);
       
  2774 }
       
  2775 
       
  2776 
       
  2777 static void __exit rtl8139_cleanup_module (void)
       
  2778 {
       
  2779 	pci_unregister_driver (&rtl8139_pci_driver);
       
  2780 }
       
  2781 
       
  2782 
       
  2783 module_init(rtl8139_init_module);
       
  2784 module_exit(rtl8139_cleanup_module);