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1 /******************************************************************************* |
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2 |
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3 Intel PRO/1000 Linux driver |
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4 Copyright(c) 1999 - 2011 Intel Corporation. |
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5 |
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6 This program is free software; you can redistribute it and/or modify it |
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7 under the terms and conditions of the GNU General Public License, |
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8 version 2, as published by the Free Software Foundation. |
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9 |
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10 This program is distributed in the hope it will be useful, but WITHOUT |
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11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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13 more details. |
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14 |
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15 You should have received a copy of the GNU General Public License along with |
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16 this program; if not, write to the Free Software Foundation, Inc., |
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17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
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18 |
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19 The full GNU General Public License is included in this distribution in |
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20 the file called "COPYING". |
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21 |
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22 Contact Information: |
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23 Linux NICS <linux.nics@intel.com> |
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24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
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25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
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26 |
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27 *******************************************************************************/ |
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28 |
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29 /* Linux PRO/1000 Ethernet Driver main header file */ |
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30 |
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31 #ifndef _E1000_H_ |
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32 #define _E1000_H_ |
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33 |
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34 #include <linux/bitops.h> |
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35 #include <linux/types.h> |
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36 #include <linux/timer.h> |
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37 #include <linux/workqueue.h> |
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38 #include <linux/io.h> |
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39 #include <linux/netdevice.h> |
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40 #include <linux/pci.h> |
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41 #include <linux/pci-aspm.h> |
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42 #include <linux/crc32.h> |
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43 #include <linux/if_vlan.h> |
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44 |
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45 #include "hw-3.2-ethercat.h" |
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46 |
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47 /* EtherCAT header file */ |
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48 #include "../ecdev.h" |
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49 |
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50 struct e1000_info; |
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51 |
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52 #define e_dbg(format, arg...) \ |
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53 netdev_dbg(hw->adapter->netdev, format, ## arg) |
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54 #define e_err(format, arg...) \ |
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55 netdev_err(adapter->netdev, format, ## arg) |
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56 #define e_info(format, arg...) \ |
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57 netdev_info(adapter->netdev, format, ## arg) |
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58 #define e_warn(format, arg...) \ |
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59 netdev_warn(adapter->netdev, format, ## arg) |
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60 #define e_notice(format, arg...) \ |
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61 netdev_notice(adapter->netdev, format, ## arg) |
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62 |
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63 |
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64 /* Interrupt modes, as used by the IntMode parameter */ |
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65 #define E1000E_INT_MODE_LEGACY 0 |
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66 #define E1000E_INT_MODE_MSI 1 |
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67 #define E1000E_INT_MODE_MSIX 2 |
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68 |
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69 /* Tx/Rx descriptor defines */ |
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70 #define E1000_DEFAULT_TXD 256 |
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71 #define E1000_MAX_TXD 4096 |
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72 #define E1000_MIN_TXD 64 |
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73 |
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74 #define E1000_DEFAULT_RXD 256 |
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75 #define E1000_MAX_RXD 4096 |
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76 #define E1000_MIN_RXD 64 |
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77 |
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78 #define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */ |
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79 #define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */ |
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80 |
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81 /* Early Receive defines */ |
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82 #define E1000_ERT_2048 0x100 |
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83 |
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84 #define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */ |
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85 |
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86 /* How many Tx Descriptors do we need to call netif_wake_queue ? */ |
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87 /* How many Rx Buffers do we bundle into one write to the hardware ? */ |
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88 #define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */ |
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89 |
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90 #define AUTO_ALL_MODES 0 |
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91 #define E1000_EEPROM_APME 0x0400 |
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92 |
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93 #define E1000_MNG_VLAN_NONE (-1) |
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94 |
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95 /* Number of packet split data buffers (not including the header buffer) */ |
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96 #define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1) |
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97 |
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98 #define DEFAULT_JUMBO 9234 |
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99 |
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100 /* BM/HV Specific Registers */ |
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101 #define BM_PORT_CTRL_PAGE 769 |
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102 |
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103 #define PHY_UPPER_SHIFT 21 |
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104 #define BM_PHY_REG(page, reg) \ |
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105 (((reg) & MAX_PHY_REG_ADDRESS) |\ |
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106 (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\ |
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107 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT))) |
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108 |
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109 /* PHY Wakeup Registers and defines */ |
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110 #define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17) |
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111 #define BM_RCTL PHY_REG(BM_WUC_PAGE, 0) |
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112 #define BM_WUC PHY_REG(BM_WUC_PAGE, 1) |
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113 #define BM_WUFC PHY_REG(BM_WUC_PAGE, 2) |
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114 #define BM_WUS PHY_REG(BM_WUC_PAGE, 3) |
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115 #define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2))) |
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116 #define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2))) |
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117 #define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2))) |
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118 #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2))) |
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119 #define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1))) |
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120 |
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121 #define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */ |
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122 #define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */ |
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123 #define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */ |
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124 #define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */ |
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125 #define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */ |
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126 #define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */ |
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127 #define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */ |
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128 |
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129 #define HV_STATS_PAGE 778 |
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130 #define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision Count */ |
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131 #define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17) |
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132 #define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. Count */ |
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133 #define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19) |
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134 #define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Coll. Count */ |
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135 #define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21) |
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136 #define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision Count */ |
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137 #define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24) |
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138 #define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision Count */ |
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139 #define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26) |
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140 #define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */ |
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141 #define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28) |
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142 #define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Transmit with no CRS */ |
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143 #define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30) |
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144 |
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145 #define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */ |
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146 |
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147 /* BM PHY Copper Specific Status */ |
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148 #define BM_CS_STATUS 17 |
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149 #define BM_CS_STATUS_LINK_UP 0x0400 |
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150 #define BM_CS_STATUS_RESOLVED 0x0800 |
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151 #define BM_CS_STATUS_SPEED_MASK 0xC000 |
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152 #define BM_CS_STATUS_SPEED_1000 0x8000 |
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153 |
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154 /* 82577 Mobile Phy Status Register */ |
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155 #define HV_M_STATUS 26 |
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156 #define HV_M_STATUS_AUTONEG_COMPLETE 0x1000 |
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157 #define HV_M_STATUS_SPEED_MASK 0x0300 |
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158 #define HV_M_STATUS_SPEED_1000 0x0200 |
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159 #define HV_M_STATUS_LINK_UP 0x0040 |
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160 |
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161 #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */ |
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162 #define E1000_ICH_FWSM_PCIM2PCI_COUNT 2000 |
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163 |
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164 /* Time to wait before putting the device into D3 if there's no link (in ms). */ |
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165 #define LINK_TIMEOUT 100 |
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166 |
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167 #define DEFAULT_RDTR 0 |
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168 #define DEFAULT_RADV 8 |
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169 #define BURST_RDTR 0x20 |
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170 #define BURST_RADV 0x20 |
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171 |
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172 /* |
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173 * in the case of WTHRESH, it appears at least the 82571/2 hardware |
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174 * writes back 4 descriptors when WTHRESH=5, and 3 descriptors when |
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175 * WTHRESH=4, and since we want 64 bytes at a time written back, set |
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176 * it to 5 |
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177 */ |
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178 #define E1000_TXDCTL_DMA_BURST_ENABLE \ |
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179 (E1000_TXDCTL_GRAN | /* set descriptor granularity */ \ |
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180 E1000_TXDCTL_COUNT_DESC | \ |
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181 (5 << 16) | /* wthresh must be +1 more than desired */\ |
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182 (1 << 8) | /* hthresh */ \ |
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183 0x1f) /* pthresh */ |
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184 |
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185 #define E1000_RXDCTL_DMA_BURST_ENABLE \ |
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186 (0x01000000 | /* set descriptor granularity */ \ |
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187 (4 << 16) | /* set writeback threshold */ \ |
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188 (4 << 8) | /* set prefetch threshold */ \ |
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189 0x20) /* set hthresh */ |
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190 |
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191 #define E1000_TIDV_FPD (1 << 31) |
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192 #define E1000_RDTR_FPD (1 << 31) |
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193 |
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194 enum e1000_boards { |
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195 board_82571, |
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196 board_82572, |
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197 board_82573, |
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198 board_82574, |
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199 board_82583, |
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200 board_80003es2lan, |
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201 board_ich8lan, |
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202 board_ich9lan, |
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203 board_ich10lan, |
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204 board_pchlan, |
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205 board_pch2lan, |
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206 }; |
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207 |
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208 struct e1000_ps_page { |
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209 struct page *page; |
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210 u64 dma; /* must be u64 - written to hw */ |
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211 }; |
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212 |
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213 /* |
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214 * wrappers around a pointer to a socket buffer, |
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215 * so a DMA handle can be stored along with the buffer |
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216 */ |
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217 struct e1000_buffer { |
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218 dma_addr_t dma; |
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219 struct sk_buff *skb; |
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220 union { |
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221 /* Tx */ |
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222 struct { |
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223 unsigned long time_stamp; |
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224 u16 length; |
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225 u16 next_to_watch; |
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226 unsigned int segs; |
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227 unsigned int bytecount; |
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228 u16 mapped_as_page; |
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229 }; |
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230 /* Rx */ |
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231 struct { |
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232 /* arrays of page information for packet split */ |
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233 struct e1000_ps_page *ps_pages; |
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234 struct page *page; |
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235 }; |
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236 }; |
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237 }; |
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238 |
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239 struct e1000_ring { |
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240 void *desc; /* pointer to ring memory */ |
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241 dma_addr_t dma; /* phys address of ring */ |
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242 unsigned int size; /* length of ring in bytes */ |
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243 unsigned int count; /* number of desc. in ring */ |
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244 |
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245 u16 next_to_use; |
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246 u16 next_to_clean; |
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247 |
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248 u16 head; |
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249 u16 tail; |
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250 |
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251 /* array of buffer information structs */ |
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252 struct e1000_buffer *buffer_info; |
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253 |
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254 char name[IFNAMSIZ + 5]; |
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255 u32 ims_val; |
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256 u32 itr_val; |
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257 u16 itr_register; |
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258 int set_itr; |
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259 |
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260 struct sk_buff *rx_skb_top; |
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261 }; |
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262 |
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263 /* PHY register snapshot values */ |
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264 struct e1000_phy_regs { |
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265 u16 bmcr; /* basic mode control register */ |
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266 u16 bmsr; /* basic mode status register */ |
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267 u16 advertise; /* auto-negotiation advertisement */ |
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268 u16 lpa; /* link partner ability register */ |
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269 u16 expansion; /* auto-negotiation expansion reg */ |
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270 u16 ctrl1000; /* 1000BASE-T control register */ |
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271 u16 stat1000; /* 1000BASE-T status register */ |
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272 u16 estatus; /* extended status register */ |
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273 }; |
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274 |
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275 /* board specific private data structure */ |
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276 struct e1000_adapter { |
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277 struct timer_list watchdog_timer; |
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278 struct timer_list phy_info_timer; |
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279 struct timer_list blink_timer; |
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280 |
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281 struct work_struct reset_task; |
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282 struct work_struct watchdog_task; |
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283 |
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284 const struct e1000_info *ei; |
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285 |
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286 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; |
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287 u32 bd_number; |
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288 u32 rx_buffer_len; |
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289 u16 mng_vlan_id; |
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290 u16 link_speed; |
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291 u16 link_duplex; |
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292 u16 eeprom_vers; |
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293 |
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294 /* track device up/down/testing state */ |
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295 unsigned long state; |
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296 |
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297 /* Interrupt Throttle Rate */ |
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298 u32 itr; |
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299 u32 itr_setting; |
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300 u16 tx_itr; |
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301 u16 rx_itr; |
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302 |
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303 /* |
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304 * Tx |
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305 */ |
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306 struct e1000_ring *tx_ring /* One per active queue */ |
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307 ____cacheline_aligned_in_smp; |
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308 |
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309 struct napi_struct napi; |
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310 |
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311 unsigned int restart_queue; |
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312 u32 txd_cmd; |
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313 |
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314 bool detect_tx_hung; |
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315 bool tx_hang_recheck; |
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316 u8 tx_timeout_factor; |
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317 |
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318 u32 tx_int_delay; |
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319 u32 tx_abs_int_delay; |
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320 |
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321 unsigned int total_tx_bytes; |
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322 unsigned int total_tx_packets; |
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323 unsigned int total_rx_bytes; |
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324 unsigned int total_rx_packets; |
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325 |
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326 /* Tx stats */ |
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327 u64 tpt_old; |
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328 u64 colc_old; |
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329 u32 gotc; |
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330 u64 gotc_old; |
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331 u32 tx_timeout_count; |
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332 u32 tx_fifo_head; |
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333 u32 tx_head_addr; |
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334 u32 tx_fifo_size; |
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335 u32 tx_dma_failed; |
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336 |
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337 /* |
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338 * Rx |
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339 */ |
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340 bool (*clean_rx) (struct e1000_adapter *adapter, |
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341 int *work_done, int work_to_do) |
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342 ____cacheline_aligned_in_smp; |
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343 void (*alloc_rx_buf) (struct e1000_adapter *adapter, |
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344 int cleaned_count, gfp_t gfp); |
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345 struct e1000_ring *rx_ring; |
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346 |
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347 u32 rx_int_delay; |
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348 u32 rx_abs_int_delay; |
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349 |
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350 /* Rx stats */ |
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351 u64 hw_csum_err; |
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352 u64 hw_csum_good; |
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353 u64 rx_hdr_split; |
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354 u32 gorc; |
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355 u64 gorc_old; |
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356 u32 alloc_rx_buff_failed; |
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357 u32 rx_dma_failed; |
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358 |
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359 unsigned int rx_ps_pages; |
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360 u16 rx_ps_bsize0; |
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361 u32 max_frame_size; |
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362 u32 min_frame_size; |
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363 |
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364 /* OS defined structs */ |
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365 struct net_device *netdev; |
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366 struct pci_dev *pdev; |
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367 |
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368 /* structs defined in e1000_hw.h */ |
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369 struct e1000_hw hw; |
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370 |
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371 spinlock_t stats64_lock; |
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372 struct e1000_hw_stats stats; |
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373 struct e1000_phy_info phy_info; |
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374 struct e1000_phy_stats phy_stats; |
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375 |
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376 /* Snapshot of PHY registers */ |
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377 struct e1000_phy_regs phy_regs; |
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378 |
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379 struct e1000_ring test_tx_ring; |
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380 struct e1000_ring test_rx_ring; |
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381 u32 test_icr; |
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382 |
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383 u32 msg_enable; |
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384 unsigned int num_vectors; |
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385 struct msix_entry *msix_entries; |
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386 int int_mode; |
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387 u32 eiac_mask; |
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388 |
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389 u32 eeprom_wol; |
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390 u32 wol; |
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391 u32 pba; |
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392 u32 max_hw_frame_size; |
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393 |
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394 bool fc_autoneg; |
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395 |
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396 unsigned int flags; |
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397 unsigned int flags2; |
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398 struct work_struct downshift_task; |
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399 struct work_struct update_phy_task; |
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400 struct work_struct print_hang_task; |
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401 |
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402 bool idle_check; |
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403 int phy_hang_count; |
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404 |
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405 /* EtherCAT device variables */ |
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406 ec_device_t *ecdev; |
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407 unsigned long ec_watchdog_jiffies; |
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408 }; |
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409 |
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410 struct e1000_info { |
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411 enum e1000_mac_type mac; |
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412 unsigned int flags; |
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413 unsigned int flags2; |
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414 u32 pba; |
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415 u32 max_hw_frame_size; |
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416 s32 (*get_variants)(struct e1000_adapter *); |
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417 const struct e1000_mac_operations *mac_ops; |
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418 const struct e1000_phy_operations *phy_ops; |
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419 const struct e1000_nvm_operations *nvm_ops; |
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420 }; |
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421 |
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422 /* hardware capability, feature, and workaround flags */ |
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423 #define FLAG_HAS_AMT (1 << 0) |
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424 #define FLAG_HAS_FLASH (1 << 1) |
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425 #define FLAG_HAS_HW_VLAN_FILTER (1 << 2) |
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426 #define FLAG_HAS_WOL (1 << 3) |
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427 #define FLAG_HAS_ERT (1 << 4) |
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428 #define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5) |
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429 #define FLAG_HAS_SWSM_ON_LOAD (1 << 6) |
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430 #define FLAG_HAS_JUMBO_FRAMES (1 << 7) |
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431 #define FLAG_READ_ONLY_NVM (1 << 8) |
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432 #define FLAG_IS_ICH (1 << 9) |
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433 #define FLAG_HAS_MSIX (1 << 10) |
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434 #define FLAG_HAS_SMART_POWER_DOWN (1 << 11) |
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435 #define FLAG_IS_QUAD_PORT_A (1 << 12) |
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436 #define FLAG_IS_QUAD_PORT (1 << 13) |
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437 #define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14) |
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438 #define FLAG_APME_IN_WUC (1 << 15) |
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439 #define FLAG_APME_IN_CTRL3 (1 << 16) |
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440 #define FLAG_APME_CHECK_PORT_B (1 << 17) |
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441 #define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18) |
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442 #define FLAG_NO_WAKE_UCAST (1 << 19) |
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443 #define FLAG_MNG_PT_ENABLED (1 << 20) |
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444 #define FLAG_RESET_OVERWRITES_LAA (1 << 21) |
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445 #define FLAG_TARC_SPEED_MODE_BIT (1 << 22) |
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446 #define FLAG_TARC_SET_BIT_ZERO (1 << 23) |
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447 #define FLAG_RX_NEEDS_RESTART (1 << 24) |
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448 #define FLAG_LSC_GIG_SPEED_DROP (1 << 25) |
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449 #define FLAG_SMART_POWER_DOWN (1 << 26) |
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450 #define FLAG_MSI_ENABLED (1 << 27) |
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451 /* reserved (1 << 28) */ |
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452 #define FLAG_TSO_FORCE (1 << 29) |
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453 #define FLAG_RX_RESTART_NOW (1 << 30) |
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454 #define FLAG_MSI_TEST_FAILED (1 << 31) |
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455 |
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456 #define FLAG2_CRC_STRIPPING (1 << 0) |
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457 #define FLAG2_HAS_PHY_WAKEUP (1 << 1) |
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458 #define FLAG2_IS_DISCARDING (1 << 2) |
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459 #define FLAG2_DISABLE_ASPM_L1 (1 << 3) |
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460 #define FLAG2_HAS_PHY_STATS (1 << 4) |
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461 #define FLAG2_HAS_EEE (1 << 5) |
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462 #define FLAG2_DMA_BURST (1 << 6) |
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463 #define FLAG2_DISABLE_ASPM_L0S (1 << 7) |
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464 #define FLAG2_DISABLE_AIM (1 << 8) |
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465 #define FLAG2_CHECK_PHY_HANG (1 << 9) |
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466 #define FLAG2_NO_DISABLE_RX (1 << 10) |
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467 #define FLAG2_PCIM2PCI_ARBITER_WA (1 << 11) |
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468 |
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469 #define E1000_RX_DESC_PS(R, i) \ |
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470 (&(((union e1000_rx_desc_packet_split *)((R).desc))[i])) |
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471 #define E1000_RX_DESC_EXT(R, i) \ |
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472 (&(((union e1000_rx_desc_extended *)((R).desc))[i])) |
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473 #define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i])) |
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474 #define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc) |
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475 #define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc) |
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476 |
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477 enum e1000_state_t { |
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478 __E1000_TESTING, |
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479 __E1000_RESETTING, |
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480 __E1000_ACCESS_SHARED_RESOURCE, |
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481 __E1000_DOWN |
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482 }; |
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483 |
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484 enum latency_range { |
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485 lowest_latency = 0, |
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486 low_latency = 1, |
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487 bulk_latency = 2, |
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488 latency_invalid = 255 |
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489 }; |
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490 |
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491 extern char e1000e_driver_name[]; |
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492 extern const char e1000e_driver_version[]; |
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493 |
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494 extern void e1000e_check_options(struct e1000_adapter *adapter); |
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495 extern void e1000e_set_ethtool_ops(struct net_device *netdev); |
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496 |
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497 extern int e1000e_up(struct e1000_adapter *adapter); |
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498 extern void e1000e_down(struct e1000_adapter *adapter); |
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499 extern void e1000e_reinit_locked(struct e1000_adapter *adapter); |
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500 extern void e1000e_reset(struct e1000_adapter *adapter); |
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501 extern void e1000e_power_up_phy(struct e1000_adapter *adapter); |
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502 extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter); |
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503 extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter); |
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504 extern void e1000e_free_rx_resources(struct e1000_adapter *adapter); |
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505 extern void e1000e_free_tx_resources(struct e1000_adapter *adapter); |
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506 extern struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev, |
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507 struct rtnl_link_stats64 |
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508 *stats); |
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509 extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter); |
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510 extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter); |
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511 extern void e1000e_get_hw_control(struct e1000_adapter *adapter); |
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512 extern void e1000e_release_hw_control(struct e1000_adapter *adapter); |
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513 |
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514 extern unsigned int copybreak; |
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515 |
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516 extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw); |
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517 |
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518 extern const struct e1000_info e1000_82571_info; |
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519 extern const struct e1000_info e1000_82572_info; |
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520 extern const struct e1000_info e1000_82573_info; |
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521 extern const struct e1000_info e1000_82574_info; |
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522 extern const struct e1000_info e1000_82583_info; |
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523 extern const struct e1000_info e1000_ich8_info; |
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524 extern const struct e1000_info e1000_ich9_info; |
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525 extern const struct e1000_info e1000_ich10_info; |
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526 extern const struct e1000_info e1000_pch_info; |
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527 extern const struct e1000_info e1000_pch2_info; |
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528 extern const struct e1000_info e1000_es2_info; |
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529 |
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530 extern s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num, |
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531 u32 pba_num_size); |
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532 |
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533 extern s32 e1000e_commit_phy(struct e1000_hw *hw); |
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534 |
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535 extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw); |
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536 |
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537 extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw); |
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538 extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state); |
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539 |
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540 extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw); |
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541 extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw, |
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542 bool state); |
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543 extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw); |
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544 extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw); |
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545 extern void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw); |
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546 extern void e1000_resume_workarounds_pchlan(struct e1000_hw *hw); |
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547 extern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable); |
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548 extern s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable); |
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549 extern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw); |
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550 |
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551 extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw); |
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552 extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw); |
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553 extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw); |
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554 extern s32 e1000e_setup_led_generic(struct e1000_hw *hw); |
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555 extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw); |
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556 extern s32 e1000e_led_on_generic(struct e1000_hw *hw); |
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557 extern s32 e1000e_led_off_generic(struct e1000_hw *hw); |
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558 extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw); |
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559 extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw); |
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560 extern void e1000_set_lan_id_single_port(struct e1000_hw *hw); |
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561 extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex); |
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562 extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex); |
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563 extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw); |
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564 extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw); |
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565 extern s32 e1000e_id_led_init(struct e1000_hw *hw); |
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566 extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw); |
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567 extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw); |
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568 extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw); |
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569 extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw); |
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570 extern s32 e1000e_setup_link(struct e1000_hw *hw); |
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571 extern void e1000_clear_vfta_generic(struct e1000_hw *hw); |
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572 extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count); |
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573 extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw, |
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574 u8 *mc_addr_list, |
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575 u32 mc_addr_count); |
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576 extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index); |
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577 extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw); |
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578 extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop); |
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579 extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw); |
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580 extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data); |
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581 extern void e1000e_config_collision_dist(struct e1000_hw *hw); |
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582 extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw); |
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583 extern s32 e1000e_force_mac_fc(struct e1000_hw *hw); |
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584 extern s32 e1000e_blink_led_generic(struct e1000_hw *hw); |
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585 extern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value); |
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586 extern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw); |
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587 extern void e1000e_reset_adaptive(struct e1000_hw *hw); |
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588 extern void e1000e_update_adaptive(struct e1000_hw *hw); |
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589 |
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590 extern s32 e1000e_setup_copper_link(struct e1000_hw *hw); |
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591 extern s32 e1000e_get_phy_id(struct e1000_hw *hw); |
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592 extern void e1000e_put_hw_semaphore(struct e1000_hw *hw); |
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593 extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw); |
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594 extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw); |
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595 extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw); |
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596 extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw); |
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597 extern s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page); |
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598 extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); |
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599 extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, |
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600 u16 *data); |
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601 extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw); |
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602 extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active); |
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603 extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); |
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604 extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, |
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605 u16 data); |
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606 extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw); |
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607 extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw); |
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608 extern s32 e1000e_get_cfg_done(struct e1000_hw *hw); |
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609 extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw); |
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610 extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw); |
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611 extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data); |
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612 extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data); |
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613 extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw); |
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614 extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id); |
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615 extern s32 e1000e_determine_phy_address(struct e1000_hw *hw); |
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616 extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data); |
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617 extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data); |
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618 extern s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, |
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619 u16 *phy_reg); |
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620 extern s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw, |
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621 u16 *phy_reg); |
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622 extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data); |
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623 extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); |
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624 extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); |
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625 extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); |
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626 extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, |
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627 u16 data); |
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628 extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); |
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629 extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, |
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630 u16 *data); |
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631 extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, |
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632 u32 usec_interval, bool *success); |
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633 extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); |
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634 extern void e1000_power_up_phy_copper(struct e1000_hw *hw); |
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635 extern void e1000_power_down_phy_copper(struct e1000_hw *hw); |
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636 extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); |
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637 extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); |
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638 extern s32 e1000e_check_downshift(struct e1000_hw *hw); |
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639 extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); |
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640 extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, |
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641 u16 *data); |
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642 extern s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, |
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643 u16 *data); |
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644 extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); |
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645 extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, |
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646 u16 data); |
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647 extern s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, |
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648 u16 data); |
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649 extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); |
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650 extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); |
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651 extern s32 e1000_check_polarity_82577(struct e1000_hw *hw); |
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652 extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw); |
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653 extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw); |
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654 extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw); |
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655 |
|
656 extern s32 e1000_check_polarity_m88(struct e1000_hw *hw); |
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657 extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw); |
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658 extern s32 e1000_check_polarity_ife(struct e1000_hw *hw); |
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659 extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw); |
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660 extern s32 e1000_check_polarity_igp(struct e1000_hw *hw); |
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661 extern bool e1000_check_phy_82574(struct e1000_hw *hw); |
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662 |
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663 static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw) |
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664 { |
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665 return hw->phy.ops.reset(hw); |
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666 } |
|
667 |
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668 static inline s32 e1000_check_reset_block(struct e1000_hw *hw) |
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669 { |
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670 return hw->phy.ops.check_reset_block(hw); |
|
671 } |
|
672 |
|
673 static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data) |
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674 { |
|
675 return hw->phy.ops.read_reg(hw, offset, data); |
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676 } |
|
677 |
|
678 static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data) |
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679 { |
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680 return hw->phy.ops.write_reg(hw, offset, data); |
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681 } |
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682 |
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683 static inline s32 e1000_get_cable_length(struct e1000_hw *hw) |
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684 { |
|
685 return hw->phy.ops.get_cable_length(hw); |
|
686 } |
|
687 |
|
688 extern s32 e1000e_acquire_nvm(struct e1000_hw *hw); |
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689 extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); |
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690 extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw); |
|
691 extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg); |
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692 extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data); |
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693 extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw); |
|
694 extern void e1000e_release_nvm(struct e1000_hw *hw); |
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695 extern void e1000e_reload_nvm(struct e1000_hw *hw); |
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696 extern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw); |
|
697 |
|
698 static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw) |
|
699 { |
|
700 if (hw->mac.ops.read_mac_addr) |
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701 return hw->mac.ops.read_mac_addr(hw); |
|
702 |
|
703 return e1000_read_mac_addr_generic(hw); |
|
704 } |
|
705 |
|
706 static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw) |
|
707 { |
|
708 return hw->nvm.ops.validate(hw); |
|
709 } |
|
710 |
|
711 static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw) |
|
712 { |
|
713 return hw->nvm.ops.update(hw); |
|
714 } |
|
715 |
|
716 static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) |
|
717 { |
|
718 return hw->nvm.ops.read(hw, offset, words, data); |
|
719 } |
|
720 |
|
721 static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) |
|
722 { |
|
723 return hw->nvm.ops.write(hw, offset, words, data); |
|
724 } |
|
725 |
|
726 static inline s32 e1000_get_phy_info(struct e1000_hw *hw) |
|
727 { |
|
728 return hw->phy.ops.get_info(hw); |
|
729 } |
|
730 |
|
731 static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw) |
|
732 { |
|
733 return hw->mac.ops.check_mng_mode(hw); |
|
734 } |
|
735 |
|
736 extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw); |
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737 extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw); |
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738 extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length); |
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739 |
|
740 static inline u32 __er32(struct e1000_hw *hw, unsigned long reg) |
|
741 { |
|
742 return readl(hw->hw_addr + reg); |
|
743 } |
|
744 |
|
745 static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val) |
|
746 { |
|
747 writel(val, hw->hw_addr + reg); |
|
748 } |
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749 |
|
750 #endif /* _E1000_H_ */ |