devices/8139too-2.6.23-orig.c
changeset 828 1ca40d2e6a8d
equal deleted inserted replaced
827:205eccb70bce 828:1ca40d2e6a8d
       
     1 /*
       
     2 
       
     3 	8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
       
     4 
       
     5 	Maintained by Jeff Garzik <jgarzik@pobox.com>
       
     6 	Copyright 2000-2002 Jeff Garzik
       
     7 
       
     8 	Much code comes from Donald Becker's rtl8139.c driver,
       
     9 	versions 1.13 and older.  This driver was originally based
       
    10 	on rtl8139.c version 1.07.  Header of rtl8139.c version 1.13:
       
    11 
       
    12 	-----<snip>-----
       
    13 
       
    14         	Written 1997-2001 by Donald Becker.
       
    15 		This software may be used and distributed according to the
       
    16 		terms of the GNU General Public License (GPL), incorporated
       
    17 		herein by reference.  Drivers based on or derived from this
       
    18 		code fall under the GPL and must retain the authorship,
       
    19 		copyright and license notice.  This file is not a complete
       
    20 		program and may only be used when the entire operating
       
    21 		system is licensed under the GPL.
       
    22 
       
    23 		This driver is for boards based on the RTL8129 and RTL8139
       
    24 		PCI ethernet chips.
       
    25 
       
    26 		The author may be reached as becker@scyld.com, or C/O Scyld
       
    27 		Computing Corporation 410 Severn Ave., Suite 210 Annapolis
       
    28 		MD 21403
       
    29 
       
    30 		Support and updates available at
       
    31 		http://www.scyld.com/network/rtl8139.html
       
    32 
       
    33 		Twister-tuning table provided by Kinston
       
    34 		<shangh@realtek.com.tw>.
       
    35 
       
    36 	-----<snip>-----
       
    37 
       
    38 	This software may be used and distributed according to the terms
       
    39 	of the GNU General Public License, incorporated herein by reference.
       
    40 
       
    41 	Contributors:
       
    42 
       
    43 		Donald Becker - he wrote the original driver, kudos to him!
       
    44 		(but please don't e-mail him for support, this isn't his driver)
       
    45 
       
    46 		Tigran Aivazian - bug fixes, skbuff free cleanup
       
    47 
       
    48 		Martin Mares - suggestions for PCI cleanup
       
    49 
       
    50 		David S. Miller - PCI DMA and softnet updates
       
    51 
       
    52 		Ernst Gill - fixes ported from BSD driver
       
    53 
       
    54 		Daniel Kobras - identified specific locations of
       
    55 			posted MMIO write bugginess
       
    56 
       
    57 		Gerard Sharp - bug fix, testing and feedback
       
    58 
       
    59 		David Ford - Rx ring wrap fix
       
    60 
       
    61 		Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
       
    62 		to find and fix a crucial bug on older chipsets.
       
    63 
       
    64 		Donald Becker/Chris Butterworth/Marcus Westergren -
       
    65 		Noticed various Rx packet size-related buglets.
       
    66 
       
    67 		Santiago Garcia Mantinan - testing and feedback
       
    68 
       
    69 		Jens David - 2.2.x kernel backports
       
    70 
       
    71 		Martin Dennett - incredibly helpful insight on undocumented
       
    72 		features of the 8139 chips
       
    73 
       
    74 		Jean-Jacques Michel - bug fix
       
    75 
       
    76 		Tobias Ringström - Rx interrupt status checking suggestion
       
    77 
       
    78 		Andrew Morton - Clear blocked signals, avoid
       
    79 		buffer overrun setting current->comm.
       
    80 
       
    81 		Kalle Olavi Niemitalo - Wake-on-LAN ioctls
       
    82 
       
    83 		Robert Kuebel - Save kernel thread from dying on any signal.
       
    84 
       
    85 	Submitting bug reports:
       
    86 
       
    87 		"rtl8139-diag -mmmaaavvveefN" output
       
    88 		enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
       
    89 
       
    90 */
       
    91 
       
    92 #define DRV_NAME	"8139too"
       
    93 #define DRV_VERSION	"0.9.28"
       
    94 
       
    95 
       
    96 #include <linux/module.h>
       
    97 #include <linux/kernel.h>
       
    98 #include <linux/compiler.h>
       
    99 #include <linux/pci.h>
       
   100 #include <linux/init.h>
       
   101 #include <linux/ioport.h>
       
   102 #include <linux/netdevice.h>
       
   103 #include <linux/etherdevice.h>
       
   104 #include <linux/rtnetlink.h>
       
   105 #include <linux/delay.h>
       
   106 #include <linux/ethtool.h>
       
   107 #include <linux/mii.h>
       
   108 #include <linux/completion.h>
       
   109 #include <linux/crc32.h>
       
   110 #include <asm/io.h>
       
   111 #include <asm/uaccess.h>
       
   112 #include <asm/irq.h>
       
   113 
       
   114 #define RTL8139_DRIVER_NAME   DRV_NAME " Fast Ethernet driver " DRV_VERSION
       
   115 #define PFX DRV_NAME ": "
       
   116 
       
   117 /* Default Message level */
       
   118 #define RTL8139_DEF_MSG_ENABLE   (NETIF_MSG_DRV   | \
       
   119                                  NETIF_MSG_PROBE  | \
       
   120                                  NETIF_MSG_LINK)
       
   121 
       
   122 
       
   123 /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */
       
   124 #ifdef CONFIG_8139TOO_PIO
       
   125 #define USE_IO_OPS 1
       
   126 #endif
       
   127 
       
   128 /* define to 1, 2 or 3 to enable copious debugging info */
       
   129 #define RTL8139_DEBUG 0
       
   130 
       
   131 /* define to 1 to disable lightweight runtime debugging checks */
       
   132 #undef RTL8139_NDEBUG
       
   133 
       
   134 
       
   135 #if RTL8139_DEBUG
       
   136 /* note: prints function name for you */
       
   137 #  define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
       
   138 #else
       
   139 #  define DPRINTK(fmt, args...)
       
   140 #endif
       
   141 
       
   142 #ifdef RTL8139_NDEBUG
       
   143 #  define assert(expr) do {} while (0)
       
   144 #else
       
   145 #  define assert(expr) \
       
   146         if(unlikely(!(expr))) {				        \
       
   147         printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n",	\
       
   148         #expr,__FILE__,__FUNCTION__,__LINE__);		        \
       
   149         }
       
   150 #endif
       
   151 
       
   152 
       
   153 /* A few user-configurable values. */
       
   154 /* media options */
       
   155 #define MAX_UNITS 8
       
   156 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   157 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   158 
       
   159 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
       
   160    The RTL chips use a 64 element hash table based on the Ethernet CRC.  */
       
   161 static int multicast_filter_limit = 32;
       
   162 
       
   163 /* bitmapped message enable number */
       
   164 static int debug = -1;
       
   165 
       
   166 /*
       
   167  * Receive ring size
       
   168  * Warning: 64K ring has hardware issues and may lock up.
       
   169  */
       
   170 #if defined(CONFIG_SH_DREAMCAST)
       
   171 #define RX_BUF_IDX	1	/* 16K ring */
       
   172 #else
       
   173 #define RX_BUF_IDX	2	/* 32K ring */
       
   174 #endif
       
   175 #define RX_BUF_LEN	(8192 << RX_BUF_IDX)
       
   176 #define RX_BUF_PAD	16
       
   177 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
       
   178 
       
   179 #if RX_BUF_LEN == 65536
       
   180 #define RX_BUF_TOT_LEN	RX_BUF_LEN
       
   181 #else
       
   182 #define RX_BUF_TOT_LEN	(RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
       
   183 #endif
       
   184 
       
   185 /* Number of Tx descriptor registers. */
       
   186 #define NUM_TX_DESC	4
       
   187 
       
   188 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
       
   189 #define MAX_ETH_FRAME_SIZE	1536
       
   190 
       
   191 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
       
   192 #define TX_BUF_SIZE	MAX_ETH_FRAME_SIZE
       
   193 #define TX_BUF_TOT_LEN	(TX_BUF_SIZE * NUM_TX_DESC)
       
   194 
       
   195 /* PCI Tuning Parameters
       
   196    Threshold is bytes transferred to chip before transmission starts. */
       
   197 #define TX_FIFO_THRESH 256	/* In bytes, rounded down to 32 byte units. */
       
   198 
       
   199 /* The following settings are log_2(bytes)-4:  0 == 16 bytes .. 6==1024, 7==end of packet. */
       
   200 #define RX_FIFO_THRESH	7	/* Rx buffer level before first PCI xfer.  */
       
   201 #define RX_DMA_BURST	7	/* Maximum PCI burst, '6' is 1024 */
       
   202 #define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
       
   203 #define TX_RETRY	8	/* 0-15.  retries = 16 + (TX_RETRY * 16) */
       
   204 
       
   205 /* Operational parameters that usually are not changed. */
       
   206 /* Time in jiffies before concluding the transmitter is hung. */
       
   207 #define TX_TIMEOUT  (6*HZ)
       
   208 
       
   209 
       
   210 enum {
       
   211 	HAS_MII_XCVR = 0x010000,
       
   212 	HAS_CHIP_XCVR = 0x020000,
       
   213 	HAS_LNK_CHNG = 0x040000,
       
   214 };
       
   215 
       
   216 #define RTL_NUM_STATS 4		/* number of ETHTOOL_GSTATS u64's */
       
   217 #define RTL_REGS_VER 1		/* version of reg. data in ETHTOOL_GREGS */
       
   218 #define RTL_MIN_IO_SIZE 0x80
       
   219 #define RTL8139B_IO_SIZE 256
       
   220 
       
   221 #define RTL8129_CAPS	HAS_MII_XCVR
       
   222 #define RTL8139_CAPS	HAS_CHIP_XCVR|HAS_LNK_CHNG
       
   223 
       
   224 typedef enum {
       
   225 	RTL8139 = 0,
       
   226 	RTL8129,
       
   227 } board_t;
       
   228 
       
   229 
       
   230 /* indexed by board_t, above */
       
   231 static const struct {
       
   232 	const char *name;
       
   233 	u32 hw_flags;
       
   234 } board_info[] __devinitdata = {
       
   235 	{ "RealTek RTL8139", RTL8139_CAPS },
       
   236 	{ "RealTek RTL8129", RTL8129_CAPS },
       
   237 };
       
   238 
       
   239 
       
   240 static struct pci_device_id rtl8139_pci_tbl[] = {
       
   241 	{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   242 	{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   243 	{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   244 	{0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   245 	{0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   246 	{0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   247 	{0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   248 	{0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   249 	{0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   250 	{0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   251 	{0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   252 	{0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   253 	{0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   254 	{0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   255 	{0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   256 	{0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   257 	{0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   258 	{0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   259 	{0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   260 
       
   261 #ifdef CONFIG_SH_SECUREEDGE5410
       
   262 	/* Bogus 8139 silicon reports 8129 without external PROM :-( */
       
   263 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   264 #endif
       
   265 #ifdef CONFIG_8139TOO_8129
       
   266 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
       
   267 #endif
       
   268 
       
   269 	/* some crazy cards report invalid vendor ids like
       
   270 	 * 0x0001 here.  The other ids are valid and constant,
       
   271 	 * so we simply don't match on the main vendor id.
       
   272 	 */
       
   273 	{PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
       
   274 	{PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
       
   275 	{PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
       
   276 
       
   277 	{0,}
       
   278 };
       
   279 MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
       
   280 
       
   281 static struct {
       
   282 	const char str[ETH_GSTRING_LEN];
       
   283 } ethtool_stats_keys[] = {
       
   284 	{ "early_rx" },
       
   285 	{ "tx_buf_mapped" },
       
   286 	{ "tx_timeouts" },
       
   287 	{ "rx_lost_in_ring" },
       
   288 };
       
   289 
       
   290 /* The rest of these values should never change. */
       
   291 
       
   292 /* Symbolic offsets to registers. */
       
   293 enum RTL8139_registers {
       
   294 	MAC0 = 0,		/* Ethernet hardware address. */
       
   295 	MAR0 = 8,		/* Multicast filter. */
       
   296 	TxStatus0 = 0x10,	/* Transmit status (Four 32bit registers). */
       
   297 	TxAddr0 = 0x20,		/* Tx descriptors (also four 32bit). */
       
   298 	RxBuf = 0x30,
       
   299 	ChipCmd = 0x37,
       
   300 	RxBufPtr = 0x38,
       
   301 	RxBufAddr = 0x3A,
       
   302 	IntrMask = 0x3C,
       
   303 	IntrStatus = 0x3E,
       
   304 	TxConfig = 0x40,
       
   305 	RxConfig = 0x44,
       
   306 	Timer = 0x48,		/* A general-purpose counter. */
       
   307 	RxMissed = 0x4C,	/* 24 bits valid, write clears. */
       
   308 	Cfg9346 = 0x50,
       
   309 	Config0 = 0x51,
       
   310 	Config1 = 0x52,
       
   311 	FlashReg = 0x54,
       
   312 	MediaStatus = 0x58,
       
   313 	Config3 = 0x59,
       
   314 	Config4 = 0x5A,		/* absent on RTL-8139A */
       
   315 	HltClk = 0x5B,
       
   316 	MultiIntr = 0x5C,
       
   317 	TxSummary = 0x60,
       
   318 	BasicModeCtrl = 0x62,
       
   319 	BasicModeStatus = 0x64,
       
   320 	NWayAdvert = 0x66,
       
   321 	NWayLPAR = 0x68,
       
   322 	NWayExpansion = 0x6A,
       
   323 	/* Undocumented registers, but required for proper operation. */
       
   324 	FIFOTMS = 0x70,		/* FIFO Control and test. */
       
   325 	CSCR = 0x74,		/* Chip Status and Configuration Register. */
       
   326 	PARA78 = 0x78,
       
   327 	PARA7c = 0x7c,		/* Magic transceiver parameter register. */
       
   328 	Config5 = 0xD8,		/* absent on RTL-8139A */
       
   329 };
       
   330 
       
   331 enum ClearBitMasks {
       
   332 	MultiIntrClear = 0xF000,
       
   333 	ChipCmdClear = 0xE2,
       
   334 	Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
       
   335 };
       
   336 
       
   337 enum ChipCmdBits {
       
   338 	CmdReset = 0x10,
       
   339 	CmdRxEnb = 0x08,
       
   340 	CmdTxEnb = 0x04,
       
   341 	RxBufEmpty = 0x01,
       
   342 };
       
   343 
       
   344 /* Interrupt register bits, using my own meaningful names. */
       
   345 enum IntrStatusBits {
       
   346 	PCIErr = 0x8000,
       
   347 	PCSTimeout = 0x4000,
       
   348 	RxFIFOOver = 0x40,
       
   349 	RxUnderrun = 0x20,
       
   350 	RxOverflow = 0x10,
       
   351 	TxErr = 0x08,
       
   352 	TxOK = 0x04,
       
   353 	RxErr = 0x02,
       
   354 	RxOK = 0x01,
       
   355 
       
   356 	RxAckBits = RxFIFOOver | RxOverflow | RxOK,
       
   357 };
       
   358 
       
   359 enum TxStatusBits {
       
   360 	TxHostOwns = 0x2000,
       
   361 	TxUnderrun = 0x4000,
       
   362 	TxStatOK = 0x8000,
       
   363 	TxOutOfWindow = 0x20000000,
       
   364 	TxAborted = 0x40000000,
       
   365 	TxCarrierLost = 0x80000000,
       
   366 };
       
   367 enum RxStatusBits {
       
   368 	RxMulticast = 0x8000,
       
   369 	RxPhysical = 0x4000,
       
   370 	RxBroadcast = 0x2000,
       
   371 	RxBadSymbol = 0x0020,
       
   372 	RxRunt = 0x0010,
       
   373 	RxTooLong = 0x0008,
       
   374 	RxCRCErr = 0x0004,
       
   375 	RxBadAlign = 0x0002,
       
   376 	RxStatusOK = 0x0001,
       
   377 };
       
   378 
       
   379 /* Bits in RxConfig. */
       
   380 enum rx_mode_bits {
       
   381 	AcceptErr = 0x20,
       
   382 	AcceptRunt = 0x10,
       
   383 	AcceptBroadcast = 0x08,
       
   384 	AcceptMulticast = 0x04,
       
   385 	AcceptMyPhys = 0x02,
       
   386 	AcceptAllPhys = 0x01,
       
   387 };
       
   388 
       
   389 /* Bits in TxConfig. */
       
   390 enum tx_config_bits {
       
   391 
       
   392         /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */
       
   393         TxIFGShift = 24,
       
   394         TxIFG84 = (0 << TxIFGShift),    /* 8.4us / 840ns (10 / 100Mbps) */
       
   395         TxIFG88 = (1 << TxIFGShift),    /* 8.8us / 880ns (10 / 100Mbps) */
       
   396         TxIFG92 = (2 << TxIFGShift),    /* 9.2us / 920ns (10 / 100Mbps) */
       
   397         TxIFG96 = (3 << TxIFGShift),    /* 9.6us / 960ns (10 / 100Mbps) */
       
   398 
       
   399 	TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */
       
   400 	TxCRC = (1 << 16),	/* DISABLE appending CRC to end of Tx packets */
       
   401 	TxClearAbt = (1 << 0),	/* Clear abort (WO) */
       
   402 	TxDMAShift = 8,		/* DMA burst value (0-7) is shifted this many bits */
       
   403 	TxRetryShift = 4,	/* TXRR value (0-15) is shifted this many bits */
       
   404 
       
   405 	TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */
       
   406 };
       
   407 
       
   408 /* Bits in Config1 */
       
   409 enum Config1Bits {
       
   410 	Cfg1_PM_Enable = 0x01,
       
   411 	Cfg1_VPD_Enable = 0x02,
       
   412 	Cfg1_PIO = 0x04,
       
   413 	Cfg1_MMIO = 0x08,
       
   414 	LWAKE = 0x10,		/* not on 8139, 8139A */
       
   415 	Cfg1_Driver_Load = 0x20,
       
   416 	Cfg1_LED0 = 0x40,
       
   417 	Cfg1_LED1 = 0x80,
       
   418 	SLEEP = (1 << 1),	/* only on 8139, 8139A */
       
   419 	PWRDN = (1 << 0),	/* only on 8139, 8139A */
       
   420 };
       
   421 
       
   422 /* Bits in Config3 */
       
   423 enum Config3Bits {
       
   424 	Cfg3_FBtBEn    = (1 << 0), /* 1 = Fast Back to Back */
       
   425 	Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */
       
   426 	Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */
       
   427 	Cfg3_CardB_En  = (1 << 3), /* 1 = enable CardBus registers */
       
   428 	Cfg3_LinkUp    = (1 << 4), /* 1 = wake up on link up */
       
   429 	Cfg3_Magic     = (1 << 5), /* 1 = wake up on Magic Packet (tm) */
       
   430 	Cfg3_PARM_En   = (1 << 6), /* 0 = software can set twister parameters */
       
   431 	Cfg3_GNTSel    = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */
       
   432 };
       
   433 
       
   434 /* Bits in Config4 */
       
   435 enum Config4Bits {
       
   436 	LWPTN = (1 << 2),	/* not on 8139, 8139A */
       
   437 };
       
   438 
       
   439 /* Bits in Config5 */
       
   440 enum Config5Bits {
       
   441 	Cfg5_PME_STS     = (1 << 0), /* 1 = PCI reset resets PME_Status */
       
   442 	Cfg5_LANWake     = (1 << 1), /* 1 = enable LANWake signal */
       
   443 	Cfg5_LDPS        = (1 << 2), /* 0 = save power when link is down */
       
   444 	Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */
       
   445 	Cfg5_UWF         = (1 << 4), /* 1 = accept unicast wakeup frame */
       
   446 	Cfg5_MWF         = (1 << 5), /* 1 = accept multicast wakeup frame */
       
   447 	Cfg5_BWF         = (1 << 6), /* 1 = accept broadcast wakeup frame */
       
   448 };
       
   449 
       
   450 enum RxConfigBits {
       
   451 	/* rx fifo threshold */
       
   452 	RxCfgFIFOShift = 13,
       
   453 	RxCfgFIFONone = (7 << RxCfgFIFOShift),
       
   454 
       
   455 	/* Max DMA burst */
       
   456 	RxCfgDMAShift = 8,
       
   457 	RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
       
   458 
       
   459 	/* rx ring buffer length */
       
   460 	RxCfgRcv8K = 0,
       
   461 	RxCfgRcv16K = (1 << 11),
       
   462 	RxCfgRcv32K = (1 << 12),
       
   463 	RxCfgRcv64K = (1 << 11) | (1 << 12),
       
   464 
       
   465 	/* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
       
   466 	RxNoWrap = (1 << 7),
       
   467 };
       
   468 
       
   469 /* Twister tuning parameters from RealTek.
       
   470    Completely undocumented, but required to tune bad links on some boards. */
       
   471 enum CSCRBits {
       
   472 	CSCR_LinkOKBit = 0x0400,
       
   473 	CSCR_LinkChangeBit = 0x0800,
       
   474 	CSCR_LinkStatusBits = 0x0f000,
       
   475 	CSCR_LinkDownOffCmd = 0x003c0,
       
   476 	CSCR_LinkDownCmd = 0x0f3c0,
       
   477 };
       
   478 
       
   479 enum Cfg9346Bits {
       
   480 	Cfg9346_Lock = 0x00,
       
   481 	Cfg9346_Unlock = 0xC0,
       
   482 };
       
   483 
       
   484 typedef enum {
       
   485 	CH_8139 = 0,
       
   486 	CH_8139_K,
       
   487 	CH_8139A,
       
   488 	CH_8139A_G,
       
   489 	CH_8139B,
       
   490 	CH_8130,
       
   491 	CH_8139C,
       
   492 	CH_8100,
       
   493 	CH_8100B_8139D,
       
   494 	CH_8101,
       
   495 } chip_t;
       
   496 
       
   497 enum chip_flags {
       
   498 	HasHltClk = (1 << 0),
       
   499 	HasLWake = (1 << 1),
       
   500 };
       
   501 
       
   502 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
       
   503 	(b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
       
   504 #define HW_REVID_MASK	HW_REVID(1, 1, 1, 1, 1, 1, 1)
       
   505 
       
   506 /* directly indexed by chip_t, above */
       
   507 static const struct {
       
   508 	const char *name;
       
   509 	u32 version; /* from RTL8139C/RTL8139D docs */
       
   510 	u32 flags;
       
   511 } rtl_chip_info[] = {
       
   512 	{ "RTL-8139",
       
   513 	  HW_REVID(1, 0, 0, 0, 0, 0, 0),
       
   514 	  HasHltClk,
       
   515 	},
       
   516 
       
   517 	{ "RTL-8139 rev K",
       
   518 	  HW_REVID(1, 1, 0, 0, 0, 0, 0),
       
   519 	  HasHltClk,
       
   520 	},
       
   521 
       
   522 	{ "RTL-8139A",
       
   523 	  HW_REVID(1, 1, 1, 0, 0, 0, 0),
       
   524 	  HasHltClk, /* XXX undocumented? */
       
   525 	},
       
   526 
       
   527 	{ "RTL-8139A rev G",
       
   528 	  HW_REVID(1, 1, 1, 0, 0, 1, 0),
       
   529 	  HasHltClk, /* XXX undocumented? */
       
   530 	},
       
   531 
       
   532 	{ "RTL-8139B",
       
   533 	  HW_REVID(1, 1, 1, 1, 0, 0, 0),
       
   534 	  HasLWake,
       
   535 	},
       
   536 
       
   537 	{ "RTL-8130",
       
   538 	  HW_REVID(1, 1, 1, 1, 1, 0, 0),
       
   539 	  HasLWake,
       
   540 	},
       
   541 
       
   542 	{ "RTL-8139C",
       
   543 	  HW_REVID(1, 1, 1, 0, 1, 0, 0),
       
   544 	  HasLWake,
       
   545 	},
       
   546 
       
   547 	{ "RTL-8100",
       
   548 	  HW_REVID(1, 1, 1, 1, 0, 1, 0),
       
   549  	  HasLWake,
       
   550  	},
       
   551 
       
   552 	{ "RTL-8100B/8139D",
       
   553 	  HW_REVID(1, 1, 1, 0, 1, 0, 1),
       
   554 	  HasHltClk /* XXX undocumented? */
       
   555 	| HasLWake,
       
   556 	},
       
   557 
       
   558 	{ "RTL-8101",
       
   559 	  HW_REVID(1, 1, 1, 0, 1, 1, 1),
       
   560 	  HasLWake,
       
   561 	},
       
   562 };
       
   563 
       
   564 struct rtl_extra_stats {
       
   565 	unsigned long early_rx;
       
   566 	unsigned long tx_buf_mapped;
       
   567 	unsigned long tx_timeouts;
       
   568 	unsigned long rx_lost_in_ring;
       
   569 };
       
   570 
       
   571 struct rtl8139_private {
       
   572 	void __iomem *mmio_addr;
       
   573 	int drv_flags;
       
   574 	struct pci_dev *pci_dev;
       
   575 	u32 msg_enable;
       
   576 	struct net_device_stats stats;
       
   577 	unsigned char *rx_ring;
       
   578 	unsigned int cur_rx;	/* Index into the Rx buffer of next Rx pkt. */
       
   579 	unsigned int tx_flag;
       
   580 	unsigned long cur_tx;
       
   581 	unsigned long dirty_tx;
       
   582 	unsigned char *tx_buf[NUM_TX_DESC];	/* Tx bounce buffers */
       
   583 	unsigned char *tx_bufs;	/* Tx bounce buffer region. */
       
   584 	dma_addr_t rx_ring_dma;
       
   585 	dma_addr_t tx_bufs_dma;
       
   586 	signed char phys[4];		/* MII device addresses. */
       
   587 	char twistie, twist_row, twist_col;	/* Twister tune state. */
       
   588 	unsigned int watchdog_fired : 1;
       
   589 	unsigned int default_port : 4;	/* Last dev->if_port value. */
       
   590 	unsigned int have_thread : 1;
       
   591 	spinlock_t lock;
       
   592 	spinlock_t rx_lock;
       
   593 	chip_t chipset;
       
   594 	u32 rx_config;
       
   595 	struct rtl_extra_stats xstats;
       
   596 
       
   597 	struct delayed_work thread;
       
   598 
       
   599 	struct mii_if_info mii;
       
   600 	unsigned int regs_len;
       
   601 	unsigned long fifo_copy_timeout;
       
   602 };
       
   603 
       
   604 MODULE_AUTHOR ("Jeff Garzik <jgarzik@pobox.com>");
       
   605 MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");
       
   606 MODULE_LICENSE("GPL");
       
   607 MODULE_VERSION(DRV_VERSION);
       
   608 
       
   609 module_param(multicast_filter_limit, int, 0);
       
   610 module_param_array(media, int, NULL, 0);
       
   611 module_param_array(full_duplex, int, NULL, 0);
       
   612 module_param(debug, int, 0);
       
   613 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
       
   614 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
       
   615 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
       
   616 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
       
   617 
       
   618 static int read_eeprom (void __iomem *ioaddr, int location, int addr_len);
       
   619 static int rtl8139_open (struct net_device *dev);
       
   620 static int mdio_read (struct net_device *dev, int phy_id, int location);
       
   621 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
   622 			int val);
       
   623 static void rtl8139_start_thread(struct rtl8139_private *tp);
       
   624 static void rtl8139_tx_timeout (struct net_device *dev);
       
   625 static void rtl8139_init_ring (struct net_device *dev);
       
   626 static int rtl8139_start_xmit (struct sk_buff *skb,
       
   627 			       struct net_device *dev);
       
   628 static int rtl8139_poll(struct net_device *dev, int *budget);
       
   629 #ifdef CONFIG_NET_POLL_CONTROLLER
       
   630 static void rtl8139_poll_controller(struct net_device *dev);
       
   631 #endif
       
   632 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance);
       
   633 static int rtl8139_close (struct net_device *dev);
       
   634 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
       
   635 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev);
       
   636 static void rtl8139_set_rx_mode (struct net_device *dev);
       
   637 static void __set_rx_mode (struct net_device *dev);
       
   638 static void rtl8139_hw_start (struct net_device *dev);
       
   639 static void rtl8139_thread (struct work_struct *work);
       
   640 static void rtl8139_tx_timeout_task(struct work_struct *work);
       
   641 static const struct ethtool_ops rtl8139_ethtool_ops;
       
   642 
       
   643 /* write MMIO register, with flush */
       
   644 /* Flush avoids rtl8139 bug w/ posted MMIO writes */
       
   645 #define RTL_W8_F(reg, val8)	do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0)
       
   646 #define RTL_W16_F(reg, val16)	do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0)
       
   647 #define RTL_W32_F(reg, val32)	do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0)
       
   648 
       
   649 
       
   650 #define MMIO_FLUSH_AUDIT_COMPLETE 1
       
   651 #if MMIO_FLUSH_AUDIT_COMPLETE
       
   652 
       
   653 /* write MMIO register */
       
   654 #define RTL_W8(reg, val8)	iowrite8 ((val8), ioaddr + (reg))
       
   655 #define RTL_W16(reg, val16)	iowrite16 ((val16), ioaddr + (reg))
       
   656 #define RTL_W32(reg, val32)	iowrite32 ((val32), ioaddr + (reg))
       
   657 
       
   658 #else
       
   659 
       
   660 /* write MMIO register, then flush */
       
   661 #define RTL_W8		RTL_W8_F
       
   662 #define RTL_W16		RTL_W16_F
       
   663 #define RTL_W32		RTL_W32_F
       
   664 
       
   665 #endif /* MMIO_FLUSH_AUDIT_COMPLETE */
       
   666 
       
   667 /* read MMIO register */
       
   668 #define RTL_R8(reg)		ioread8 (ioaddr + (reg))
       
   669 #define RTL_R16(reg)		ioread16 (ioaddr + (reg))
       
   670 #define RTL_R32(reg)		((unsigned long) ioread32 (ioaddr + (reg)))
       
   671 
       
   672 
       
   673 static const u16 rtl8139_intr_mask =
       
   674 	PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
       
   675 	TxErr | TxOK | RxErr | RxOK;
       
   676 
       
   677 static const u16 rtl8139_norx_intr_mask =
       
   678 	PCIErr | PCSTimeout | RxUnderrun |
       
   679 	TxErr | TxOK | RxErr ;
       
   680 
       
   681 #if RX_BUF_IDX == 0
       
   682 static const unsigned int rtl8139_rx_config =
       
   683 	RxCfgRcv8K | RxNoWrap |
       
   684 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   685 	(RX_DMA_BURST << RxCfgDMAShift);
       
   686 #elif RX_BUF_IDX == 1
       
   687 static const unsigned int rtl8139_rx_config =
       
   688 	RxCfgRcv16K | RxNoWrap |
       
   689 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   690 	(RX_DMA_BURST << RxCfgDMAShift);
       
   691 #elif RX_BUF_IDX == 2
       
   692 static const unsigned int rtl8139_rx_config =
       
   693 	RxCfgRcv32K | RxNoWrap |
       
   694 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   695 	(RX_DMA_BURST << RxCfgDMAShift);
       
   696 #elif RX_BUF_IDX == 3
       
   697 static const unsigned int rtl8139_rx_config =
       
   698 	RxCfgRcv64K |
       
   699 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   700 	(RX_DMA_BURST << RxCfgDMAShift);
       
   701 #else
       
   702 #error "Invalid configuration for 8139_RXBUF_IDX"
       
   703 #endif
       
   704 
       
   705 static const unsigned int rtl8139_tx_config =
       
   706 	TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
       
   707 
       
   708 static void __rtl8139_cleanup_dev (struct net_device *dev)
       
   709 {
       
   710 	struct rtl8139_private *tp = netdev_priv(dev);
       
   711 	struct pci_dev *pdev;
       
   712 
       
   713 	assert (dev != NULL);
       
   714 	assert (tp->pci_dev != NULL);
       
   715 	pdev = tp->pci_dev;
       
   716 
       
   717 #ifdef USE_IO_OPS
       
   718 	if (tp->mmio_addr)
       
   719 		ioport_unmap (tp->mmio_addr);
       
   720 #else
       
   721 	if (tp->mmio_addr)
       
   722 		pci_iounmap (pdev, tp->mmio_addr);
       
   723 #endif /* USE_IO_OPS */
       
   724 
       
   725 	/* it's ok to call this even if we have no regions to free */
       
   726 	pci_release_regions (pdev);
       
   727 
       
   728 	free_netdev(dev);
       
   729 	pci_set_drvdata (pdev, NULL);
       
   730 }
       
   731 
       
   732 
       
   733 static void rtl8139_chip_reset (void __iomem *ioaddr)
       
   734 {
       
   735 	int i;
       
   736 
       
   737 	/* Soft reset the chip. */
       
   738 	RTL_W8 (ChipCmd, CmdReset);
       
   739 
       
   740 	/* Check that the chip has finished the reset. */
       
   741 	for (i = 1000; i > 0; i--) {
       
   742 		barrier();
       
   743 		if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
       
   744 			break;
       
   745 		udelay (10);
       
   746 	}
       
   747 }
       
   748 
       
   749 
       
   750 static int __devinit rtl8139_init_board (struct pci_dev *pdev,
       
   751 					 struct net_device **dev_out)
       
   752 {
       
   753 	void __iomem *ioaddr;
       
   754 	struct net_device *dev;
       
   755 	struct rtl8139_private *tp;
       
   756 	u8 tmp8;
       
   757 	int rc, disable_dev_on_err = 0;
       
   758 	unsigned int i;
       
   759 	unsigned long pio_start, pio_end, pio_flags, pio_len;
       
   760 	unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
       
   761 	u32 version;
       
   762 
       
   763 	assert (pdev != NULL);
       
   764 
       
   765 	*dev_out = NULL;
       
   766 
       
   767 	/* dev and priv zeroed in alloc_etherdev */
       
   768 	dev = alloc_etherdev (sizeof (*tp));
       
   769 	if (dev == NULL) {
       
   770 		dev_err(&pdev->dev, "Unable to alloc new net device\n");
       
   771 		return -ENOMEM;
       
   772 	}
       
   773 	SET_MODULE_OWNER(dev);
       
   774 	SET_NETDEV_DEV(dev, &pdev->dev);
       
   775 
       
   776 	tp = netdev_priv(dev);
       
   777 	tp->pci_dev = pdev;
       
   778 
       
   779 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
       
   780 	rc = pci_enable_device (pdev);
       
   781 	if (rc)
       
   782 		goto err_out;
       
   783 
       
   784 	pio_start = pci_resource_start (pdev, 0);
       
   785 	pio_end = pci_resource_end (pdev, 0);
       
   786 	pio_flags = pci_resource_flags (pdev, 0);
       
   787 	pio_len = pci_resource_len (pdev, 0);
       
   788 
       
   789 	mmio_start = pci_resource_start (pdev, 1);
       
   790 	mmio_end = pci_resource_end (pdev, 1);
       
   791 	mmio_flags = pci_resource_flags (pdev, 1);
       
   792 	mmio_len = pci_resource_len (pdev, 1);
       
   793 
       
   794 	/* set this immediately, we need to know before
       
   795 	 * we talk to the chip directly */
       
   796 	DPRINTK("PIO region size == 0x%02X\n", pio_len);
       
   797 	DPRINTK("MMIO region size == 0x%02lX\n", mmio_len);
       
   798 
       
   799 #ifdef USE_IO_OPS
       
   800 	/* make sure PCI base addr 0 is PIO */
       
   801 	if (!(pio_flags & IORESOURCE_IO)) {
       
   802 		dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n");
       
   803 		rc = -ENODEV;
       
   804 		goto err_out;
       
   805 	}
       
   806 	/* check for weird/broken PCI region reporting */
       
   807 	if (pio_len < RTL_MIN_IO_SIZE) {
       
   808 		dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n");
       
   809 		rc = -ENODEV;
       
   810 		goto err_out;
       
   811 	}
       
   812 #else
       
   813 	/* make sure PCI base addr 1 is MMIO */
       
   814 	if (!(mmio_flags & IORESOURCE_MEM)) {
       
   815 		dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
       
   816 		rc = -ENODEV;
       
   817 		goto err_out;
       
   818 	}
       
   819 	if (mmio_len < RTL_MIN_IO_SIZE) {
       
   820 		dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n");
       
   821 		rc = -ENODEV;
       
   822 		goto err_out;
       
   823 	}
       
   824 #endif
       
   825 
       
   826 	rc = pci_request_regions (pdev, DRV_NAME);
       
   827 	if (rc)
       
   828 		goto err_out;
       
   829 	disable_dev_on_err = 1;
       
   830 
       
   831 	/* enable PCI bus-mastering */
       
   832 	pci_set_master (pdev);
       
   833 
       
   834 #ifdef USE_IO_OPS
       
   835 	ioaddr = ioport_map(pio_start, pio_len);
       
   836 	if (!ioaddr) {
       
   837 		dev_err(&pdev->dev, "cannot map PIO, aborting\n");
       
   838 		rc = -EIO;
       
   839 		goto err_out;
       
   840 	}
       
   841 	dev->base_addr = pio_start;
       
   842 	tp->mmio_addr = ioaddr;
       
   843 	tp->regs_len = pio_len;
       
   844 #else
       
   845 	/* ioremap MMIO region */
       
   846 	ioaddr = pci_iomap(pdev, 1, 0);
       
   847 	if (ioaddr == NULL) {
       
   848 		dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
       
   849 		rc = -EIO;
       
   850 		goto err_out;
       
   851 	}
       
   852 	dev->base_addr = (long) ioaddr;
       
   853 	tp->mmio_addr = ioaddr;
       
   854 	tp->regs_len = mmio_len;
       
   855 #endif /* USE_IO_OPS */
       
   856 
       
   857 	/* Bring old chips out of low-power mode. */
       
   858 	RTL_W8 (HltClk, 'R');
       
   859 
       
   860 	/* check for missing/broken hardware */
       
   861 	if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
       
   862 		dev_err(&pdev->dev, "Chip not responding, ignoring board\n");
       
   863 		rc = -EIO;
       
   864 		goto err_out;
       
   865 	}
       
   866 
       
   867 	/* identify chip attached to board */
       
   868 	version = RTL_R32 (TxConfig) & HW_REVID_MASK;
       
   869 	for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
       
   870 		if (version == rtl_chip_info[i].version) {
       
   871 			tp->chipset = i;
       
   872 			goto match;
       
   873 		}
       
   874 
       
   875 	/* if unknown chip, assume array element #0, original RTL-8139 in this case */
       
   876 	dev_printk (KERN_DEBUG, &pdev->dev,
       
   877 		    "unknown chip version, assuming RTL-8139\n");
       
   878 	dev_printk (KERN_DEBUG, &pdev->dev,
       
   879 		    "TxConfig = 0x%lx\n", RTL_R32 (TxConfig));
       
   880 	tp->chipset = 0;
       
   881 
       
   882 match:
       
   883 	DPRINTK ("chipset id (%d) == index %d, '%s'\n",
       
   884 		 version, i, rtl_chip_info[i].name);
       
   885 
       
   886 	if (tp->chipset >= CH_8139B) {
       
   887 		u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
       
   888 		DPRINTK("PCI PM wakeup\n");
       
   889 		if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
       
   890 		    (tmp8 & LWAKE))
       
   891 			new_tmp8 &= ~LWAKE;
       
   892 		new_tmp8 |= Cfg1_PM_Enable;
       
   893 		if (new_tmp8 != tmp8) {
       
   894 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   895 			RTL_W8 (Config1, tmp8);
       
   896 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   897 		}
       
   898 		if (rtl_chip_info[tp->chipset].flags & HasLWake) {
       
   899 			tmp8 = RTL_R8 (Config4);
       
   900 			if (tmp8 & LWPTN) {
       
   901 				RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   902 				RTL_W8 (Config4, tmp8 & ~LWPTN);
       
   903 				RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   904 			}
       
   905 		}
       
   906 	} else {
       
   907 		DPRINTK("Old chip wakeup\n");
       
   908 		tmp8 = RTL_R8 (Config1);
       
   909 		tmp8 &= ~(SLEEP | PWRDN);
       
   910 		RTL_W8 (Config1, tmp8);
       
   911 	}
       
   912 
       
   913 	rtl8139_chip_reset (ioaddr);
       
   914 
       
   915 	*dev_out = dev;
       
   916 	return 0;
       
   917 
       
   918 err_out:
       
   919 	__rtl8139_cleanup_dev (dev);
       
   920 	if (disable_dev_on_err)
       
   921 		pci_disable_device (pdev);
       
   922 	return rc;
       
   923 }
       
   924 
       
   925 
       
   926 static int __devinit rtl8139_init_one (struct pci_dev *pdev,
       
   927 				       const struct pci_device_id *ent)
       
   928 {
       
   929 	struct net_device *dev = NULL;
       
   930 	struct rtl8139_private *tp;
       
   931 	int i, addr_len, option;
       
   932 	void __iomem *ioaddr;
       
   933 	static int board_idx = -1;
       
   934 
       
   935 	assert (pdev != NULL);
       
   936 	assert (ent != NULL);
       
   937 
       
   938 	board_idx++;
       
   939 
       
   940 	/* when we're built into the kernel, the driver version message
       
   941 	 * is only printed if at least one 8139 board has been found
       
   942 	 */
       
   943 #ifndef MODULE
       
   944 	{
       
   945 		static int printed_version;
       
   946 		if (!printed_version++)
       
   947 			printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
       
   948 	}
       
   949 #endif
       
   950 
       
   951 	if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
       
   952 	    pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision >= 0x20) {
       
   953 		dev_info(&pdev->dev,
       
   954 			   "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n",
       
   955 		       	   pdev->vendor, pdev->device, pdev->revision);
       
   956 		dev_info(&pdev->dev,
       
   957 			   "Use the \"8139cp\" driver for improved performance and stability.\n");
       
   958 	}
       
   959 
       
   960 	i = rtl8139_init_board (pdev, &dev);
       
   961 	if (i < 0)
       
   962 		return i;
       
   963 
       
   964 	assert (dev != NULL);
       
   965 	tp = netdev_priv(dev);
       
   966 
       
   967 	ioaddr = tp->mmio_addr;
       
   968 	assert (ioaddr != NULL);
       
   969 
       
   970 	addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
       
   971 	for (i = 0; i < 3; i++)
       
   972 		((u16 *) (dev->dev_addr))[i] =
       
   973 		    le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len));
       
   974 	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
       
   975 
       
   976 	/* The Rtl8139-specific entries in the device structure. */
       
   977 	dev->open = rtl8139_open;
       
   978 	dev->hard_start_xmit = rtl8139_start_xmit;
       
   979 	dev->poll = rtl8139_poll;
       
   980 	dev->weight = 64;
       
   981 	dev->stop = rtl8139_close;
       
   982 	dev->get_stats = rtl8139_get_stats;
       
   983 	dev->set_multicast_list = rtl8139_set_rx_mode;
       
   984 	dev->do_ioctl = netdev_ioctl;
       
   985 	dev->ethtool_ops = &rtl8139_ethtool_ops;
       
   986 	dev->tx_timeout = rtl8139_tx_timeout;
       
   987 	dev->watchdog_timeo = TX_TIMEOUT;
       
   988 #ifdef CONFIG_NET_POLL_CONTROLLER
       
   989 	dev->poll_controller = rtl8139_poll_controller;
       
   990 #endif
       
   991 
       
   992 	/* note: the hardware is not capable of sg/csum/highdma, however
       
   993 	 * through the use of skb_copy_and_csum_dev we enable these
       
   994 	 * features
       
   995 	 */
       
   996 	dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
       
   997 
       
   998 	dev->irq = pdev->irq;
       
   999 
       
  1000 	/* tp zeroed and aligned in alloc_etherdev */
       
  1001 	tp = netdev_priv(dev);
       
  1002 
       
  1003 	/* note: tp->chipset set in rtl8139_init_board */
       
  1004 	tp->drv_flags = board_info[ent->driver_data].hw_flags;
       
  1005 	tp->mmio_addr = ioaddr;
       
  1006 	tp->msg_enable =
       
  1007 		(debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1));
       
  1008 	spin_lock_init (&tp->lock);
       
  1009 	spin_lock_init (&tp->rx_lock);
       
  1010 	INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
       
  1011 	tp->mii.dev = dev;
       
  1012 	tp->mii.mdio_read = mdio_read;
       
  1013 	tp->mii.mdio_write = mdio_write;
       
  1014 	tp->mii.phy_id_mask = 0x3f;
       
  1015 	tp->mii.reg_num_mask = 0x1f;
       
  1016 
       
  1017 	/* dev is fully set up and ready to use now */
       
  1018 	DPRINTK("about to register device named %s (%p)...\n", dev->name, dev);
       
  1019 	i = register_netdev (dev);
       
  1020 	if (i) goto err_out;
       
  1021 
       
  1022 	pci_set_drvdata (pdev, dev);
       
  1023 
       
  1024 	printk (KERN_INFO "%s: %s at 0x%lx, "
       
  1025 		"%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
       
  1026 		"IRQ %d\n",
       
  1027 		dev->name,
       
  1028 		board_info[ent->driver_data].name,
       
  1029 		dev->base_addr,
       
  1030 		dev->dev_addr[0], dev->dev_addr[1],
       
  1031 		dev->dev_addr[2], dev->dev_addr[3],
       
  1032 		dev->dev_addr[4], dev->dev_addr[5],
       
  1033 		dev->irq);
       
  1034 
       
  1035 	printk (KERN_DEBUG "%s:  Identified 8139 chip type '%s'\n",
       
  1036 		dev->name, rtl_chip_info[tp->chipset].name);
       
  1037 
       
  1038 	/* Find the connected MII xcvrs.
       
  1039 	   Doing this in open() would allow detecting external xcvrs later, but
       
  1040 	   takes too much time. */
       
  1041 #ifdef CONFIG_8139TOO_8129
       
  1042 	if (tp->drv_flags & HAS_MII_XCVR) {
       
  1043 		int phy, phy_idx = 0;
       
  1044 		for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
       
  1045 			int mii_status = mdio_read(dev, phy, 1);
       
  1046 			if (mii_status != 0xffff  &&  mii_status != 0x0000) {
       
  1047 				u16 advertising = mdio_read(dev, phy, 4);
       
  1048 				tp->phys[phy_idx++] = phy;
       
  1049 				printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x "
       
  1050 					   "advertising %4.4x.\n",
       
  1051 					   dev->name, phy, mii_status, advertising);
       
  1052 			}
       
  1053 		}
       
  1054 		if (phy_idx == 0) {
       
  1055 			printk(KERN_INFO "%s: No MII transceivers found!  Assuming SYM "
       
  1056 				   "transceiver.\n",
       
  1057 				   dev->name);
       
  1058 			tp->phys[0] = 32;
       
  1059 		}
       
  1060 	} else
       
  1061 #endif
       
  1062 		tp->phys[0] = 32;
       
  1063 	tp->mii.phy_id = tp->phys[0];
       
  1064 
       
  1065 	/* The lower four bits are the media type. */
       
  1066 	option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
       
  1067 	if (option > 0) {
       
  1068 		tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
       
  1069 		tp->default_port = option & 0xFF;
       
  1070 		if (tp->default_port)
       
  1071 			tp->mii.force_media = 1;
       
  1072 	}
       
  1073 	if (board_idx < MAX_UNITS  &&  full_duplex[board_idx] > 0)
       
  1074 		tp->mii.full_duplex = full_duplex[board_idx];
       
  1075 	if (tp->mii.full_duplex) {
       
  1076 		printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name);
       
  1077 		/* Changing the MII-advertised media because might prevent
       
  1078 		   re-connection. */
       
  1079 		tp->mii.force_media = 1;
       
  1080 	}
       
  1081 	if (tp->default_port) {
       
  1082 		printk(KERN_INFO "  Forcing %dMbps %s-duplex operation.\n",
       
  1083 			   (option & 0x20 ? 100 : 10),
       
  1084 			   (option & 0x10 ? "full" : "half"));
       
  1085 		mdio_write(dev, tp->phys[0], 0,
       
  1086 				   ((option & 0x20) ? 0x2000 : 0) | 	/* 100Mbps? */
       
  1087 				   ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
       
  1088 	}
       
  1089 
       
  1090 	/* Put the chip into low-power mode. */
       
  1091 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1092 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  1093 
       
  1094 	return 0;
       
  1095 
       
  1096 err_out:
       
  1097 	__rtl8139_cleanup_dev (dev);
       
  1098 	pci_disable_device (pdev);
       
  1099 	return i;
       
  1100 }
       
  1101 
       
  1102 
       
  1103 static void __devexit rtl8139_remove_one (struct pci_dev *pdev)
       
  1104 {
       
  1105 	struct net_device *dev = pci_get_drvdata (pdev);
       
  1106 
       
  1107 	assert (dev != NULL);
       
  1108 
       
  1109 	flush_scheduled_work();
       
  1110 
       
  1111 	unregister_netdev (dev);
       
  1112 
       
  1113 	__rtl8139_cleanup_dev (dev);
       
  1114 	pci_disable_device (pdev);
       
  1115 }
       
  1116 
       
  1117 
       
  1118 /* Serial EEPROM section. */
       
  1119 
       
  1120 /*  EEPROM_Ctrl bits. */
       
  1121 #define EE_SHIFT_CLK	0x04	/* EEPROM shift clock. */
       
  1122 #define EE_CS			0x08	/* EEPROM chip select. */
       
  1123 #define EE_DATA_WRITE	0x02	/* EEPROM chip data in. */
       
  1124 #define EE_WRITE_0		0x00
       
  1125 #define EE_WRITE_1		0x02
       
  1126 #define EE_DATA_READ	0x01	/* EEPROM chip data out. */
       
  1127 #define EE_ENB			(0x80 | EE_CS)
       
  1128 
       
  1129 /* Delay between EEPROM clock transitions.
       
  1130    No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
       
  1131  */
       
  1132 
       
  1133 #define eeprom_delay()	(void)RTL_R32(Cfg9346)
       
  1134 
       
  1135 /* The EEPROM commands include the alway-set leading bit. */
       
  1136 #define EE_WRITE_CMD	(5)
       
  1137 #define EE_READ_CMD		(6)
       
  1138 #define EE_ERASE_CMD	(7)
       
  1139 
       
  1140 static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len)
       
  1141 {
       
  1142 	int i;
       
  1143 	unsigned retval = 0;
       
  1144 	int read_cmd = location | (EE_READ_CMD << addr_len);
       
  1145 
       
  1146 	RTL_W8 (Cfg9346, EE_ENB & ~EE_CS);
       
  1147 	RTL_W8 (Cfg9346, EE_ENB);
       
  1148 	eeprom_delay ();
       
  1149 
       
  1150 	/* Shift the read command bits out. */
       
  1151 	for (i = 4 + addr_len; i >= 0; i--) {
       
  1152 		int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
       
  1153 		RTL_W8 (Cfg9346, EE_ENB | dataval);
       
  1154 		eeprom_delay ();
       
  1155 		RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK);
       
  1156 		eeprom_delay ();
       
  1157 	}
       
  1158 	RTL_W8 (Cfg9346, EE_ENB);
       
  1159 	eeprom_delay ();
       
  1160 
       
  1161 	for (i = 16; i > 0; i--) {
       
  1162 		RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK);
       
  1163 		eeprom_delay ();
       
  1164 		retval =
       
  1165 		    (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 :
       
  1166 				     0);
       
  1167 		RTL_W8 (Cfg9346, EE_ENB);
       
  1168 		eeprom_delay ();
       
  1169 	}
       
  1170 
       
  1171 	/* Terminate the EEPROM access. */
       
  1172 	RTL_W8 (Cfg9346, ~EE_CS);
       
  1173 	eeprom_delay ();
       
  1174 
       
  1175 	return retval;
       
  1176 }
       
  1177 
       
  1178 /* MII serial management: mostly bogus for now. */
       
  1179 /* Read and write the MII management registers using software-generated
       
  1180    serial MDIO protocol.
       
  1181    The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
       
  1182    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
       
  1183    "overclocking" issues. */
       
  1184 #define MDIO_DIR		0x80
       
  1185 #define MDIO_DATA_OUT	0x04
       
  1186 #define MDIO_DATA_IN	0x02
       
  1187 #define MDIO_CLK		0x01
       
  1188 #define MDIO_WRITE0 (MDIO_DIR)
       
  1189 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
       
  1190 
       
  1191 #define mdio_delay()	RTL_R8(Config4)
       
  1192 
       
  1193 
       
  1194 static const char mii_2_8139_map[8] = {
       
  1195 	BasicModeCtrl,
       
  1196 	BasicModeStatus,
       
  1197 	0,
       
  1198 	0,
       
  1199 	NWayAdvert,
       
  1200 	NWayLPAR,
       
  1201 	NWayExpansion,
       
  1202 	0
       
  1203 };
       
  1204 
       
  1205 
       
  1206 #ifdef CONFIG_8139TOO_8129
       
  1207 /* Syncronize the MII management interface by shifting 32 one bits out. */
       
  1208 static void mdio_sync (void __iomem *ioaddr)
       
  1209 {
       
  1210 	int i;
       
  1211 
       
  1212 	for (i = 32; i >= 0; i--) {
       
  1213 		RTL_W8 (Config4, MDIO_WRITE1);
       
  1214 		mdio_delay ();
       
  1215 		RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK);
       
  1216 		mdio_delay ();
       
  1217 	}
       
  1218 }
       
  1219 #endif
       
  1220 
       
  1221 static int mdio_read (struct net_device *dev, int phy_id, int location)
       
  1222 {
       
  1223 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1224 	int retval = 0;
       
  1225 #ifdef CONFIG_8139TOO_8129
       
  1226 	void __iomem *ioaddr = tp->mmio_addr;
       
  1227 	int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
       
  1228 	int i;
       
  1229 #endif
       
  1230 
       
  1231 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1232 		void __iomem *ioaddr = tp->mmio_addr;
       
  1233 		return location < 8 && mii_2_8139_map[location] ?
       
  1234 		    RTL_R16 (mii_2_8139_map[location]) : 0;
       
  1235 	}
       
  1236 
       
  1237 #ifdef CONFIG_8139TOO_8129
       
  1238 	mdio_sync (ioaddr);
       
  1239 	/* Shift the read command bits out. */
       
  1240 	for (i = 15; i >= 0; i--) {
       
  1241 		int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
       
  1242 
       
  1243 		RTL_W8 (Config4, MDIO_DIR | dataval);
       
  1244 		mdio_delay ();
       
  1245 		RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK);
       
  1246 		mdio_delay ();
       
  1247 	}
       
  1248 
       
  1249 	/* Read the two transition, 16 data, and wire-idle bits. */
       
  1250 	for (i = 19; i > 0; i--) {
       
  1251 		RTL_W8 (Config4, 0);
       
  1252 		mdio_delay ();
       
  1253 		retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0);
       
  1254 		RTL_W8 (Config4, MDIO_CLK);
       
  1255 		mdio_delay ();
       
  1256 	}
       
  1257 #endif
       
  1258 
       
  1259 	return (retval >> 1) & 0xffff;
       
  1260 }
       
  1261 
       
  1262 
       
  1263 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
  1264 			int value)
       
  1265 {
       
  1266 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1267 #ifdef CONFIG_8139TOO_8129
       
  1268 	void __iomem *ioaddr = tp->mmio_addr;
       
  1269 	int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
       
  1270 	int i;
       
  1271 #endif
       
  1272 
       
  1273 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1274 		void __iomem *ioaddr = tp->mmio_addr;
       
  1275 		if (location == 0) {
       
  1276 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1277 			RTL_W16 (BasicModeCtrl, value);
       
  1278 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1279 		} else if (location < 8 && mii_2_8139_map[location])
       
  1280 			RTL_W16 (mii_2_8139_map[location], value);
       
  1281 		return;
       
  1282 	}
       
  1283 
       
  1284 #ifdef CONFIG_8139TOO_8129
       
  1285 	mdio_sync (ioaddr);
       
  1286 
       
  1287 	/* Shift the command bits out. */
       
  1288 	for (i = 31; i >= 0; i--) {
       
  1289 		int dataval =
       
  1290 		    (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
       
  1291 		RTL_W8 (Config4, dataval);
       
  1292 		mdio_delay ();
       
  1293 		RTL_W8 (Config4, dataval | MDIO_CLK);
       
  1294 		mdio_delay ();
       
  1295 	}
       
  1296 	/* Clear out extra bits. */
       
  1297 	for (i = 2; i > 0; i--) {
       
  1298 		RTL_W8 (Config4, 0);
       
  1299 		mdio_delay ();
       
  1300 		RTL_W8 (Config4, MDIO_CLK);
       
  1301 		mdio_delay ();
       
  1302 	}
       
  1303 #endif
       
  1304 }
       
  1305 
       
  1306 
       
  1307 static int rtl8139_open (struct net_device *dev)
       
  1308 {
       
  1309 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1310 	int retval;
       
  1311 	void __iomem *ioaddr = tp->mmio_addr;
       
  1312 
       
  1313 	retval = request_irq (dev->irq, rtl8139_interrupt, IRQF_SHARED, dev->name, dev);
       
  1314 	if (retval)
       
  1315 		return retval;
       
  1316 
       
  1317 	tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  1318 					   &tp->tx_bufs_dma);
       
  1319 	tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  1320 					   &tp->rx_ring_dma);
       
  1321 	if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
       
  1322 		free_irq(dev->irq, dev);
       
  1323 
       
  1324 		if (tp->tx_bufs)
       
  1325 			pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  1326 					    tp->tx_bufs, tp->tx_bufs_dma);
       
  1327 		if (tp->rx_ring)
       
  1328 			pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  1329 					    tp->rx_ring, tp->rx_ring_dma);
       
  1330 
       
  1331 		return -ENOMEM;
       
  1332 
       
  1333 	}
       
  1334 
       
  1335 	tp->mii.full_duplex = tp->mii.force_media;
       
  1336 	tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
       
  1337 
       
  1338 	rtl8139_init_ring (dev);
       
  1339 	rtl8139_hw_start (dev);
       
  1340 	netif_start_queue (dev);
       
  1341 
       
  1342 	if (netif_msg_ifup(tp))
       
  1343 		printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#llx IRQ %d"
       
  1344 			" GP Pins %2.2x %s-duplex.\n", dev->name,
       
  1345 			(unsigned long long)pci_resource_start (tp->pci_dev, 1),
       
  1346 			dev->irq, RTL_R8 (MediaStatus),
       
  1347 			tp->mii.full_duplex ? "full" : "half");
       
  1348 
       
  1349 	rtl8139_start_thread(tp);
       
  1350 
       
  1351 	return 0;
       
  1352 }
       
  1353 
       
  1354 
       
  1355 static void rtl_check_media (struct net_device *dev, unsigned int init_media)
       
  1356 {
       
  1357 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1358 
       
  1359 	if (tp->phys[0] >= 0) {
       
  1360 		mii_check_media(&tp->mii, netif_msg_link(tp), init_media);
       
  1361 	}
       
  1362 }
       
  1363 
       
  1364 /* Start the hardware at open or resume. */
       
  1365 static void rtl8139_hw_start (struct net_device *dev)
       
  1366 {
       
  1367 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1368 	void __iomem *ioaddr = tp->mmio_addr;
       
  1369 	u32 i;
       
  1370 	u8 tmp;
       
  1371 
       
  1372 	/* Bring old chips out of low-power mode. */
       
  1373 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1374 		RTL_W8 (HltClk, 'R');
       
  1375 
       
  1376 	rtl8139_chip_reset (ioaddr);
       
  1377 
       
  1378 	/* unlock Config[01234] and BMCR register writes */
       
  1379 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1380 	/* Restore our idea of the MAC address. */
       
  1381 	RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
       
  1382 	RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
       
  1383 
       
  1384 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1385 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1386 
       
  1387 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1388 	RTL_W32 (RxConfig, tp->rx_config);
       
  1389 	RTL_W32 (TxConfig, rtl8139_tx_config);
       
  1390 
       
  1391 	tp->cur_rx = 0;
       
  1392 
       
  1393 	rtl_check_media (dev, 1);
       
  1394 
       
  1395 	if (tp->chipset >= CH_8139B) {
       
  1396 		/* Disable magic packet scanning, which is enabled
       
  1397 		 * when PM is enabled in Config1.  It can be reenabled
       
  1398 		 * via ETHTOOL_SWOL if desired.  */
       
  1399 		RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
       
  1400 	}
       
  1401 
       
  1402 	DPRINTK("init buffer addresses\n");
       
  1403 
       
  1404 	/* Lock Config[01234] and BMCR register writes */
       
  1405 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1406 
       
  1407 	/* init Rx ring buffer DMA address */
       
  1408 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1409 
       
  1410 	/* init Tx buffer DMA addresses */
       
  1411 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1412 		RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
       
  1413 
       
  1414 	RTL_W32 (RxMissed, 0);
       
  1415 
       
  1416 	rtl8139_set_rx_mode (dev);
       
  1417 
       
  1418 	/* no early-rx interrupts */
       
  1419 	RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
       
  1420 
       
  1421 	/* make sure RxTx has started */
       
  1422 	tmp = RTL_R8 (ChipCmd);
       
  1423 	if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
       
  1424 		RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1425 
       
  1426 	/* Enable all known interrupts by setting the interrupt mask. */
       
  1427 	RTL_W16 (IntrMask, rtl8139_intr_mask);
       
  1428 }
       
  1429 
       
  1430 
       
  1431 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
       
  1432 static void rtl8139_init_ring (struct net_device *dev)
       
  1433 {
       
  1434 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1435 	int i;
       
  1436 
       
  1437 	tp->cur_rx = 0;
       
  1438 	tp->cur_tx = 0;
       
  1439 	tp->dirty_tx = 0;
       
  1440 
       
  1441 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1442 		tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
       
  1443 }
       
  1444 
       
  1445 
       
  1446 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
       
  1447 static int next_tick = 3 * HZ;
       
  1448 
       
  1449 #ifndef CONFIG_8139TOO_TUNE_TWISTER
       
  1450 static inline void rtl8139_tune_twister (struct net_device *dev,
       
  1451 				  struct rtl8139_private *tp) {}
       
  1452 #else
       
  1453 enum TwisterParamVals {
       
  1454 	PARA78_default	= 0x78fa8388,
       
  1455 	PARA7c_default	= 0xcb38de43,	/* param[0][3] */
       
  1456 	PARA7c_xxx	= 0xcb38de43,
       
  1457 };
       
  1458 
       
  1459 static const unsigned long param[4][4] = {
       
  1460 	{0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
       
  1461 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1462 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1463 	{0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
       
  1464 };
       
  1465 
       
  1466 static void rtl8139_tune_twister (struct net_device *dev,
       
  1467 				  struct rtl8139_private *tp)
       
  1468 {
       
  1469 	int linkcase;
       
  1470 	void __iomem *ioaddr = tp->mmio_addr;
       
  1471 
       
  1472 	/* This is a complicated state machine to configure the "twister" for
       
  1473 	   impedance/echos based on the cable length.
       
  1474 	   All of this is magic and undocumented.
       
  1475 	 */
       
  1476 	switch (tp->twistie) {
       
  1477 	case 1:
       
  1478 		if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
       
  1479 			/* We have link beat, let us tune the twister. */
       
  1480 			RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
       
  1481 			tp->twistie = 2;	/* Change to state 2. */
       
  1482 			next_tick = HZ / 10;
       
  1483 		} else {
       
  1484 			/* Just put in some reasonable defaults for when beat returns. */
       
  1485 			RTL_W16 (CSCR, CSCR_LinkDownCmd);
       
  1486 			RTL_W32 (FIFOTMS, 0x20);	/* Turn on cable test mode. */
       
  1487 			RTL_W32 (PARA78, PARA78_default);
       
  1488 			RTL_W32 (PARA7c, PARA7c_default);
       
  1489 			tp->twistie = 0;	/* Bail from future actions. */
       
  1490 		}
       
  1491 		break;
       
  1492 	case 2:
       
  1493 		/* Read how long it took to hear the echo. */
       
  1494 		linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
       
  1495 		if (linkcase == 0x7000)
       
  1496 			tp->twist_row = 3;
       
  1497 		else if (linkcase == 0x3000)
       
  1498 			tp->twist_row = 2;
       
  1499 		else if (linkcase == 0x1000)
       
  1500 			tp->twist_row = 1;
       
  1501 		else
       
  1502 			tp->twist_row = 0;
       
  1503 		tp->twist_col = 0;
       
  1504 		tp->twistie = 3;	/* Change to state 2. */
       
  1505 		next_tick = HZ / 10;
       
  1506 		break;
       
  1507 	case 3:
       
  1508 		/* Put out four tuning parameters, one per 100msec. */
       
  1509 		if (tp->twist_col == 0)
       
  1510 			RTL_W16 (FIFOTMS, 0);
       
  1511 		RTL_W32 (PARA7c, param[(int) tp->twist_row]
       
  1512 			 [(int) tp->twist_col]);
       
  1513 		next_tick = HZ / 10;
       
  1514 		if (++tp->twist_col >= 4) {
       
  1515 			/* For short cables we are done.
       
  1516 			   For long cables (row == 3) check for mistune. */
       
  1517 			tp->twistie =
       
  1518 			    (tp->twist_row == 3) ? 4 : 0;
       
  1519 		}
       
  1520 		break;
       
  1521 	case 4:
       
  1522 		/* Special case for long cables: check for mistune. */
       
  1523 		if ((RTL_R16 (CSCR) &
       
  1524 		     CSCR_LinkStatusBits) == 0x7000) {
       
  1525 			tp->twistie = 0;
       
  1526 			break;
       
  1527 		} else {
       
  1528 			RTL_W32 (PARA7c, 0xfb38de03);
       
  1529 			tp->twistie = 5;
       
  1530 			next_tick = HZ / 10;
       
  1531 		}
       
  1532 		break;
       
  1533 	case 5:
       
  1534 		/* Retune for shorter cable (column 2). */
       
  1535 		RTL_W32 (FIFOTMS, 0x20);
       
  1536 		RTL_W32 (PARA78, PARA78_default);
       
  1537 		RTL_W32 (PARA7c, PARA7c_default);
       
  1538 		RTL_W32 (FIFOTMS, 0x00);
       
  1539 		tp->twist_row = 2;
       
  1540 		tp->twist_col = 0;
       
  1541 		tp->twistie = 3;
       
  1542 		next_tick = HZ / 10;
       
  1543 		break;
       
  1544 
       
  1545 	default:
       
  1546 		/* do nothing */
       
  1547 		break;
       
  1548 	}
       
  1549 }
       
  1550 #endif /* CONFIG_8139TOO_TUNE_TWISTER */
       
  1551 
       
  1552 static inline void rtl8139_thread_iter (struct net_device *dev,
       
  1553 				 struct rtl8139_private *tp,
       
  1554 				 void __iomem *ioaddr)
       
  1555 {
       
  1556 	int mii_lpa;
       
  1557 
       
  1558 	mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
       
  1559 
       
  1560 	if (!tp->mii.force_media && mii_lpa != 0xffff) {
       
  1561 		int duplex = (mii_lpa & LPA_100FULL)
       
  1562 		    || (mii_lpa & 0x01C0) == 0x0040;
       
  1563 		if (tp->mii.full_duplex != duplex) {
       
  1564 			tp->mii.full_duplex = duplex;
       
  1565 
       
  1566 			if (mii_lpa) {
       
  1567 				printk (KERN_INFO
       
  1568 					"%s: Setting %s-duplex based on MII #%d link"
       
  1569 					" partner ability of %4.4x.\n",
       
  1570 					dev->name,
       
  1571 					tp->mii.full_duplex ? "full" : "half",
       
  1572 					tp->phys[0], mii_lpa);
       
  1573 			} else {
       
  1574 				printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n",
       
  1575 				       dev->name);
       
  1576 			}
       
  1577 #if 0
       
  1578 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1579 			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
       
  1580 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1581 #endif
       
  1582 		}
       
  1583 	}
       
  1584 
       
  1585 	next_tick = HZ * 60;
       
  1586 
       
  1587 	rtl8139_tune_twister (dev, tp);
       
  1588 
       
  1589 	DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n",
       
  1590 		 dev->name, RTL_R16 (NWayLPAR));
       
  1591 	DPRINTK ("%s:  Other registers are IntMask %4.4x IntStatus %4.4x\n",
       
  1592 		 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus));
       
  1593 	DPRINTK ("%s:  Chip config %2.2x %2.2x.\n",
       
  1594 		 dev->name, RTL_R8 (Config0),
       
  1595 		 RTL_R8 (Config1));
       
  1596 }
       
  1597 
       
  1598 static void rtl8139_thread (struct work_struct *work)
       
  1599 {
       
  1600 	struct rtl8139_private *tp =
       
  1601 		container_of(work, struct rtl8139_private, thread.work);
       
  1602 	struct net_device *dev = tp->mii.dev;
       
  1603 	unsigned long thr_delay = next_tick;
       
  1604 
       
  1605 	rtnl_lock();
       
  1606 
       
  1607 	if (!netif_running(dev))
       
  1608 		goto out_unlock;
       
  1609 
       
  1610 	if (tp->watchdog_fired) {
       
  1611 		tp->watchdog_fired = 0;
       
  1612 		rtl8139_tx_timeout_task(work);
       
  1613 	} else
       
  1614 		rtl8139_thread_iter(dev, tp, tp->mmio_addr);
       
  1615 
       
  1616 	if (tp->have_thread)
       
  1617 		schedule_delayed_work(&tp->thread, thr_delay);
       
  1618 out_unlock:
       
  1619 	rtnl_unlock ();
       
  1620 }
       
  1621 
       
  1622 static void rtl8139_start_thread(struct rtl8139_private *tp)
       
  1623 {
       
  1624 	tp->twistie = 0;
       
  1625 	if (tp->chipset == CH_8139_K)
       
  1626 		tp->twistie = 1;
       
  1627 	else if (tp->drv_flags & HAS_LNK_CHNG)
       
  1628 		return;
       
  1629 
       
  1630 	tp->have_thread = 1;
       
  1631 	tp->watchdog_fired = 0;
       
  1632 
       
  1633 	schedule_delayed_work(&tp->thread, next_tick);
       
  1634 }
       
  1635 
       
  1636 static inline void rtl8139_tx_clear (struct rtl8139_private *tp)
       
  1637 {
       
  1638 	tp->cur_tx = 0;
       
  1639 	tp->dirty_tx = 0;
       
  1640 
       
  1641 	/* XXX account for unsent Tx packets in tp->stats.tx_dropped */
       
  1642 }
       
  1643 
       
  1644 static void rtl8139_tx_timeout_task (struct work_struct *work)
       
  1645 {
       
  1646 	struct rtl8139_private *tp =
       
  1647 		container_of(work, struct rtl8139_private, thread.work);
       
  1648 	struct net_device *dev = tp->mii.dev;
       
  1649 	void __iomem *ioaddr = tp->mmio_addr;
       
  1650 	int i;
       
  1651 	u8 tmp8;
       
  1652 
       
  1653 	printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x "
       
  1654 		"media %2.2x.\n", dev->name, RTL_R8 (ChipCmd),
       
  1655 		RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus));
       
  1656 	/* Emit info to figure out what went wrong. */
       
  1657 	printk (KERN_DEBUG "%s: Tx queue start entry %ld  dirty entry %ld.\n",
       
  1658 		dev->name, tp->cur_tx, tp->dirty_tx);
       
  1659 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1660 		printk (KERN_DEBUG "%s:  Tx descriptor %d is %8.8lx.%s\n",
       
  1661 			dev->name, i, RTL_R32 (TxStatus0 + (i * 4)),
       
  1662 			i == tp->dirty_tx % NUM_TX_DESC ?
       
  1663 				" (queue head)" : "");
       
  1664 
       
  1665 	tp->xstats.tx_timeouts++;
       
  1666 
       
  1667 	/* disable Tx ASAP, if not already */
       
  1668 	tmp8 = RTL_R8 (ChipCmd);
       
  1669 	if (tmp8 & CmdTxEnb)
       
  1670 		RTL_W8 (ChipCmd, CmdRxEnb);
       
  1671 
       
  1672 	spin_lock_bh(&tp->rx_lock);
       
  1673 	/* Disable interrupts by clearing the interrupt mask. */
       
  1674 	RTL_W16 (IntrMask, 0x0000);
       
  1675 
       
  1676 	/* Stop a shared interrupt from scavenging while we are. */
       
  1677 	spin_lock_irq(&tp->lock);
       
  1678 	rtl8139_tx_clear (tp);
       
  1679 	spin_unlock_irq(&tp->lock);
       
  1680 
       
  1681 	/* ...and finally, reset everything */
       
  1682 	if (netif_running(dev)) {
       
  1683 		rtl8139_hw_start (dev);
       
  1684 		netif_wake_queue (dev);
       
  1685 	}
       
  1686 	spin_unlock_bh(&tp->rx_lock);
       
  1687 }
       
  1688 
       
  1689 static void rtl8139_tx_timeout (struct net_device *dev)
       
  1690 {
       
  1691 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1692 
       
  1693 	tp->watchdog_fired = 1;
       
  1694 	if (!tp->have_thread) {
       
  1695 		INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
       
  1696 		schedule_delayed_work(&tp->thread, next_tick);
       
  1697 	}
       
  1698 }
       
  1699 
       
  1700 static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
       
  1701 {
       
  1702 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1703 	void __iomem *ioaddr = tp->mmio_addr;
       
  1704 	unsigned int entry;
       
  1705 	unsigned int len = skb->len;
       
  1706 	unsigned long flags;
       
  1707 
       
  1708 	/* Calculate the next Tx descriptor entry. */
       
  1709 	entry = tp->cur_tx % NUM_TX_DESC;
       
  1710 
       
  1711 	/* Note: the chip doesn't have auto-pad! */
       
  1712 	if (likely(len < TX_BUF_SIZE)) {
       
  1713 		if (len < ETH_ZLEN)
       
  1714 			memset(tp->tx_buf[entry], 0, ETH_ZLEN);
       
  1715 		skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
       
  1716 		dev_kfree_skb(skb);
       
  1717 	} else {
       
  1718 		dev_kfree_skb(skb);
       
  1719 		tp->stats.tx_dropped++;
       
  1720 		return 0;
       
  1721 	}
       
  1722 
       
  1723 	spin_lock_irqsave(&tp->lock, flags);
       
  1724 	RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
       
  1725 		   tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
       
  1726 
       
  1727 	dev->trans_start = jiffies;
       
  1728 
       
  1729 	tp->cur_tx++;
       
  1730 	wmb();
       
  1731 
       
  1732 	if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
       
  1733 		netif_stop_queue (dev);
       
  1734 	spin_unlock_irqrestore(&tp->lock, flags);
       
  1735 
       
  1736 	if (netif_msg_tx_queued(tp))
       
  1737 		printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n",
       
  1738 			dev->name, len, entry);
       
  1739 
       
  1740 	return 0;
       
  1741 }
       
  1742 
       
  1743 
       
  1744 static void rtl8139_tx_interrupt (struct net_device *dev,
       
  1745 				  struct rtl8139_private *tp,
       
  1746 				  void __iomem *ioaddr)
       
  1747 {
       
  1748 	unsigned long dirty_tx, tx_left;
       
  1749 
       
  1750 	assert (dev != NULL);
       
  1751 	assert (ioaddr != NULL);
       
  1752 
       
  1753 	dirty_tx = tp->dirty_tx;
       
  1754 	tx_left = tp->cur_tx - dirty_tx;
       
  1755 	while (tx_left > 0) {
       
  1756 		int entry = dirty_tx % NUM_TX_DESC;
       
  1757 		int txstatus;
       
  1758 
       
  1759 		txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
       
  1760 
       
  1761 		if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
       
  1762 			break;	/* It still hasn't been Txed */
       
  1763 
       
  1764 		/* Note: TxCarrierLost is always asserted at 100mbps. */
       
  1765 		if (txstatus & (TxOutOfWindow | TxAborted)) {
       
  1766 			/* There was an major error, log it. */
       
  1767 			if (netif_msg_tx_err(tp))
       
  1768 				printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
       
  1769 					dev->name, txstatus);
       
  1770 			tp->stats.tx_errors++;
       
  1771 			if (txstatus & TxAborted) {
       
  1772 				tp->stats.tx_aborted_errors++;
       
  1773 				RTL_W32 (TxConfig, TxClearAbt);
       
  1774 				RTL_W16 (IntrStatus, TxErr);
       
  1775 				wmb();
       
  1776 			}
       
  1777 			if (txstatus & TxCarrierLost)
       
  1778 				tp->stats.tx_carrier_errors++;
       
  1779 			if (txstatus & TxOutOfWindow)
       
  1780 				tp->stats.tx_window_errors++;
       
  1781 		} else {
       
  1782 			if (txstatus & TxUnderrun) {
       
  1783 				/* Add 64 to the Tx FIFO threshold. */
       
  1784 				if (tp->tx_flag < 0x00300000)
       
  1785 					tp->tx_flag += 0x00020000;
       
  1786 				tp->stats.tx_fifo_errors++;
       
  1787 			}
       
  1788 			tp->stats.collisions += (txstatus >> 24) & 15;
       
  1789 			tp->stats.tx_bytes += txstatus & 0x7ff;
       
  1790 			tp->stats.tx_packets++;
       
  1791 		}
       
  1792 
       
  1793 		dirty_tx++;
       
  1794 		tx_left--;
       
  1795 	}
       
  1796 
       
  1797 #ifndef RTL8139_NDEBUG
       
  1798 	if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
       
  1799 		printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n",
       
  1800 		        dev->name, dirty_tx, tp->cur_tx);
       
  1801 		dirty_tx += NUM_TX_DESC;
       
  1802 	}
       
  1803 #endif /* RTL8139_NDEBUG */
       
  1804 
       
  1805 	/* only wake the queue if we did work, and the queue is stopped */
       
  1806 	if (tp->dirty_tx != dirty_tx) {
       
  1807 		tp->dirty_tx = dirty_tx;
       
  1808 		mb();
       
  1809 		netif_wake_queue (dev);
       
  1810 	}
       
  1811 }
       
  1812 
       
  1813 
       
  1814 /* TODO: clean this up!  Rx reset need not be this intensive */
       
  1815 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
       
  1816 			    struct rtl8139_private *tp, void __iomem *ioaddr)
       
  1817 {
       
  1818 	u8 tmp8;
       
  1819 #ifdef CONFIG_8139_OLD_RX_RESET
       
  1820 	int tmp_work;
       
  1821 #endif
       
  1822 
       
  1823 	if (netif_msg_rx_err (tp))
       
  1824 		printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n",
       
  1825 			dev->name, rx_status);
       
  1826 	tp->stats.rx_errors++;
       
  1827 	if (!(rx_status & RxStatusOK)) {
       
  1828 		if (rx_status & RxTooLong) {
       
  1829 			DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
       
  1830 			 	dev->name, rx_status);
       
  1831 			/* A.C.: The chip hangs here. */
       
  1832 		}
       
  1833 		if (rx_status & (RxBadSymbol | RxBadAlign))
       
  1834 			tp->stats.rx_frame_errors++;
       
  1835 		if (rx_status & (RxRunt | RxTooLong))
       
  1836 			tp->stats.rx_length_errors++;
       
  1837 		if (rx_status & RxCRCErr)
       
  1838 			tp->stats.rx_crc_errors++;
       
  1839 	} else {
       
  1840 		tp->xstats.rx_lost_in_ring++;
       
  1841 	}
       
  1842 
       
  1843 #ifndef CONFIG_8139_OLD_RX_RESET
       
  1844 	tmp8 = RTL_R8 (ChipCmd);
       
  1845 	RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
       
  1846 	RTL_W8 (ChipCmd, tmp8);
       
  1847 	RTL_W32 (RxConfig, tp->rx_config);
       
  1848 	tp->cur_rx = 0;
       
  1849 #else
       
  1850 	/* Reset the receiver, based on RealTek recommendation. (Bug?) */
       
  1851 
       
  1852 	/* disable receive */
       
  1853 	RTL_W8_F (ChipCmd, CmdTxEnb);
       
  1854 	tmp_work = 200;
       
  1855 	while (--tmp_work > 0) {
       
  1856 		udelay(1);
       
  1857 		tmp8 = RTL_R8 (ChipCmd);
       
  1858 		if (!(tmp8 & CmdRxEnb))
       
  1859 			break;
       
  1860 	}
       
  1861 	if (tmp_work <= 0)
       
  1862 		printk (KERN_WARNING PFX "rx stop wait too long\n");
       
  1863 	/* restart receive */
       
  1864 	tmp_work = 200;
       
  1865 	while (--tmp_work > 0) {
       
  1866 		RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1867 		udelay(1);
       
  1868 		tmp8 = RTL_R8 (ChipCmd);
       
  1869 		if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
       
  1870 			break;
       
  1871 	}
       
  1872 	if (tmp_work <= 0)
       
  1873 		printk (KERN_WARNING PFX "tx/rx enable wait too long\n");
       
  1874 
       
  1875 	/* and reinitialize all rx related registers */
       
  1876 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1877 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1878 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1879 
       
  1880 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1881 	RTL_W32 (RxConfig, tp->rx_config);
       
  1882 	tp->cur_rx = 0;
       
  1883 
       
  1884 	DPRINTK("init buffer addresses\n");
       
  1885 
       
  1886 	/* Lock Config[01234] and BMCR register writes */
       
  1887 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1888 
       
  1889 	/* init Rx ring buffer DMA address */
       
  1890 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1891 
       
  1892 	/* A.C.: Reset the multicast list. */
       
  1893 	__set_rx_mode (dev);
       
  1894 #endif
       
  1895 }
       
  1896 
       
  1897 #if RX_BUF_IDX == 3
       
  1898 static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
       
  1899 				 u32 offset, unsigned int size)
       
  1900 {
       
  1901 	u32 left = RX_BUF_LEN - offset;
       
  1902 
       
  1903 	if (size > left) {
       
  1904 		skb_copy_to_linear_data(skb, ring + offset, left);
       
  1905 		skb_copy_to_linear_data_offset(skb, left, ring, size - left);
       
  1906 	} else
       
  1907 		skb_copy_to_linear_data(skb, ring + offset, size);
       
  1908 }
       
  1909 #endif
       
  1910 
       
  1911 static void rtl8139_isr_ack(struct rtl8139_private *tp)
       
  1912 {
       
  1913 	void __iomem *ioaddr = tp->mmio_addr;
       
  1914 	u16 status;
       
  1915 
       
  1916 	status = RTL_R16 (IntrStatus) & RxAckBits;
       
  1917 
       
  1918 	/* Clear out errors and receive interrupts */
       
  1919 	if (likely(status != 0)) {
       
  1920 		if (unlikely(status & (RxFIFOOver | RxOverflow))) {
       
  1921 			tp->stats.rx_errors++;
       
  1922 			if (status & RxFIFOOver)
       
  1923 				tp->stats.rx_fifo_errors++;
       
  1924 		}
       
  1925 		RTL_W16_F (IntrStatus, RxAckBits);
       
  1926 	}
       
  1927 }
       
  1928 
       
  1929 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
       
  1930 		      int budget)
       
  1931 {
       
  1932 	void __iomem *ioaddr = tp->mmio_addr;
       
  1933 	int received = 0;
       
  1934 	unsigned char *rx_ring = tp->rx_ring;
       
  1935 	unsigned int cur_rx = tp->cur_rx;
       
  1936 	unsigned int rx_size = 0;
       
  1937 
       
  1938 	DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
       
  1939 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx,
       
  1940 		 RTL_R16 (RxBufAddr),
       
  1941 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
       
  1942 
       
  1943 	while (netif_running(dev) && received < budget
       
  1944 	       && (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
       
  1945 		u32 ring_offset = cur_rx % RX_BUF_LEN;
       
  1946 		u32 rx_status;
       
  1947 		unsigned int pkt_size;
       
  1948 		struct sk_buff *skb;
       
  1949 
       
  1950 		rmb();
       
  1951 
       
  1952 		/* read size+status of next frame from DMA ring buffer */
       
  1953 		rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset));
       
  1954 		rx_size = rx_status >> 16;
       
  1955 		pkt_size = rx_size - 4;
       
  1956 
       
  1957 		if (netif_msg_rx_status(tp))
       
  1958 			printk(KERN_DEBUG "%s:  rtl8139_rx() status %4.4x, size %4.4x,"
       
  1959 				" cur %4.4x.\n", dev->name, rx_status,
       
  1960 			 rx_size, cur_rx);
       
  1961 #if RTL8139_DEBUG > 2
       
  1962 		{
       
  1963 			int i;
       
  1964 			DPRINTK ("%s: Frame contents ", dev->name);
       
  1965 			for (i = 0; i < 70; i++)
       
  1966 				printk (" %2.2x",
       
  1967 					rx_ring[ring_offset + i]);
       
  1968 			printk (".\n");
       
  1969 		}
       
  1970 #endif
       
  1971 
       
  1972 		/* Packet copy from FIFO still in progress.
       
  1973 		 * Theoretically, this should never happen
       
  1974 		 * since EarlyRx is disabled.
       
  1975 		 */
       
  1976 		if (unlikely(rx_size == 0xfff0)) {
       
  1977 			if (!tp->fifo_copy_timeout)
       
  1978 				tp->fifo_copy_timeout = jiffies + 2;
       
  1979 			else if (time_after(jiffies, tp->fifo_copy_timeout)) {
       
  1980 				DPRINTK ("%s: hung FIFO. Reset.", dev->name);
       
  1981 				rx_size = 0;
       
  1982 				goto no_early_rx;
       
  1983 			}
       
  1984 			if (netif_msg_intr(tp)) {
       
  1985 				printk(KERN_DEBUG "%s: fifo copy in progress.",
       
  1986 				       dev->name);
       
  1987 			}
       
  1988 			tp->xstats.early_rx++;
       
  1989 			break;
       
  1990 		}
       
  1991 
       
  1992 no_early_rx:
       
  1993 		tp->fifo_copy_timeout = 0;
       
  1994 
       
  1995 		/* If Rx err or invalid rx_size/rx_status received
       
  1996 		 * (which happens if we get lost in the ring),
       
  1997 		 * Rx process gets reset, so we abort any further
       
  1998 		 * Rx processing.
       
  1999 		 */
       
  2000 		if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
       
  2001 			     (rx_size < 8) ||
       
  2002 			     (!(rx_status & RxStatusOK)))) {
       
  2003 			rtl8139_rx_err (rx_status, dev, tp, ioaddr);
       
  2004 			received = -1;
       
  2005 			goto out;
       
  2006 		}
       
  2007 
       
  2008 		/* Malloc up new buffer, compatible with net-2e. */
       
  2009 		/* Omit the four octet CRC from the length. */
       
  2010 
       
  2011 		skb = dev_alloc_skb (pkt_size + 2);
       
  2012 		if (likely(skb)) {
       
  2013 			skb_reserve (skb, 2);	/* 16 byte align the IP fields. */
       
  2014 #if RX_BUF_IDX == 3
       
  2015 			wrap_copy(skb, rx_ring, ring_offset+4, pkt_size);
       
  2016 #else
       
  2017 			skb_copy_to_linear_data (skb, &rx_ring[ring_offset + 4], pkt_size);
       
  2018 #endif
       
  2019 			skb_put (skb, pkt_size);
       
  2020 
       
  2021 			skb->protocol = eth_type_trans (skb, dev);
       
  2022 
       
  2023 			dev->last_rx = jiffies;
       
  2024 			tp->stats.rx_bytes += pkt_size;
       
  2025 			tp->stats.rx_packets++;
       
  2026 
       
  2027 			netif_receive_skb (skb);
       
  2028 		} else {
       
  2029 			if (net_ratelimit())
       
  2030 				printk (KERN_WARNING
       
  2031 					"%s: Memory squeeze, dropping packet.\n",
       
  2032 					dev->name);
       
  2033 			tp->stats.rx_dropped++;
       
  2034 		}
       
  2035 		received++;
       
  2036 
       
  2037 		cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
       
  2038 		RTL_W16 (RxBufPtr, (u16) (cur_rx - 16));
       
  2039 
       
  2040 		rtl8139_isr_ack(tp);
       
  2041 	}
       
  2042 
       
  2043 	if (unlikely(!received || rx_size == 0xfff0))
       
  2044 		rtl8139_isr_ack(tp);
       
  2045 
       
  2046 #if RTL8139_DEBUG > 1
       
  2047 	DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
       
  2048 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
       
  2049 		 RTL_R16 (RxBufAddr),
       
  2050 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
       
  2051 #endif
       
  2052 
       
  2053 	tp->cur_rx = cur_rx;
       
  2054 
       
  2055 	/*
       
  2056 	 * The receive buffer should be mostly empty.
       
  2057 	 * Tell NAPI to reenable the Rx irq.
       
  2058 	 */
       
  2059 	if (tp->fifo_copy_timeout)
       
  2060 		received = budget;
       
  2061 
       
  2062 out:
       
  2063 	return received;
       
  2064 }
       
  2065 
       
  2066 
       
  2067 static void rtl8139_weird_interrupt (struct net_device *dev,
       
  2068 				     struct rtl8139_private *tp,
       
  2069 				     void __iomem *ioaddr,
       
  2070 				     int status, int link_changed)
       
  2071 {
       
  2072 	DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n",
       
  2073 		 dev->name, status);
       
  2074 
       
  2075 	assert (dev != NULL);
       
  2076 	assert (tp != NULL);
       
  2077 	assert (ioaddr != NULL);
       
  2078 
       
  2079 	/* Update the error count. */
       
  2080 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2081 	RTL_W32 (RxMissed, 0);
       
  2082 
       
  2083 	if ((status & RxUnderrun) && link_changed &&
       
  2084 	    (tp->drv_flags & HAS_LNK_CHNG)) {
       
  2085 		rtl_check_media(dev, 0);
       
  2086 		status &= ~RxUnderrun;
       
  2087 	}
       
  2088 
       
  2089 	if (status & (RxUnderrun | RxErr))
       
  2090 		tp->stats.rx_errors++;
       
  2091 
       
  2092 	if (status & PCSTimeout)
       
  2093 		tp->stats.rx_length_errors++;
       
  2094 	if (status & RxUnderrun)
       
  2095 		tp->stats.rx_fifo_errors++;
       
  2096 	if (status & PCIErr) {
       
  2097 		u16 pci_cmd_status;
       
  2098 		pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
       
  2099 		pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
       
  2100 
       
  2101 		printk (KERN_ERR "%s: PCI Bus error %4.4x.\n",
       
  2102 			dev->name, pci_cmd_status);
       
  2103 	}
       
  2104 }
       
  2105 
       
  2106 static int rtl8139_poll(struct net_device *dev, int *budget)
       
  2107 {
       
  2108 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2109 	void __iomem *ioaddr = tp->mmio_addr;
       
  2110 	int orig_budget = min(*budget, dev->quota);
       
  2111 	int done = 1;
       
  2112 
       
  2113 	spin_lock(&tp->rx_lock);
       
  2114 	if (likely(RTL_R16(IntrStatus) & RxAckBits)) {
       
  2115 		int work_done;
       
  2116 
       
  2117 		work_done = rtl8139_rx(dev, tp, orig_budget);
       
  2118 		if (likely(work_done > 0)) {
       
  2119 			*budget -= work_done;
       
  2120 			dev->quota -= work_done;
       
  2121 			done = (work_done < orig_budget);
       
  2122 		}
       
  2123 	}
       
  2124 
       
  2125 	if (done) {
       
  2126 		unsigned long flags;
       
  2127 		/*
       
  2128 		 * Order is important since data can get interrupted
       
  2129 		 * again when we think we are done.
       
  2130 		 */
       
  2131 		local_irq_save(flags);
       
  2132 		RTL_W16_F(IntrMask, rtl8139_intr_mask);
       
  2133 		__netif_rx_complete(dev);
       
  2134 		local_irq_restore(flags);
       
  2135 	}
       
  2136 	spin_unlock(&tp->rx_lock);
       
  2137 
       
  2138 	return !done;
       
  2139 }
       
  2140 
       
  2141 /* The interrupt handler does all of the Rx thread work and cleans up
       
  2142    after the Tx thread. */
       
  2143 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance)
       
  2144 {
       
  2145 	struct net_device *dev = (struct net_device *) dev_instance;
       
  2146 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2147 	void __iomem *ioaddr = tp->mmio_addr;
       
  2148 	u16 status, ackstat;
       
  2149 	int link_changed = 0; /* avoid bogus "uninit" warning */
       
  2150 	int handled = 0;
       
  2151 
       
  2152 	spin_lock (&tp->lock);
       
  2153 	status = RTL_R16 (IntrStatus);
       
  2154 
       
  2155 	/* shared irq? */
       
  2156 	if (unlikely((status & rtl8139_intr_mask) == 0))
       
  2157 		goto out;
       
  2158 
       
  2159 	handled = 1;
       
  2160 
       
  2161 	/* h/w no longer present (hotplug?) or major error, bail */
       
  2162 	if (unlikely(status == 0xFFFF))
       
  2163 		goto out;
       
  2164 
       
  2165 	/* close possible race's with dev_close */
       
  2166 	if (unlikely(!netif_running(dev))) {
       
  2167 		RTL_W16 (IntrMask, 0);
       
  2168 		goto out;
       
  2169 	}
       
  2170 
       
  2171 	/* Acknowledge all of the current interrupt sources ASAP, but
       
  2172 	   an first get an additional status bit from CSCR. */
       
  2173 	if (unlikely(status & RxUnderrun))
       
  2174 		link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
       
  2175 
       
  2176 	ackstat = status & ~(RxAckBits | TxErr);
       
  2177 	if (ackstat)
       
  2178 		RTL_W16 (IntrStatus, ackstat);
       
  2179 
       
  2180 	/* Receive packets are processed by poll routine.
       
  2181 	   If not running start it now. */
       
  2182 	if (status & RxAckBits){
       
  2183 		if (netif_rx_schedule_prep(dev)) {
       
  2184 			RTL_W16_F (IntrMask, rtl8139_norx_intr_mask);
       
  2185 			__netif_rx_schedule (dev);
       
  2186 		}
       
  2187 	}
       
  2188 
       
  2189 	/* Check uncommon events with one test. */
       
  2190 	if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr)))
       
  2191 		rtl8139_weird_interrupt (dev, tp, ioaddr,
       
  2192 					 status, link_changed);
       
  2193 
       
  2194 	if (status & (TxOK | TxErr)) {
       
  2195 		rtl8139_tx_interrupt (dev, tp, ioaddr);
       
  2196 		if (status & TxErr)
       
  2197 			RTL_W16 (IntrStatus, TxErr);
       
  2198 	}
       
  2199  out:
       
  2200 	spin_unlock (&tp->lock);
       
  2201 
       
  2202 	DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n",
       
  2203 		 dev->name, RTL_R16 (IntrStatus));
       
  2204 	return IRQ_RETVAL(handled);
       
  2205 }
       
  2206 
       
  2207 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  2208 /*
       
  2209  * Polling receive - used by netconsole and other diagnostic tools
       
  2210  * to allow network i/o with interrupts disabled.
       
  2211  */
       
  2212 static void rtl8139_poll_controller(struct net_device *dev)
       
  2213 {
       
  2214 	disable_irq(dev->irq);
       
  2215 	rtl8139_interrupt(dev->irq, dev);
       
  2216 	enable_irq(dev->irq);
       
  2217 }
       
  2218 #endif
       
  2219 
       
  2220 static int rtl8139_close (struct net_device *dev)
       
  2221 {
       
  2222 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2223 	void __iomem *ioaddr = tp->mmio_addr;
       
  2224 	unsigned long flags;
       
  2225 
       
  2226 	netif_stop_queue (dev);
       
  2227 
       
  2228 	if (netif_msg_ifdown(tp))
       
  2229 		printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n",
       
  2230 			dev->name, RTL_R16 (IntrStatus));
       
  2231 
       
  2232 	spin_lock_irqsave (&tp->lock, flags);
       
  2233 
       
  2234 	/* Stop the chip's Tx and Rx DMA processes. */
       
  2235 	RTL_W8 (ChipCmd, 0);
       
  2236 
       
  2237 	/* Disable interrupts by clearing the interrupt mask. */
       
  2238 	RTL_W16 (IntrMask, 0);
       
  2239 
       
  2240 	/* Update the error counts. */
       
  2241 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2242 	RTL_W32 (RxMissed, 0);
       
  2243 
       
  2244 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2245 
       
  2246 	synchronize_irq (dev->irq);	/* racy, but that's ok here */
       
  2247 	free_irq (dev->irq, dev);
       
  2248 
       
  2249 	rtl8139_tx_clear (tp);
       
  2250 
       
  2251 	pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  2252 			    tp->rx_ring, tp->rx_ring_dma);
       
  2253 	pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  2254 			    tp->tx_bufs, tp->tx_bufs_dma);
       
  2255 	tp->rx_ring = NULL;
       
  2256 	tp->tx_bufs = NULL;
       
  2257 
       
  2258 	/* Green! Put the chip in low-power mode. */
       
  2259 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2260 
       
  2261 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  2262 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  2263 
       
  2264 	return 0;
       
  2265 }
       
  2266 
       
  2267 
       
  2268 /* Get the ethtool Wake-on-LAN settings.  Assumes that wol points to
       
  2269    kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
       
  2270    other threads or interrupts aren't messing with the 8139.  */
       
  2271 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2272 {
       
  2273 	struct rtl8139_private *np = netdev_priv(dev);
       
  2274 	void __iomem *ioaddr = np->mmio_addr;
       
  2275 
       
  2276 	spin_lock_irq(&np->lock);
       
  2277 	if (rtl_chip_info[np->chipset].flags & HasLWake) {
       
  2278 		u8 cfg3 = RTL_R8 (Config3);
       
  2279 		u8 cfg5 = RTL_R8 (Config5);
       
  2280 
       
  2281 		wol->supported = WAKE_PHY | WAKE_MAGIC
       
  2282 			| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
       
  2283 
       
  2284 		wol->wolopts = 0;
       
  2285 		if (cfg3 & Cfg3_LinkUp)
       
  2286 			wol->wolopts |= WAKE_PHY;
       
  2287 		if (cfg3 & Cfg3_Magic)
       
  2288 			wol->wolopts |= WAKE_MAGIC;
       
  2289 		/* (KON)FIXME: See how netdev_set_wol() handles the
       
  2290 		   following constants.  */
       
  2291 		if (cfg5 & Cfg5_UWF)
       
  2292 			wol->wolopts |= WAKE_UCAST;
       
  2293 		if (cfg5 & Cfg5_MWF)
       
  2294 			wol->wolopts |= WAKE_MCAST;
       
  2295 		if (cfg5 & Cfg5_BWF)
       
  2296 			wol->wolopts |= WAKE_BCAST;
       
  2297 	}
       
  2298 	spin_unlock_irq(&np->lock);
       
  2299 }
       
  2300 
       
  2301 
       
  2302 /* Set the ethtool Wake-on-LAN settings.  Return 0 or -errno.  Assumes
       
  2303    that wol points to kernel memory and other threads or interrupts
       
  2304    aren't messing with the 8139.  */
       
  2305 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2306 {
       
  2307 	struct rtl8139_private *np = netdev_priv(dev);
       
  2308 	void __iomem *ioaddr = np->mmio_addr;
       
  2309 	u32 support;
       
  2310 	u8 cfg3, cfg5;
       
  2311 
       
  2312 	support = ((rtl_chip_info[np->chipset].flags & HasLWake)
       
  2313 		   ? (WAKE_PHY | WAKE_MAGIC
       
  2314 		      | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
       
  2315 		   : 0);
       
  2316 	if (wol->wolopts & ~support)
       
  2317 		return -EINVAL;
       
  2318 
       
  2319 	spin_lock_irq(&np->lock);
       
  2320 	cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
       
  2321 	if (wol->wolopts & WAKE_PHY)
       
  2322 		cfg3 |= Cfg3_LinkUp;
       
  2323 	if (wol->wolopts & WAKE_MAGIC)
       
  2324 		cfg3 |= Cfg3_Magic;
       
  2325 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2326 	RTL_W8 (Config3, cfg3);
       
  2327 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  2328 
       
  2329 	cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
       
  2330 	/* (KON)FIXME: These are untested.  We may have to set the
       
  2331 	   CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
       
  2332 	   documentation.  */
       
  2333 	if (wol->wolopts & WAKE_UCAST)
       
  2334 		cfg5 |= Cfg5_UWF;
       
  2335 	if (wol->wolopts & WAKE_MCAST)
       
  2336 		cfg5 |= Cfg5_MWF;
       
  2337 	if (wol->wolopts & WAKE_BCAST)
       
  2338 		cfg5 |= Cfg5_BWF;
       
  2339 	RTL_W8 (Config5, cfg5);	/* need not unlock via Cfg9346 */
       
  2340 	spin_unlock_irq(&np->lock);
       
  2341 
       
  2342 	return 0;
       
  2343 }
       
  2344 
       
  2345 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
       
  2346 {
       
  2347 	struct rtl8139_private *np = netdev_priv(dev);
       
  2348 	strcpy(info->driver, DRV_NAME);
       
  2349 	strcpy(info->version, DRV_VERSION);
       
  2350 	strcpy(info->bus_info, pci_name(np->pci_dev));
       
  2351 	info->regdump_len = np->regs_len;
       
  2352 }
       
  2353 
       
  2354 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2355 {
       
  2356 	struct rtl8139_private *np = netdev_priv(dev);
       
  2357 	spin_lock_irq(&np->lock);
       
  2358 	mii_ethtool_gset(&np->mii, cmd);
       
  2359 	spin_unlock_irq(&np->lock);
       
  2360 	return 0;
       
  2361 }
       
  2362 
       
  2363 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2364 {
       
  2365 	struct rtl8139_private *np = netdev_priv(dev);
       
  2366 	int rc;
       
  2367 	spin_lock_irq(&np->lock);
       
  2368 	rc = mii_ethtool_sset(&np->mii, cmd);
       
  2369 	spin_unlock_irq(&np->lock);
       
  2370 	return rc;
       
  2371 }
       
  2372 
       
  2373 static int rtl8139_nway_reset(struct net_device *dev)
       
  2374 {
       
  2375 	struct rtl8139_private *np = netdev_priv(dev);
       
  2376 	return mii_nway_restart(&np->mii);
       
  2377 }
       
  2378 
       
  2379 static u32 rtl8139_get_link(struct net_device *dev)
       
  2380 {
       
  2381 	struct rtl8139_private *np = netdev_priv(dev);
       
  2382 	return mii_link_ok(&np->mii);
       
  2383 }
       
  2384 
       
  2385 static u32 rtl8139_get_msglevel(struct net_device *dev)
       
  2386 {
       
  2387 	struct rtl8139_private *np = netdev_priv(dev);
       
  2388 	return np->msg_enable;
       
  2389 }
       
  2390 
       
  2391 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
       
  2392 {
       
  2393 	struct rtl8139_private *np = netdev_priv(dev);
       
  2394 	np->msg_enable = datum;
       
  2395 }
       
  2396 
       
  2397 /* TODO: we are too slack to do reg dumping for pio, for now */
       
  2398 #ifdef CONFIG_8139TOO_PIO
       
  2399 #define rtl8139_get_regs_len	NULL
       
  2400 #define rtl8139_get_regs	NULL
       
  2401 #else
       
  2402 static int rtl8139_get_regs_len(struct net_device *dev)
       
  2403 {
       
  2404 	struct rtl8139_private *np = netdev_priv(dev);
       
  2405 	return np->regs_len;
       
  2406 }
       
  2407 
       
  2408 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
       
  2409 {
       
  2410 	struct rtl8139_private *np = netdev_priv(dev);
       
  2411 
       
  2412 	regs->version = RTL_REGS_VER;
       
  2413 
       
  2414 	spin_lock_irq(&np->lock);
       
  2415 	memcpy_fromio(regbuf, np->mmio_addr, regs->len);
       
  2416 	spin_unlock_irq(&np->lock);
       
  2417 }
       
  2418 #endif /* CONFIG_8139TOO_MMIO */
       
  2419 
       
  2420 static int rtl8139_get_stats_count(struct net_device *dev)
       
  2421 {
       
  2422 	return RTL_NUM_STATS;
       
  2423 }
       
  2424 
       
  2425 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
       
  2426 {
       
  2427 	struct rtl8139_private *np = netdev_priv(dev);
       
  2428 
       
  2429 	data[0] = np->xstats.early_rx;
       
  2430 	data[1] = np->xstats.tx_buf_mapped;
       
  2431 	data[2] = np->xstats.tx_timeouts;
       
  2432 	data[3] = np->xstats.rx_lost_in_ring;
       
  2433 }
       
  2434 
       
  2435 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
       
  2436 {
       
  2437 	memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
       
  2438 }
       
  2439 
       
  2440 static const struct ethtool_ops rtl8139_ethtool_ops = {
       
  2441 	.get_drvinfo		= rtl8139_get_drvinfo,
       
  2442 	.get_settings		= rtl8139_get_settings,
       
  2443 	.set_settings		= rtl8139_set_settings,
       
  2444 	.get_regs_len		= rtl8139_get_regs_len,
       
  2445 	.get_regs		= rtl8139_get_regs,
       
  2446 	.nway_reset		= rtl8139_nway_reset,
       
  2447 	.get_link		= rtl8139_get_link,
       
  2448 	.get_msglevel		= rtl8139_get_msglevel,
       
  2449 	.set_msglevel		= rtl8139_set_msglevel,
       
  2450 	.get_wol		= rtl8139_get_wol,
       
  2451 	.set_wol		= rtl8139_set_wol,
       
  2452 	.get_strings		= rtl8139_get_strings,
       
  2453 	.get_stats_count	= rtl8139_get_stats_count,
       
  2454 	.get_ethtool_stats	= rtl8139_get_ethtool_stats,
       
  2455 };
       
  2456 
       
  2457 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
       
  2458 {
       
  2459 	struct rtl8139_private *np = netdev_priv(dev);
       
  2460 	int rc;
       
  2461 
       
  2462 	if (!netif_running(dev))
       
  2463 		return -EINVAL;
       
  2464 
       
  2465 	spin_lock_irq(&np->lock);
       
  2466 	rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL);
       
  2467 	spin_unlock_irq(&np->lock);
       
  2468 
       
  2469 	return rc;
       
  2470 }
       
  2471 
       
  2472 
       
  2473 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev)
       
  2474 {
       
  2475 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2476 	void __iomem *ioaddr = tp->mmio_addr;
       
  2477 	unsigned long flags;
       
  2478 
       
  2479 	if (netif_running(dev)) {
       
  2480 		spin_lock_irqsave (&tp->lock, flags);
       
  2481 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2482 		RTL_W32 (RxMissed, 0);
       
  2483 		spin_unlock_irqrestore (&tp->lock, flags);
       
  2484 	}
       
  2485 
       
  2486 	return &tp->stats;
       
  2487 }
       
  2488 
       
  2489 /* Set or clear the multicast filter for this adaptor.
       
  2490    This routine is not state sensitive and need not be SMP locked. */
       
  2491 
       
  2492 static void __set_rx_mode (struct net_device *dev)
       
  2493 {
       
  2494 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2495 	void __iomem *ioaddr = tp->mmio_addr;
       
  2496 	u32 mc_filter[2];	/* Multicast hash filter */
       
  2497 	int i, rx_mode;
       
  2498 	u32 tmp;
       
  2499 
       
  2500 	DPRINTK ("%s:   rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
       
  2501 			dev->name, dev->flags, RTL_R32 (RxConfig));
       
  2502 
       
  2503 	/* Note: do not reorder, GCC is clever about common statements. */
       
  2504 	if (dev->flags & IFF_PROMISC) {
       
  2505 		rx_mode =
       
  2506 		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
       
  2507 		    AcceptAllPhys;
       
  2508 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2509 	} else if ((dev->mc_count > multicast_filter_limit)
       
  2510 		   || (dev->flags & IFF_ALLMULTI)) {
       
  2511 		/* Too many to filter perfectly -- accept all multicasts. */
       
  2512 		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
       
  2513 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2514 	} else {
       
  2515 		struct dev_mc_list *mclist;
       
  2516 		rx_mode = AcceptBroadcast | AcceptMyPhys;
       
  2517 		mc_filter[1] = mc_filter[0] = 0;
       
  2518 		for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
       
  2519 		     i++, mclist = mclist->next) {
       
  2520 			int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
       
  2521 
       
  2522 			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
       
  2523 			rx_mode |= AcceptMulticast;
       
  2524 		}
       
  2525 	}
       
  2526 
       
  2527 	/* We can safely update without stopping the chip. */
       
  2528 	tmp = rtl8139_rx_config | rx_mode;
       
  2529 	if (tp->rx_config != tmp) {
       
  2530 		RTL_W32_F (RxConfig, tmp);
       
  2531 		tp->rx_config = tmp;
       
  2532 	}
       
  2533 	RTL_W32_F (MAR0 + 0, mc_filter[0]);
       
  2534 	RTL_W32_F (MAR0 + 4, mc_filter[1]);
       
  2535 }
       
  2536 
       
  2537 static void rtl8139_set_rx_mode (struct net_device *dev)
       
  2538 {
       
  2539 	unsigned long flags;
       
  2540 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2541 
       
  2542 	spin_lock_irqsave (&tp->lock, flags);
       
  2543 	__set_rx_mode(dev);
       
  2544 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2545 }
       
  2546 
       
  2547 #ifdef CONFIG_PM
       
  2548 
       
  2549 static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state)
       
  2550 {
       
  2551 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2552 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2553 	void __iomem *ioaddr = tp->mmio_addr;
       
  2554 	unsigned long flags;
       
  2555 
       
  2556 	pci_save_state (pdev);
       
  2557 
       
  2558 	if (!netif_running (dev))
       
  2559 		return 0;
       
  2560 
       
  2561 	netif_device_detach (dev);
       
  2562 
       
  2563 	spin_lock_irqsave (&tp->lock, flags);
       
  2564 
       
  2565 	/* Disable interrupts, stop Tx and Rx. */
       
  2566 	RTL_W16 (IntrMask, 0);
       
  2567 	RTL_W8 (ChipCmd, 0);
       
  2568 
       
  2569 	/* Update the error counts. */
       
  2570 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2571 	RTL_W32 (RxMissed, 0);
       
  2572 
       
  2573 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2574 
       
  2575 	pci_set_power_state (pdev, PCI_D3hot);
       
  2576 
       
  2577 	return 0;
       
  2578 }
       
  2579 
       
  2580 
       
  2581 static int rtl8139_resume (struct pci_dev *pdev)
       
  2582 {
       
  2583 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2584 
       
  2585 	pci_restore_state (pdev);
       
  2586 	if (!netif_running (dev))
       
  2587 		return 0;
       
  2588 	pci_set_power_state (pdev, PCI_D0);
       
  2589 	rtl8139_init_ring (dev);
       
  2590 	rtl8139_hw_start (dev);
       
  2591 	netif_device_attach (dev);
       
  2592 	return 0;
       
  2593 }
       
  2594 
       
  2595 #endif /* CONFIG_PM */
       
  2596 
       
  2597 
       
  2598 static struct pci_driver rtl8139_pci_driver = {
       
  2599 	.name		= DRV_NAME,
       
  2600 	.id_table	= rtl8139_pci_tbl,
       
  2601 	.probe		= rtl8139_init_one,
       
  2602 	.remove		= __devexit_p(rtl8139_remove_one),
       
  2603 #ifdef CONFIG_PM
       
  2604 	.suspend	= rtl8139_suspend,
       
  2605 	.resume		= rtl8139_resume,
       
  2606 #endif /* CONFIG_PM */
       
  2607 };
       
  2608 
       
  2609 
       
  2610 static int __init rtl8139_init_module (void)
       
  2611 {
       
  2612 	/* when we're a module, we always print a version message,
       
  2613 	 * even if no 8139 board is found.
       
  2614 	 */
       
  2615 #ifdef MODULE
       
  2616 	printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
       
  2617 #endif
       
  2618 
       
  2619 	return pci_register_driver(&rtl8139_pci_driver);
       
  2620 }
       
  2621 
       
  2622 
       
  2623 static void __exit rtl8139_cleanup_module (void)
       
  2624 {
       
  2625 	pci_unregister_driver (&rtl8139_pci_driver);
       
  2626 }
       
  2627 
       
  2628 
       
  2629 module_init(rtl8139_init_module);
       
  2630 module_exit(rtl8139_cleanup_module);