devices/8139too-2.6.23-ethercat.c
changeset 828 1ca40d2e6a8d
child 1011 a0759d0dded4
equal deleted inserted replaced
827:205eccb70bce 828:1ca40d2e6a8d
       
     1 /******************************************************************************
       
     2  *
       
     3  *  $Id$
       
     4  *
       
     5  *  Copyright (C) 2006  Florian Pose, Ingenieurgemeinschaft IgH
       
     6  *
       
     7  *  This file is part of the IgH EtherCAT Master.
       
     8  *
       
     9  *  The IgH EtherCAT Master is free software; you can redistribute it
       
    10  *  and/or modify it under the terms of the GNU General Public License
       
    11  *  as published by the Free Software Foundation; either version 2 of the
       
    12  *  License, or (at your option) any later version.
       
    13  *
       
    14  *  The IgH EtherCAT Master is distributed in the hope that it will be
       
    15  *  useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
       
    16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
       
    17  *  GNU General Public License for more details.
       
    18  *
       
    19  *  You should have received a copy of the GNU General Public License
       
    20  *  along with the IgH EtherCAT Master; if not, write to the Free Software
       
    21  *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
       
    22  *
       
    23  *  The right to use EtherCAT Technology is granted and comes free of
       
    24  *  charge under condition of compatibility of product made by
       
    25  *  Licensee. People intending to distribute/sell products based on the
       
    26  *  code, have to sign an agreement to guarantee that products using
       
    27  *  software based on IgH EtherCAT master stay compatible with the actual
       
    28  *  EtherCAT specification (which are released themselves as an open
       
    29  *  standard) as the (only) precondition to have the right to use EtherCAT
       
    30  *  Technology, IP and trade marks.
       
    31  *
       
    32  *****************************************************************************/
       
    33 
       
    34 /**
       
    35    \file
       
    36    EtherCAT driver for RTL8139-compatible NICs.
       
    37 */
       
    38 
       
    39 /*****************************************************************************/
       
    40 
       
    41 /*
       
    42   Former documentation:
       
    43 
       
    44 	8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
       
    45 
       
    46 	Maintained by Jeff Garzik <jgarzik@pobox.com>
       
    47 	Copyright 2000-2002 Jeff Garzik
       
    48 
       
    49 	Much code comes from Donald Becker's rtl8139.c driver,
       
    50 	versions 1.13 and older.  This driver was originally based
       
    51 	on rtl8139.c version 1.07.  Header of rtl8139.c version 1.13:
       
    52 
       
    53 	-----<snip>-----
       
    54 
       
    55         	Written 1997-2001 by Donald Becker.
       
    56 		This software may be used and distributed according to the
       
    57 		terms of the GNU General Public License (GPL), incorporated
       
    58 		herein by reference.  Drivers based on or derived from this
       
    59 		code fall under the GPL and must retain the authorship,
       
    60 		copyright and license notice.  This file is not a complete
       
    61 		program and may only be used when the entire operating
       
    62 		system is licensed under the GPL.
       
    63 
       
    64 		This driver is for boards based on the RTL8129 and RTL8139
       
    65 		PCI ethernet chips.
       
    66 
       
    67 		The author may be reached as becker@scyld.com, or C/O Scyld
       
    68 		Computing Corporation 410 Severn Ave., Suite 210 Annapolis
       
    69 		MD 21403
       
    70 
       
    71 		Support and updates available at
       
    72 		http://www.scyld.com/network/rtl8139.html
       
    73 
       
    74 		Twister-tuning table provided by Kinston
       
    75 		<shangh@realtek.com.tw>.
       
    76 
       
    77 	-----<snip>-----
       
    78 
       
    79 	This software may be used and distributed according to the terms
       
    80 	of the GNU General Public License, incorporated herein by reference.
       
    81 
       
    82 	Contributors:
       
    83 
       
    84 		Donald Becker - he wrote the original driver, kudos to him!
       
    85 		(but please don't e-mail him for support, this isn't his driver)
       
    86 
       
    87 		Tigran Aivazian - bug fixes, skbuff free cleanup
       
    88 
       
    89 		Martin Mares - suggestions for PCI cleanup
       
    90 
       
    91 		David S. Miller - PCI DMA and softnet updates
       
    92 
       
    93 		Ernst Gill - fixes ported from BSD driver
       
    94 
       
    95 		Daniel Kobras - identified specific locations of
       
    96 			posted MMIO write bugginess
       
    97 
       
    98 		Gerard Sharp - bug fix, testing and feedback
       
    99 
       
   100 		David Ford - Rx ring wrap fix
       
   101 
       
   102 		Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
       
   103 		to find and fix a crucial bug on older chipsets.
       
   104 
       
   105 		Donald Becker/Chris Butterworth/Marcus Westergren -
       
   106 		Noticed various Rx packet size-related buglets.
       
   107 
       
   108 		Santiago Garcia Mantinan - testing and feedback
       
   109 
       
   110 		Jens David - 2.2.x kernel backports
       
   111 
       
   112 		Martin Dennett - incredibly helpful insight on undocumented
       
   113 		features of the 8139 chips
       
   114 
       
   115 		Jean-Jacques Michel - bug fix
       
   116 
       
   117 		Tobias Ringström - Rx interrupt status checking suggestion
       
   118 
       
   119 		Andrew Morton - Clear blocked signals, avoid
       
   120 		buffer overrun setting current->comm.
       
   121 
       
   122 		Kalle Olavi Niemitalo - Wake-on-LAN ioctls
       
   123 
       
   124 		Robert Kuebel - Save kernel thread from dying on any signal.
       
   125 
       
   126 	Submitting bug reports:
       
   127 
       
   128 		"rtl8139-diag -mmmaaavvveefN" output
       
   129 		enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
       
   130 
       
   131 */
       
   132 
       
   133 #define DRV_NAME	"ec_8139too"
       
   134 #define DRV_VERSION	"0.9.28"
       
   135 
       
   136 
       
   137 #include <linux/module.h>
       
   138 #include <linux/kernel.h>
       
   139 #include <linux/compiler.h>
       
   140 #include <linux/pci.h>
       
   141 #include <linux/init.h>
       
   142 #include <linux/ioport.h>
       
   143 #include <linux/netdevice.h>
       
   144 #include <linux/etherdevice.h>
       
   145 #include <linux/rtnetlink.h>
       
   146 #include <linux/delay.h>
       
   147 #include <linux/ethtool.h>
       
   148 #include <linux/mii.h>
       
   149 #include <linux/completion.h>
       
   150 #include <linux/crc32.h>
       
   151 #include <asm/io.h>
       
   152 #include <asm/uaccess.h>
       
   153 #include <asm/irq.h>
       
   154 
       
   155 #include "../globals.h"
       
   156 #include "ecdev.h"
       
   157 
       
   158 #define RTL8139_DRIVER_NAME DRV_NAME \
       
   159                             " EtherCAT-capable Fast Ethernet driver " \
       
   160                             DRV_VERSION ", master " EC_MASTER_VERSION
       
   161 
       
   162 #define PFX DRV_NAME ": "
       
   163 
       
   164 /* Default Message level */
       
   165 #define RTL8139_DEF_MSG_ENABLE   (NETIF_MSG_DRV   | \
       
   166                                  NETIF_MSG_PROBE  | \
       
   167                                  NETIF_MSG_LINK)
       
   168 
       
   169 
       
   170 /* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */
       
   171 #ifdef CONFIG_8139TOO_PIO
       
   172 #define USE_IO_OPS 1
       
   173 #endif
       
   174 
       
   175 /* define to 1, 2 or 3 to enable copious debugging info */
       
   176 #define RTL8139_DEBUG 0
       
   177 
       
   178 /* define to 1 to disable lightweight runtime debugging checks */
       
   179 #undef RTL8139_NDEBUG
       
   180 
       
   181 
       
   182 #if RTL8139_DEBUG
       
   183 /* note: prints function name for you */
       
   184 #  define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
       
   185 #else
       
   186 #  define DPRINTK(fmt, args...)
       
   187 #endif
       
   188 
       
   189 #ifdef RTL8139_NDEBUG
       
   190 #  define assert(expr) do {} while (0)
       
   191 #else
       
   192 #  define assert(expr) \
       
   193         if(unlikely(!(expr))) {				        \
       
   194         printk(KERN_ERR "Assertion failed! %s,%s,%s,line=%d\n",	\
       
   195         #expr,__FILE__,__FUNCTION__,__LINE__);		        \
       
   196         }
       
   197 #endif
       
   198 
       
   199 
       
   200 /* A few user-configurable values. */
       
   201 /* media options */
       
   202 #define MAX_UNITS 8
       
   203 static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   204 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
       
   205 
       
   206 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
       
   207    The RTL chips use a 64 element hash table based on the Ethernet CRC.  */
       
   208 static int multicast_filter_limit = 32;
       
   209 
       
   210 /* bitmapped message enable number */
       
   211 static int debug = -1;
       
   212 
       
   213 /*
       
   214  * Receive ring size
       
   215  * Warning: 64K ring has hardware issues and may lock up.
       
   216  */
       
   217 #if defined(CONFIG_SH_DREAMCAST)
       
   218 #define RX_BUF_IDX	1	/* 16K ring */
       
   219 #else
       
   220 #define RX_BUF_IDX	2	/* 32K ring */
       
   221 #endif
       
   222 #define RX_BUF_LEN	(8192 << RX_BUF_IDX)
       
   223 #define RX_BUF_PAD	16
       
   224 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
       
   225 
       
   226 #if RX_BUF_LEN == 65536
       
   227 #define RX_BUF_TOT_LEN	RX_BUF_LEN
       
   228 #else
       
   229 #define RX_BUF_TOT_LEN	(RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
       
   230 #endif
       
   231 
       
   232 /* Number of Tx descriptor registers. */
       
   233 #define NUM_TX_DESC	4
       
   234 
       
   235 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
       
   236 #define MAX_ETH_FRAME_SIZE	1536
       
   237 
       
   238 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
       
   239 #define TX_BUF_SIZE	MAX_ETH_FRAME_SIZE
       
   240 #define TX_BUF_TOT_LEN	(TX_BUF_SIZE * NUM_TX_DESC)
       
   241 
       
   242 /* PCI Tuning Parameters
       
   243    Threshold is bytes transferred to chip before transmission starts. */
       
   244 #define TX_FIFO_THRESH 256	/* In bytes, rounded down to 32 byte units. */
       
   245 
       
   246 /* The following settings are log_2(bytes)-4:  0 == 16 bytes .. 6==1024, 7==end of packet. */
       
   247 #define RX_FIFO_THRESH	7	/* Rx buffer level before first PCI xfer.  */
       
   248 #define RX_DMA_BURST	7	/* Maximum PCI burst, '6' is 1024 */
       
   249 #define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
       
   250 #define TX_RETRY	8	/* 0-15.  retries = 16 + (TX_RETRY * 16) */
       
   251 
       
   252 /* Operational parameters that usually are not changed. */
       
   253 /* Time in jiffies before concluding the transmitter is hung. */
       
   254 #define TX_TIMEOUT  (6*HZ)
       
   255 
       
   256 
       
   257 enum {
       
   258 	HAS_MII_XCVR = 0x010000,
       
   259 	HAS_CHIP_XCVR = 0x020000,
       
   260 	HAS_LNK_CHNG = 0x040000,
       
   261 };
       
   262 
       
   263 #define RTL_NUM_STATS 4		/* number of ETHTOOL_GSTATS u64's */
       
   264 #define RTL_REGS_VER 1		/* version of reg. data in ETHTOOL_GREGS */
       
   265 #define RTL_MIN_IO_SIZE 0x80
       
   266 #define RTL8139B_IO_SIZE 256
       
   267 
       
   268 #define RTL8129_CAPS	HAS_MII_XCVR
       
   269 #define RTL8139_CAPS	HAS_CHIP_XCVR|HAS_LNK_CHNG
       
   270 
       
   271 typedef enum {
       
   272 	RTL8139 = 0,
       
   273 	RTL8129,
       
   274 } board_t;
       
   275 
       
   276 
       
   277 /* indexed by board_t, above */
       
   278 static const struct {
       
   279 	const char *name;
       
   280 	u32 hw_flags;
       
   281 } board_info[] __devinitdata = {
       
   282 	{ "RealTek RTL8139", RTL8139_CAPS },
       
   283 	{ "RealTek RTL8129", RTL8129_CAPS },
       
   284 };
       
   285 
       
   286 
       
   287 static struct pci_device_id rtl8139_pci_tbl[] = {
       
   288 	{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   289 	{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   290 	{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   291 	{0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   292 	{0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   293 	{0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   294 	{0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   295 	{0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   296 	{0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   297 	{0x1259, 0xa11e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   298 	{0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   299 	{0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   300 	{0x11db, 0x1234, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   301 	{0x1432, 0x9130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   302 	{0x02ac, 0x1012, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   303 	{0x018a, 0x0106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   304 	{0x126c, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   305 	{0x1743, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   306 	{0x021b, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   307 
       
   308 #ifdef CONFIG_SH_SECUREEDGE5410
       
   309 	/* Bogus 8139 silicon reports 8129 without external PROM :-( */
       
   310 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
       
   311 #endif
       
   312 #ifdef CONFIG_8139TOO_8129
       
   313 	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
       
   314 #endif
       
   315 
       
   316 	/* some crazy cards report invalid vendor ids like
       
   317 	 * 0x0001 here.  The other ids are valid and constant,
       
   318 	 * so we simply don't match on the main vendor id.
       
   319 	 */
       
   320 	{PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
       
   321 	{PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139 },
       
   322 	{PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139 },
       
   323 
       
   324 	{0,}
       
   325 };
       
   326 
       
   327 /* prevent driver from being loaded automatically */
       
   328 //MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
       
   329 
       
   330 static struct {
       
   331 	const char str[ETH_GSTRING_LEN];
       
   332 } ethtool_stats_keys[] = {
       
   333 	{ "early_rx" },
       
   334 	{ "tx_buf_mapped" },
       
   335 	{ "tx_timeouts" },
       
   336 	{ "rx_lost_in_ring" },
       
   337 };
       
   338 
       
   339 /* The rest of these values should never change. */
       
   340 
       
   341 /* Symbolic offsets to registers. */
       
   342 enum RTL8139_registers {
       
   343 	MAC0 = 0,		/* Ethernet hardware address. */
       
   344 	MAR0 = 8,		/* Multicast filter. */
       
   345 	TxStatus0 = 0x10,	/* Transmit status (Four 32bit registers). */
       
   346 	TxAddr0 = 0x20,		/* Tx descriptors (also four 32bit). */
       
   347 	RxBuf = 0x30,
       
   348 	ChipCmd = 0x37,
       
   349 	RxBufPtr = 0x38,
       
   350 	RxBufAddr = 0x3A,
       
   351 	IntrMask = 0x3C,
       
   352 	IntrStatus = 0x3E,
       
   353 	TxConfig = 0x40,
       
   354 	RxConfig = 0x44,
       
   355 	Timer = 0x48,		/* A general-purpose counter. */
       
   356 	RxMissed = 0x4C,	/* 24 bits valid, write clears. */
       
   357 	Cfg9346 = 0x50,
       
   358 	Config0 = 0x51,
       
   359 	Config1 = 0x52,
       
   360 	FlashReg = 0x54,
       
   361 	MediaStatus = 0x58,
       
   362 	Config3 = 0x59,
       
   363 	Config4 = 0x5A,		/* absent on RTL-8139A */
       
   364 	HltClk = 0x5B,
       
   365 	MultiIntr = 0x5C,
       
   366 	TxSummary = 0x60,
       
   367 	BasicModeCtrl = 0x62,
       
   368 	BasicModeStatus = 0x64,
       
   369 	NWayAdvert = 0x66,
       
   370 	NWayLPAR = 0x68,
       
   371 	NWayExpansion = 0x6A,
       
   372 	/* Undocumented registers, but required for proper operation. */
       
   373 	FIFOTMS = 0x70,		/* FIFO Control and test. */
       
   374 	CSCR = 0x74,		/* Chip Status and Configuration Register. */
       
   375 	PARA78 = 0x78,
       
   376 	PARA7c = 0x7c,		/* Magic transceiver parameter register. */
       
   377 	Config5 = 0xD8,		/* absent on RTL-8139A */
       
   378 };
       
   379 
       
   380 enum ClearBitMasks {
       
   381 	MultiIntrClear = 0xF000,
       
   382 	ChipCmdClear = 0xE2,
       
   383 	Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
       
   384 };
       
   385 
       
   386 enum ChipCmdBits {
       
   387 	CmdReset = 0x10,
       
   388 	CmdRxEnb = 0x08,
       
   389 	CmdTxEnb = 0x04,
       
   390 	RxBufEmpty = 0x01,
       
   391 };
       
   392 
       
   393 /* Interrupt register bits, using my own meaningful names. */
       
   394 enum IntrStatusBits {
       
   395 	PCIErr = 0x8000,
       
   396 	PCSTimeout = 0x4000,
       
   397 	RxFIFOOver = 0x40,
       
   398 	RxUnderrun = 0x20,
       
   399 	RxOverflow = 0x10,
       
   400 	TxErr = 0x08,
       
   401 	TxOK = 0x04,
       
   402 	RxErr = 0x02,
       
   403 	RxOK = 0x01,
       
   404 
       
   405 	RxAckBits = RxFIFOOver | RxOverflow | RxOK,
       
   406 };
       
   407 
       
   408 enum TxStatusBits {
       
   409 	TxHostOwns = 0x2000,
       
   410 	TxUnderrun = 0x4000,
       
   411 	TxStatOK = 0x8000,
       
   412 	TxOutOfWindow = 0x20000000,
       
   413 	TxAborted = 0x40000000,
       
   414 	TxCarrierLost = 0x80000000,
       
   415 };
       
   416 enum RxStatusBits {
       
   417 	RxMulticast = 0x8000,
       
   418 	RxPhysical = 0x4000,
       
   419 	RxBroadcast = 0x2000,
       
   420 	RxBadSymbol = 0x0020,
       
   421 	RxRunt = 0x0010,
       
   422 	RxTooLong = 0x0008,
       
   423 	RxCRCErr = 0x0004,
       
   424 	RxBadAlign = 0x0002,
       
   425 	RxStatusOK = 0x0001,
       
   426 };
       
   427 
       
   428 /* Bits in RxConfig. */
       
   429 enum rx_mode_bits {
       
   430 	AcceptErr = 0x20,
       
   431 	AcceptRunt = 0x10,
       
   432 	AcceptBroadcast = 0x08,
       
   433 	AcceptMulticast = 0x04,
       
   434 	AcceptMyPhys = 0x02,
       
   435 	AcceptAllPhys = 0x01,
       
   436 };
       
   437 
       
   438 /* Bits in TxConfig. */
       
   439 enum tx_config_bits {
       
   440 
       
   441         /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */
       
   442         TxIFGShift = 24,
       
   443         TxIFG84 = (0 << TxIFGShift),    /* 8.4us / 840ns (10 / 100Mbps) */
       
   444         TxIFG88 = (1 << TxIFGShift),    /* 8.8us / 880ns (10 / 100Mbps) */
       
   445         TxIFG92 = (2 << TxIFGShift),    /* 9.2us / 920ns (10 / 100Mbps) */
       
   446         TxIFG96 = (3 << TxIFGShift),    /* 9.6us / 960ns (10 / 100Mbps) */
       
   447 
       
   448 	TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */
       
   449 	TxCRC = (1 << 16),	/* DISABLE appending CRC to end of Tx packets */
       
   450 	TxClearAbt = (1 << 0),	/* Clear abort (WO) */
       
   451 	TxDMAShift = 8,		/* DMA burst value (0-7) is shifted this many bits */
       
   452 	TxRetryShift = 4,	/* TXRR value (0-15) is shifted this many bits */
       
   453 
       
   454 	TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */
       
   455 };
       
   456 
       
   457 /* Bits in Config1 */
       
   458 enum Config1Bits {
       
   459 	Cfg1_PM_Enable = 0x01,
       
   460 	Cfg1_VPD_Enable = 0x02,
       
   461 	Cfg1_PIO = 0x04,
       
   462 	Cfg1_MMIO = 0x08,
       
   463 	LWAKE = 0x10,		/* not on 8139, 8139A */
       
   464 	Cfg1_Driver_Load = 0x20,
       
   465 	Cfg1_LED0 = 0x40,
       
   466 	Cfg1_LED1 = 0x80,
       
   467 	SLEEP = (1 << 1),	/* only on 8139, 8139A */
       
   468 	PWRDN = (1 << 0),	/* only on 8139, 8139A */
       
   469 };
       
   470 
       
   471 /* Bits in Config3 */
       
   472 enum Config3Bits {
       
   473 	Cfg3_FBtBEn    = (1 << 0), /* 1 = Fast Back to Back */
       
   474 	Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */
       
   475 	Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */
       
   476 	Cfg3_CardB_En  = (1 << 3), /* 1 = enable CardBus registers */
       
   477 	Cfg3_LinkUp    = (1 << 4), /* 1 = wake up on link up */
       
   478 	Cfg3_Magic     = (1 << 5), /* 1 = wake up on Magic Packet (tm) */
       
   479 	Cfg3_PARM_En   = (1 << 6), /* 0 = software can set twister parameters */
       
   480 	Cfg3_GNTSel    = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */
       
   481 };
       
   482 
       
   483 /* Bits in Config4 */
       
   484 enum Config4Bits {
       
   485 	LWPTN = (1 << 2),	/* not on 8139, 8139A */
       
   486 };
       
   487 
       
   488 /* Bits in Config5 */
       
   489 enum Config5Bits {
       
   490 	Cfg5_PME_STS     = (1 << 0), /* 1 = PCI reset resets PME_Status */
       
   491 	Cfg5_LANWake     = (1 << 1), /* 1 = enable LANWake signal */
       
   492 	Cfg5_LDPS        = (1 << 2), /* 0 = save power when link is down */
       
   493 	Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */
       
   494 	Cfg5_UWF         = (1 << 4), /* 1 = accept unicast wakeup frame */
       
   495 	Cfg5_MWF         = (1 << 5), /* 1 = accept multicast wakeup frame */
       
   496 	Cfg5_BWF         = (1 << 6), /* 1 = accept broadcast wakeup frame */
       
   497 };
       
   498 
       
   499 enum RxConfigBits {
       
   500 	/* rx fifo threshold */
       
   501 	RxCfgFIFOShift = 13,
       
   502 	RxCfgFIFONone = (7 << RxCfgFIFOShift),
       
   503 
       
   504 	/* Max DMA burst */
       
   505 	RxCfgDMAShift = 8,
       
   506 	RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
       
   507 
       
   508 	/* rx ring buffer length */
       
   509 	RxCfgRcv8K = 0,
       
   510 	RxCfgRcv16K = (1 << 11),
       
   511 	RxCfgRcv32K = (1 << 12),
       
   512 	RxCfgRcv64K = (1 << 11) | (1 << 12),
       
   513 
       
   514 	/* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
       
   515 	RxNoWrap = (1 << 7),
       
   516 };
       
   517 
       
   518 /* Twister tuning parameters from RealTek.
       
   519    Completely undocumented, but required to tune bad links on some boards. */
       
   520 enum CSCRBits {
       
   521 	CSCR_LinkOKBit = 0x0400,
       
   522 	CSCR_LinkChangeBit = 0x0800,
       
   523 	CSCR_LinkStatusBits = 0x0f000,
       
   524 	CSCR_LinkDownOffCmd = 0x003c0,
       
   525 	CSCR_LinkDownCmd = 0x0f3c0,
       
   526 };
       
   527 
       
   528 enum Cfg9346Bits {
       
   529 	Cfg9346_Lock = 0x00,
       
   530 	Cfg9346_Unlock = 0xC0,
       
   531 };
       
   532 
       
   533 typedef enum {
       
   534 	CH_8139 = 0,
       
   535 	CH_8139_K,
       
   536 	CH_8139A,
       
   537 	CH_8139A_G,
       
   538 	CH_8139B,
       
   539 	CH_8130,
       
   540 	CH_8139C,
       
   541 	CH_8100,
       
   542 	CH_8100B_8139D,
       
   543 	CH_8101,
       
   544 } chip_t;
       
   545 
       
   546 enum chip_flags {
       
   547 	HasHltClk = (1 << 0),
       
   548 	HasLWake = (1 << 1),
       
   549 };
       
   550 
       
   551 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
       
   552 	(b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
       
   553 #define HW_REVID_MASK	HW_REVID(1, 1, 1, 1, 1, 1, 1)
       
   554 
       
   555 /* directly indexed by chip_t, above */
       
   556 static const struct {
       
   557 	const char *name;
       
   558 	u32 version; /* from RTL8139C/RTL8139D docs */
       
   559 	u32 flags;
       
   560 } rtl_chip_info[] = {
       
   561 	{ "RTL-8139",
       
   562 	  HW_REVID(1, 0, 0, 0, 0, 0, 0),
       
   563 	  HasHltClk,
       
   564 	},
       
   565 
       
   566 	{ "RTL-8139 rev K",
       
   567 	  HW_REVID(1, 1, 0, 0, 0, 0, 0),
       
   568 	  HasHltClk,
       
   569 	},
       
   570 
       
   571 	{ "RTL-8139A",
       
   572 	  HW_REVID(1, 1, 1, 0, 0, 0, 0),
       
   573 	  HasHltClk, /* XXX undocumented? */
       
   574 	},
       
   575 
       
   576 	{ "RTL-8139A rev G",
       
   577 	  HW_REVID(1, 1, 1, 0, 0, 1, 0),
       
   578 	  HasHltClk, /* XXX undocumented? */
       
   579 	},
       
   580 
       
   581 	{ "RTL-8139B",
       
   582 	  HW_REVID(1, 1, 1, 1, 0, 0, 0),
       
   583 	  HasLWake,
       
   584 	},
       
   585 
       
   586 	{ "RTL-8130",
       
   587 	  HW_REVID(1, 1, 1, 1, 1, 0, 0),
       
   588 	  HasLWake,
       
   589 	},
       
   590 
       
   591 	{ "RTL-8139C",
       
   592 	  HW_REVID(1, 1, 1, 0, 1, 0, 0),
       
   593 	  HasLWake,
       
   594 	},
       
   595 
       
   596 	{ "RTL-8100",
       
   597 	  HW_REVID(1, 1, 1, 1, 0, 1, 0),
       
   598  	  HasLWake,
       
   599  	},
       
   600 
       
   601 	{ "RTL-8100B/8139D",
       
   602 	  HW_REVID(1, 1, 1, 0, 1, 0, 1),
       
   603 	  HasHltClk /* XXX undocumented? */
       
   604 	| HasLWake,
       
   605 	},
       
   606 
       
   607 	{ "RTL-8101",
       
   608 	  HW_REVID(1, 1, 1, 0, 1, 1, 1),
       
   609 	  HasLWake,
       
   610 	},
       
   611 };
       
   612 
       
   613 struct rtl_extra_stats {
       
   614 	unsigned long early_rx;
       
   615 	unsigned long tx_buf_mapped;
       
   616 	unsigned long tx_timeouts;
       
   617 	unsigned long rx_lost_in_ring;
       
   618 };
       
   619 
       
   620 struct rtl8139_private {
       
   621 	void __iomem *mmio_addr;
       
   622 	int drv_flags;
       
   623 	struct pci_dev *pci_dev;
       
   624 	u32 msg_enable;
       
   625 	struct net_device_stats stats;
       
   626 	unsigned char *rx_ring;
       
   627 	unsigned int cur_rx;	/* Index into the Rx buffer of next Rx pkt. */
       
   628 	unsigned int tx_flag;
       
   629 	unsigned long cur_tx;
       
   630 	unsigned long dirty_tx;
       
   631 	unsigned char *tx_buf[NUM_TX_DESC];	/* Tx bounce buffers */
       
   632 	unsigned char *tx_bufs;	/* Tx bounce buffer region. */
       
   633 	dma_addr_t rx_ring_dma;
       
   634 	dma_addr_t tx_bufs_dma;
       
   635 	signed char phys[4];		/* MII device addresses. */
       
   636 	char twistie, twist_row, twist_col;	/* Twister tune state. */
       
   637 	unsigned int watchdog_fired : 1;
       
   638 	unsigned int default_port : 4;	/* Last dev->if_port value. */
       
   639 	unsigned int have_thread : 1;
       
   640 	spinlock_t lock;
       
   641 	spinlock_t rx_lock;
       
   642 	chip_t chipset;
       
   643 	u32 rx_config;
       
   644 	struct rtl_extra_stats xstats;
       
   645 
       
   646 	struct delayed_work thread;
       
   647 
       
   648 	struct mii_if_info mii;
       
   649 	unsigned int regs_len;
       
   650 	unsigned long fifo_copy_timeout;
       
   651     
       
   652 	ec_device_t *ecdev;
       
   653 };
       
   654 
       
   655 MODULE_AUTHOR("Florian Pose <fp@igh-essen.com>");
       
   656 MODULE_DESCRIPTION("RealTek RTL-8139 EtherCAT driver");
       
   657 MODULE_LICENSE("GPL");
       
   658 MODULE_VERSION(EC_MASTER_VERSION);
       
   659 
       
   660 module_param(multicast_filter_limit, int, 0);
       
   661 module_param_array(media, int, NULL, 0);
       
   662 module_param_array(full_duplex, int, NULL, 0);
       
   663 module_param(debug, int, 0);
       
   664 MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
       
   665 MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
       
   666 MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
       
   667 MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
       
   668 
       
   669 void ec_poll(struct net_device *);
       
   670 
       
   671 static int read_eeprom (void __iomem *ioaddr, int location, int addr_len);
       
   672 static int rtl8139_open (struct net_device *dev);
       
   673 static int mdio_read (struct net_device *dev, int phy_id, int location);
       
   674 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
   675 			int val);
       
   676 static void rtl8139_start_thread(struct rtl8139_private *tp);
       
   677 static void rtl8139_tx_timeout (struct net_device *dev);
       
   678 static void rtl8139_init_ring (struct net_device *dev);
       
   679 static int rtl8139_start_xmit (struct sk_buff *skb,
       
   680 			       struct net_device *dev);
       
   681 static int rtl8139_poll(struct net_device *dev, int *budget);
       
   682 #ifdef CONFIG_NET_POLL_CONTROLLER
       
   683 static void rtl8139_poll_controller(struct net_device *dev);
       
   684 #endif
       
   685 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance);
       
   686 static int rtl8139_close (struct net_device *dev);
       
   687 static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
       
   688 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev);
       
   689 static void rtl8139_set_rx_mode (struct net_device *dev);
       
   690 static void __set_rx_mode (struct net_device *dev);
       
   691 static void rtl8139_hw_start (struct net_device *dev);
       
   692 static void rtl8139_thread (struct work_struct *work);
       
   693 static void rtl8139_tx_timeout_task(struct work_struct *work);
       
   694 static const struct ethtool_ops rtl8139_ethtool_ops;
       
   695 
       
   696 /* write MMIO register, with flush */
       
   697 /* Flush avoids rtl8139 bug w/ posted MMIO writes */
       
   698 #define RTL_W8_F(reg, val8)	do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0)
       
   699 #define RTL_W16_F(reg, val16)	do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0)
       
   700 #define RTL_W32_F(reg, val32)	do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0)
       
   701 
       
   702 
       
   703 #define MMIO_FLUSH_AUDIT_COMPLETE 1
       
   704 #if MMIO_FLUSH_AUDIT_COMPLETE
       
   705 
       
   706 /* write MMIO register */
       
   707 #define RTL_W8(reg, val8)	iowrite8 ((val8), ioaddr + (reg))
       
   708 #define RTL_W16(reg, val16)	iowrite16 ((val16), ioaddr + (reg))
       
   709 #define RTL_W32(reg, val32)	iowrite32 ((val32), ioaddr + (reg))
       
   710 
       
   711 #else
       
   712 
       
   713 /* write MMIO register, then flush */
       
   714 #define RTL_W8		RTL_W8_F
       
   715 #define RTL_W16		RTL_W16_F
       
   716 #define RTL_W32		RTL_W32_F
       
   717 
       
   718 #endif /* MMIO_FLUSH_AUDIT_COMPLETE */
       
   719 
       
   720 /* read MMIO register */
       
   721 #define RTL_R8(reg)		ioread8 (ioaddr + (reg))
       
   722 #define RTL_R16(reg)		ioread16 (ioaddr + (reg))
       
   723 #define RTL_R32(reg)		((unsigned long) ioread32 (ioaddr + (reg)))
       
   724 
       
   725 
       
   726 static const u16 rtl8139_intr_mask =
       
   727 	PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
       
   728 	TxErr | TxOK | RxErr | RxOK;
       
   729 
       
   730 static const u16 rtl8139_norx_intr_mask =
       
   731 	PCIErr | PCSTimeout | RxUnderrun |
       
   732 	TxErr | TxOK | RxErr ;
       
   733 
       
   734 #if RX_BUF_IDX == 0
       
   735 static const unsigned int rtl8139_rx_config =
       
   736 	RxCfgRcv8K | RxNoWrap |
       
   737 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   738 	(RX_DMA_BURST << RxCfgDMAShift);
       
   739 #elif RX_BUF_IDX == 1
       
   740 static const unsigned int rtl8139_rx_config =
       
   741 	RxCfgRcv16K | RxNoWrap |
       
   742 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   743 	(RX_DMA_BURST << RxCfgDMAShift);
       
   744 #elif RX_BUF_IDX == 2
       
   745 static const unsigned int rtl8139_rx_config =
       
   746 	RxCfgRcv32K | RxNoWrap |
       
   747 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   748 	(RX_DMA_BURST << RxCfgDMAShift);
       
   749 #elif RX_BUF_IDX == 3
       
   750 static const unsigned int rtl8139_rx_config =
       
   751 	RxCfgRcv64K |
       
   752 	(RX_FIFO_THRESH << RxCfgFIFOShift) |
       
   753 	(RX_DMA_BURST << RxCfgDMAShift);
       
   754 #else
       
   755 #error "Invalid configuration for 8139_RXBUF_IDX"
       
   756 #endif
       
   757 
       
   758 static const unsigned int rtl8139_tx_config =
       
   759 	TxIFG96 | (TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
       
   760 
       
   761 static void __rtl8139_cleanup_dev (struct net_device *dev)
       
   762 {
       
   763 	struct rtl8139_private *tp = netdev_priv(dev);
       
   764 	struct pci_dev *pdev;
       
   765 
       
   766 	assert (dev != NULL);
       
   767 	assert (tp->pci_dev != NULL);
       
   768 	pdev = tp->pci_dev;
       
   769 
       
   770 #ifdef USE_IO_OPS
       
   771 	if (tp->mmio_addr)
       
   772 		ioport_unmap (tp->mmio_addr);
       
   773 #else
       
   774 	if (tp->mmio_addr)
       
   775 		pci_iounmap (pdev, tp->mmio_addr);
       
   776 #endif /* USE_IO_OPS */
       
   777 
       
   778 	/* it's ok to call this even if we have no regions to free */
       
   779 	pci_release_regions (pdev);
       
   780 
       
   781 	free_netdev(dev);
       
   782 	pci_set_drvdata (pdev, NULL);
       
   783 }
       
   784 
       
   785 
       
   786 static void rtl8139_chip_reset (void __iomem *ioaddr)
       
   787 {
       
   788 	int i;
       
   789 
       
   790 	/* Soft reset the chip. */
       
   791 	RTL_W8 (ChipCmd, CmdReset);
       
   792 
       
   793 	/* Check that the chip has finished the reset. */
       
   794 	for (i = 1000; i > 0; i--) {
       
   795 		barrier();
       
   796 		if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
       
   797 			break;
       
   798 		udelay (10);
       
   799 	}
       
   800 }
       
   801 
       
   802 
       
   803 static int __devinit rtl8139_init_board (struct pci_dev *pdev,
       
   804 					 struct net_device **dev_out)
       
   805 {
       
   806 	void __iomem *ioaddr;
       
   807 	struct net_device *dev;
       
   808 	struct rtl8139_private *tp;
       
   809 	u8 tmp8;
       
   810 	int rc, disable_dev_on_err = 0;
       
   811 	unsigned int i;
       
   812 	unsigned long pio_start, pio_end, pio_flags, pio_len;
       
   813 	unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
       
   814 	u32 version;
       
   815 
       
   816 	assert (pdev != NULL);
       
   817 
       
   818 	*dev_out = NULL;
       
   819 
       
   820 	/* dev and priv zeroed in alloc_etherdev */
       
   821 	dev = alloc_etherdev (sizeof (*tp));
       
   822 	if (dev == NULL) {
       
   823 		dev_err(&pdev->dev, "Unable to alloc new net device\n");
       
   824 		return -ENOMEM;
       
   825 	}
       
   826 	SET_MODULE_OWNER(dev);
       
   827 	SET_NETDEV_DEV(dev, &pdev->dev);
       
   828 
       
   829 	tp = netdev_priv(dev);
       
   830 	tp->pci_dev = pdev;
       
   831 
       
   832 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
       
   833 	rc = pci_enable_device (pdev);
       
   834 	if (rc)
       
   835 		goto err_out;
       
   836 
       
   837 	pio_start = pci_resource_start (pdev, 0);
       
   838 	pio_end = pci_resource_end (pdev, 0);
       
   839 	pio_flags = pci_resource_flags (pdev, 0);
       
   840 	pio_len = pci_resource_len (pdev, 0);
       
   841 
       
   842 	mmio_start = pci_resource_start (pdev, 1);
       
   843 	mmio_end = pci_resource_end (pdev, 1);
       
   844 	mmio_flags = pci_resource_flags (pdev, 1);
       
   845 	mmio_len = pci_resource_len (pdev, 1);
       
   846 
       
   847 	/* set this immediately, we need to know before
       
   848 	 * we talk to the chip directly */
       
   849 	DPRINTK("PIO region size == 0x%02X\n", pio_len);
       
   850 	DPRINTK("MMIO region size == 0x%02lX\n", mmio_len);
       
   851 
       
   852 #ifdef USE_IO_OPS
       
   853 	/* make sure PCI base addr 0 is PIO */
       
   854 	if (!(pio_flags & IORESOURCE_IO)) {
       
   855 		dev_err(&pdev->dev, "region #0 not a PIO resource, aborting\n");
       
   856 		rc = -ENODEV;
       
   857 		goto err_out;
       
   858 	}
       
   859 	/* check for weird/broken PCI region reporting */
       
   860 	if (pio_len < RTL_MIN_IO_SIZE) {
       
   861 		dev_err(&pdev->dev, "Invalid PCI I/O region size(s), aborting\n");
       
   862 		rc = -ENODEV;
       
   863 		goto err_out;
       
   864 	}
       
   865 #else
       
   866 	/* make sure PCI base addr 1 is MMIO */
       
   867 	if (!(mmio_flags & IORESOURCE_MEM)) {
       
   868 		dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
       
   869 		rc = -ENODEV;
       
   870 		goto err_out;
       
   871 	}
       
   872 	if (mmio_len < RTL_MIN_IO_SIZE) {
       
   873 		dev_err(&pdev->dev, "Invalid PCI mem region size(s), aborting\n");
       
   874 		rc = -ENODEV;
       
   875 		goto err_out;
       
   876 	}
       
   877 #endif
       
   878 
       
   879 	rc = pci_request_regions (pdev, DRV_NAME);
       
   880 	if (rc)
       
   881 		goto err_out;
       
   882 	disable_dev_on_err = 1;
       
   883 
       
   884 	/* enable PCI bus-mastering */
       
   885 	pci_set_master (pdev);
       
   886 
       
   887 #ifdef USE_IO_OPS
       
   888 	ioaddr = ioport_map(pio_start, pio_len);
       
   889 	if (!ioaddr) {
       
   890 		dev_err(&pdev->dev, "cannot map PIO, aborting\n");
       
   891 		rc = -EIO;
       
   892 		goto err_out;
       
   893 	}
       
   894 	dev->base_addr = pio_start;
       
   895 	tp->mmio_addr = ioaddr;
       
   896 	tp->regs_len = pio_len;
       
   897 #else
       
   898 	/* ioremap MMIO region */
       
   899 	ioaddr = pci_iomap(pdev, 1, 0);
       
   900 	if (ioaddr == NULL) {
       
   901 		dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
       
   902 		rc = -EIO;
       
   903 		goto err_out;
       
   904 	}
       
   905 	dev->base_addr = (long) ioaddr;
       
   906 	tp->mmio_addr = ioaddr;
       
   907 	tp->regs_len = mmio_len;
       
   908 #endif /* USE_IO_OPS */
       
   909 
       
   910 	/* Bring old chips out of low-power mode. */
       
   911 	RTL_W8 (HltClk, 'R');
       
   912 
       
   913 	/* check for missing/broken hardware */
       
   914 	if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
       
   915 		dev_err(&pdev->dev, "Chip not responding, ignoring board\n");
       
   916 		rc = -EIO;
       
   917 		goto err_out;
       
   918 	}
       
   919 
       
   920 	/* identify chip attached to board */
       
   921 	version = RTL_R32 (TxConfig) & HW_REVID_MASK;
       
   922 	for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
       
   923 		if (version == rtl_chip_info[i].version) {
       
   924 			tp->chipset = i;
       
   925 			goto match;
       
   926 		}
       
   927 
       
   928 	/* if unknown chip, assume array element #0, original RTL-8139 in this case */
       
   929 	dev_printk (KERN_DEBUG, &pdev->dev,
       
   930 		    "unknown chip version, assuming RTL-8139\n");
       
   931 	dev_printk (KERN_DEBUG, &pdev->dev,
       
   932 		    "TxConfig = 0x%lx\n", RTL_R32 (TxConfig));
       
   933 	tp->chipset = 0;
       
   934 
       
   935 match:
       
   936 	DPRINTK ("chipset id (%d) == index %d, '%s'\n",
       
   937 		 version, i, rtl_chip_info[i].name);
       
   938 
       
   939 	if (tp->chipset >= CH_8139B) {
       
   940 		u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
       
   941 		DPRINTK("PCI PM wakeup\n");
       
   942 		if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
       
   943 		    (tmp8 & LWAKE))
       
   944 			new_tmp8 &= ~LWAKE;
       
   945 		new_tmp8 |= Cfg1_PM_Enable;
       
   946 		if (new_tmp8 != tmp8) {
       
   947 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   948 			RTL_W8 (Config1, tmp8);
       
   949 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   950 		}
       
   951 		if (rtl_chip_info[tp->chipset].flags & HasLWake) {
       
   952 			tmp8 = RTL_R8 (Config4);
       
   953 			if (tmp8 & LWPTN) {
       
   954 				RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
   955 				RTL_W8 (Config4, tmp8 & ~LWPTN);
       
   956 				RTL_W8 (Cfg9346, Cfg9346_Lock);
       
   957 			}
       
   958 		}
       
   959 	} else {
       
   960 		DPRINTK("Old chip wakeup\n");
       
   961 		tmp8 = RTL_R8 (Config1);
       
   962 		tmp8 &= ~(SLEEP | PWRDN);
       
   963 		RTL_W8 (Config1, tmp8);
       
   964 	}
       
   965 
       
   966 	rtl8139_chip_reset (ioaddr);
       
   967 
       
   968 	*dev_out = dev;
       
   969 	return 0;
       
   970 
       
   971 err_out:
       
   972 	__rtl8139_cleanup_dev (dev);
       
   973 	if (disable_dev_on_err)
       
   974 		pci_disable_device (pdev);
       
   975 	return rc;
       
   976 }
       
   977 
       
   978 
       
   979 static int __devinit rtl8139_init_one (struct pci_dev *pdev,
       
   980 				       const struct pci_device_id *ent)
       
   981 {
       
   982 	struct net_device *dev = NULL;
       
   983 	struct rtl8139_private *tp;
       
   984 	int i, addr_len, option;
       
   985 	void __iomem *ioaddr;
       
   986 	static int board_idx = -1;
       
   987 
       
   988 	assert (pdev != NULL);
       
   989 	assert (ent != NULL);
       
   990 
       
   991 	board_idx++;
       
   992 
       
   993 	/* when we're built into the kernel, the driver version message
       
   994 	 * is only printed if at least one 8139 board has been found
       
   995 	 */
       
   996 #ifndef MODULE
       
   997 	{
       
   998 		static int printed_version;
       
   999 		if (!printed_version++)
       
  1000 			printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
       
  1001 	}
       
  1002 #endif
       
  1003 
       
  1004 	if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
       
  1005 	    pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision >= 0x20) {
       
  1006 		dev_info(&pdev->dev,
       
  1007 			   "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n",
       
  1008 		       	   pdev->vendor, pdev->device, pdev->revision);
       
  1009 		dev_info(&pdev->dev,
       
  1010 			   "Use the \"8139cp\" driver for improved performance and stability.\n");
       
  1011 	}
       
  1012 
       
  1013 	i = rtl8139_init_board (pdev, &dev);
       
  1014 	if (i < 0)
       
  1015 		return i;
       
  1016 
       
  1017 	assert (dev != NULL);
       
  1018 	tp = netdev_priv(dev);
       
  1019 
       
  1020 	ioaddr = tp->mmio_addr;
       
  1021 	assert (ioaddr != NULL);
       
  1022 
       
  1023 	addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
       
  1024 	for (i = 0; i < 3; i++)
       
  1025 		((u16 *) (dev->dev_addr))[i] =
       
  1026 		    le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len));
       
  1027 	memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
       
  1028 
       
  1029 	/* The Rtl8139-specific entries in the device structure. */
       
  1030 	dev->open = rtl8139_open;
       
  1031 	dev->hard_start_xmit = rtl8139_start_xmit;
       
  1032 	dev->poll = rtl8139_poll;
       
  1033 	dev->weight = 64;
       
  1034 	dev->stop = rtl8139_close;
       
  1035 	dev->get_stats = rtl8139_get_stats;
       
  1036 	dev->set_multicast_list = rtl8139_set_rx_mode;
       
  1037 	dev->do_ioctl = netdev_ioctl;
       
  1038 	dev->ethtool_ops = &rtl8139_ethtool_ops;
       
  1039 	dev->tx_timeout = rtl8139_tx_timeout;
       
  1040 	dev->watchdog_timeo = TX_TIMEOUT;
       
  1041 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  1042 	dev->poll_controller = rtl8139_poll_controller;
       
  1043 #endif
       
  1044 
       
  1045 	/* note: the hardware is not capable of sg/csum/highdma, however
       
  1046 	 * through the use of skb_copy_and_csum_dev we enable these
       
  1047 	 * features
       
  1048 	 */
       
  1049 	dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
       
  1050 
       
  1051 	dev->irq = pdev->irq;
       
  1052 
       
  1053 	/* tp zeroed and aligned in alloc_etherdev */
       
  1054 	tp = netdev_priv(dev);
       
  1055 
       
  1056 	/* note: tp->chipset set in rtl8139_init_board */
       
  1057 	tp->drv_flags = board_info[ent->driver_data].hw_flags;
       
  1058 	tp->mmio_addr = ioaddr;
       
  1059 	tp->msg_enable =
       
  1060 		(debug < 0 ? RTL8139_DEF_MSG_ENABLE : ((1 << debug) - 1));
       
  1061 	spin_lock_init (&tp->lock);
       
  1062 	spin_lock_init (&tp->rx_lock);
       
  1063 	INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
       
  1064 	tp->mii.dev = dev;
       
  1065 	tp->mii.mdio_read = mdio_read;
       
  1066 	tp->mii.mdio_write = mdio_write;
       
  1067 	tp->mii.phy_id_mask = 0x3f;
       
  1068 	tp->mii.reg_num_mask = 0x1f;
       
  1069 
       
  1070 	/* dev is fully set up and ready to use now */
       
  1071     
       
  1072 	// offer device to EtherCAT master module
       
  1073 	if (ecdev_offer(dev, ec_poll, THIS_MODULE, &tp->ecdev)) {
       
  1074 		printk(KERN_ERR PFX "Failed to offer device.\n");
       
  1075 		goto err_out;
       
  1076 	}
       
  1077 
       
  1078 	if (!tp->ecdev) {
       
  1079 		DPRINTK("about to register device named %s (%p)...\n", dev->name, dev);
       
  1080 		i = register_netdev (dev);
       
  1081 		if (i) goto err_out;
       
  1082 	}
       
  1083 
       
  1084 	pci_set_drvdata (pdev, dev);
       
  1085 
       
  1086 	printk (KERN_INFO "%s: %s at 0x%lx, "
       
  1087 		"%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
       
  1088 		"IRQ %d\n",
       
  1089 		dev->name,
       
  1090 		board_info[ent->driver_data].name,
       
  1091 		dev->base_addr,
       
  1092 		dev->dev_addr[0], dev->dev_addr[1],
       
  1093 		dev->dev_addr[2], dev->dev_addr[3],
       
  1094 		dev->dev_addr[4], dev->dev_addr[5],
       
  1095 		dev->irq);
       
  1096 
       
  1097 	printk (KERN_DEBUG "%s:  Identified 8139 chip type '%s'\n",
       
  1098 		dev->name, rtl_chip_info[tp->chipset].name);
       
  1099 
       
  1100 	/* Find the connected MII xcvrs.
       
  1101 	   Doing this in open() would allow detecting external xcvrs later, but
       
  1102 	   takes too much time. */
       
  1103 #ifdef CONFIG_8139TOO_8129
       
  1104 	if (tp->drv_flags & HAS_MII_XCVR) {
       
  1105 		int phy, phy_idx = 0;
       
  1106 		for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
       
  1107 			int mii_status = mdio_read(dev, phy, 1);
       
  1108 			if (mii_status != 0xffff  &&  mii_status != 0x0000) {
       
  1109 				u16 advertising = mdio_read(dev, phy, 4);
       
  1110 				tp->phys[phy_idx++] = phy;
       
  1111 				printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x "
       
  1112 					   "advertising %4.4x.\n",
       
  1113 					   dev->name, phy, mii_status, advertising);
       
  1114 			}
       
  1115 		}
       
  1116 		if (phy_idx == 0) {
       
  1117 			printk(KERN_INFO "%s: No MII transceivers found!  Assuming SYM "
       
  1118 				   "transceiver.\n",
       
  1119 				   dev->name);
       
  1120 			tp->phys[0] = 32;
       
  1121 		}
       
  1122 	} else
       
  1123 #endif
       
  1124 		tp->phys[0] = 32;
       
  1125 	tp->mii.phy_id = tp->phys[0];
       
  1126 
       
  1127 	/* The lower four bits are the media type. */
       
  1128 	option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
       
  1129 	if (option > 0) {
       
  1130 		tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
       
  1131 		tp->default_port = option & 0xFF;
       
  1132 		if (tp->default_port)
       
  1133 			tp->mii.force_media = 1;
       
  1134 	}
       
  1135 	if (board_idx < MAX_UNITS  &&  full_duplex[board_idx] > 0)
       
  1136 		tp->mii.full_duplex = full_duplex[board_idx];
       
  1137 	if (tp->mii.full_duplex) {
       
  1138 		printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name);
       
  1139 		/* Changing the MII-advertised media because might prevent
       
  1140 		   re-connection. */
       
  1141 		tp->mii.force_media = 1;
       
  1142 	}
       
  1143 	if (tp->default_port) {
       
  1144 		printk(KERN_INFO "  Forcing %dMbps %s-duplex operation.\n",
       
  1145 			   (option & 0x20 ? 100 : 10),
       
  1146 			   (option & 0x10 ? "full" : "half"));
       
  1147 		mdio_write(dev, tp->phys[0], 0,
       
  1148 				   ((option & 0x20) ? 0x2000 : 0) | 	/* 100Mbps? */
       
  1149 				   ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
       
  1150 	}
       
  1151 
       
  1152 	/* Put the chip into low-power mode. */
       
  1153 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1154 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  1155 
       
  1156 	if (tp->ecdev && ecdev_open(tp->ecdev)) {
       
  1157 		ecdev_withdraw(tp->ecdev);
       
  1158 		goto err_out;
       
  1159 	}
       
  1160 
       
  1161 	return 0;
       
  1162 
       
  1163 err_out:
       
  1164 	__rtl8139_cleanup_dev (dev);
       
  1165 	pci_disable_device (pdev);
       
  1166 	return i;
       
  1167 }
       
  1168 
       
  1169 
       
  1170 static void __devexit rtl8139_remove_one (struct pci_dev *pdev)
       
  1171 {
       
  1172 	struct net_device *dev = pci_get_drvdata (pdev);
       
  1173 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1174 
       
  1175 	assert (dev != NULL);
       
  1176 
       
  1177 	flush_scheduled_work();
       
  1178 
       
  1179 	if (tp->ecdev) {
       
  1180 		ecdev_close(tp->ecdev);
       
  1181 		ecdev_withdraw(tp->ecdev);
       
  1182 	}
       
  1183 	else {
       
  1184 		unregister_netdev (dev);
       
  1185 	}
       
  1186 
       
  1187 	__rtl8139_cleanup_dev (dev);
       
  1188 	pci_disable_device (pdev);
       
  1189 }
       
  1190 
       
  1191 
       
  1192 /* Serial EEPROM section. */
       
  1193 
       
  1194 /*  EEPROM_Ctrl bits. */
       
  1195 #define EE_SHIFT_CLK	0x04	/* EEPROM shift clock. */
       
  1196 #define EE_CS			0x08	/* EEPROM chip select. */
       
  1197 #define EE_DATA_WRITE	0x02	/* EEPROM chip data in. */
       
  1198 #define EE_WRITE_0		0x00
       
  1199 #define EE_WRITE_1		0x02
       
  1200 #define EE_DATA_READ	0x01	/* EEPROM chip data out. */
       
  1201 #define EE_ENB			(0x80 | EE_CS)
       
  1202 
       
  1203 /* Delay between EEPROM clock transitions.
       
  1204    No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
       
  1205  */
       
  1206 
       
  1207 #define eeprom_delay()	(void)RTL_R32(Cfg9346)
       
  1208 
       
  1209 /* The EEPROM commands include the alway-set leading bit. */
       
  1210 #define EE_WRITE_CMD	(5)
       
  1211 #define EE_READ_CMD		(6)
       
  1212 #define EE_ERASE_CMD	(7)
       
  1213 
       
  1214 static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len)
       
  1215 {
       
  1216 	int i;
       
  1217 	unsigned retval = 0;
       
  1218 	int read_cmd = location | (EE_READ_CMD << addr_len);
       
  1219 
       
  1220 	RTL_W8 (Cfg9346, EE_ENB & ~EE_CS);
       
  1221 	RTL_W8 (Cfg9346, EE_ENB);
       
  1222 	eeprom_delay ();
       
  1223 
       
  1224 	/* Shift the read command bits out. */
       
  1225 	for (i = 4 + addr_len; i >= 0; i--) {
       
  1226 		int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
       
  1227 		RTL_W8 (Cfg9346, EE_ENB | dataval);
       
  1228 		eeprom_delay ();
       
  1229 		RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK);
       
  1230 		eeprom_delay ();
       
  1231 	}
       
  1232 	RTL_W8 (Cfg9346, EE_ENB);
       
  1233 	eeprom_delay ();
       
  1234 
       
  1235 	for (i = 16; i > 0; i--) {
       
  1236 		RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK);
       
  1237 		eeprom_delay ();
       
  1238 		retval =
       
  1239 		    (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 :
       
  1240 				     0);
       
  1241 		RTL_W8 (Cfg9346, EE_ENB);
       
  1242 		eeprom_delay ();
       
  1243 	}
       
  1244 
       
  1245 	/* Terminate the EEPROM access. */
       
  1246 	RTL_W8 (Cfg9346, ~EE_CS);
       
  1247 	eeprom_delay ();
       
  1248 
       
  1249 	return retval;
       
  1250 }
       
  1251 
       
  1252 /* MII serial management: mostly bogus for now. */
       
  1253 /* Read and write the MII management registers using software-generated
       
  1254    serial MDIO protocol.
       
  1255    The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
       
  1256    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
       
  1257    "overclocking" issues. */
       
  1258 #define MDIO_DIR		0x80
       
  1259 #define MDIO_DATA_OUT	0x04
       
  1260 #define MDIO_DATA_IN	0x02
       
  1261 #define MDIO_CLK		0x01
       
  1262 #define MDIO_WRITE0 (MDIO_DIR)
       
  1263 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
       
  1264 
       
  1265 #define mdio_delay()	RTL_R8(Config4)
       
  1266 
       
  1267 
       
  1268 static const char mii_2_8139_map[8] = {
       
  1269 	BasicModeCtrl,
       
  1270 	BasicModeStatus,
       
  1271 	0,
       
  1272 	0,
       
  1273 	NWayAdvert,
       
  1274 	NWayLPAR,
       
  1275 	NWayExpansion,
       
  1276 	0
       
  1277 };
       
  1278 
       
  1279 
       
  1280 #ifdef CONFIG_8139TOO_8129
       
  1281 /* Syncronize the MII management interface by shifting 32 one bits out. */
       
  1282 static void mdio_sync (void __iomem *ioaddr)
       
  1283 {
       
  1284 	int i;
       
  1285 
       
  1286 	for (i = 32; i >= 0; i--) {
       
  1287 		RTL_W8 (Config4, MDIO_WRITE1);
       
  1288 		mdio_delay ();
       
  1289 		RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK);
       
  1290 		mdio_delay ();
       
  1291 	}
       
  1292 }
       
  1293 #endif
       
  1294 
       
  1295 static int mdio_read (struct net_device *dev, int phy_id, int location)
       
  1296 {
       
  1297 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1298 	int retval = 0;
       
  1299 #ifdef CONFIG_8139TOO_8129
       
  1300 	void __iomem *ioaddr = tp->mmio_addr;
       
  1301 	int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
       
  1302 	int i;
       
  1303 #endif
       
  1304 
       
  1305 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1306 		void __iomem *ioaddr = tp->mmio_addr;
       
  1307 		return location < 8 && mii_2_8139_map[location] ?
       
  1308 		    RTL_R16 (mii_2_8139_map[location]) : 0;
       
  1309 	}
       
  1310 
       
  1311 #ifdef CONFIG_8139TOO_8129
       
  1312 	mdio_sync (ioaddr);
       
  1313 	/* Shift the read command bits out. */
       
  1314 	for (i = 15; i >= 0; i--) {
       
  1315 		int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
       
  1316 
       
  1317 		RTL_W8 (Config4, MDIO_DIR | dataval);
       
  1318 		mdio_delay ();
       
  1319 		RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK);
       
  1320 		mdio_delay ();
       
  1321 	}
       
  1322 
       
  1323 	/* Read the two transition, 16 data, and wire-idle bits. */
       
  1324 	for (i = 19; i > 0; i--) {
       
  1325 		RTL_W8 (Config4, 0);
       
  1326 		mdio_delay ();
       
  1327 		retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0);
       
  1328 		RTL_W8 (Config4, MDIO_CLK);
       
  1329 		mdio_delay ();
       
  1330 	}
       
  1331 #endif
       
  1332 
       
  1333 	return (retval >> 1) & 0xffff;
       
  1334 }
       
  1335 
       
  1336 
       
  1337 static void mdio_write (struct net_device *dev, int phy_id, int location,
       
  1338 			int value)
       
  1339 {
       
  1340 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1341 #ifdef CONFIG_8139TOO_8129
       
  1342 	void __iomem *ioaddr = tp->mmio_addr;
       
  1343 	int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
       
  1344 	int i;
       
  1345 #endif
       
  1346 
       
  1347 	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
       
  1348 		void __iomem *ioaddr = tp->mmio_addr;
       
  1349 		if (location == 0) {
       
  1350 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1351 			RTL_W16 (BasicModeCtrl, value);
       
  1352 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1353 		} else if (location < 8 && mii_2_8139_map[location])
       
  1354 			RTL_W16 (mii_2_8139_map[location], value);
       
  1355 		return;
       
  1356 	}
       
  1357 
       
  1358 #ifdef CONFIG_8139TOO_8129
       
  1359 	mdio_sync (ioaddr);
       
  1360 
       
  1361 	/* Shift the command bits out. */
       
  1362 	for (i = 31; i >= 0; i--) {
       
  1363 		int dataval =
       
  1364 		    (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
       
  1365 		RTL_W8 (Config4, dataval);
       
  1366 		mdio_delay ();
       
  1367 		RTL_W8 (Config4, dataval | MDIO_CLK);
       
  1368 		mdio_delay ();
       
  1369 	}
       
  1370 	/* Clear out extra bits. */
       
  1371 	for (i = 2; i > 0; i--) {
       
  1372 		RTL_W8 (Config4, 0);
       
  1373 		mdio_delay ();
       
  1374 		RTL_W8 (Config4, MDIO_CLK);
       
  1375 		mdio_delay ();
       
  1376 	}
       
  1377 #endif
       
  1378 }
       
  1379 
       
  1380 
       
  1381 static int rtl8139_open (struct net_device *dev)
       
  1382 {
       
  1383 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1384 	int retval;
       
  1385 	void __iomem *ioaddr = tp->mmio_addr;
       
  1386 
       
  1387 	if (!tp->ecdev) {
       
  1388 		retval = request_irq(dev->irq, rtl8139_interrupt,
       
  1389 			IRQF_SHARED, dev->name, dev);
       
  1390 		if (retval)
       
  1391 			return retval;
       
  1392 	}
       
  1393 
       
  1394 	tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  1395 					   &tp->tx_bufs_dma);
       
  1396 	tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  1397 					   &tp->rx_ring_dma);
       
  1398 	if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
       
  1399 		if (!tp->ecdev) free_irq(dev->irq, dev);
       
  1400 
       
  1401 		if (tp->tx_bufs)
       
  1402 			pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  1403 					    tp->tx_bufs, tp->tx_bufs_dma);
       
  1404 		if (tp->rx_ring)
       
  1405 			pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  1406 					    tp->rx_ring, tp->rx_ring_dma);
       
  1407 
       
  1408 		return -ENOMEM;
       
  1409 
       
  1410 	}
       
  1411 
       
  1412 	tp->mii.full_duplex = tp->mii.force_media;
       
  1413 	tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
       
  1414 
       
  1415 	rtl8139_init_ring (dev);
       
  1416 	rtl8139_hw_start (dev);
       
  1417 
       
  1418 	if (!tp->ecdev) {
       
  1419 		netif_start_queue (dev);
       
  1420 
       
  1421 		if (netif_msg_ifup(tp))
       
  1422 			printk(KERN_DEBUG "%s: rtl8139_open() ioaddr %#llx IRQ %d"
       
  1423 					" GP Pins %2.2x %s-duplex.\n", dev->name,
       
  1424 					(unsigned long long)pci_resource_start (tp->pci_dev, 1),
       
  1425 					dev->irq, RTL_R8 (MediaStatus),
       
  1426 					tp->mii.full_duplex ? "full" : "half");
       
  1427 		rtl8139_start_thread(tp);
       
  1428 	}
       
  1429 
       
  1430 	return 0;
       
  1431 }
       
  1432 
       
  1433 
       
  1434 static void rtl_check_media (struct net_device *dev, unsigned int init_media)
       
  1435 {
       
  1436 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1437 
       
  1438 	if (tp->ecdev) {
       
  1439 		void __iomem *ioaddr = tp->mmio_addr;
       
  1440 		uint16_t state = RTL_R16(BasicModeStatus) & BMSR_LSTATUS;
       
  1441 		ecdev_set_link(tp->ecdev, state ? 1 : 0);
       
  1442 	}
       
  1443 	else {
       
  1444 		if (tp->phys[0] >= 0) {
       
  1445 			mii_check_media(&tp->mii, netif_msg_link(tp), init_media);
       
  1446 		}
       
  1447 	}
       
  1448 }
       
  1449 
       
  1450 /* Start the hardware at open or resume. */
       
  1451 static void rtl8139_hw_start (struct net_device *dev)
       
  1452 {
       
  1453 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1454 	void __iomem *ioaddr = tp->mmio_addr;
       
  1455 	u32 i;
       
  1456 	u8 tmp;
       
  1457 
       
  1458 	/* Bring old chips out of low-power mode. */
       
  1459 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  1460 		RTL_W8 (HltClk, 'R');
       
  1461 
       
  1462 	rtl8139_chip_reset (ioaddr);
       
  1463 
       
  1464 	/* unlock Config[01234] and BMCR register writes */
       
  1465 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1466 	/* Restore our idea of the MAC address. */
       
  1467 	RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
       
  1468 	RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
       
  1469 
       
  1470 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1471 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1472 
       
  1473 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1474 	RTL_W32 (RxConfig, tp->rx_config);
       
  1475 	RTL_W32 (TxConfig, rtl8139_tx_config);
       
  1476 
       
  1477 	tp->cur_rx = 0;
       
  1478 
       
  1479 	rtl_check_media (dev, 1);
       
  1480 
       
  1481 	if (tp->chipset >= CH_8139B) {
       
  1482 		/* Disable magic packet scanning, which is enabled
       
  1483 		 * when PM is enabled in Config1.  It can be reenabled
       
  1484 		 * via ETHTOOL_SWOL if desired.  */
       
  1485 		RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
       
  1486 	}
       
  1487 
       
  1488 	DPRINTK("init buffer addresses\n");
       
  1489 
       
  1490 	/* Lock Config[01234] and BMCR register writes */
       
  1491 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1492 
       
  1493 	/* init Rx ring buffer DMA address */
       
  1494 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1495 
       
  1496 	/* init Tx buffer DMA addresses */
       
  1497 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1498 		RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
       
  1499 
       
  1500 	RTL_W32 (RxMissed, 0);
       
  1501 
       
  1502 	rtl8139_set_rx_mode (dev);
       
  1503 
       
  1504 	/* no early-rx interrupts */
       
  1505 	RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
       
  1506 
       
  1507 	/* make sure RxTx has started */
       
  1508 	tmp = RTL_R8 (ChipCmd);
       
  1509 	if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
       
  1510 		RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1511 
       
  1512 	if (!tp->ecdev)
       
  1513 		/* Enable all known interrupts by setting the interrupt mask. */
       
  1514 		RTL_W16 (IntrMask, rtl8139_intr_mask);
       
  1515 }
       
  1516 
       
  1517 
       
  1518 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
       
  1519 static void rtl8139_init_ring (struct net_device *dev)
       
  1520 {
       
  1521 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1522 	int i;
       
  1523 
       
  1524 	tp->cur_rx = 0;
       
  1525 	tp->cur_tx = 0;
       
  1526 	tp->dirty_tx = 0;
       
  1527 
       
  1528 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1529 		tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
       
  1530 }
       
  1531 
       
  1532 
       
  1533 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
       
  1534 static int next_tick = 3 * HZ;
       
  1535 
       
  1536 #ifndef CONFIG_8139TOO_TUNE_TWISTER
       
  1537 static inline void rtl8139_tune_twister (struct net_device *dev,
       
  1538 				  struct rtl8139_private *tp) {}
       
  1539 #else
       
  1540 enum TwisterParamVals {
       
  1541 	PARA78_default	= 0x78fa8388,
       
  1542 	PARA7c_default	= 0xcb38de43,	/* param[0][3] */
       
  1543 	PARA7c_xxx	= 0xcb38de43,
       
  1544 };
       
  1545 
       
  1546 static const unsigned long param[4][4] = {
       
  1547 	{0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
       
  1548 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1549 	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
       
  1550 	{0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
       
  1551 };
       
  1552 
       
  1553 static void rtl8139_tune_twister (struct net_device *dev,
       
  1554 				  struct rtl8139_private *tp)
       
  1555 {
       
  1556 	int linkcase;
       
  1557 	void __iomem *ioaddr = tp->mmio_addr;
       
  1558 
       
  1559 	/* This is a complicated state machine to configure the "twister" for
       
  1560 	   impedance/echos based on the cable length.
       
  1561 	   All of this is magic and undocumented.
       
  1562 	 */
       
  1563 	switch (tp->twistie) {
       
  1564 	case 1:
       
  1565 		if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
       
  1566 			/* We have link beat, let us tune the twister. */
       
  1567 			RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
       
  1568 			tp->twistie = 2;	/* Change to state 2. */
       
  1569 			next_tick = HZ / 10;
       
  1570 		} else {
       
  1571 			/* Just put in some reasonable defaults for when beat returns. */
       
  1572 			RTL_W16 (CSCR, CSCR_LinkDownCmd);
       
  1573 			RTL_W32 (FIFOTMS, 0x20);	/* Turn on cable test mode. */
       
  1574 			RTL_W32 (PARA78, PARA78_default);
       
  1575 			RTL_W32 (PARA7c, PARA7c_default);
       
  1576 			tp->twistie = 0;	/* Bail from future actions. */
       
  1577 		}
       
  1578 		break;
       
  1579 	case 2:
       
  1580 		/* Read how long it took to hear the echo. */
       
  1581 		linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
       
  1582 		if (linkcase == 0x7000)
       
  1583 			tp->twist_row = 3;
       
  1584 		else if (linkcase == 0x3000)
       
  1585 			tp->twist_row = 2;
       
  1586 		else if (linkcase == 0x1000)
       
  1587 			tp->twist_row = 1;
       
  1588 		else
       
  1589 			tp->twist_row = 0;
       
  1590 		tp->twist_col = 0;
       
  1591 		tp->twistie = 3;	/* Change to state 2. */
       
  1592 		next_tick = HZ / 10;
       
  1593 		break;
       
  1594 	case 3:
       
  1595 		/* Put out four tuning parameters, one per 100msec. */
       
  1596 		if (tp->twist_col == 0)
       
  1597 			RTL_W16 (FIFOTMS, 0);
       
  1598 		RTL_W32 (PARA7c, param[(int) tp->twist_row]
       
  1599 			 [(int) tp->twist_col]);
       
  1600 		next_tick = HZ / 10;
       
  1601 		if (++tp->twist_col >= 4) {
       
  1602 			/* For short cables we are done.
       
  1603 			   For long cables (row == 3) check for mistune. */
       
  1604 			tp->twistie =
       
  1605 			    (tp->twist_row == 3) ? 4 : 0;
       
  1606 		}
       
  1607 		break;
       
  1608 	case 4:
       
  1609 		/* Special case for long cables: check for mistune. */
       
  1610 		if ((RTL_R16 (CSCR) &
       
  1611 		     CSCR_LinkStatusBits) == 0x7000) {
       
  1612 			tp->twistie = 0;
       
  1613 			break;
       
  1614 		} else {
       
  1615 			RTL_W32 (PARA7c, 0xfb38de03);
       
  1616 			tp->twistie = 5;
       
  1617 			next_tick = HZ / 10;
       
  1618 		}
       
  1619 		break;
       
  1620 	case 5:
       
  1621 		/* Retune for shorter cable (column 2). */
       
  1622 		RTL_W32 (FIFOTMS, 0x20);
       
  1623 		RTL_W32 (PARA78, PARA78_default);
       
  1624 		RTL_W32 (PARA7c, PARA7c_default);
       
  1625 		RTL_W32 (FIFOTMS, 0x00);
       
  1626 		tp->twist_row = 2;
       
  1627 		tp->twist_col = 0;
       
  1628 		tp->twistie = 3;
       
  1629 		next_tick = HZ / 10;
       
  1630 		break;
       
  1631 
       
  1632 	default:
       
  1633 		/* do nothing */
       
  1634 		break;
       
  1635 	}
       
  1636 }
       
  1637 #endif /* CONFIG_8139TOO_TUNE_TWISTER */
       
  1638 
       
  1639 static inline void rtl8139_thread_iter (struct net_device *dev,
       
  1640 				 struct rtl8139_private *tp,
       
  1641 				 void __iomem *ioaddr)
       
  1642 {
       
  1643 	int mii_lpa;
       
  1644 
       
  1645 	mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
       
  1646 
       
  1647 	if (!tp->mii.force_media && mii_lpa != 0xffff) {
       
  1648 		int duplex = (mii_lpa & LPA_100FULL)
       
  1649 		    || (mii_lpa & 0x01C0) == 0x0040;
       
  1650 		if (tp->mii.full_duplex != duplex) {
       
  1651 			tp->mii.full_duplex = duplex;
       
  1652 
       
  1653 			if (mii_lpa) {
       
  1654 				printk (KERN_INFO
       
  1655 					"%s: Setting %s-duplex based on MII #%d link"
       
  1656 					" partner ability of %4.4x.\n",
       
  1657 					dev->name,
       
  1658 					tp->mii.full_duplex ? "full" : "half",
       
  1659 					tp->phys[0], mii_lpa);
       
  1660 			} else {
       
  1661 				printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n",
       
  1662 				       dev->name);
       
  1663 			}
       
  1664 #if 0
       
  1665 			RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  1666 			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
       
  1667 			RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1668 #endif
       
  1669 		}
       
  1670 	}
       
  1671 
       
  1672 	next_tick = HZ * 60;
       
  1673 
       
  1674 	rtl8139_tune_twister (dev, tp);
       
  1675 
       
  1676 	DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n",
       
  1677 		 dev->name, RTL_R16 (NWayLPAR));
       
  1678 	DPRINTK ("%s:  Other registers are IntMask %4.4x IntStatus %4.4x\n",
       
  1679 		 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus));
       
  1680 	DPRINTK ("%s:  Chip config %2.2x %2.2x.\n",
       
  1681 		 dev->name, RTL_R8 (Config0),
       
  1682 		 RTL_R8 (Config1));
       
  1683 }
       
  1684 
       
  1685 static void rtl8139_thread (struct work_struct *work)
       
  1686 {
       
  1687 	struct rtl8139_private *tp =
       
  1688 		container_of(work, struct rtl8139_private, thread.work);
       
  1689 	struct net_device *dev = tp->mii.dev;
       
  1690 	unsigned long thr_delay = next_tick;
       
  1691 
       
  1692 	rtnl_lock();
       
  1693 
       
  1694 	if (!netif_running(dev))
       
  1695 		goto out_unlock;
       
  1696 
       
  1697 	if (tp->watchdog_fired) {
       
  1698 		tp->watchdog_fired = 0;
       
  1699 		rtl8139_tx_timeout_task(work);
       
  1700 	} else
       
  1701 		rtl8139_thread_iter(dev, tp, tp->mmio_addr);
       
  1702 
       
  1703 	if (tp->have_thread)
       
  1704 		schedule_delayed_work(&tp->thread, thr_delay);
       
  1705 out_unlock:
       
  1706 	rtnl_unlock ();
       
  1707 }
       
  1708 
       
  1709 static void rtl8139_start_thread(struct rtl8139_private *tp)
       
  1710 {
       
  1711 	tp->twistie = 0;
       
  1712 	if (tp->chipset == CH_8139_K)
       
  1713 		tp->twistie = 1;
       
  1714 	else if (tp->drv_flags & HAS_LNK_CHNG)
       
  1715 		return;
       
  1716 
       
  1717 	tp->have_thread = 1;
       
  1718 	tp->watchdog_fired = 0;
       
  1719 
       
  1720 	schedule_delayed_work(&tp->thread, next_tick);
       
  1721 }
       
  1722 
       
  1723 static inline void rtl8139_tx_clear (struct rtl8139_private *tp)
       
  1724 {
       
  1725 	tp->cur_tx = 0;
       
  1726 	tp->dirty_tx = 0;
       
  1727 
       
  1728 	/* XXX account for unsent Tx packets in tp->stats.tx_dropped */
       
  1729 }
       
  1730 
       
  1731 static void rtl8139_tx_timeout_task (struct work_struct *work)
       
  1732 {
       
  1733 	struct rtl8139_private *tp =
       
  1734 		container_of(work, struct rtl8139_private, thread.work);
       
  1735 	struct net_device *dev = tp->mii.dev;
       
  1736 	void __iomem *ioaddr = tp->mmio_addr;
       
  1737 	int i;
       
  1738 	u8 tmp8;
       
  1739 
       
  1740 	printk (KERN_DEBUG "%s: Transmit timeout, status %2.2x %4.4x %4.4x "
       
  1741 		"media %2.2x.\n", dev->name, RTL_R8 (ChipCmd),
       
  1742 		RTL_R16(IntrStatus), RTL_R16(IntrMask), RTL_R8(MediaStatus));
       
  1743 	/* Emit info to figure out what went wrong. */
       
  1744 	printk (KERN_DEBUG "%s: Tx queue start entry %ld  dirty entry %ld.\n",
       
  1745 		dev->name, tp->cur_tx, tp->dirty_tx);
       
  1746 	for (i = 0; i < NUM_TX_DESC; i++)
       
  1747 		printk (KERN_DEBUG "%s:  Tx descriptor %d is %8.8lx.%s\n",
       
  1748 			dev->name, i, RTL_R32 (TxStatus0 + (i * 4)),
       
  1749 			i == tp->dirty_tx % NUM_TX_DESC ?
       
  1750 				" (queue head)" : "");
       
  1751 
       
  1752 	tp->xstats.tx_timeouts++;
       
  1753 
       
  1754 	/* disable Tx ASAP, if not already */
       
  1755 	tmp8 = RTL_R8 (ChipCmd);
       
  1756 	if (tmp8 & CmdTxEnb)
       
  1757 		RTL_W8 (ChipCmd, CmdRxEnb);
       
  1758 
       
  1759 	if (tp->ecdev) {
       
  1760 		rtl8139_tx_clear (tp);
       
  1761 		rtl8139_hw_start (dev);
       
  1762 	}
       
  1763 	else {
       
  1764 	  spin_lock_bh(&tp->rx_lock);
       
  1765 	  /* Disable interrupts by clearing the interrupt mask. */
       
  1766 	  RTL_W16 (IntrMask, 0x0000);
       
  1767 
       
  1768 	  /* Stop a shared interrupt from scavenging while we are. */
       
  1769 	  spin_lock_irq(&tp->lock);
       
  1770 	  rtl8139_tx_clear (tp);
       
  1771 	  spin_unlock_irq(&tp->lock);
       
  1772 
       
  1773 	  /* ...and finally, reset everything */
       
  1774 	  if (netif_running(dev)) {
       
  1775 	    rtl8139_hw_start (dev);
       
  1776 	    netif_wake_queue (dev);
       
  1777 	  }
       
  1778 	  spin_unlock_bh(&tp->rx_lock);
       
  1779 	}
       
  1780 }
       
  1781 
       
  1782 static void rtl8139_tx_timeout (struct net_device *dev)
       
  1783 {
       
  1784 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1785 
       
  1786 	tp->watchdog_fired = 1;
       
  1787 	if (!tp->ecdev && !tp->have_thread) {
       
  1788 		INIT_DELAYED_WORK(&tp->thread, rtl8139_thread);
       
  1789 		schedule_delayed_work(&tp->thread, next_tick);
       
  1790 	}
       
  1791 }
       
  1792 
       
  1793 static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
       
  1794 {
       
  1795 	struct rtl8139_private *tp = netdev_priv(dev);
       
  1796 	void __iomem *ioaddr = tp->mmio_addr;
       
  1797 	unsigned int entry;
       
  1798 	unsigned int len = skb->len;
       
  1799 	unsigned long flags;
       
  1800 
       
  1801 	/* Calculate the next Tx descriptor entry. */
       
  1802 	entry = tp->cur_tx % NUM_TX_DESC;
       
  1803 
       
  1804 	/* Note: the chip doesn't have auto-pad! */
       
  1805 	if (likely(len < TX_BUF_SIZE)) {
       
  1806 		if (len < ETH_ZLEN)
       
  1807 			memset(tp->tx_buf[entry], 0, ETH_ZLEN);
       
  1808 		skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
       
  1809 		if (!tp->ecdev) dev_kfree_skb(skb);
       
  1810 	} else {
       
  1811 		if (!tp->ecdev) dev_kfree_skb(skb);
       
  1812 		tp->stats.tx_dropped++;
       
  1813 		return 0;
       
  1814 	}
       
  1815 
       
  1816 	if (tp->ecdev) {
       
  1817 		RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
       
  1818 				tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
       
  1819 
       
  1820 		dev->trans_start = jiffies;
       
  1821 
       
  1822 		tp->cur_tx++;
       
  1823 		wmb();
       
  1824 	}
       
  1825 	else {
       
  1826 		spin_lock_irqsave(&tp->lock, flags);
       
  1827 
       
  1828 		RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
       
  1829 				tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
       
  1830 
       
  1831 		dev->trans_start = jiffies;
       
  1832 
       
  1833 		tp->cur_tx++;
       
  1834 		wmb();
       
  1835 
       
  1836 		if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
       
  1837 			netif_stop_queue (dev);
       
  1838 		spin_unlock_irqrestore(&tp->lock, flags);
       
  1839 
       
  1840 		if (netif_msg_tx_queued(tp))
       
  1841 			printk (KERN_DEBUG "%s: Queued Tx packet size %u to slot %d.\n",
       
  1842 					dev->name, len, entry);
       
  1843 	}
       
  1844 
       
  1845 	return 0;
       
  1846 }
       
  1847 
       
  1848 
       
  1849 static void rtl8139_tx_interrupt (struct net_device *dev,
       
  1850 				  struct rtl8139_private *tp,
       
  1851 				  void __iomem *ioaddr)
       
  1852 {
       
  1853 	unsigned long dirty_tx, tx_left;
       
  1854 
       
  1855 	assert (dev != NULL);
       
  1856 	assert (ioaddr != NULL);
       
  1857 
       
  1858 	dirty_tx = tp->dirty_tx;
       
  1859 	tx_left = tp->cur_tx - dirty_tx;
       
  1860 	while (tx_left > 0) {
       
  1861 		int entry = dirty_tx % NUM_TX_DESC;
       
  1862 		int txstatus;
       
  1863 
       
  1864 		txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
       
  1865 
       
  1866 		if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
       
  1867 			break;	/* It still hasn't been Txed */
       
  1868 
       
  1869 		/* Note: TxCarrierLost is always asserted at 100mbps. */
       
  1870 		if (txstatus & (TxOutOfWindow | TxAborted)) {
       
  1871 			/* There was an major error, log it. */
       
  1872 			if (netif_msg_tx_err(tp))
       
  1873 				printk(KERN_DEBUG "%s: Transmit error, Tx status %8.8x.\n",
       
  1874 					dev->name, txstatus);
       
  1875 			tp->stats.tx_errors++;
       
  1876 			if (txstatus & TxAborted) {
       
  1877 				tp->stats.tx_aborted_errors++;
       
  1878 				RTL_W32 (TxConfig, TxClearAbt);
       
  1879 				RTL_W16 (IntrStatus, TxErr);
       
  1880 				wmb();
       
  1881 			}
       
  1882 			if (txstatus & TxCarrierLost)
       
  1883 				tp->stats.tx_carrier_errors++;
       
  1884 			if (txstatus & TxOutOfWindow)
       
  1885 				tp->stats.tx_window_errors++;
       
  1886 		} else {
       
  1887 			if (txstatus & TxUnderrun) {
       
  1888 				/* Add 64 to the Tx FIFO threshold. */
       
  1889 				if (tp->tx_flag < 0x00300000)
       
  1890 					tp->tx_flag += 0x00020000;
       
  1891 				tp->stats.tx_fifo_errors++;
       
  1892 			}
       
  1893 			tp->stats.collisions += (txstatus >> 24) & 15;
       
  1894 			tp->stats.tx_bytes += txstatus & 0x7ff;
       
  1895 			tp->stats.tx_packets++;
       
  1896 		}
       
  1897 
       
  1898 		dirty_tx++;
       
  1899 		tx_left--;
       
  1900 	}
       
  1901 
       
  1902 #ifndef RTL8139_NDEBUG
       
  1903 	if (!tp->ecdev && tp->cur_tx - dirty_tx > NUM_TX_DESC) {
       
  1904 		printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n",
       
  1905 		        dev->name, dirty_tx, tp->cur_tx);
       
  1906 		dirty_tx += NUM_TX_DESC;
       
  1907 	}
       
  1908 #endif /* RTL8139_NDEBUG */
       
  1909 
       
  1910 	/* only wake the queue if we did work, and the queue is stopped */
       
  1911 	if (tp->dirty_tx != dirty_tx) {
       
  1912 		tp->dirty_tx = dirty_tx;
       
  1913 		mb();
       
  1914 		if (!tp->ecdev) netif_wake_queue (dev);
       
  1915 	}
       
  1916 }
       
  1917 
       
  1918 
       
  1919 /* TODO: clean this up!  Rx reset need not be this intensive */
       
  1920 static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
       
  1921 			    struct rtl8139_private *tp, void __iomem *ioaddr)
       
  1922 {
       
  1923 	u8 tmp8;
       
  1924 #ifdef CONFIG_8139_OLD_RX_RESET
       
  1925 	int tmp_work;
       
  1926 #endif
       
  1927 
       
  1928 	if (netif_msg_rx_err (tp))
       
  1929 		printk(KERN_DEBUG "%s: Ethernet frame had errors, status %8.8x.\n",
       
  1930 			dev->name, rx_status);
       
  1931 	tp->stats.rx_errors++;
       
  1932 	if (!(rx_status & RxStatusOK)) {
       
  1933 		if (rx_status & RxTooLong) {
       
  1934 			DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
       
  1935 			 	dev->name, rx_status);
       
  1936 			/* A.C.: The chip hangs here. */
       
  1937 		}
       
  1938 		if (rx_status & (RxBadSymbol | RxBadAlign))
       
  1939 			tp->stats.rx_frame_errors++;
       
  1940 		if (rx_status & (RxRunt | RxTooLong))
       
  1941 			tp->stats.rx_length_errors++;
       
  1942 		if (rx_status & RxCRCErr)
       
  1943 			tp->stats.rx_crc_errors++;
       
  1944 	} else {
       
  1945 		tp->xstats.rx_lost_in_ring++;
       
  1946 	}
       
  1947 
       
  1948 #ifndef CONFIG_8139_OLD_RX_RESET
       
  1949 	tmp8 = RTL_R8 (ChipCmd);
       
  1950 	RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
       
  1951 	RTL_W8 (ChipCmd, tmp8);
       
  1952 	RTL_W32 (RxConfig, tp->rx_config);
       
  1953 	tp->cur_rx = 0;
       
  1954 #else
       
  1955 	/* Reset the receiver, based on RealTek recommendation. (Bug?) */
       
  1956 
       
  1957 	/* disable receive */
       
  1958 	RTL_W8_F (ChipCmd, CmdTxEnb);
       
  1959 	tmp_work = 200;
       
  1960 	while (--tmp_work > 0) {
       
  1961 		udelay(1);
       
  1962 		tmp8 = RTL_R8 (ChipCmd);
       
  1963 		if (!(tmp8 & CmdRxEnb))
       
  1964 			break;
       
  1965 	}
       
  1966 	if (tmp_work <= 0)
       
  1967 		printk (KERN_WARNING PFX "rx stop wait too long\n");
       
  1968 	/* restart receive */
       
  1969 	tmp_work = 200;
       
  1970 	while (--tmp_work > 0) {
       
  1971 		RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1972 		udelay(1);
       
  1973 		tmp8 = RTL_R8 (ChipCmd);
       
  1974 		if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
       
  1975 			break;
       
  1976 	}
       
  1977 	if (tmp_work <= 0)
       
  1978 		printk (KERN_WARNING PFX "tx/rx enable wait too long\n");
       
  1979 
       
  1980 	/* and reinitialize all rx related registers */
       
  1981 	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
       
  1982 	/* Must enable Tx/Rx before setting transfer thresholds! */
       
  1983 	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
       
  1984 
       
  1985 	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
       
  1986 	RTL_W32 (RxConfig, tp->rx_config);
       
  1987 	tp->cur_rx = 0;
       
  1988 
       
  1989 	DPRINTK("init buffer addresses\n");
       
  1990 
       
  1991 	/* Lock Config[01234] and BMCR register writes */
       
  1992 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  1993 
       
  1994 	/* init Rx ring buffer DMA address */
       
  1995 	RTL_W32_F (RxBuf, tp->rx_ring_dma);
       
  1996 
       
  1997 	/* A.C.: Reset the multicast list. */
       
  1998 	__set_rx_mode (dev);
       
  1999 #endif
       
  2000 }
       
  2001 
       
  2002 #if RX_BUF_IDX == 3
       
  2003 static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring,
       
  2004 				 u32 offset, unsigned int size)
       
  2005 {
       
  2006 	u32 left = RX_BUF_LEN - offset;
       
  2007 
       
  2008 	if (size > left) {
       
  2009 		skb_copy_to_linear_data(skb, ring + offset, left);
       
  2010 		skb_copy_to_linear_data_offset(skb, left, ring, size - left);
       
  2011 	} else
       
  2012 		skb_copy_to_linear_data(skb, ring + offset, size);
       
  2013 }
       
  2014 #endif
       
  2015 
       
  2016 static void rtl8139_isr_ack(struct rtl8139_private *tp)
       
  2017 {
       
  2018 	void __iomem *ioaddr = tp->mmio_addr;
       
  2019 	u16 status;
       
  2020 
       
  2021 	status = RTL_R16 (IntrStatus) & RxAckBits;
       
  2022 
       
  2023 	/* Clear out errors and receive interrupts */
       
  2024 	if (likely(status != 0)) {
       
  2025 		if (unlikely(status & (RxFIFOOver | RxOverflow))) {
       
  2026 			tp->stats.rx_errors++;
       
  2027 			if (status & RxFIFOOver)
       
  2028 				tp->stats.rx_fifo_errors++;
       
  2029 		}
       
  2030 		RTL_W16_F (IntrStatus, RxAckBits);
       
  2031 	}
       
  2032 }
       
  2033 
       
  2034 static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp,
       
  2035 		      int budget)
       
  2036 {
       
  2037 	void __iomem *ioaddr = tp->mmio_addr;
       
  2038 	int received = 0;
       
  2039 	unsigned char *rx_ring = tp->rx_ring;
       
  2040 	unsigned int cur_rx = tp->cur_rx;
       
  2041 	unsigned int rx_size = 0;
       
  2042 
       
  2043 	DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
       
  2044 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, (u16)cur_rx,
       
  2045 		 RTL_R16 (RxBufAddr),
       
  2046 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
       
  2047 
       
  2048 	while ((tp->ecdev || netif_running(dev))
       
  2049 			&& received < budget
       
  2050 			&& (RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
       
  2051 		u32 ring_offset = cur_rx % RX_BUF_LEN;
       
  2052 		u32 rx_status;
       
  2053 		unsigned int pkt_size;
       
  2054 		struct sk_buff *skb;
       
  2055 
       
  2056 		rmb();
       
  2057 
       
  2058 		/* read size+status of next frame from DMA ring buffer */
       
  2059 		rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset));
       
  2060 		rx_size = rx_status >> 16;
       
  2061 		pkt_size = rx_size - 4;
       
  2062 
       
  2063 		if (!tp->ecdev) {
       
  2064 			if (netif_msg_rx_status(tp))
       
  2065 				printk(KERN_DEBUG "%s:  rtl8139_rx() status %4.4x, size %4.4x,"
       
  2066 				       " cur %4.4x.\n", dev->name, rx_status,
       
  2067 				       rx_size, cur_rx);
       
  2068 		}
       
  2069 #if RTL8139_DEBUG > 2
       
  2070 		{
       
  2071 			int i;
       
  2072 			DPRINTK ("%s: Frame contents ", dev->name);
       
  2073 			for (i = 0; i < 70; i++)
       
  2074 				printk (" %2.2x",
       
  2075 					rx_ring[ring_offset + i]);
       
  2076 			printk (".\n");
       
  2077 		}
       
  2078 #endif
       
  2079 
       
  2080 		/* Packet copy from FIFO still in progress.
       
  2081 		 * Theoretically, this should never happen
       
  2082 		 * since EarlyRx is disabled.
       
  2083 		 */
       
  2084 		if (unlikely(rx_size == 0xfff0)) {
       
  2085 			if (!tp->fifo_copy_timeout)
       
  2086 				tp->fifo_copy_timeout = jiffies + 2;
       
  2087 			else if (time_after(jiffies, tp->fifo_copy_timeout)) {
       
  2088 				DPRINTK ("%s: hung FIFO. Reset.", dev->name);
       
  2089 				rx_size = 0;
       
  2090 				goto no_early_rx;
       
  2091 			}
       
  2092 			if (netif_msg_intr(tp)) {
       
  2093 				printk(KERN_DEBUG "%s: fifo copy in progress.",
       
  2094 				       dev->name);
       
  2095 			}
       
  2096 			tp->xstats.early_rx++;
       
  2097 			break;
       
  2098 		}
       
  2099 
       
  2100 no_early_rx:
       
  2101 		tp->fifo_copy_timeout = 0;
       
  2102 
       
  2103 		/* If Rx err or invalid rx_size/rx_status received
       
  2104 		 * (which happens if we get lost in the ring),
       
  2105 		 * Rx process gets reset, so we abort any further
       
  2106 		 * Rx processing.
       
  2107 		 */
       
  2108 		if (unlikely((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
       
  2109 			     (rx_size < 8) ||
       
  2110 			     (!(rx_status & RxStatusOK)))) {
       
  2111 			rtl8139_rx_err (rx_status, dev, tp, ioaddr);
       
  2112 			received = -1;
       
  2113 			goto out;
       
  2114 		}
       
  2115 
       
  2116        		if (tp->ecdev) {
       
  2117   			ecdev_receive(tp->ecdev,
       
  2118   					&rx_ring[ring_offset + 4], pkt_size);
       
  2119   			dev->last_rx = jiffies;
       
  2120   			tp->stats.rx_bytes += pkt_size;
       
  2121   			tp->stats.rx_packets++;
       
  2122   		}
       
  2123   		else {
       
  2124 
       
  2125                     /* Malloc up new buffer, compatible with net-2e. */
       
  2126                     /* Omit the four octet CRC from the length. */
       
  2127 
       
  2128                     skb = dev_alloc_skb (pkt_size + 2);
       
  2129                     if (likely(skb)) {
       
  2130                         skb_reserve (skb, 2);	/* 16 byte align the IP fields. */
       
  2131 #if RX_BUF_IDX == 3
       
  2132                         wrap_copy(skb, rx_ring, ring_offset+4, pkt_size);
       
  2133 #else
       
  2134                         skb_copy_to_linear_data (skb, &rx_ring[ring_offset + 4], pkt_size);
       
  2135 #endif
       
  2136                         skb_put (skb, pkt_size);
       
  2137 
       
  2138                         skb->protocol = eth_type_trans (skb, dev);
       
  2139 
       
  2140                         dev->last_rx = jiffies;
       
  2141                         tp->stats.rx_bytes += pkt_size;
       
  2142                         tp->stats.rx_packets++;
       
  2143 
       
  2144                         netif_receive_skb (skb);
       
  2145                     } else {
       
  2146                         if (net_ratelimit())
       
  2147                             printk (KERN_WARNING
       
  2148                                     "%s: Memory squeeze, dropping packet.\n",
       
  2149                                     dev->name);
       
  2150                         tp->stats.rx_dropped++;
       
  2151                     }
       
  2152                 }
       
  2153 		received++;
       
  2154 
       
  2155 		cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
       
  2156 		RTL_W16 (RxBufPtr, (u16) (cur_rx - 16));
       
  2157 
       
  2158 		rtl8139_isr_ack(tp);
       
  2159 	}
       
  2160 
       
  2161 	if (unlikely(!received || rx_size == 0xfff0))
       
  2162 		rtl8139_isr_ack(tp);
       
  2163 
       
  2164 #if RTL8139_DEBUG > 1
       
  2165 	DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
       
  2166 		 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
       
  2167 		 RTL_R16 (RxBufAddr),
       
  2168 		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
       
  2169 #endif
       
  2170 
       
  2171 	tp->cur_rx = cur_rx;
       
  2172 
       
  2173 	/*
       
  2174 	 * The receive buffer should be mostly empty.
       
  2175 	 * Tell NAPI to reenable the Rx irq.
       
  2176 	 */
       
  2177 	if (tp->fifo_copy_timeout)
       
  2178 		received = budget;
       
  2179 
       
  2180 out:
       
  2181 	return received;
       
  2182 }
       
  2183 
       
  2184 
       
  2185 static void rtl8139_weird_interrupt (struct net_device *dev,
       
  2186 				     struct rtl8139_private *tp,
       
  2187 				     void __iomem *ioaddr,
       
  2188 				     int status, int link_changed)
       
  2189 {
       
  2190 	DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n",
       
  2191 		 dev->name, status);
       
  2192 
       
  2193 	assert (dev != NULL);
       
  2194 	assert (tp != NULL);
       
  2195 	assert (ioaddr != NULL);
       
  2196 
       
  2197 	/* Update the error count. */
       
  2198 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2199 	RTL_W32 (RxMissed, 0);
       
  2200 
       
  2201 	if ((status & RxUnderrun) && link_changed &&
       
  2202 	    (tp->drv_flags & HAS_LNK_CHNG)) {
       
  2203 		rtl_check_media(dev, 0);
       
  2204 		status &= ~RxUnderrun;
       
  2205 	}
       
  2206 
       
  2207 	if (status & (RxUnderrun | RxErr))
       
  2208 		tp->stats.rx_errors++;
       
  2209 
       
  2210 	if (status & PCSTimeout)
       
  2211 		tp->stats.rx_length_errors++;
       
  2212 	if (status & RxUnderrun)
       
  2213 		tp->stats.rx_fifo_errors++;
       
  2214 	if (status & PCIErr) {
       
  2215 		u16 pci_cmd_status;
       
  2216 		pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
       
  2217 		pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
       
  2218 
       
  2219 		printk (KERN_ERR "%s: PCI Bus error %4.4x.\n",
       
  2220 			dev->name, pci_cmd_status);
       
  2221 	}
       
  2222 }
       
  2223 
       
  2224 static int rtl8139_poll(struct net_device *dev, int *budget)
       
  2225 {
       
  2226 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2227 	void __iomem *ioaddr = tp->mmio_addr;
       
  2228 	int orig_budget = min(*budget, dev->quota);
       
  2229 	int done = 1;
       
  2230 
       
  2231 	spin_lock(&tp->rx_lock);
       
  2232 	if (likely(RTL_R16(IntrStatus) & RxAckBits)) {
       
  2233 		int work_done;
       
  2234 
       
  2235 		work_done = rtl8139_rx(dev, tp, orig_budget);
       
  2236 		if (likely(work_done > 0)) {
       
  2237 			*budget -= work_done;
       
  2238 			dev->quota -= work_done;
       
  2239 			done = (work_done < orig_budget);
       
  2240 		}
       
  2241 	}
       
  2242 
       
  2243 	if (done) {
       
  2244 		unsigned long flags;
       
  2245 		/*
       
  2246 		 * Order is important since data can get interrupted
       
  2247 		 * again when we think we are done.
       
  2248 		 */
       
  2249 		local_irq_save(flags);
       
  2250 		RTL_W16_F(IntrMask, rtl8139_intr_mask);
       
  2251 		__netif_rx_complete(dev);
       
  2252 		local_irq_restore(flags);
       
  2253 	}
       
  2254 	spin_unlock(&tp->rx_lock);
       
  2255 
       
  2256 	return !done;
       
  2257 }
       
  2258 
       
  2259 void ec_poll(struct net_device *dev)
       
  2260 {
       
  2261     rtl8139_interrupt(0, dev);
       
  2262 }
       
  2263 
       
  2264 /* The interrupt handler does all of the Rx thread work and cleans up
       
  2265    after the Tx thread. */
       
  2266 static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance)
       
  2267 {
       
  2268 	struct net_device *dev = (struct net_device *) dev_instance;
       
  2269 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2270 	void __iomem *ioaddr = tp->mmio_addr;
       
  2271 	u16 status, ackstat;
       
  2272 	int link_changed = 0; /* avoid bogus "uninit" warning */
       
  2273 	int handled = 0;
       
  2274 
       
  2275 	if (tp->ecdev) {
       
  2276 		status = RTL_R16 (IntrStatus);
       
  2277 	}
       
  2278 	else {
       
  2279 		spin_lock (&tp->lock);
       
  2280 		status = RTL_R16 (IntrStatus);
       
  2281 
       
  2282 		/* shared irq? */
       
  2283 		if (unlikely((status & rtl8139_intr_mask) == 0))
       
  2284 			goto out;
       
  2285 	}
       
  2286 
       
  2287 	handled = 1;
       
  2288 
       
  2289 	/* h/w no longer present (hotplug?) or major error, bail */
       
  2290 	if (unlikely(status == 0xFFFF))
       
  2291 		goto out;
       
  2292 
       
  2293 	if (!tp->ecdev) {
       
  2294 		/* close possible race's with dev_close */
       
  2295 		if (unlikely(!netif_running(dev))) {
       
  2296 			RTL_W16 (IntrMask, 0);
       
  2297 			goto out;
       
  2298 		}
       
  2299 	}
       
  2300 
       
  2301 	/* Acknowledge all of the current interrupt sources ASAP, but
       
  2302 	   an first get an additional status bit from CSCR. */
       
  2303 	if (unlikely(status & RxUnderrun))
       
  2304 		link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
       
  2305 
       
  2306 	ackstat = status & ~(RxAckBits | TxErr);
       
  2307 	if (ackstat)
       
  2308 		RTL_W16 (IntrStatus, ackstat);
       
  2309 
       
  2310 	/* Receive packets are processed by poll routine.
       
  2311 	   If not running start it now. */
       
  2312 	if (status & RxAckBits){
       
  2313 		if (tp->ecdev) {
       
  2314 			/* EtherCAT device: Just receive all frames */
       
  2315 			rtl8139_rx(dev, tp, 100); // FIXME
       
  2316 		}
       
  2317 		else {
       
  2318 			/* Mark for polling */
       
  2319 			if (netif_rx_schedule_prep(dev)) {
       
  2320 				RTL_W16_F (IntrMask, rtl8139_norx_intr_mask);
       
  2321 				__netif_rx_schedule (dev);
       
  2322 			}
       
  2323 		}
       
  2324 	}
       
  2325 
       
  2326 	/* Check uncommon events with one test. */
       
  2327 	if (unlikely(status & (PCIErr | PCSTimeout | RxUnderrun | RxErr)))
       
  2328 		rtl8139_weird_interrupt (dev, tp, ioaddr,
       
  2329 					 status, link_changed);
       
  2330 
       
  2331 	if (status & (TxOK | TxErr)) {
       
  2332 		rtl8139_tx_interrupt (dev, tp, ioaddr);
       
  2333 		if (status & TxErr)
       
  2334 			RTL_W16 (IntrStatus, TxErr);
       
  2335 	}
       
  2336  out:
       
  2337 	if (!tp->ecdev) spin_unlock (&tp->lock);
       
  2338 
       
  2339 	DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n",
       
  2340 		 dev->name, RTL_R16 (IntrStatus));
       
  2341 	return IRQ_RETVAL(handled);
       
  2342 }
       
  2343 
       
  2344 #ifdef CONFIG_NET_POLL_CONTROLLER
       
  2345 /*
       
  2346  * Polling receive - used by netconsole and other diagnostic tools
       
  2347  * to allow network i/o with interrupts disabled.
       
  2348  */
       
  2349 static void rtl8139_poll_controller(struct net_device *dev)
       
  2350 {
       
  2351 	disable_irq(dev->irq);
       
  2352 	rtl8139_interrupt(dev->irq, dev);
       
  2353 	enable_irq(dev->irq);
       
  2354 }
       
  2355 #endif
       
  2356 
       
  2357 static int rtl8139_close (struct net_device *dev)
       
  2358 {
       
  2359 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2360 	void __iomem *ioaddr = tp->mmio_addr;
       
  2361 	unsigned long flags;
       
  2362 
       
  2363 	if (tp->ecdev) {
       
  2364 		/* Stop the chip's Tx and Rx DMA processes. */
       
  2365 		RTL_W8 (ChipCmd, 0);
       
  2366 
       
  2367 		/* Disable interrupts by clearing the interrupt mask. */
       
  2368 		RTL_W16 (IntrMask, 0);
       
  2369 
       
  2370 		/* Update the error counts. */
       
  2371 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2372 		RTL_W32 (RxMissed, 0);
       
  2373 	} else {
       
  2374 		netif_stop_queue (dev);
       
  2375 
       
  2376 		if (netif_msg_ifdown(tp))
       
  2377 			printk(KERN_DEBUG "%s: Shutting down ethercard, status was 0x%4.4x.\n",
       
  2378 			       dev->name, RTL_R16 (IntrStatus));
       
  2379 
       
  2380 		spin_lock_irqsave (&tp->lock, flags);
       
  2381 
       
  2382 		/* Stop the chip's Tx and Rx DMA processes. */
       
  2383 		RTL_W8 (ChipCmd, 0);
       
  2384 
       
  2385 		/* Disable interrupts by clearing the interrupt mask. */
       
  2386 		RTL_W16 (IntrMask, 0);
       
  2387 
       
  2388 		/* Update the error counts. */
       
  2389 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2390 		RTL_W32 (RxMissed, 0);
       
  2391 
       
  2392 		spin_unlock_irqrestore (&tp->lock, flags);
       
  2393 
       
  2394 		synchronize_irq (dev->irq);	/* racy, but that's ok here */
       
  2395 		free_irq (dev->irq, dev);
       
  2396 	}
       
  2397 
       
  2398 	rtl8139_tx_clear (tp);
       
  2399 
       
  2400 	pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
       
  2401 			    tp->rx_ring, tp->rx_ring_dma);
       
  2402 	pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
       
  2403 			    tp->tx_bufs, tp->tx_bufs_dma);
       
  2404 	tp->rx_ring = NULL;
       
  2405 	tp->tx_bufs = NULL;
       
  2406 
       
  2407 	/* Green! Put the chip in low-power mode. */
       
  2408 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2409 
       
  2410 	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
       
  2411 		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
       
  2412 
       
  2413 	return 0;
       
  2414 }
       
  2415 
       
  2416 
       
  2417 /* Get the ethtool Wake-on-LAN settings.  Assumes that wol points to
       
  2418    kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
       
  2419    other threads or interrupts aren't messing with the 8139.  */
       
  2420 static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2421 {
       
  2422 	struct rtl8139_private *np = netdev_priv(dev);
       
  2423 	void __iomem *ioaddr = np->mmio_addr;
       
  2424 
       
  2425 	spin_lock_irq(&np->lock);
       
  2426 	if (rtl_chip_info[np->chipset].flags & HasLWake) {
       
  2427 		u8 cfg3 = RTL_R8 (Config3);
       
  2428 		u8 cfg5 = RTL_R8 (Config5);
       
  2429 
       
  2430 		wol->supported = WAKE_PHY | WAKE_MAGIC
       
  2431 			| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
       
  2432 
       
  2433 		wol->wolopts = 0;
       
  2434 		if (cfg3 & Cfg3_LinkUp)
       
  2435 			wol->wolopts |= WAKE_PHY;
       
  2436 		if (cfg3 & Cfg3_Magic)
       
  2437 			wol->wolopts |= WAKE_MAGIC;
       
  2438 		/* (KON)FIXME: See how netdev_set_wol() handles the
       
  2439 		   following constants.  */
       
  2440 		if (cfg5 & Cfg5_UWF)
       
  2441 			wol->wolopts |= WAKE_UCAST;
       
  2442 		if (cfg5 & Cfg5_MWF)
       
  2443 			wol->wolopts |= WAKE_MCAST;
       
  2444 		if (cfg5 & Cfg5_BWF)
       
  2445 			wol->wolopts |= WAKE_BCAST;
       
  2446 	}
       
  2447 	spin_unlock_irq(&np->lock);
       
  2448 }
       
  2449 
       
  2450 
       
  2451 /* Set the ethtool Wake-on-LAN settings.  Return 0 or -errno.  Assumes
       
  2452    that wol points to kernel memory and other threads or interrupts
       
  2453    aren't messing with the 8139.  */
       
  2454 static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
       
  2455 {
       
  2456 	struct rtl8139_private *np = netdev_priv(dev);
       
  2457 	void __iomem *ioaddr = np->mmio_addr;
       
  2458 	u32 support;
       
  2459 	u8 cfg3, cfg5;
       
  2460 
       
  2461 	support = ((rtl_chip_info[np->chipset].flags & HasLWake)
       
  2462 		   ? (WAKE_PHY | WAKE_MAGIC
       
  2463 		      | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
       
  2464 		   : 0);
       
  2465 	if (wol->wolopts & ~support)
       
  2466 		return -EINVAL;
       
  2467 
       
  2468 	spin_lock_irq(&np->lock);
       
  2469 	cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
       
  2470 	if (wol->wolopts & WAKE_PHY)
       
  2471 		cfg3 |= Cfg3_LinkUp;
       
  2472 	if (wol->wolopts & WAKE_MAGIC)
       
  2473 		cfg3 |= Cfg3_Magic;
       
  2474 	RTL_W8 (Cfg9346, Cfg9346_Unlock);
       
  2475 	RTL_W8 (Config3, cfg3);
       
  2476 	RTL_W8 (Cfg9346, Cfg9346_Lock);
       
  2477 
       
  2478 	cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
       
  2479 	/* (KON)FIXME: These are untested.  We may have to set the
       
  2480 	   CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
       
  2481 	   documentation.  */
       
  2482 	if (wol->wolopts & WAKE_UCAST)
       
  2483 		cfg5 |= Cfg5_UWF;
       
  2484 	if (wol->wolopts & WAKE_MCAST)
       
  2485 		cfg5 |= Cfg5_MWF;
       
  2486 	if (wol->wolopts & WAKE_BCAST)
       
  2487 		cfg5 |= Cfg5_BWF;
       
  2488 	RTL_W8 (Config5, cfg5);	/* need not unlock via Cfg9346 */
       
  2489 	spin_unlock_irq(&np->lock);
       
  2490 
       
  2491 	return 0;
       
  2492 }
       
  2493 
       
  2494 static void rtl8139_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
       
  2495 {
       
  2496 	struct rtl8139_private *np = netdev_priv(dev);
       
  2497 	strcpy(info->driver, DRV_NAME);
       
  2498 	strcpy(info->version, DRV_VERSION);
       
  2499 	strcpy(info->bus_info, pci_name(np->pci_dev));
       
  2500 	info->regdump_len = np->regs_len;
       
  2501 }
       
  2502 
       
  2503 static int rtl8139_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2504 {
       
  2505 	struct rtl8139_private *np = netdev_priv(dev);
       
  2506 	spin_lock_irq(&np->lock);
       
  2507 	mii_ethtool_gset(&np->mii, cmd);
       
  2508 	spin_unlock_irq(&np->lock);
       
  2509 	return 0;
       
  2510 }
       
  2511 
       
  2512 static int rtl8139_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
       
  2513 {
       
  2514 	struct rtl8139_private *np = netdev_priv(dev);
       
  2515 	int rc;
       
  2516 	spin_lock_irq(&np->lock);
       
  2517 	rc = mii_ethtool_sset(&np->mii, cmd);
       
  2518 	spin_unlock_irq(&np->lock);
       
  2519 	return rc;
       
  2520 }
       
  2521 
       
  2522 static int rtl8139_nway_reset(struct net_device *dev)
       
  2523 {
       
  2524 	struct rtl8139_private *np = netdev_priv(dev);
       
  2525 	return mii_nway_restart(&np->mii);
       
  2526 }
       
  2527 
       
  2528 static u32 rtl8139_get_link(struct net_device *dev)
       
  2529 {
       
  2530 	struct rtl8139_private *np = netdev_priv(dev);
       
  2531 	return mii_link_ok(&np->mii);
       
  2532 }
       
  2533 
       
  2534 static u32 rtl8139_get_msglevel(struct net_device *dev)
       
  2535 {
       
  2536 	struct rtl8139_private *np = netdev_priv(dev);
       
  2537 	return np->msg_enable;
       
  2538 }
       
  2539 
       
  2540 static void rtl8139_set_msglevel(struct net_device *dev, u32 datum)
       
  2541 {
       
  2542 	struct rtl8139_private *np = netdev_priv(dev);
       
  2543 	np->msg_enable = datum;
       
  2544 }
       
  2545 
       
  2546 /* TODO: we are too slack to do reg dumping for pio, for now */
       
  2547 #ifdef CONFIG_8139TOO_PIO
       
  2548 #define rtl8139_get_regs_len	NULL
       
  2549 #define rtl8139_get_regs	NULL
       
  2550 #else
       
  2551 static int rtl8139_get_regs_len(struct net_device *dev)
       
  2552 {
       
  2553 	struct rtl8139_private *np = netdev_priv(dev);
       
  2554 	return np->regs_len;
       
  2555 }
       
  2556 
       
  2557 static void rtl8139_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf)
       
  2558 {
       
  2559 	struct rtl8139_private *np = netdev_priv(dev);
       
  2560 
       
  2561 	regs->version = RTL_REGS_VER;
       
  2562 
       
  2563 	spin_lock_irq(&np->lock);
       
  2564 	memcpy_fromio(regbuf, np->mmio_addr, regs->len);
       
  2565 	spin_unlock_irq(&np->lock);
       
  2566 }
       
  2567 #endif /* CONFIG_8139TOO_MMIO */
       
  2568 
       
  2569 static int rtl8139_get_stats_count(struct net_device *dev)
       
  2570 {
       
  2571 	return RTL_NUM_STATS;
       
  2572 }
       
  2573 
       
  2574 static void rtl8139_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
       
  2575 {
       
  2576 	struct rtl8139_private *np = netdev_priv(dev);
       
  2577 
       
  2578 	data[0] = np->xstats.early_rx;
       
  2579 	data[1] = np->xstats.tx_buf_mapped;
       
  2580 	data[2] = np->xstats.tx_timeouts;
       
  2581 	data[3] = np->xstats.rx_lost_in_ring;
       
  2582 }
       
  2583 
       
  2584 static void rtl8139_get_strings(struct net_device *dev, u32 stringset, u8 *data)
       
  2585 {
       
  2586 	memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
       
  2587 }
       
  2588 
       
  2589 static const struct ethtool_ops rtl8139_ethtool_ops = {
       
  2590 	.get_drvinfo		= rtl8139_get_drvinfo,
       
  2591 	.get_settings		= rtl8139_get_settings,
       
  2592 	.set_settings		= rtl8139_set_settings,
       
  2593 	.get_regs_len		= rtl8139_get_regs_len,
       
  2594 	.get_regs		= rtl8139_get_regs,
       
  2595 	.nway_reset		= rtl8139_nway_reset,
       
  2596 	.get_link		= rtl8139_get_link,
       
  2597 	.get_msglevel		= rtl8139_get_msglevel,
       
  2598 	.set_msglevel		= rtl8139_set_msglevel,
       
  2599 	.get_wol		= rtl8139_get_wol,
       
  2600 	.set_wol		= rtl8139_set_wol,
       
  2601 	.get_strings		= rtl8139_get_strings,
       
  2602 	.get_stats_count	= rtl8139_get_stats_count,
       
  2603 	.get_ethtool_stats	= rtl8139_get_ethtool_stats,
       
  2604 };
       
  2605 
       
  2606 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
       
  2607 {
       
  2608 	struct rtl8139_private *np = netdev_priv(dev);
       
  2609 	int rc;
       
  2610 
       
  2611 	if (np->ecdev || !netif_running(dev))
       
  2612 		return -EINVAL;
       
  2613 
       
  2614 	spin_lock_irq(&np->lock);
       
  2615 	rc = generic_mii_ioctl(&np->mii, if_mii(rq), cmd, NULL);
       
  2616 	spin_unlock_irq(&np->lock);
       
  2617 
       
  2618 	return rc;
       
  2619 }
       
  2620 
       
  2621 
       
  2622 static struct net_device_stats *rtl8139_get_stats (struct net_device *dev)
       
  2623 {
       
  2624 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2625 	void __iomem *ioaddr = tp->mmio_addr;
       
  2626 	unsigned long flags;
       
  2627 
       
  2628 	if (tp->ecdev || netif_running(dev)) {
       
  2629 		spin_lock_irqsave (&tp->lock, flags);
       
  2630 		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2631 		RTL_W32 (RxMissed, 0);
       
  2632 		spin_unlock_irqrestore (&tp->lock, flags);
       
  2633 	}
       
  2634 
       
  2635 	return &tp->stats;
       
  2636 }
       
  2637 
       
  2638 /* Set or clear the multicast filter for this adaptor.
       
  2639    This routine is not state sensitive and need not be SMP locked. */
       
  2640 
       
  2641 static void __set_rx_mode (struct net_device *dev)
       
  2642 {
       
  2643 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2644 	void __iomem *ioaddr = tp->mmio_addr;
       
  2645 	u32 mc_filter[2];	/* Multicast hash filter */
       
  2646 	int i, rx_mode;
       
  2647 	u32 tmp;
       
  2648 
       
  2649 	DPRINTK ("%s:   rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
       
  2650 			dev->name, dev->flags, RTL_R32 (RxConfig));
       
  2651 
       
  2652 	/* Note: do not reorder, GCC is clever about common statements. */
       
  2653 	if (dev->flags & IFF_PROMISC) {
       
  2654 		rx_mode =
       
  2655 		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
       
  2656 		    AcceptAllPhys;
       
  2657 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2658 	} else if ((dev->mc_count > multicast_filter_limit)
       
  2659 		   || (dev->flags & IFF_ALLMULTI)) {
       
  2660 		/* Too many to filter perfectly -- accept all multicasts. */
       
  2661 		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
       
  2662 		mc_filter[1] = mc_filter[0] = 0xffffffff;
       
  2663 	} else {
       
  2664 		struct dev_mc_list *mclist;
       
  2665 		rx_mode = AcceptBroadcast | AcceptMyPhys;
       
  2666 		mc_filter[1] = mc_filter[0] = 0;
       
  2667 		for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
       
  2668 		     i++, mclist = mclist->next) {
       
  2669 			int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
       
  2670 
       
  2671 			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
       
  2672 			rx_mode |= AcceptMulticast;
       
  2673 		}
       
  2674 	}
       
  2675 
       
  2676 	/* We can safely update without stopping the chip. */
       
  2677 	tmp = rtl8139_rx_config | rx_mode;
       
  2678 	if (tp->rx_config != tmp) {
       
  2679 		RTL_W32_F (RxConfig, tmp);
       
  2680 		tp->rx_config = tmp;
       
  2681 	}
       
  2682 	RTL_W32_F (MAR0 + 0, mc_filter[0]);
       
  2683 	RTL_W32_F (MAR0 + 4, mc_filter[1]);
       
  2684 }
       
  2685 
       
  2686 static void rtl8139_set_rx_mode (struct net_device *dev)
       
  2687 {
       
  2688 	unsigned long flags;
       
  2689 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2690 
       
  2691 	spin_lock_irqsave (&tp->lock, flags);
       
  2692 	__set_rx_mode(dev);
       
  2693 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2694 }
       
  2695 
       
  2696 #ifdef CONFIG_PM
       
  2697 
       
  2698 static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state)
       
  2699 {
       
  2700 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2701 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2702 	void __iomem *ioaddr = tp->mmio_addr;
       
  2703 	unsigned long flags;
       
  2704 
       
  2705 	pci_save_state (pdev);
       
  2706 
       
  2707 	if (tp->ecdev || !netif_running (dev))
       
  2708 		return 0;
       
  2709 
       
  2710 	netif_device_detach (dev);
       
  2711 
       
  2712 	spin_lock_irqsave (&tp->lock, flags);
       
  2713 
       
  2714 	/* Disable interrupts, stop Tx and Rx. */
       
  2715 	RTL_W16 (IntrMask, 0);
       
  2716 	RTL_W8 (ChipCmd, 0);
       
  2717 
       
  2718 	/* Update the error counts. */
       
  2719 	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
       
  2720 	RTL_W32 (RxMissed, 0);
       
  2721 
       
  2722 	spin_unlock_irqrestore (&tp->lock, flags);
       
  2723 
       
  2724 	pci_set_power_state (pdev, PCI_D3hot);
       
  2725 
       
  2726 	return 0;
       
  2727 }
       
  2728 
       
  2729 
       
  2730 static int rtl8139_resume (struct pci_dev *pdev)
       
  2731 {
       
  2732 	struct net_device *dev = pci_get_drvdata (pdev);
       
  2733 	struct rtl8139_private *tp = netdev_priv(dev);
       
  2734 
       
  2735 	pci_restore_state (pdev);
       
  2736 	if (tp->ecdev || !netif_running (dev))
       
  2737 		return 0;
       
  2738 	pci_set_power_state (pdev, PCI_D0);
       
  2739 	rtl8139_init_ring (dev);
       
  2740 	rtl8139_hw_start (dev);
       
  2741 	netif_device_attach (dev);
       
  2742 	return 0;
       
  2743 }
       
  2744 
       
  2745 #endif /* CONFIG_PM */
       
  2746 
       
  2747 
       
  2748 static struct pci_driver rtl8139_pci_driver = {
       
  2749 	.name		= DRV_NAME,
       
  2750 	.id_table	= rtl8139_pci_tbl,
       
  2751 	.probe		= rtl8139_init_one,
       
  2752 	.remove		= __devexit_p(rtl8139_remove_one),
       
  2753 #ifdef CONFIG_PM
       
  2754 	.suspend	= rtl8139_suspend,
       
  2755 	.resume		= rtl8139_resume,
       
  2756 #endif /* CONFIG_PM */
       
  2757 };
       
  2758 
       
  2759 
       
  2760 static int __init rtl8139_init_module (void)
       
  2761 {
       
  2762 	/* when we're a module, we always print a version message,
       
  2763 	 * even if no 8139 board is found.
       
  2764 	 */
       
  2765 #ifdef MODULE
       
  2766 	printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
       
  2767 #endif
       
  2768 
       
  2769 	return pci_register_driver(&rtl8139_pci_driver);
       
  2770 }
       
  2771 
       
  2772 
       
  2773 static void __exit rtl8139_cleanup_module (void)
       
  2774 {
       
  2775 	pci_unregister_driver (&rtl8139_pci_driver);
       
  2776 }
       
  2777 
       
  2778 
       
  2779 module_init(rtl8139_init_module);
       
  2780 module_exit(rtl8139_cleanup_module);