master/fmmu.c
changeset 630 1b755b7342eb
child 635 d304ef4af542
equal deleted inserted replaced
629:84a64efca00d 630:1b755b7342eb
       
     1 /******************************************************************************
       
     2  *
       
     3  *  $Id$
       
     4  *
       
     5  *  Copyright (C) 2006  Florian Pose, Ingenieurgemeinschaft IgH
       
     6  *
       
     7  *  This file is part of the IgH EtherCAT Master.
       
     8  *
       
     9  *  The IgH EtherCAT Master is free software; you can redistribute it
       
    10  *  and/or modify it under the terms of the GNU General Public License
       
    11  *  as published by the Free Software Foundation; either version 2 of the
       
    12  *  License, or (at your option) any later version.
       
    13  *
       
    14  *  The IgH EtherCAT Master is distributed in the hope that it will be
       
    15  *  useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
       
    16  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
       
    17  *  GNU General Public License for more details.
       
    18  *
       
    19  *  You should have received a copy of the GNU General Public License
       
    20  *  along with the IgH EtherCAT Master; if not, write to the Free Software
       
    21  *  Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
       
    22  *
       
    23  *  The right to use EtherCAT Technology is granted and comes free of
       
    24  *  charge under condition of compatibility of product made by
       
    25  *  Licensee. People intending to distribute/sell products based on the
       
    26  *  code, have to sign an agreement to guarantee that products using
       
    27  *  software based on IgH EtherCAT master stay compatible with the actual
       
    28  *  EtherCAT specification (which are released themselves as an open
       
    29  *  standard) as the (only) precondition to have the right to use EtherCAT
       
    30  *  Technology, IP and trade marks.
       
    31  *
       
    32  *****************************************************************************/
       
    33 
       
    34 /**
       
    35    \file
       
    36    EtherCAT FMMU methods.
       
    37 */
       
    38 
       
    39 /*****************************************************************************/
       
    40 
       
    41 #include "globals.h"
       
    42 #include "slave.h"
       
    43 #include "master.h"
       
    44 #include "fmmu.h"
       
    45 
       
    46 /*****************************************************************************/
       
    47 
       
    48 /**
       
    49  * FMMU Constructor.
       
    50  */
       
    51 
       
    52 void ec_fmmu_init(
       
    53         ec_fmmu_t *fmmu, /**< EtherCAT FMMU */
       
    54         ec_slave_t *slave, /**< EtherCAT slave */
       
    55         unsigned int index /**< FMMU index */
       
    56         )
       
    57 {
       
    58     fmmu->slave = slave;
       
    59     fmmu->index = index;
       
    60 }
       
    61 
       
    62 /*****************************************************************************/
       
    63 
       
    64 /**
       
    65  * Initializes an FMMU configuration page.
       
    66  * The referenced memory (\a data) must be at least EC_FMMU_SIZE bytes.
       
    67  */
       
    68 
       
    69 void ec_fmmu_config(
       
    70         const ec_fmmu_t *fmmu, /**< EtherCAT FMMU */
       
    71         uint8_t *data /**> configuration memory */
       
    72         )
       
    73 {
       
    74     size_t sync_size;
       
    75 
       
    76     sync_size = ec_slave_calc_sync_size(fmmu->slave, fmmu->sync);
       
    77 
       
    78     if (fmmu->slave->master->debug_level) {
       
    79         EC_DBG("FMMU%u: LogAddr 0x%08X, Size %3i, PhysAddr 0x%04X, Dir %s\n",
       
    80                fmmu->index, fmmu->logical_start_address,
       
    81                sync_size, fmmu->sync->physical_start_address,
       
    82                ((fmmu->sync->control_register & 0x04) ? "out" : "in"));
       
    83     }
       
    84 
       
    85     EC_WRITE_U32(data,      fmmu->logical_start_address);
       
    86     EC_WRITE_U16(data + 4,  sync_size); // size of fmmu
       
    87     EC_WRITE_U8 (data + 6,  0x00); // logical start bit
       
    88     EC_WRITE_U8 (data + 7,  0x07); // logical end bit
       
    89     EC_WRITE_U16(data + 8,  fmmu->sync->physical_start_address);
       
    90     EC_WRITE_U8 (data + 10, 0x00); // physical start bit
       
    91     EC_WRITE_U8 (data + 11, ((fmmu->sync->control_register & 0x04)
       
    92                              ? 0x02 : 0x01));
       
    93     EC_WRITE_U16(data + 12, 0x0001); // enable
       
    94     EC_WRITE_U16(data + 14, 0x0000); // reserved
       
    95 }
       
    96 
       
    97 /*****************************************************************************/