53 |
53 |
54 ec_master_t *master = NULL; |
54 ec_master_t *master = NULL; |
55 static unsigned int ecat_bus_time = 0; |
55 static unsigned int ecat_bus_time = 0; |
56 static unsigned int ecat_timeouts = 0; |
56 static unsigned int ecat_timeouts = 0; |
57 |
57 |
58 #if 0 |
58 ec_slave_t *s_controller; |
59 static ec_slave_t slaves[] = |
59 ec_slave_t *s_analog_in; |
60 { |
60 |
61 // Block 1 |
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62 ECAT_INIT_SLAVE(Beckhoff_EK1100, 0), |
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63 ECAT_INIT_SLAVE(Beckhoff_EL3102, 0) |
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64 }; |
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65 #endif |
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66 |
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67 #define ECAT_SLAVES_COUNT (sizeof(ecat_slaves) / sizeof(EtherCAT_slave_t)) |
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68 |
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69 #define USE_MSR_LIB |
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70 |
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71 #ifdef USE_MSR_LIB |
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72 double value; |
61 double value; |
73 int dig1; |
62 int dig1; |
74 #endif |
63 |
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64 /*****************************************************************************/ |
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65 |
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66 static int register_slaves(void) |
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67 { |
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68 s_controller = EtherCAT_rt_register_slave(master, 0, |
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69 "Beckhoff", "EK1100", 0); |
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70 s_analog_in = EtherCAT_rt_register_slave(master, 1, |
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71 "Beckhoff", "EL3102", 0); |
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72 |
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73 return !s_controller || !s_analog_in; |
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74 } |
75 |
75 |
76 /****************************************************************************** |
76 /****************************************************************************** |
77 * |
77 * |
78 * Function: msr_controller_run() |
78 * Function: msr_controller_run() |
79 * |
79 * |
91 master->debug_level = 2; |
91 master->debug_level = 2; |
92 } |
92 } |
93 #endif |
93 #endif |
94 |
94 |
95 // Prozessdaten lesen und schreiben |
95 // Prozessdaten lesen und schreiben |
96 EtherCAT_rt_domain_cycle(master, 0, 40); |
96 EtherCAT_rt_exchange_io(master, 0, 40); |
97 |
97 |
98 #if 0 |
98 #if 0 |
99 if (debug_counter == 0) { |
99 if (debug_counter == 0) { |
100 master->debug_level = 0; |
100 master->debug_level = 0; |
101 } |
101 } |
124 |
124 |
125 void msr_run(unsigned irq) |
125 void msr_run(unsigned irq) |
126 { |
126 { |
127 static int counter = 0; |
127 static int counter = 0; |
128 |
128 |
129 #ifdef USE_MSR_LIB |
129 // Schreibe Kanal1 von Klemme X auf 1 |
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130 |
130 timeval_add(&process_time, &process_time, &msr_time_increment); |
131 timeval_add(&process_time, &process_time, &msr_time_increment); |
131 MSR_ADEOS_INTERRUPT_CODE(msr_controller_run(); msr_write_kanal_list();); |
132 MSR_ADEOS_INTERRUPT_CODE(msr_controller_run(); msr_write_kanal_list();); |
132 #else |
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133 msr_controller_run(); |
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134 #endif |
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135 |
133 |
136 ipipe_control_irq(irq,0,IPIPE_ENABLE_MASK); //Interrupt bestˇätigen |
134 ipipe_control_irq(irq,0,IPIPE_ENABLE_MASK); //Interrupt bestˇätigen |
137 if (counter++ > HZREDUCTION) { |
135 if (counter++ > HZREDUCTION) { |
138 ipipe_propagate_irq(irq); //und weiterreichen |
136 ipipe_propagate_irq(irq); //und weiterreichen |
139 counter = 0; |
137 counter = 0; |
167 * |
165 * |
168 *****************************************************************************/ |
166 *****************************************************************************/ |
169 |
167 |
170 int msr_globals_register(void) |
168 int msr_globals_register(void) |
171 { |
169 { |
172 #ifdef USE_MSR_LIB |
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173 msr_reg_kanal("/value", "V", &value, TDBL); |
170 msr_reg_kanal("/value", "V", &value, TDBL); |
174 msr_reg_kanal("/dig1", "", &dig1, TINT); |
171 msr_reg_kanal("/dig1", "", &dig1, TINT); |
175 #endif |
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176 |
172 |
177 msr_reg_kanal("/Taskinfo/EtherCAT/BusTime", "us", &ecat_bus_time, TUINT); |
173 msr_reg_kanal("/Taskinfo/EtherCAT/BusTime", "us", &ecat_bus_time, TUINT); |
178 msr_reg_kanal("/Taskinfo/EtherCAT/Timeouts", "", &ecat_timeouts, TUINT); |
174 msr_reg_kanal("/Taskinfo/EtherCAT/Timeouts", "", &ecat_timeouts, TUINT); |
179 |
175 |
180 return 0; |
176 return 0; |
187 int __init init_rt_module(void) |
183 int __init init_rt_module(void) |
188 { |
184 { |
189 struct ipipe_domain_attr attr; //ipipe |
185 struct ipipe_domain_attr attr; //ipipe |
190 |
186 |
191 // Als allererstes die RT-lib initialisieren |
187 // Als allererstes die RT-lib initialisieren |
192 #ifdef USE_MSR_LIB |
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193 if (msr_rtlib_init(1,MSR_ABTASTFREQUENZ,10,&msr_globals_register) < 0) { |
188 if (msr_rtlib_init(1,MSR_ABTASTFREQUENZ,10,&msr_globals_register) < 0) { |
194 msr_print_warn("msr_modul: can't initialize rtlib!"); |
189 msr_print_warn("msr_modul: can't initialize rtlib!"); |
195 goto out_return; |
190 goto out_return; |
196 } |
191 } |
197 #endif |
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198 |
192 |
199 msr_jitter_init(); |
193 msr_jitter_init(); |
200 |
194 |
201 printk(KERN_INFO "=== Starting EtherCAT environment... ===\n"); |
195 printk(KERN_INFO "=== Starting EtherCAT environment... ===\n"); |
202 |
196 |
203 if ((master = EtherCAT_rt_request_master(0)) == NULL) { |
197 if ((master = EtherCAT_rt_request_master(0)) == NULL) { |
204 printk(KERN_ERR "EtherCAT master 0 not available!\n"); |
198 printk(KERN_ERR "Error requesting master 0!\n"); |
205 goto out_msr_cleanup; |
199 goto out_msr_cleanup; |
206 } |
200 } |
207 |
201 |
208 #if 0 |
202 printk("Registering EtherCAT slaves.\n"); |
209 printk("Checking EtherCAT slaves.\n"); |
203 if (register_slaves()) { |
210 if (EtherCAT_check_slaves(master, ecat_slaves, ECAT_SLAVES_COUNT) != 0) { |
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211 printk(KERN_ERR "EtherCAT: Could not init slaves!\n"); |
204 printk(KERN_ERR "EtherCAT: Could not init slaves!\n"); |
212 goto out_release_master; |
205 goto out_release_master; |
213 } |
206 } |
214 #endif |
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215 |
207 |
216 printk("Activating all EtherCAT slaves.\n"); |
208 printk("Activating all EtherCAT slaves.\n"); |
217 |
209 |
218 if (EtherCAT_rt_activate_slaves(master) < 0) { |
210 if (EtherCAT_rt_activate_slaves(master) < 0) { |
219 printk(KERN_ERR "EtherCAT: Could not activate slaves!\n"); |
211 printk(KERN_ERR "EtherCAT: Could not activate slaves!\n"); |