documentation/images/master-locks.fig
author Florian Pose <fp@igh-essen.com>
Mon, 16 Oct 2006 14:38:14 +0000
changeset 398 ff37601361a8
parent 370 148155bb9abc
child 1088 0b10147d266b
permissions -rw-r--r--
Fixed serveral races while starting up under high CPU load.
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#FIG 3.2
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Portrait
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Center
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Metric
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A4      
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100.00
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Single
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-2
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1200 2
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6 1298 2911 2032 3645
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1 4 0 1 0 7 50 -1 -1 0.000 1 0.0000 1665 3278 360 360 1305 3278 2025 3278
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4 1 0 50 -1 16 12 0.0000 4 120 435 1665 3323 RT\001
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-6
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6 4095 2880 4545 3690
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5 1 0 1 0 7 49 -1 20 0.000 0 0 0 0 4140.000 3285.000 4140 2925 4500 3285 4140 3645
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4 1 0 48 -1 16 10 4.7124 4 90 420 4230 3285 ecrt\001
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-6
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6 2520 3420 2970 3960
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5 1 0 1 0 7 50 -1 -1 0.000 0 0 0 0 2745.000 3645.000 2565 3645 2745 3465 2925 3645
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5 1 0 1 0 7 50 -1 -1 0.000 0 0 0 0 2745.000 3645.000 2655 3645 2745 3555 2835 3645
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1 3 0 1 0 -1 50 -1 20 0.000 1 0.0000 2745 3780 45 45 2745 3780 2790 3780
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2 4 0 1 0 7 50 -1 -1 0.000 0 0 3 0 0 5
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	 2970 3960 2520 3960 2520 3645 2970 3645 2970 3960
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2 3 0 1 0 -1 50 -1 20 0.000 0 0 -1 0 0 4
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	 2745 3780 2700 3915 2790 3915 2745 3780
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-6
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6 5040 3915 5850 4725
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1 4 0 1 0 7 50 -1 -1 0.000 1 0.0000 5445 4320 360 360 5085 4320 5805 4320
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4 1 0 50 -1 16 12 0.0000 4 120 630 5445 4365 EoE\001
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-6
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1 2 0 1 0 7 50 -1 -1 0.000 1 0.0000 5938 3231 631 444 5307 2787 6570 3676
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2 4 0 1 0 7 51 -1 20 0.000 0 0 10 0 0 5
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	 3330 4050 990 4050 990 2520 3330 2520 3330 4050
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2 4 0 1 0 7 51 -1 20 0.000 0 0 8 0 0 5
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	 6750 4860 4140 4860 4140 2340 6750 2340 6750 4860
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3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 3
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	1 1 1.00 60.00 120.00
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	 2025 3375 2250 3465 2520 3735
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	 0.000 -1.000 0.000
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3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 3
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	1 1 1.00 60.00 120.00
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	 5220 4005 4230 3420 2970 3735
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	 0.000 -1.000 0.000
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3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 3
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	1 1 1.00 60.00 120.00
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	 2025 3285 3870 3285 5310 3195
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	 0.000 -1.000 0.000
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3 2 0 1 0 7 50 -1 -1 0.000 0 1 0 3
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	1 1 1.00 60.00 120.00
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	 5355 3960 5355 3735 5490 3555
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	 0.000 -1.000 0.000
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4 0 0 50 -1 16 12 0.0000 4 120 2385 1080 2745 Realtime Module\001
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4 0 0 50 -1 16 12 0.0000 4 120 2085 4230 2565 Master Module\001
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4 1 0 50 -1 16 12 0.0000 4 120 1140 5940 3285 Master0\001