| author | Florian Pose <fp@igh-essen.com> |
| Fri, 27 Oct 2006 14:41:09 +0000 | |
| changeset 462 | e6fac0c8bc92 |
| parent 435 | 779a18d12e6c |
| child 505 | bc443ca0077f |
| permissions | -rw-r--r-- |
| 433 | 1 |
/****************************************************************************** |
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* |
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* $Id$ |
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* |
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* Copyright (C) 2006 Florian Pose, Ingenieurgemeinschaft IgH |
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* |
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* This file is part of the IgH EtherCAT Master. |
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* |
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* The IgH EtherCAT Master is free software; you can redistribute it |
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* and/or modify it under the terms of the GNU General Public License |
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* as published by the Free Software Foundation; either version 2 of the |
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* License, or (at your option) any later version. |
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* |
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* The IgH EtherCAT Master is distributed in the hope that it will be |
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* useful, but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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* GNU General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with the IgH EtherCAT Master; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
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* |
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* The right to use EtherCAT Technology is granted and comes free of |
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* charge under condition of compatibility of product made by |
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* Licensee. People intending to distribute/sell products based on the |
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* code, have to sign an agreement to guarantee that products using |
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* software based on IgH EtherCAT master stay compatible with the actual |
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* EtherCAT specification (which are released themselves as an open |
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* standard) as the (only) precondition to have the right to use EtherCAT |
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* Technology, IP and trade marks. |
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* |
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*****************************************************************************/ |
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/** |
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\file |
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EtherCAT slave information interface FSM. |
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*/ |
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/*****************************************************************************/ |
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#include "globals.h" |
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#include "mailbox.h" |
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#include "master.h" |
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#include "fsm_sii.h" |
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/*****************************************************************************/ |
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void ec_fsm_sii_start_reading(ec_fsm_sii_t *); |
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void ec_fsm_sii_read_check(ec_fsm_sii_t *); |
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void ec_fsm_sii_read_fetch(ec_fsm_sii_t *); |
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void ec_fsm_sii_start_writing(ec_fsm_sii_t *); |
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void ec_fsm_sii_write_check(ec_fsm_sii_t *); |
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void ec_fsm_sii_write_check2(ec_fsm_sii_t *); |
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void ec_fsm_sii_end(ec_fsm_sii_t *); |
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void ec_fsm_sii_error(ec_fsm_sii_t *); |
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/*****************************************************************************/ |
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/** |
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Constructor. |
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*/ |
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void ec_fsm_sii_init(ec_fsm_sii_t *fsm, /**< finite state machine */ |
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ec_datagram_t *datagram /**< datagram structure to use */ |
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) |
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{
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fsm->state = NULL; |
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fsm->datagram = datagram; |
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} |
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/*****************************************************************************/ |
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/** |
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Destructor. |
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*/ |
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void ec_fsm_sii_clear(ec_fsm_sii_t *fsm /**< finite state machine */) |
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{
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} |
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/*****************************************************************************/ |
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/** |
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Initializes the SII read state machine. |
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*/ |
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void ec_fsm_sii_read(ec_fsm_sii_t *fsm, /**< finite state machine */ |
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ec_slave_t *slave, /**< slave to read from */ |
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uint16_t offset, /**< offset to read from */ |
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ec_fsm_sii_addressing_t mode /**< addressing scheme */ |
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) |
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{
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fsm->state = ec_fsm_sii_start_reading; |
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fsm->slave = slave; |
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fsm->offset = offset; |
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fsm->mode = mode; |
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} |
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/*****************************************************************************/ |
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/** |
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Initializes the SII write state machine. |
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*/ |
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void ec_fsm_sii_write(ec_fsm_sii_t *fsm, /**< finite state machine */ |
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ec_slave_t *slave, /**< slave to read from */ |
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uint16_t offset, /**< offset to read from */ |
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uint16_t *value, /**< pointer to 2 bytes of data */ |
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ec_fsm_sii_addressing_t mode /**< addressing scheme */ |
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) |
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{
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fsm->state = ec_fsm_sii_start_writing; |
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fsm->slave = slave; |
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fsm->offset = offset; |
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fsm->mode = mode; |
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memcpy(fsm->value, value, 2); |
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} |
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/*****************************************************************************/ |
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/** |
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Executes the SII state machine. |
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435
779a18d12e6c
Removed state machine running() methods.
Florian Pose <fp@igh-essen.com>
parents:
433
diff
changeset
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\return false, if the state machine has terminated |
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779a18d12e6c
Removed state machine running() methods.
Florian Pose <fp@igh-essen.com>
parents:
433
diff
changeset
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*/ |
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779a18d12e6c
Removed state machine running() methods.
Florian Pose <fp@igh-essen.com>
parents:
433
diff
changeset
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779a18d12e6c
Removed state machine running() methods.
Florian Pose <fp@igh-essen.com>
parents:
433
diff
changeset
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int ec_fsm_sii_exec(ec_fsm_sii_t *fsm /**< finite state machine */) |
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{
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fsm->state(fsm); |
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435
779a18d12e6c
Removed state machine running() methods.
Florian Pose <fp@igh-essen.com>
parents:
433
diff
changeset
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return fsm->state != ec_fsm_sii_end && fsm->state != ec_fsm_sii_error; |
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} |
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/*****************************************************************************/ |
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/** |
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Returns, if the master startup state machine terminated with success. |
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\return non-zero if successful. |
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*/ |
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int ec_fsm_sii_success(ec_fsm_sii_t *fsm /**< Finite state machine */) |
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{
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return fsm->state == ec_fsm_sii_end; |
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} |
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/****************************************************************************** |
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* SII state machine |
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*****************************************************************************/ |
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/** |
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SII state: START READING. |
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Starts reading the slave information interface. |
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*/ |
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void ec_fsm_sii_start_reading(ec_fsm_sii_t *fsm /**< finite state machine */) |
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{
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ec_datagram_t *datagram = fsm->datagram; |
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// initiate read operation |
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switch (fsm->mode) {
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case EC_FSM_SII_POSITION: |
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ec_datagram_apwr(datagram, fsm->slave->ring_position, 0x502, 4); |
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break; |
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case EC_FSM_SII_NODE: |
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ec_datagram_npwr(datagram, fsm->slave->station_address, 0x502, 4); |
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break; |
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} |
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EC_WRITE_U8 (datagram->data, 0x00); // read-only access |
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EC_WRITE_U8 (datagram->data + 1, 0x01); // request read operation |
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EC_WRITE_U16(datagram->data + 2, fsm->offset); |
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ec_master_queue_datagram(fsm->slave->master, datagram); |
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fsm->state = ec_fsm_sii_read_check; |
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} |
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/*****************************************************************************/ |
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/** |
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SII state: READ CHECK. |
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Checks, if the SII-read-datagram has been sent and issues a fetch datagram. |
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*/ |
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void ec_fsm_sii_read_check(ec_fsm_sii_t *fsm /**< finite state machine */) |
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{
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ec_datagram_t *datagram = fsm->datagram; |
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if (datagram->state != EC_DATAGRAM_RECEIVED |
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|| datagram->working_counter != 1) {
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EC_ERR("SII: Reception of read datagram failed.\n");
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fsm->state = ec_fsm_sii_error; |
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return; |
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} |
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fsm->cycles_start = datagram->cycles_sent; |
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fsm->check_once_more = 1; |
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// issue check/fetch datagram |
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switch (fsm->mode) {
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case EC_FSM_SII_POSITION: |
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ec_datagram_aprd(datagram, fsm->slave->ring_position, 0x502, 10); |
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break; |
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case EC_FSM_SII_NODE: |
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ec_datagram_nprd(datagram, fsm->slave->station_address, 0x502, 10); |
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break; |
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} |
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ec_master_queue_datagram(fsm->slave->master, datagram); |
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fsm->state = ec_fsm_sii_read_fetch; |
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} |
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/*****************************************************************************/ |
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/** |
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SII state: READ FETCH. |
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Fetches the result of an SII-read datagram. |
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*/ |
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void ec_fsm_sii_read_fetch(ec_fsm_sii_t *fsm /**< finite state machine */) |
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{
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ec_datagram_t *datagram = fsm->datagram; |
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if (datagram->state != EC_DATAGRAM_RECEIVED |
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|| datagram->working_counter != 1) {
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EC_ERR("SII: Reception of check/fetch datagram failed.\n");
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fsm->state = ec_fsm_sii_error; |
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return; |
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} |
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// check "busy bit" |
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if (EC_READ_U8(datagram->data + 1) & 0x81) {
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// still busy... timeout? |
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if (datagram->cycles_received |
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- fsm->cycles_start >= (cycles_t) 10 * cpu_khz) {
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if (!fsm->check_once_more) {
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EC_ERR("SII: Read timeout.\n");
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fsm->state = ec_fsm_sii_error; |
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#if 0 |
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EC_DBG("SII busy: %02X %02X %02X %02X\n",
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EC_READ_U8(datagram->data + 0), |
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EC_READ_U8(datagram->data + 1), |
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EC_READ_U8(datagram->data + 2), |
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EC_READ_U8(datagram->data + 3)); |
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#endif |
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return; |
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} |
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fsm->check_once_more = 0; |
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} |
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// issue check/fetch datagram again |
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switch (fsm->mode) {
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case EC_FSM_SII_POSITION: |
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ec_datagram_aprd(datagram, fsm->slave->ring_position, 0x502, 10); |
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break; |
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case EC_FSM_SII_NODE: |
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ec_datagram_nprd(datagram, fsm->slave->station_address, 0x502, 10); |
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break; |
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} |
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ec_master_queue_datagram(fsm->slave->master, datagram); |
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return; |
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} |
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#if 0 |
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EC_DBG("SII rec: %02X %02X %02X %02X - %02X %02X %02X %02X\n",
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EC_READ_U8(datagram->data + 0), EC_READ_U8(datagram->data + 1), |
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EC_READ_U8(datagram->data + 2), EC_READ_U8(datagram->data + 3), |
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EC_READ_U8(datagram->data + 6), EC_READ_U8(datagram->data + 7), |
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EC_READ_U8(datagram->data + 8), EC_READ_U8(datagram->data + 9)); |
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#endif |
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// SII value received. |
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memcpy(fsm->value, datagram->data + 6, 4); |
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fsm->state = ec_fsm_sii_end; |
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} |
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/*****************************************************************************/ |
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/** |
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SII state: START WRITING. |
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Starts reading the slave information interface. |
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*/ |
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void ec_fsm_sii_start_writing(ec_fsm_sii_t *fsm /**< finite state machine */) |
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{
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ec_datagram_t *datagram = fsm->datagram; |
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// initiate write operation |
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ec_datagram_npwr(datagram, fsm->slave->station_address, 0x502, 8); |
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EC_WRITE_U8 (datagram->data, 0x01); // enable write access |
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EC_WRITE_U8 (datagram->data + 1, 0x02); // request write operation |
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EC_WRITE_U32(datagram->data + 2, fsm->offset); |
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memcpy(datagram->data + 6, fsm->value, 2); |
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ec_master_queue_datagram(fsm->slave->master, datagram); |
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fsm->state = ec_fsm_sii_write_check; |
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} |
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/*****************************************************************************/ |
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/** |
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SII state: WRITE CHECK. |
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*/ |
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void ec_fsm_sii_write_check(ec_fsm_sii_t *fsm /**< finite state machine */) |
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{
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ec_datagram_t *datagram = fsm->datagram; |
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if (datagram->state != EC_DATAGRAM_RECEIVED |
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|| datagram->working_counter != 1) {
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EC_ERR("SII: Reception of write datagram failed.\n");
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fsm->state = ec_fsm_sii_error; |
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return; |
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} |
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fsm->cycles_start = datagram->cycles_sent; |
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fsm->check_once_more = 1; |
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// issue check/fetch datagram |
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ec_datagram_nprd(datagram, fsm->slave->station_address, 0x502, 2); |
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ec_master_queue_datagram(fsm->slave->master, datagram); |
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fsm->state = ec_fsm_sii_write_check2; |
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} |
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/*****************************************************************************/ |
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/** |
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SII state: WRITE CHECK 2. |
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*/ |
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void ec_fsm_sii_write_check2(ec_fsm_sii_t *fsm /**< finite state machine */) |
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{
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ec_datagram_t *datagram = fsm->datagram; |
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if (datagram->state != EC_DATAGRAM_RECEIVED |
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|| datagram->working_counter != 1) {
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EC_ERR("SII: Reception of write check datagram failed.\n");
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fsm->state = ec_fsm_sii_error; |
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return; |
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} |
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if (EC_READ_U8(datagram->data + 1) & 0x82) {
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// still busy... timeout? |
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if (datagram->cycles_received |
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- fsm->cycles_start >= (cycles_t) 10 * cpu_khz) {
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if (!fsm->check_once_more) {
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EC_ERR("SII: Write timeout.\n");
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fsm->state = ec_fsm_sii_error; |
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return; |
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} |
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fsm->check_once_more = 0; |
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} |
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// issue check/fetch datagram again |
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ec_master_queue_datagram(fsm->slave->master, datagram); |
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return; |
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} |
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if (EC_READ_U8(datagram->data + 1) & 0x40) {
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EC_ERR("SII: Write operation failed!\n");
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fsm->state = ec_fsm_sii_error; |
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return; |
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} |
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// success |
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fsm->state = ec_fsm_sii_end; |
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} |
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/*****************************************************************************/ |
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/** |
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State: ERROR. |
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*/ |
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void ec_fsm_sii_error(ec_fsm_sii_t *fsm /**< finite state machine */) |
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{
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} |
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/*****************************************************************************/ |
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/** |
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State: END. |
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*/ |
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void ec_fsm_sii_end(ec_fsm_sii_t *fsm /**< finite state machine */) |
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{
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} |
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/*****************************************************************************/ |