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/*******************************************************************************

     2

     3

  Intel PRO/1000 Linux driver

     4

  Copyright(c) 1999 - 2006 Intel Corporation.

     5

     6

  This program is free software; you can redistribute it and/or modify it

     7

  under the terms and conditions of the GNU General Public License,

     8

  version 2, as published by the Free Software Foundation.

     9

    10

  This program is distributed in the hope it will be useful, but WITHOUT

    11

  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

    12

  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

    13

  more details.

    14

    15

  You should have received a copy of the GNU General Public License along with

    16

  this program; if not, write to the Free Software Foundation, Inc.,

    17

  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

    18

    19

  The full GNU General Public License is included in this distribution in

    20

  the file called "COPYING".

    21

    22

  Contact Information:

    23

  Linux NICS <linux.nics@intel.com>

    24

  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

    25

  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

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    27

*******************************************************************************/

    28

    29

/* e1000_hw.c

    30

 * Shared functions for accessing and configuring the MAC

    31

 */

    32

    33

    34

#include "e1000_hw-2.6.22-ethercat.h"

    35

    36

static int32_t e1000_swfw_sync_acquire(struct e1000_hw *hw, uint16_t mask);

    37

static void e1000_swfw_sync_release(struct e1000_hw *hw, uint16_t mask);

    38

static int32_t e1000_read_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t *data);

    39

static int32_t e1000_write_kmrn_reg(struct e1000_hw *hw, uint32_t reg_addr, uint16_t data);

    40

static int32_t e1000_get_software_semaphore(struct e1000_hw *hw);

    41

static void e1000_release_software_semaphore(struct e1000_hw *hw);

    42

    43

static uint8_t e1000_arc_subsystem_valid(struct e1000_hw *hw);

    44

static int32_t e1000_check_downshift(struct e1000_hw *hw);

    45

static int32_t e1000_check_polarity(struct e1000_hw *hw, e1000_rev_polarity *polarity);

    46

static void e1000_clear_hw_cntrs(struct e1000_hw *hw);

    47

static void e1000_clear_vfta(struct e1000_hw *hw);

    48

static int32_t e1000_commit_shadow_ram(struct e1000_hw *hw);

    49

static int32_t e1000_config_dsp_after_link_change(struct e1000_hw *hw, boolean_t link_up);

    50

static int32_t e1000_config_fc_after_link_up(struct e1000_hw *hw);

    51

static int32_t e1000_detect_gig_phy(struct e1000_hw *hw);

    52

static int32_t e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t bank);

    53

static int32_t e1000_get_auto_rd_done(struct e1000_hw *hw);

    54

static int32_t e1000_get_cable_length(struct e1000_hw *hw, uint16_t *min_length, uint16_t *max_length);

    55

static int32_t e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw);

    56

static int32_t e1000_get_phy_cfg_done(struct e1000_hw *hw);

    57

static int32_t e1000_get_software_flag(struct e1000_hw *hw);

    58

static int32_t e1000_ich8_cycle_init(struct e1000_hw *hw);

    59

static int32_t e1000_ich8_flash_cycle(struct e1000_hw *hw, uint32_t timeout);

    60

static int32_t e1000_id_led_init(struct e1000_hw *hw);

    61

static int32_t e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw, uint32_t cnf_base_addr, uint32_t cnf_size);

    62

static int32_t e1000_init_lcd_from_nvm(struct e1000_hw *hw);

    63

static void e1000_init_rx_addrs(struct e1000_hw *hw);

    64

static void e1000_initialize_hardware_bits(struct e1000_hw *hw);

    65

static boolean_t e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw);

    66

static int32_t e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw);

    67

static int32_t e1000_mng_enable_host_if(struct e1000_hw *hw);

    68

static int32_t e1000_mng_host_if_write(struct e1000_hw *hw, uint8_t *buffer, uint16_t length, uint16_t offset, uint8_t *sum);

    69

static int32_t e1000_mng_write_cmd_header(struct e1000_hw* hw, struct e1000_host_mng_command_header* hdr);

    70

static int32_t e1000_mng_write_commit(struct e1000_hw *hw);

    71

static int32_t e1000_phy_ife_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);

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static int32_t e1000_phy_igp_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);

    73

static int32_t e1000_read_eeprom_eerd(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);

    74

static int32_t e1000_write_eeprom_eewr(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);

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static int32_t e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd);

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static int32_t e1000_phy_m88_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info);

    77

static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);

    78

static int32_t e1000_read_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t *data);

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static int32_t e1000_verify_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte);

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static int32_t e1000_write_ich8_byte(struct e1000_hw *hw, uint32_t index, uint8_t byte);

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static int32_t e1000_read_ich8_word(struct e1000_hw *hw, uint32_t index, uint16_t *data);

    82

static int32_t e1000_read_ich8_data(struct e1000_hw *hw, uint32_t index, uint32_t size, uint16_t *data);

    83

static int32_t e1000_write_ich8_data(struct e1000_hw *hw, uint32_t index, uint32_t size, uint16_t data);

    84

static int32_t e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);

    85

static int32_t e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data);

    86

static void e1000_release_software_flag(struct e1000_hw *hw);

    87

static int32_t e1000_set_d3_lplu_state(struct e1000_hw *hw, boolean_t active);

    88

static int32_t e1000_set_d0_lplu_state(struct e1000_hw *hw, boolean_t active);

    89

static int32_t e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, uint32_t no_snoop);

    90

static void e1000_set_pci_express_master_disable(struct e1000_hw *hw);

    91

static int32_t e1000_wait_autoneg(struct e1000_hw *hw);

    92

static void e1000_write_reg_io(struct e1000_hw *hw, uint32_t offset, uint32_t value);

    93

static int32_t e1000_set_phy_type(struct e1000_hw *hw);

    94

static void e1000_phy_init_script(struct e1000_hw *hw);

    95

static int32_t e1000_setup_copper_link(struct e1000_hw *hw);

    96

static int32_t e1000_setup_fiber_serdes_link(struct e1000_hw *hw);

    97

static int32_t e1000_adjust_serdes_amplitude(struct e1000_hw *hw);

    98

static int32_t e1000_phy_force_speed_duplex(struct e1000_hw *hw);

    99

static int32_t e1000_config_mac_to_phy(struct e1000_hw *hw);

   100

static void e1000_raise_mdi_clk(struct e1000_hw *hw, uint32_t *ctrl);

   101

static void e1000_lower_mdi_clk(struct e1000_hw *hw, uint32_t *ctrl);

   102

static void e1000_shift_out_mdi_bits(struct e1000_hw *hw, uint32_t data,

   103

                                     uint16_t count);

   104

static uint16_t e1000_shift_in_mdi_bits(struct e1000_hw *hw);

   105

static int32_t e1000_phy_reset_dsp(struct e1000_hw *hw);

   106

static int32_t e1000_write_eeprom_spi(struct e1000_hw *hw, uint16_t offset,

   107

                                      uint16_t words, uint16_t *data);

   108

static int32_t e1000_write_eeprom_microwire(struct e1000_hw *hw,

   109

                                            uint16_t offset, uint16_t words,

   110

                                            uint16_t *data);

   111

static int32_t e1000_spi_eeprom_ready(struct e1000_hw *hw);

   112

static void e1000_raise_ee_clk(struct e1000_hw *hw, uint32_t *eecd);

   113

static void e1000_lower_ee_clk(struct e1000_hw *hw, uint32_t *eecd);

   114

static void e1000_shift_out_ee_bits(struct e1000_hw *hw, uint16_t data,

   115

                                    uint16_t count);

   116

static int32_t e1000_write_phy_reg_ex(struct e1000_hw *hw, uint32_t reg_addr,

   117

                                      uint16_t phy_data);

   118

static int32_t e1000_read_phy_reg_ex(struct e1000_hw *hw,uint32_t reg_addr,

   119

                                     uint16_t *phy_data);

   120

static uint16_t e1000_shift_in_ee_bits(struct e1000_hw *hw, uint16_t count);

   121

static int32_t e1000_acquire_eeprom(struct e1000_hw *hw);

   122

static void e1000_release_eeprom(struct e1000_hw *hw);

   123

static void e1000_standby_eeprom(struct e1000_hw *hw);

   124

static int32_t e1000_set_vco_speed(struct e1000_hw *hw);

   125

static int32_t e1000_polarity_reversal_workaround(struct e1000_hw *hw);

   126

static int32_t e1000_set_phy_mode(struct e1000_hw *hw);

   127

static int32_t e1000_host_if_read_cookie(struct e1000_hw *hw, uint8_t *buffer);

   128

static uint8_t e1000_calculate_mng_checksum(char *buffer, uint32_t length);

   129

static int32_t e1000_configure_kmrn_for_10_100(struct e1000_hw *hw,

   130

                                               uint16_t duplex);

   131

static int32_t e1000_configure_kmrn_for_1000(struct e1000_hw *hw);

   132

   133

/* IGP cable length table */

   134

static const

   135

uint16_t e1000_igp_cable_length_table[IGP01E1000_AGC_LENGTH_TABLE_SIZE] =

   136

    { 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,

   137

      5, 10, 10, 10, 10, 10, 10, 10, 20, 20, 20, 20, 20, 25, 25, 25,

   138

      25, 25, 25, 25, 30, 30, 30, 30, 40, 40, 40, 40, 40, 40, 40, 40,

   139

      40, 50, 50, 50, 50, 50, 50, 50, 60, 60, 60, 60, 60, 60, 60, 60,

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      60, 70, 70, 70, 70, 70, 70, 80, 80, 80, 80, 80, 80, 90, 90, 90,

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      90, 90, 90, 90, 90, 90, 100, 100, 100, 100, 100, 100, 100, 100, 100, 100,

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      100, 100, 100, 100, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110, 110,

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      110, 110, 110, 110, 110, 110, 120, 120, 120, 120, 120, 120, 120, 120, 120, 120};

   144

   145

static const

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uint16_t e1000_igp_2_cable_length_table[IGP02E1000_AGC_LENGTH_TABLE_SIZE] =

   147

    { 0, 0, 0, 0, 0, 0, 0, 0, 3, 5, 8, 11, 13, 16, 18, 21,

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      0, 0, 0, 3, 6, 10, 13, 16, 19, 23, 26, 29, 32, 35, 38, 41,

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      6, 10, 14, 18, 22, 26, 30, 33, 37, 41, 44, 48, 51, 54, 58, 61,

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      21, 26, 31, 35, 40, 44, 49, 53, 57, 61, 65, 68, 72, 75, 79, 82,

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      40, 45, 51, 56, 61, 66, 70, 75, 79, 83, 87, 91, 94, 98, 101, 104,

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      60, 66, 72, 77, 82, 87, 92, 96, 100, 104, 108, 111, 114, 117, 119, 121,

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      83, 89, 95, 100, 105, 109, 113, 116, 119, 122, 124,

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      104, 109, 114, 118, 121, 124};

   155

   156

/******************************************************************************

   157

 * Set the phy type member in the hw struct.

   158

 *

   159

 * hw - Struct containing variables accessed by shared code

   160

 *****************************************************************************/

   161

static int32_t

   162

e1000_set_phy_type(struct e1000_hw *hw)

   163

{

   164

    DEBUGFUNC("e1000_set_phy_type");

   165

   166

    if (hw->mac_type == e1000_undefined)

   167

        return -E1000_ERR_PHY_TYPE;

   168

   169

    switch (hw->phy_id) {

   170

    case M88E1000_E_PHY_ID:

   171

    case M88E1000_I_PHY_ID:

   172

    case M88E1011_I_PHY_ID:

   173

    case M88E1111_I_PHY_ID:

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        hw->phy_type = e1000_phy_m88;

   175

        break;

   176

    case IGP01E1000_I_PHY_ID:

   177

        if (hw->mac_type == e1000_82541 ||

   178

            hw->mac_type == e1000_82541_rev_2 ||

   179

            hw->mac_type == e1000_82547 ||

   180

            hw->mac_type == e1000_82547_rev_2) {

   181

            hw->phy_type = e1000_phy_igp;

   182

            break;

   183

        }

   184

    case IGP03E1000_E_PHY_ID:

   185

        hw->phy_type = e1000_phy_igp_3;

   186

        break;

   187

    case IFE_E_PHY_ID:

   188

    case IFE_PLUS_E_PHY_ID:

   189

    case IFE_C_E_PHY_ID:

   190

        hw->phy_type = e1000_phy_ife;

   191

        break;

   192

    case GG82563_E_PHY_ID:

   193

        if (hw->mac_type == e1000_80003es2lan) {

   194

            hw->phy_type = e1000_phy_gg82563;

   195

            break;

   196

        }

   197

        /* Fall Through */

   198

    default:

   199

        /* Should never have loaded on this device */

   200

        hw->phy_type = e1000_phy_undefined;

   201

        return -E1000_ERR_PHY_TYPE;

   202

    }

   203

   204

    return E1000_SUCCESS;

   205

}

   206

   207

/******************************************************************************

   208

 * IGP phy init script - initializes the GbE PHY

   209

 *

   210

 * hw - Struct containing variables accessed by shared code

   211

 *****************************************************************************/

   212

static void

   213

e1000_phy_init_script(struct e1000_hw *hw)

   214

{

   215

    uint32_t ret_val;

   216

    uint16_t phy_saved_data;

   217

   218

    DEBUGFUNC("e1000_phy_init_script");

   219

   220

    if (hw->phy_init_script) {

   221

        msleep(20);

   222

   223

        /* Save off the current value of register 0x2F5B to be restored at

   224

         * the end of this routine. */

   225

        ret_val = e1000_read_phy_reg(hw, 0x2F5B, &phy_saved_data);

   226

   227

        /* Disabled the PHY transmitter */

   228

        e1000_write_phy_reg(hw, 0x2F5B, 0x0003);

   229

   230

        msleep(20);

   231

   232

        e1000_write_phy_reg(hw,0x0000,0x0140);

   233

   234

        msleep(5);

   235

   236

        switch (hw->mac_type) {

   237

        case e1000_82541:

   238

        case e1000_82547:

   239

            e1000_write_phy_reg(hw, 0x1F95, 0x0001);

   240

   241

            e1000_write_phy_reg(hw, 0x1F71, 0xBD21);

   242

   243

            e1000_write_phy_reg(hw, 0x1F79, 0x0018);

   244

   245

            e1000_write_phy_reg(hw, 0x1F30, 0x1600);

   246

   247

            e1000_write_phy_reg(hw, 0x1F31, 0x0014);

   248

   249

            e1000_write_phy_reg(hw, 0x1F32, 0x161C);

   250

   251

            e1000_write_phy_reg(hw, 0x1F94, 0x0003);

   252

   253

            e1000_write_phy_reg(hw, 0x1F96, 0x003F);

   254

   255

            e1000_write_phy_reg(hw, 0x2010, 0x0008);

   256

            break;

   257

   258

        case e1000_82541_rev_2:

   259

        case e1000_82547_rev_2:

   260

            e1000_write_phy_reg(hw, 0x1F73, 0x0099);

   261

            break;

   262

        default:

   263

            break;

   264

        }

   265

   266

        e1000_write_phy_reg(hw, 0x0000, 0x3300);

   267

   268

        msleep(20);

   269

   270

        /* Now enable the transmitter */

   271

        e1000_write_phy_reg(hw, 0x2F5B, phy_saved_data);

   272

   273

        if (hw->mac_type == e1000_82547) {

   274

            uint16_t fused, fine, coarse;

   275

   276

            /* Move to analog registers page */

   277

            e1000_read_phy_reg(hw, IGP01E1000_ANALOG_SPARE_FUSE_STATUS, &fused);

   278

   279

            if (!(fused & IGP01E1000_ANALOG_SPARE_FUSE_ENABLED)) {

   280

                e1000_read_phy_reg(hw, IGP01E1000_ANALOG_FUSE_STATUS, &fused);

   281

   282

                fine = fused & IGP01E1000_ANALOG_FUSE_FINE_MASK;

   283

                coarse = fused & IGP01E1000_ANALOG_FUSE_COARSE_MASK;

   284

   285

                if (coarse > IGP01E1000_ANALOG_FUSE_COARSE_THRESH) {

   286

                    coarse -= IGP01E1000_ANALOG_FUSE_COARSE_10;

   287

                    fine -= IGP01E1000_ANALOG_FUSE_FINE_1;

   288

                } else if (coarse == IGP01E1000_ANALOG_FUSE_COARSE_THRESH)

   289

                    fine -= IGP01E1000_ANALOG_FUSE_FINE_10;

   290

   291

                fused = (fused & IGP01E1000_ANALOG_FUSE_POLY_MASK) |

   292

                        (fine & IGP01E1000_ANALOG_FUSE_FINE_MASK) |

   293

                        (coarse & IGP01E1000_ANALOG_FUSE_COARSE_MASK);

   294

   295

                e1000_write_phy_reg(hw, IGP01E1000_ANALOG_FUSE_CONTROL, fused);

   296

                e1000_write_phy_reg(hw, IGP01E1000_ANALOG_FUSE_BYPASS,

   297

                                    IGP01E1000_ANALOG_FUSE_ENABLE_SW_CONTROL);

   298

            }

   299

        }

   300

    }

   301

}

   302

   303

/******************************************************************************

   304

 * Set the mac type member in the hw struct.

   305

 *

   306

 * hw - Struct containing variables accessed by shared code

   307

 *****************************************************************************/

   308

int32_t

   309

e1000_set_mac_type(struct e1000_hw *hw)

   310

{

   311

	DEBUGFUNC("e1000_set_mac_type");

   312

   313

	switch (hw->device_id) {

   314

	case E1000_DEV_ID_82542:

   315

		switch (hw->revision_id) {

   316

		case E1000_82542_2_0_REV_ID:

   317

			hw->mac_type = e1000_82542_rev2_0;

   318

			break;

   319

		case E1000_82542_2_1_REV_ID:

   320

			hw->mac_type = e1000_82542_rev2_1;

   321

			break;

   322

		default:

   323

			/* Invalid 82542 revision ID */

   324

			return -E1000_ERR_MAC_TYPE;

   325

		}

   326

		break;

   327

	case E1000_DEV_ID_82543GC_FIBER:

   328

	case E1000_DEV_ID_82543GC_COPPER:

   329

		hw->mac_type = e1000_82543;

   330

		break;

   331

	case E1000_DEV_ID_82544EI_COPPER:

   332

	case E1000_DEV_ID_82544EI_FIBER:

   333

	case E1000_DEV_ID_82544GC_COPPER:

   334

	case E1000_DEV_ID_82544GC_LOM:

   335

		hw->mac_type = e1000_82544;

   336

		break;

   337

	case E1000_DEV_ID_82540EM:

   338

	case E1000_DEV_ID_82540EM_LOM:

   339

	case E1000_DEV_ID_82540EP:

   340

	case E1000_DEV_ID_82540EP_LOM:

   341

	case E1000_DEV_ID_82540EP_LP:

   342

		hw->mac_type = e1000_82540;

   343

		break;

   344

	case E1000_DEV_ID_82545EM_COPPER:

   345

	case E1000_DEV_ID_82545EM_FIBER:

   346

		hw->mac_type = e1000_82545;

   347

		break;

   348

	case E1000_DEV_ID_82545GM_COPPER:

   349

	case E1000_DEV_ID_82545GM_FIBER:

   350

	case E1000_DEV_ID_82545GM_SERDES:

   351

		hw->mac_type = e1000_82545_rev_3;

   352

		break;

   353

	case E1000_DEV_ID_82546EB_COPPER:

   354

	case E1000_DEV_ID_82546EB_FIBER:

   355

	case E1000_DEV_ID_82546EB_QUAD_COPPER:

   356

		hw->mac_type = e1000_82546;

   357

		break;

   358

	case E1000_DEV_ID_82546GB_COPPER:

   359

	case E1000_DEV_ID_82546GB_FIBER:

   360

	case E1000_DEV_ID_82546GB_SERDES:

   361

	case E1000_DEV_ID_82546GB_PCIE:

   362

	case E1000_DEV_ID_82546GB_QUAD_COPPER:

   363

	case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:

   364

		hw->mac_type = e1000_82546_rev_3;

   365

		break;

   366

	case E1000_DEV_ID_82541EI:

   367

	case E1000_DEV_ID_82541EI_MOBILE:

   368

	case E1000_DEV_ID_82541ER_LOM:

   369

		hw->mac_type = e1000_82541;

   370

		break;

   371

	case E1000_DEV_ID_82541ER:

   372

	case E1000_DEV_ID_82541GI:

   373

	case E1000_DEV_ID_82541GI_LF:

   374

	case E1000_DEV_ID_82541GI_MOBILE:

   375

		hw->mac_type = e1000_82541_rev_2;

   376

		break;

   377

	case E1000_DEV_ID_82547EI:

   378

	case E1000_DEV_ID_82547EI_MOBILE:

   379

		hw->mac_type = e1000_82547;

   380

		break;

   381

	case E1000_DEV_ID_82547GI:

   382

		hw->mac_type = e1000_82547_rev_2;

   383

		break;

   384

	case E1000_DEV_ID_82571EB_COPPER:

   385

	case E1000_DEV_ID_82571EB_FIBER:

   386

	case E1000_DEV_ID_82571EB_SERDES:

   387

	case E1000_DEV_ID_82571EB_QUAD_COPPER:

   388

	case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:

   389

		hw->mac_type = e1000_82571;

   390

		break;

   391

	case E1000_DEV_ID_82572EI_COPPER:

   392

	case E1000_DEV_ID_82572EI_FIBER:

   393

	case E1000_DEV_ID_82572EI_SERDES:

   394

	case E1000_DEV_ID_82572EI:

   395

		hw->mac_type = e1000_82572;

   396

		break;

   397

	case E1000_DEV_ID_82573E:

   398

	case E1000_DEV_ID_82573E_IAMT:

   399

	case E1000_DEV_ID_82573L:

   400

		hw->mac_type = e1000_82573;

   401

		break;

   402

	case E1000_DEV_ID_80003ES2LAN_COPPER_SPT:

   403

	case E1000_DEV_ID_80003ES2LAN_SERDES_SPT:

   404

	case E1000_DEV_ID_80003ES2LAN_COPPER_DPT:

   405

	case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:

   406

		hw->mac_type = e1000_80003es2lan;

   407

		break;

   408

	case E1000_DEV_ID_ICH8_IGP_M_AMT:

   409

	case E1000_DEV_ID_ICH8_IGP_AMT:

   410

	case E1000_DEV_ID_ICH8_IGP_C:

   411

	case E1000_DEV_ID_ICH8_IFE:

   412

	case E1000_DEV_ID_ICH8_IFE_GT:

   413

	case E1000_DEV_ID_ICH8_IFE_G:

   414

	case E1000_DEV_ID_ICH8_IGP_M:

   415

		hw->mac_type = e1000_ich8lan;

   416

		break;

   417

	default:

   418

		/* Should never have loaded on this device */

   419

		return -E1000_ERR_MAC_TYPE;

   420

	}

   421

   422

	switch (hw->mac_type) {

   423

	case e1000_ich8lan:

   424

		hw->swfwhw_semaphore_present = TRUE;

   425

		hw->asf_firmware_present = TRUE;

   426

		break;

   427

	case e1000_80003es2lan:

   428

		hw->swfw_sync_present = TRUE;

   429

		/* fall through */

   430

	case e1000_82571:

   431

	case e1000_82572:

   432

	case e1000_82573:

   433

		hw->eeprom_semaphore_present = TRUE;

   434

		/* fall through */

   435

	case e1000_82541:

   436

	case e1000_82547:

   437

	case e1000_82541_rev_2:

   438

	case e1000_82547_rev_2:

   439

		hw->asf_firmware_present = TRUE;

   440

		break;

   441

	default:

   442

		break;

   443

	}

   444

   445

	/* The 82543 chip does not count tx_carrier_errors properly in

   446

	 * FD mode

   447

	 */

   448

	if (hw->mac_type == e1000_82543)

   449

		hw->bad_tx_carr_stats_fd = TRUE;

   450

   451

	/* capable of receiving management packets to the host */

   452

	if (hw->mac_type >= e1000_82571)

   453

		hw->has_manc2h = TRUE;

   454

   455

	/* In rare occasions, ESB2 systems would end up started without

   456

	 * the RX unit being turned on.

   457

	 */

   458

	if (hw->mac_type == e1000_80003es2lan)

   459

		hw->rx_needs_kicking = TRUE;

   460

   461

	if (hw->mac_type > e1000_82544)

   462

		hw->has_smbus = TRUE;

   463

   464

	return E1000_SUCCESS;

   465

}

   466

   467

/*****************************************************************************

   468

 * Set media type and TBI compatibility.

   469

 *

   470

 * hw - Struct containing variables accessed by shared code

   471

 * **************************************************************************/

   472

void

   473

e1000_set_media_type(struct e1000_hw *hw)

   474

{

   475

    uint32_t status;

   476

   477

    DEBUGFUNC("e1000_set_media_type");

   478

   479

    if (hw->mac_type != e1000_82543) {

   480

        /* tbi_compatibility is only valid on 82543 */

   481

        hw->tbi_compatibility_en = FALSE;

   482

    }

   483

   484

    switch (hw->device_id) {

   485

    case E1000_DEV_ID_82545GM_SERDES:

   486

    case E1000_DEV_ID_82546GB_SERDES:

   487

    case E1000_DEV_ID_82571EB_SERDES:

   488

    case E1000_DEV_ID_82572EI_SERDES:

   489

    case E1000_DEV_ID_80003ES2LAN_SERDES_DPT:

   490

        hw->media_type = e1000_media_type_internal_serdes;

   491

        break;

   492

    default:

   493

        switch (hw->mac_type) {

   494

        case e1000_82542_rev2_0:

   495

        case e1000_82542_rev2_1:

   496

            hw->media_type = e1000_media_type_fiber;

   497

            break;

   498

        case e1000_ich8lan:

   499

        case e1000_82573:

   500

            /* The STATUS_TBIMODE bit is reserved or reused for the this

   501

             * device.

   502

             */

   503

            hw->media_type = e1000_media_type_copper;

   504

            break;

   505

        default:

   506

            status = E1000_READ_REG(hw, STATUS);

   507

            if (status & E1000_STATUS_TBIMODE) {

   508

                hw->media_type = e1000_media_type_fiber;

   509

                /* tbi_compatibility not valid on fiber */

   510

                hw->tbi_compatibility_en = FALSE;

   511

            } else {

   512

                hw->media_type = e1000_media_type_copper;

   513

            }

   514

            break;

   515

        }

   516

    }

   517

}

   518

   519

/******************************************************************************

   520

 * Reset the transmit and receive units; mask and clear all interrupts.

   521

 *

   522

 * hw - Struct containing variables accessed by shared code

   523

 *****************************************************************************/

   524

int32_t

   525

e1000_reset_hw(struct e1000_hw *hw)

   526

{

   527

    uint32_t ctrl;

   528

    uint32_t ctrl_ext;

   529

    uint32_t icr;