author | Florian Pose <fp@igh.de> |
Wed, 06 Dec 2017 10:09:50 +0100 | |
branch | stable-1.5 |
changeset 2692 | cb240525acb6 |
parent 2584 | 0e3d989ff233 |
permissions | -rw-r--r-- |
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/******************************************************************************* |
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Intel PRO/1000 Linux driver |
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Copyright(c) 1999 - 2006 Intel Corporation. |
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This program is free software; you can redistribute it and/or modify it |
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under the terms and conditions of the GNU General Public License, |
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version 2, as published by the Free Software Foundation. |
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|
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This program is distributed in the hope it will be useful, but WITHOUT |
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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more details. |
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You should have received a copy of the GNU General Public License along with |
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this program; if not, write to the Free Software Foundation, Inc., |
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
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|
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The full GNU General Public License is included in this distribution in |
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the file called "COPYING". |
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|
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Contact Information: |
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Linux NICS <linux.nics@intel.com> |
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
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*******************************************************************************/ |
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/* glue for the OS independent part of e1000 |
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* includes register access macros |
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*/ |
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#ifndef _E1000_OSDEP_H_ |
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#define _E1000_OSDEP_H_ |
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#include <asm/io.h> |
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#define CONFIG_RAM_BASE 0x60000 |
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#define GBE_CONFIG_OFFSET 0x0 |
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#define GBE_CONFIG_RAM_BASE \ |
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((unsigned int)(CONFIG_RAM_BASE + GBE_CONFIG_OFFSET)) |
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#define GBE_CONFIG_BASE_VIRT \ |
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((void __iomem *)phys_to_virt(GBE_CONFIG_RAM_BASE)) |
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#define GBE_CONFIG_FLASH_WRITE(base, offset, count, data) \ |
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(iowrite16_rep(base + offset, data, count)) |
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#define GBE_CONFIG_FLASH_READ(base, offset, count, data) \ |
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(ioread16_rep(base + (offset << 1), data, count)) |
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#define er32(reg) \ |
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(readl(hw->hw_addr + ((hw->mac_type >= e1000_82543) \ |
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? E1000_##reg : E1000_82542_##reg))) |
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#define ew32(reg, value) \ |
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(writel((value), (hw->hw_addr + ((hw->mac_type >= e1000_82543) \ |
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? E1000_##reg : E1000_82542_##reg)))) |
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#define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \ |
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writel((value), ((a)->hw_addr + \ |
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(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ |
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((offset) << 2)))) |
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#define E1000_READ_REG_ARRAY(a, reg, offset) ( \ |
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readl((a)->hw_addr + \ |
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(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ |
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((offset) << 2))) |
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#define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY |
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#define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY |
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#define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \ |
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writew((value), ((a)->hw_addr + \ |
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(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ |
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((offset) << 1)))) |
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#define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \ |
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readw((a)->hw_addr + \ |
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(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ |
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((offset) << 1))) |
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#define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \ |
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writeb((value), ((a)->hw_addr + \ |
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(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ |
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(offset)))) |
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#define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \ |
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readb((a)->hw_addr + \ |
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(((a)->mac_type >= e1000_82543) ? E1000_##reg : E1000_82542_##reg) + \ |
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(offset))) |
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#define E1000_WRITE_FLUSH() er32(STATUS) |
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#define E1000_WRITE_ICH_FLASH_REG(a, reg, value) ( \ |
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writel((value), ((a)->flash_address + reg))) |
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#define E1000_READ_ICH_FLASH_REG(a, reg) ( \ |
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readl((a)->flash_address + reg)) |
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#define E1000_WRITE_ICH_FLASH_REG16(a, reg, value) ( \ |
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writew((value), ((a)->flash_address + reg))) |
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#define E1000_READ_ICH_FLASH_REG16(a, reg) ( \ |
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readw((a)->flash_address + reg)) |
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#endif /* _E1000_OSDEP_H_ */ |