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/*******************************************************************************

     2

     3

  Intel PRO/1000 Linux driver

     4

  Copyright(c) 1999 - 2012 Intel Corporation.

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  This program is free software; you can redistribute it and/or modify it

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  under the terms and conditions of the GNU General Public License,

     8

  version 2, as published by the Free Software Foundation.

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  This program is distributed in the hope it will be useful, but WITHOUT

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  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

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  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

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  more details.

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    15

  You should have received a copy of the GNU General Public License along with

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  this program; if not, write to the Free Software Foundation, Inc.,

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  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

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    19

  The full GNU General Public License is included in this distribution in

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  the file called "COPYING".

    21

    22

  Contact Information:

    23

  Linux NICS <linux.nics@intel.com>

    24

  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>

    25

  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

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    27

*******************************************************************************/

    28

    29

/*

    30

 * 82571EB Gigabit Ethernet Controller

    31

 * 82571EB Gigabit Ethernet Controller (Copper)

    32

 * 82571EB Gigabit Ethernet Controller (Fiber)

    33

 * 82571EB Dual Port Gigabit Mezzanine Adapter

    34

 * 82571EB Quad Port Gigabit Mezzanine Adapter

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 * 82571PT Gigabit PT Quad Port Server ExpressModule

    36

 * 82572EI Gigabit Ethernet Controller (Copper)

    37

 * 82572EI Gigabit Ethernet Controller (Fiber)

    38

 * 82572EI Gigabit Ethernet Controller

    39

 * 82573V Gigabit Ethernet Controller (Copper)

    40

 * 82573E Gigabit Ethernet Controller (Copper)

    41

 * 82573L Gigabit Ethernet Controller

    42

 * 82574L Gigabit Network Connection

    43

 * 82583V Gigabit Network Connection

    44

 */

    45

    46

#include "e1000.h"

    47

    48

#define ID_LED_RESERVED_F746 0xF746

    49

#define ID_LED_DEFAULT_82573 ((ID_LED_DEF1_DEF2 << 12) | \

    50

			      (ID_LED_OFF1_ON2  <<  8) | \

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			      (ID_LED_DEF1_DEF2 <<  4) | \

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			      (ID_LED_DEF1_DEF2))

    53

    54

#define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000

    55

#define AN_RETRY_COUNT          5 /* Autoneg Retry Count value */

    56

#define E1000_BASE1000T_STATUS          10

    57

#define E1000_IDLE_ERROR_COUNT_MASK     0xFF

    58

#define E1000_RECEIVE_ERROR_COUNTER     21

    59

#define E1000_RECEIVE_ERROR_MAX         0xFFFF

    60

    61

#define E1000_NVM_INIT_CTRL2_MNGM 0x6000 /* Manageability Operation Mode mask */

    62

    63

static s32 e1000_get_phy_id_82571(struct e1000_hw *hw);

    64

static s32 e1000_setup_copper_link_82571(struct e1000_hw *hw);

    65

static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw);

    66

static s32 e1000_check_for_serdes_link_82571(struct e1000_hw *hw);

    67

static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,

    68

				      u16 words, u16 *data);

    69

static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw);

    70

static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw);

    71

static s32 e1000_setup_link_82571(struct e1000_hw *hw);

    72

static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw);

    73

static void e1000_clear_vfta_82571(struct e1000_hw *hw);

    74

static bool e1000_check_mng_mode_82574(struct e1000_hw *hw);

    75

static s32 e1000_led_on_82574(struct e1000_hw *hw);

    76

static void e1000_put_hw_semaphore_82571(struct e1000_hw *hw);

    77

static void e1000_power_down_phy_copper_82571(struct e1000_hw *hw);

    78

static void e1000_put_hw_semaphore_82573(struct e1000_hw *hw);

    79

static s32 e1000_get_hw_semaphore_82574(struct e1000_hw *hw);

    80

static void e1000_put_hw_semaphore_82574(struct e1000_hw *hw);

    81

static s32 e1000_set_d0_lplu_state_82574(struct e1000_hw *hw, bool active);

    82

static s32 e1000_set_d3_lplu_state_82574(struct e1000_hw *hw, bool active);

    83

    84

/**

    85

 *  e1000_init_phy_params_82571 - Init PHY func ptrs.

    86

 *  @hw: pointer to the HW structure

    87

 **/

    88

static s32 e1000_init_phy_params_82571(struct e1000_hw *hw)

    89

{

    90

	struct e1000_phy_info *phy = &hw->phy;

    91

	s32 ret_val;

    92

    93

	if (hw->phy.media_type != e1000_media_type_copper) {

    94

		phy->type = e1000_phy_none;

    95

		return 0;

    96

	}

    97

    98

	phy->addr			 = 1;

    99

	phy->autoneg_mask		 = AUTONEG_ADVERTISE_SPEED_DEFAULT;

   100

	phy->reset_delay_us		 = 100;

   101

   102

	phy->ops.power_up		 = e1000_power_up_phy_copper;

   103

	phy->ops.power_down		 = e1000_power_down_phy_copper_82571;

   104

   105

	switch (hw->mac.type) {

   106

	case e1000_82571:

   107

	case e1000_82572:

   108

		phy->type		 = e1000_phy_igp_2;

   109

		break;

   110

	case e1000_82573:

   111

		phy->type		 = e1000_phy_m88;

   112

		break;

   113

	case e1000_82574:

   114

	case e1000_82583:

   115

		phy->type		 = e1000_phy_bm;

   116

		phy->ops.acquire = e1000_get_hw_semaphore_82574;

   117

		phy->ops.release = e1000_put_hw_semaphore_82574;

   118

		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82574;

   119

		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82574;

   120

		break;

   121

	default:

   122

		return -E1000_ERR_PHY;

   123

		break;

   124

	}

   125

   126

	/* This can only be done after all function pointers are setup. */

   127

	ret_val = e1000_get_phy_id_82571(hw);

   128

	if (ret_val) {

   129

		e_dbg("Error getting PHY ID\n");

   130

		return ret_val;

   131

	}

   132

   133

	/* Verify phy id */

   134

	switch (hw->mac.type) {

   135

	case e1000_82571:

   136

	case e1000_82572:

   137

		if (phy->id != IGP01E1000_I_PHY_ID)

   138

			ret_val = -E1000_ERR_PHY;

   139

		break;

   140

	case e1000_82573:

   141

		if (phy->id != M88E1111_I_PHY_ID)

   142

			ret_val = -E1000_ERR_PHY;

   143

		break;

   144

	case e1000_82574:

   145

	case e1000_82583:

   146

		if (phy->id != BME1000_E_PHY_ID_R2)

   147

			ret_val = -E1000_ERR_PHY;

   148

		break;

   149

	default:

   150

		ret_val = -E1000_ERR_PHY;

   151

		break;

   152

	}

   153

   154

	if (ret_val)

   155

		e_dbg("PHY ID unknown: type = 0x%08x\n", phy->id);

   156

   157

	return ret_val;

   158

}

   159

   160

/**

   161

 *  e1000_init_nvm_params_82571 - Init NVM func ptrs.

   162

 *  @hw: pointer to the HW structure

   163

 **/

   164

static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)

   165

{

   166

	struct e1000_nvm_info *nvm = &hw->nvm;

   167

	u32 eecd = er32(EECD);

   168

	u16 size;

   169

   170

	nvm->opcode_bits = 8;

   171

	nvm->delay_usec = 1;

   172

	switch (nvm->override) {

   173

	case e1000_nvm_override_spi_large:

   174

		nvm->page_size = 32;

   175

		nvm->address_bits = 16;

   176

		break;

   177

	case e1000_nvm_override_spi_small:

   178

		nvm->page_size = 8;

   179

		nvm->address_bits = 8;

   180

		break;

   181

	default:

   182

		nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;

   183

		nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ? 16 : 8;

   184

		break;

   185

	}

   186

   187

	switch (hw->mac.type) {

   188

	case e1000_82573:

   189

	case e1000_82574:

   190

	case e1000_82583:

   191

		if (((eecd >> 15) & 0x3) == 0x3) {

   192

			nvm->type = e1000_nvm_flash_hw;

   193

			nvm->word_size = 2048;

   194

			/*

   195

			 * Autonomous Flash update bit must be cleared due

   196

			 * to Flash update issue.

   197

			 */

   198

			eecd &= ~E1000_EECD_AUPDEN;

   199

			ew32(EECD, eecd);

   200

			break;

   201

		}

   202

		/* Fall Through */

   203

	default:

   204

		nvm->type = e1000_nvm_eeprom_spi;

   205

		size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>

   206

				  E1000_EECD_SIZE_EX_SHIFT);

   207

		/*

   208

		 * Added to a constant, "size" becomes the left-shift value

   209

		 * for setting word_size.

   210

		 */

   211

		size += NVM_WORD_SIZE_BASE_SHIFT;

   212

   213

		/* EEPROM access above 16k is unsupported */

   214

		if (size > 14)

   215

			size = 14;

   216

		nvm->word_size	= 1 << size;

   217

		break;

   218

	}

   219

   220

	/* Function Pointers */

   221

	switch (hw->mac.type) {

   222

	case e1000_82574:

   223

	case e1000_82583:

   224

		nvm->ops.acquire = e1000_get_hw_semaphore_82574;

   225

		nvm->ops.release = e1000_put_hw_semaphore_82574;

   226

		break;

   227

	default:

   228

		break;

   229

	}

   230

   231

	return 0;

   232

}

   233

   234

/**

   235

 *  e1000_init_mac_params_82571 - Init MAC func ptrs.

   236

 *  @hw: pointer to the HW structure

   237

 **/

   238

static s32 e1000_init_mac_params_82571(struct e1000_hw *hw)

   239

{

   240

	struct e1000_mac_info *mac = &hw->mac;

   241

	u32 swsm = 0;

   242

	u32 swsm2 = 0;

   243

	bool force_clear_smbi = false;

   244

   245

	/* Set media type and media-dependent function pointers */

   246

	switch (hw->adapter->pdev->device) {

   247

	case E1000_DEV_ID_82571EB_FIBER:

   248

	case E1000_DEV_ID_82572EI_FIBER:

   249

	case E1000_DEV_ID_82571EB_QUAD_FIBER:

   250

		hw->phy.media_type = e1000_media_type_fiber;

   251

		mac->ops.setup_physical_interface =

   252

		    e1000_setup_fiber_serdes_link_82571;

   253

		mac->ops.check_for_link = e1000e_check_for_fiber_link;

   254

		mac->ops.get_link_up_info =

   255

		    e1000e_get_speed_and_duplex_fiber_serdes;

   256

		break;

   257

	case E1000_DEV_ID_82571EB_SERDES:

   258

	case E1000_DEV_ID_82571EB_SERDES_DUAL:

   259

	case E1000_DEV_ID_82571EB_SERDES_QUAD:

   260

	case E1000_DEV_ID_82572EI_SERDES:

   261

		hw->phy.media_type = e1000_media_type_internal_serdes;

   262

		mac->ops.setup_physical_interface =

   263

		    e1000_setup_fiber_serdes_link_82571;

   264

		mac->ops.check_for_link = e1000_check_for_serdes_link_82571;

   265

		mac->ops.get_link_up_info =

   266

		    e1000e_get_speed_and_duplex_fiber_serdes;

   267

		break;

   268

	default:

   269

		hw->phy.media_type = e1000_media_type_copper;

   270

		mac->ops.setup_physical_interface =

   271

		    e1000_setup_copper_link_82571;

   272

		mac->ops.check_for_link = e1000e_check_for_copper_link;

   273

		mac->ops.get_link_up_info = e1000e_get_speed_and_duplex_copper;

   274

		break;

   275

	}

   276

   277

	/* Set mta register count */

   278

	mac->mta_reg_count = 128;

   279

	/* Set rar entry count */

   280

	mac->rar_entry_count = E1000_RAR_ENTRIES;

   281

	/* Adaptive IFS supported */

   282

	mac->adaptive_ifs = true;

   283

   284

	/* MAC-specific function pointers */

   285

	switch (hw->mac.type) {

   286

	case e1000_82573:

   287

		mac->ops.set_lan_id = e1000_set_lan_id_single_port;

   288

		mac->ops.check_mng_mode = e1000e_check_mng_mode_generic;

   289

		mac->ops.led_on = e1000e_led_on_generic;

   290

		mac->ops.blink_led = e1000e_blink_led_generic;

   291

   292

		/* FWSM register */

   293

		mac->has_fwsm = true;

   294

		/*

   295

		 * ARC supported; valid only if manageability features are

   296

		 * enabled.

   297

		 */

   298

		mac->arc_subsystem_valid = !!(er32(FWSM) &

   299

					      E1000_FWSM_MODE_MASK);

   300

		break;

   301

	case e1000_82574:

   302

	case e1000_82583:

   303

		mac->ops.set_lan_id = e1000_set_lan_id_single_port;

   304

		mac->ops.check_mng_mode = e1000_check_mng_mode_82574;

   305

		mac->ops.led_on = e1000_led_on_82574;

   306

		break;

   307

	default:

   308

		mac->ops.check_mng_mode = e1000e_check_mng_mode_generic;

   309

		mac->ops.led_on = e1000e_led_on_generic;

   310

		mac->ops.blink_led = e1000e_blink_led_generic;

   311

   312

		/* FWSM register */

   313

		mac->has_fwsm = true;

   314

		break;

   315

	}

   316

   317

	/*

   318

	 * Ensure that the inter-port SWSM.SMBI lock bit is clear before

   319

	 * first NVM or PHY access. This should be done for single-port

   320

	 * devices, and for one port only on dual-port devices so that

   321

	 * for those devices we can still use the SMBI lock to synchronize

   322

	 * inter-port accesses to the PHY & NVM.

   323

	 */

   324

	switch (hw->mac.type) {

   325

	case e1000_82571:

   326

	case e1000_82572:

   327

		swsm2 = er32(SWSM2);

   328

   329

		if (!(swsm2 & E1000_SWSM2_LOCK)) {

   330

			/* Only do this for the first interface on this card */

   331

			ew32(SWSM2, swsm2 | E1000_SWSM2_LOCK);

   332

			force_clear_smbi = true;

   333

		} else {

   334

			force_clear_smbi = false;

   335

		}

   336

		break;

   337

	default:

   338

		force_clear_smbi = true;

   339

		break;

   340

	}

   341

   342

	if (force_clear_smbi) {

   343

		/* Make sure SWSM.SMBI is clear */

   344

		swsm = er32(SWSM);

   345

		if (swsm & E1000_SWSM_SMBI) {

   346

			/* This bit should not be set on a first interface, and

   347

			 * indicates that the bootagent or EFI code has

   348

			 * improperly left this bit enabled

   349

			 */

   350

			e_dbg("Please update your 82571 Bootagent\n");

   351

		}

   352

		ew32(SWSM, swsm & ~E1000_SWSM_SMBI);

   353

	}

   354

   355

	/*

   356

	 * Initialize device specific counter of SMBI acquisition

   357

	 * timeouts.

   358

	 */

   359

	 hw->dev_spec.e82571.smb_counter = 0;

   360

   361

	return 0;

   362

}

   363

   364

static s32 e1000_get_variants_82571(struct e1000_adapter *adapter)

   365

{

   366

	struct e1000_hw *hw = &adapter->hw;

   367

	static int global_quad_port_a; /* global port a indication */

   368

	struct pci_dev *pdev = adapter->pdev;

   369

	int is_port_b = er32(STATUS) & E1000_STATUS_FUNC_1;

   370

	s32 rc;

   371

   372

	rc = e1000_init_mac_params_82571(hw);

   373

	if (rc)

   374

		return rc;

   375

   376

	rc = e1000_init_nvm_params_82571(hw);

   377

	if (rc)

   378

		return rc;

   379

   380

	rc = e1000_init_phy_params_82571(hw);

   381

	if (rc)

   382

		return rc;

   383

   384

	/* tag quad port adapters first, it's used below */

   385

	switch (pdev->device) {

   386

	case E1000_DEV_ID_82571EB_QUAD_COPPER:

   387

	case E1000_DEV_ID_82571EB_QUAD_FIBER:

   388

	case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:

   389

	case E1000_DEV_ID_82571PT_QUAD_COPPER:

   390

		adapter->flags |= FLAG_IS_QUAD_PORT;

   391

		/* mark the first port */

   392

		if (global_quad_port_a == 0)

   393

			adapter->flags |= FLAG_IS_QUAD_PORT_A;

   394

		/* Reset for multiple quad port adapters */

   395

		global_quad_port_a++;

   396

		if (global_quad_port_a == 4)

   397

			global_quad_port_a = 0;

   398

		break;

   399

	default:

   400

		break;

   401

	}

   402

   403

	switch (adapter->hw.mac.type) {

   404

	case e1000_82571:

   405

		/* these dual ports don't have WoL on port B at all */

   406

		if (((pdev->device == E1000_DEV_ID_82571EB_FIBER) ||

   407

		     (pdev->device == E1000_DEV_ID_82571EB_SERDES) ||

   408

		     (pdev->device == E1000_DEV_ID_82571EB_COPPER)) &&

   409

		    (is_port_b))

   410

			adapter->flags &= ~FLAG_HAS_WOL;

   411

		/* quad ports only support WoL on port A */

   412

		if (adapter->flags & FLAG_IS_QUAD_PORT &&

   413

		    (!(adapter->flags & FLAG_IS_QUAD_PORT_A)))

   414

			adapter->flags &= ~FLAG_HAS_WOL;

   415

		/* Does not support WoL on any port */

   416

		if (pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD)

   417

			adapter->flags &= ~FLAG_HAS_WOL;

   418

		break;

   419

	case e1000_82573:

   420

		if (pdev->device == E1000_DEV_ID_82573L) {

   421

			adapter->flags |= FLAG_HAS_JUMBO_FRAMES;

   422

			adapter->max_hw_frame_size = DEFAULT_JUMBO;

   423

		}

   424

		break;

   425

	default:

   426

		break;

   427

	}

   428

   429

	return 0;

   430

}

   431

   432

/**

   433

 *  e1000_get_phy_id_82571 - Retrieve the PHY ID and revision

   434

 *  @hw: pointer to the HW structure

   435

 *

   436

 *  Reads the PHY registers and stores the PHY ID and possibly the PHY

   437

 *  revision in the hardware structure.

   438

 **/

   439

static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)

   440

{

   441

	struct e1000_phy_info *phy = &hw->phy;

   442

	s32 ret_val;

   443

	u16 phy_id = 0;

   444

   445

	switch (hw->mac.type) {

   446

	case e1000_82571:

   447

	case e1000_82572:

   448

		/*

   449

		 * The 82571 firmware may still be configuring the PHY.

   450

		 * In this case, we cannot access the PHY until the

   451

		 * configuration is done.  So we explicitly set the

   452

		 * PHY ID.

   453

		 */

   454

		phy->id = IGP01E1000_I_PHY_ID;

   455

		break;

   456

	case e1000_82573:

   457

		return e1000e_get_phy_id(hw);

   458

		break;

   459

	case e1000_82574:

   460

	case e1000_82583:

   461

		ret_val = e1e_rphy(hw, PHY_ID1, &phy_id);

   462

		if (ret_val)

   463

			return ret_val;

   464

   465

		phy->id = (u32)(phy_id << 16);

   466

		udelay(20);

   467

		ret_val = e1e_rphy(hw, PHY_ID2, &phy_id);

   468

		if (ret_val)

   469

			return ret_val;

   470

   471

		phy->id |= (u32)(phy_id);

   472

		phy->revision = (u32)(phy_id & ~PHY_REVISION_MASK);

   473

		break;

   474

	default:

   475

		return -E1000_ERR_PHY;

   476

		break;

   477

	}

   478

   479

	return 0;

   480

}

   481

   482

/**

   483

 *  e1000_get_hw_semaphore_82571 - Acquire hardware semaphore

   484

 *  @hw: pointer to the HW structure

   485

 *

   486

 *  Acquire the HW semaphore to access the PHY or NVM

   487

 **/

   488

static s32 e1000_get_hw_semaphore_82571(struct e1000_hw *hw)

   489

{

   490

	u32 swsm;

   491

	s32 sw_timeout = hw->nvm.word_size + 1;

   492

	s32 fw_timeout = hw->nvm.word_size + 1;

   493

	s32 i = 0;

   494

   495

	/*

   496

	 * If we have timedout 3 times on trying to acquire

   497

	 * the inter-port SMBI semaphore, there is old code

   498

	 * operating on the other port, and it is not

   499

	 * releasing SMBI. Modify the number of times that

   500

	 * we try for the semaphore to interwork with this

   501

	 * older code.

   502

	 */

   503

	if (hw->dev_spec.e82571.smb_counter > 2)

   504

		sw_timeout = 1;

   505

   506

	/* Get the SW semaphore */

   507

	while (i < sw_timeout) {

   508

		swsm = er32(SWSM);

   509

		if (!(swsm & E1000_SWSM_SMBI))

   510

			break;

   511

   512

		udelay(50);

   513

		i++;

   514

	}

   515

   516

	if (i == sw_timeout) {

   517

		e_dbg("Driver can't access device - SMBI bit is set.\n");

   518

		hw->dev_spec.e82571.smb_counter++;

   519

	}

   520

	/* Get the FW semaphore. */

   521

	for (i = 0; i < fw_timeout; i++) {

   522

		swsm = er32(SWSM);

   523

		ew32(SWSM, swsm | E1000_SWSM_SWESMBI);

   524

   525

		/* Semaphore acquired if bit latched */

   526

		if (er32(SWSM) & E1000_SWSM_SWESMBI)

   527

			break;

   528

   529

		udelay(50);